twl4030-power.c 16 KB

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  1. /*
  2. * linux/drivers/i2c/chips/twl4030-power.c
  3. *
  4. * Handle TWL4030 Power initialization
  5. *
  6. * Copyright (C) 2008 Nokia Corporation
  7. * Copyright (C) 2006 Texas Instruments, Inc
  8. *
  9. * Written by Kalle Jokiniemi
  10. * Peter De Schrijver <peter.de-schrijver@nokia.com>
  11. * Several fixes by Amit Kucheria <amit.kucheria@verdurent.com>
  12. *
  13. * This file is subject to the terms and conditions of the GNU General
  14. * Public License. See the file "COPYING" in the main directory of this
  15. * archive for more details.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/module.h>
  27. #include <linux/pm.h>
  28. #include <linux/i2c/twl.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/of.h>
  31. #include <asm/mach-types.h>
  32. static u8 twl4030_start_script_address = 0x2b;
  33. #define PWR_P1_SW_EVENTS 0x10
  34. #define PWR_DEVOFF (1 << 0)
  35. #define SEQ_OFFSYNC (1 << 0)
  36. #define PHY_TO_OFF_PM_MASTER(p) (p - 0x36)
  37. #define PHY_TO_OFF_PM_RECEIVER(p) (p - 0x5b)
  38. /* resource - hfclk */
  39. #define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECEIVER(0xe6)
  40. /* PM events */
  41. #define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46)
  42. #define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47)
  43. #define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48)
  44. #define R_CFG_P1_TRANSITION PHY_TO_OFF_PM_MASTER(0x36)
  45. #define R_CFG_P2_TRANSITION PHY_TO_OFF_PM_MASTER(0x37)
  46. #define R_CFG_P3_TRANSITION PHY_TO_OFF_PM_MASTER(0x38)
  47. #define LVL_WAKEUP 0x08
  48. #define ENABLE_WARMRESET (1<<4)
  49. #define END_OF_SCRIPT 0x3f
  50. #define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55)
  51. #define R_SEQ_ADD_S2A12 PHY_TO_OFF_PM_MASTER(0x56)
  52. #define R_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57)
  53. #define R_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58)
  54. #define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59)
  55. #define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a)
  56. /* resource configuration registers
  57. <RESOURCE>_DEV_GRP at address 'n+0'
  58. <RESOURCE>_TYPE at address 'n+1'
  59. <RESOURCE>_REMAP at address 'n+2'
  60. <RESOURCE>_DEDICATED at address 'n+3'
  61. */
  62. #define DEV_GRP_OFFSET 0
  63. #define TYPE_OFFSET 1
  64. #define REMAP_OFFSET 2
  65. #define DEDICATED_OFFSET 3
  66. /* Bit positions in the registers */
  67. /* <RESOURCE>_DEV_GRP */
  68. #define DEV_GRP_SHIFT 5
  69. #define DEV_GRP_MASK (7 << DEV_GRP_SHIFT)
  70. /* <RESOURCE>_TYPE */
  71. #define TYPE_SHIFT 0
  72. #define TYPE_MASK (7 << TYPE_SHIFT)
  73. #define TYPE2_SHIFT 3
  74. #define TYPE2_MASK (3 << TYPE2_SHIFT)
  75. /* <RESOURCE>_REMAP */
  76. #define SLEEP_STATE_SHIFT 0
  77. #define SLEEP_STATE_MASK (0xf << SLEEP_STATE_SHIFT)
  78. #define OFF_STATE_SHIFT 4
  79. #define OFF_STATE_MASK (0xf << OFF_STATE_SHIFT)
  80. static u8 res_config_addrs[] = {
  81. [RES_VAUX1] = 0x17,
  82. [RES_VAUX2] = 0x1b,
  83. [RES_VAUX3] = 0x1f,
  84. [RES_VAUX4] = 0x23,
  85. [RES_VMMC1] = 0x27,
  86. [RES_VMMC2] = 0x2b,
  87. [RES_VPLL1] = 0x2f,
  88. [RES_VPLL2] = 0x33,
  89. [RES_VSIM] = 0x37,
  90. [RES_VDAC] = 0x3b,
  91. [RES_VINTANA1] = 0x3f,
  92. [RES_VINTANA2] = 0x43,
  93. [RES_VINTDIG] = 0x47,
  94. [RES_VIO] = 0x4b,
  95. [RES_VDD1] = 0x55,
  96. [RES_VDD2] = 0x63,
  97. [RES_VUSB_1V5] = 0x71,
  98. [RES_VUSB_1V8] = 0x74,
  99. [RES_VUSB_3V1] = 0x77,
  100. [RES_VUSBCP] = 0x7a,
  101. [RES_REGEN] = 0x7f,
  102. [RES_NRES_PWRON] = 0x82,
  103. [RES_CLKEN] = 0x85,
  104. [RES_SYSEN] = 0x88,
  105. [RES_HFCLKOUT] = 0x8b,
  106. [RES_32KCLKOUT] = 0x8e,
  107. [RES_RESET] = 0x91,
  108. [RES_MAIN_REF] = 0x94,
  109. };
  110. static int twl4030_write_script_byte(u8 address, u8 byte)
  111. {
  112. int err;
  113. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_MEMORY_ADDRESS);
  114. if (err)
  115. goto out;
  116. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, byte, R_MEMORY_DATA);
  117. out:
  118. return err;
  119. }
  120. static int twl4030_write_script_ins(u8 address, u16 pmb_message,
  121. u8 delay, u8 next)
  122. {
  123. int err;
  124. address *= 4;
  125. err = twl4030_write_script_byte(address++, pmb_message >> 8);
  126. if (err)
  127. goto out;
  128. err = twl4030_write_script_byte(address++, pmb_message & 0xff);
  129. if (err)
  130. goto out;
  131. err = twl4030_write_script_byte(address++, delay);
  132. if (err)
  133. goto out;
  134. err = twl4030_write_script_byte(address++, next);
  135. out:
  136. return err;
  137. }
  138. static int twl4030_write_script(u8 address, struct twl4030_ins *script,
  139. int len)
  140. {
  141. int err = -EINVAL;
  142. for (; len; len--, address++, script++) {
  143. if (len == 1) {
  144. err = twl4030_write_script_ins(address,
  145. script->pmb_message,
  146. script->delay,
  147. END_OF_SCRIPT);
  148. if (err)
  149. break;
  150. } else {
  151. err = twl4030_write_script_ins(address,
  152. script->pmb_message,
  153. script->delay,
  154. address + 1);
  155. if (err)
  156. break;
  157. }
  158. }
  159. return err;
  160. }
  161. static int twl4030_config_wakeup3_sequence(u8 address)
  162. {
  163. int err;
  164. u8 data;
  165. /* Set SLEEP to ACTIVE SEQ address for P3 */
  166. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A3);
  167. if (err)
  168. goto out;
  169. /* P3 LVL_WAKEUP should be on LEVEL */
  170. err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P3_SW_EVENTS);
  171. if (err)
  172. goto out;
  173. data |= LVL_WAKEUP;
  174. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P3_SW_EVENTS);
  175. out:
  176. if (err)
  177. pr_err("TWL4030 wakeup sequence for P3 config error\n");
  178. return err;
  179. }
  180. static int twl4030_config_wakeup12_sequence(u8 address)
  181. {
  182. int err = 0;
  183. u8 data;
  184. /* Set SLEEP to ACTIVE SEQ address for P1 and P2 */
  185. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A12);
  186. if (err)
  187. goto out;
  188. /* P1/P2 LVL_WAKEUP should be on LEVEL */
  189. err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P1_SW_EVENTS);
  190. if (err)
  191. goto out;
  192. data |= LVL_WAKEUP;
  193. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P1_SW_EVENTS);
  194. if (err)
  195. goto out;
  196. err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P2_SW_EVENTS);
  197. if (err)
  198. goto out;
  199. data |= LVL_WAKEUP;
  200. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P2_SW_EVENTS);
  201. if (err)
  202. goto out;
  203. if (machine_is_omap_3430sdp() || machine_is_omap_ldp()) {
  204. /* Disabling AC charger effect on sleep-active transitions */
  205. err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data,
  206. R_CFG_P1_TRANSITION);
  207. if (err)
  208. goto out;
  209. data &= ~(1<<1);
  210. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data,
  211. R_CFG_P1_TRANSITION);
  212. if (err)
  213. goto out;
  214. }
  215. out:
  216. if (err)
  217. pr_err("TWL4030 wakeup sequence for P1 and P2" \
  218. "config error\n");
  219. return err;
  220. }
  221. static int twl4030_config_sleep_sequence(u8 address)
  222. {
  223. int err;
  224. /* Set ACTIVE to SLEEP SEQ address in T2 memory*/
  225. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_A2S);
  226. if (err)
  227. pr_err("TWL4030 sleep sequence config error\n");
  228. return err;
  229. }
  230. static int twl4030_config_warmreset_sequence(u8 address)
  231. {
  232. int err;
  233. u8 rd_data;
  234. /* Set WARM RESET SEQ address for P1 */
  235. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_WARM);
  236. if (err)
  237. goto out;
  238. /* P1/P2/P3 enable WARMRESET */
  239. err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P1_SW_EVENTS);
  240. if (err)
  241. goto out;
  242. rd_data |= ENABLE_WARMRESET;
  243. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P1_SW_EVENTS);
  244. if (err)
  245. goto out;
  246. err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P2_SW_EVENTS);
  247. if (err)
  248. goto out;
  249. rd_data |= ENABLE_WARMRESET;
  250. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P2_SW_EVENTS);
  251. if (err)
  252. goto out;
  253. err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P3_SW_EVENTS);
  254. if (err)
  255. goto out;
  256. rd_data |= ENABLE_WARMRESET;
  257. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P3_SW_EVENTS);
  258. out:
  259. if (err)
  260. pr_err("TWL4030 warmreset seq config error\n");
  261. return err;
  262. }
  263. static int twl4030_configure_resource(struct twl4030_resconfig *rconfig)
  264. {
  265. int rconfig_addr;
  266. int err;
  267. u8 type;
  268. u8 grp;
  269. u8 remap;
  270. if (rconfig->resource > TOTAL_RESOURCES) {
  271. pr_err("TWL4030 Resource %d does not exist\n",
  272. rconfig->resource);
  273. return -EINVAL;
  274. }
  275. rconfig_addr = res_config_addrs[rconfig->resource];
  276. /* Set resource group */
  277. err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &grp,
  278. rconfig_addr + DEV_GRP_OFFSET);
  279. if (err) {
  280. pr_err("TWL4030 Resource %d group could not be read\n",
  281. rconfig->resource);
  282. return err;
  283. }
  284. if (rconfig->devgroup != TWL4030_RESCONFIG_UNDEF) {
  285. grp &= ~DEV_GRP_MASK;
  286. grp |= rconfig->devgroup << DEV_GRP_SHIFT;
  287. err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
  288. grp, rconfig_addr + DEV_GRP_OFFSET);
  289. if (err < 0) {
  290. pr_err("TWL4030 failed to program devgroup\n");
  291. return err;
  292. }
  293. }
  294. /* Set resource types */
  295. err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &type,
  296. rconfig_addr + TYPE_OFFSET);
  297. if (err < 0) {
  298. pr_err("TWL4030 Resource %d type could not be read\n",
  299. rconfig->resource);
  300. return err;
  301. }
  302. if (rconfig->type != TWL4030_RESCONFIG_UNDEF) {
  303. type &= ~TYPE_MASK;
  304. type |= rconfig->type << TYPE_SHIFT;
  305. }
  306. if (rconfig->type2 != TWL4030_RESCONFIG_UNDEF) {
  307. type &= ~TYPE2_MASK;
  308. type |= rconfig->type2 << TYPE2_SHIFT;
  309. }
  310. err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
  311. type, rconfig_addr + TYPE_OFFSET);
  312. if (err < 0) {
  313. pr_err("TWL4030 failed to program resource type\n");
  314. return err;
  315. }
  316. /* Set remap states */
  317. err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &remap,
  318. rconfig_addr + REMAP_OFFSET);
  319. if (err < 0) {
  320. pr_err("TWL4030 Resource %d remap could not be read\n",
  321. rconfig->resource);
  322. return err;
  323. }
  324. if (rconfig->remap_off != TWL4030_RESCONFIG_UNDEF) {
  325. remap &= ~OFF_STATE_MASK;
  326. remap |= rconfig->remap_off << OFF_STATE_SHIFT;
  327. }
  328. if (rconfig->remap_sleep != TWL4030_RESCONFIG_UNDEF) {
  329. remap &= ~SLEEP_STATE_MASK;
  330. remap |= rconfig->remap_sleep << SLEEP_STATE_SHIFT;
  331. }
  332. err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
  333. remap,
  334. rconfig_addr + REMAP_OFFSET);
  335. if (err < 0) {
  336. pr_err("TWL4030 failed to program remap\n");
  337. return err;
  338. }
  339. return 0;
  340. }
  341. static int load_twl4030_script(struct twl4030_script *tscript,
  342. u8 address)
  343. {
  344. int err;
  345. static int order;
  346. /* Make sure the script isn't going beyond last valid address (0x3f) */
  347. if ((address + tscript->size) > END_OF_SCRIPT) {
  348. pr_err("TWL4030 scripts too big error\n");
  349. return -EINVAL;
  350. }
  351. err = twl4030_write_script(address, tscript->script, tscript->size);
  352. if (err)
  353. goto out;
  354. if (tscript->flags & TWL4030_WRST_SCRIPT) {
  355. err = twl4030_config_warmreset_sequence(address);
  356. if (err)
  357. goto out;
  358. }
  359. if (tscript->flags & TWL4030_WAKEUP12_SCRIPT) {
  360. err = twl4030_config_wakeup12_sequence(address);
  361. if (err)
  362. goto out;
  363. order = 1;
  364. }
  365. if (tscript->flags & TWL4030_WAKEUP3_SCRIPT) {
  366. err = twl4030_config_wakeup3_sequence(address);
  367. if (err)
  368. goto out;
  369. }
  370. if (tscript->flags & TWL4030_SLEEP_SCRIPT) {
  371. if (!order)
  372. pr_warning("TWL4030: Bad order of scripts (sleep "\
  373. "script before wakeup) Leads to boot"\
  374. "failure on some boards\n");
  375. err = twl4030_config_sleep_sequence(address);
  376. }
  377. out:
  378. return err;
  379. }
  380. int twl4030_remove_script(u8 flags)
  381. {
  382. int err = 0;
  383. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
  384. TWL4030_PM_MASTER_PROTECT_KEY);
  385. if (err) {
  386. pr_err("twl4030: unable to unlock PROTECT_KEY\n");
  387. return err;
  388. }
  389. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
  390. TWL4030_PM_MASTER_PROTECT_KEY);
  391. if (err) {
  392. pr_err("twl4030: unable to unlock PROTECT_KEY\n");
  393. return err;
  394. }
  395. if (flags & TWL4030_WRST_SCRIPT) {
  396. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
  397. R_SEQ_ADD_WARM);
  398. if (err)
  399. return err;
  400. }
  401. if (flags & TWL4030_WAKEUP12_SCRIPT) {
  402. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
  403. R_SEQ_ADD_S2A12);
  404. if (err)
  405. return err;
  406. }
  407. if (flags & TWL4030_WAKEUP3_SCRIPT) {
  408. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
  409. R_SEQ_ADD_S2A3);
  410. if (err)
  411. return err;
  412. }
  413. if (flags & TWL4030_SLEEP_SCRIPT) {
  414. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
  415. R_SEQ_ADD_A2S);
  416. if (err)
  417. return err;
  418. }
  419. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
  420. TWL4030_PM_MASTER_PROTECT_KEY);
  421. if (err)
  422. pr_err("TWL4030 Unable to relock registers\n");
  423. return err;
  424. }
  425. static int twl4030_power_configure_scripts(struct twl4030_power_data *pdata)
  426. {
  427. int err;
  428. int i;
  429. u8 address = twl4030_start_script_address;
  430. for (i = 0; i < pdata->num; i++) {
  431. err = load_twl4030_script(pdata->scripts[i], address);
  432. if (err)
  433. return err;
  434. address += pdata->scripts[i]->size;
  435. }
  436. return 0;
  437. }
  438. static int twl4030_power_configure_resources(struct twl4030_power_data *pdata)
  439. {
  440. struct twl4030_resconfig *resconfig = pdata->resource_config;
  441. int err;
  442. if (resconfig) {
  443. while (resconfig->resource) {
  444. err = twl4030_configure_resource(resconfig);
  445. if (err)
  446. return err;
  447. resconfig++;
  448. }
  449. }
  450. return 0;
  451. }
  452. /*
  453. * In master mode, start the power off sequence.
  454. * After a successful execution, TWL shuts down the power to the SoC
  455. * and all peripherals connected to it.
  456. */
  457. void twl4030_power_off(void)
  458. {
  459. int err;
  460. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, PWR_DEVOFF,
  461. TWL4030_PM_MASTER_P1_SW_EVENTS);
  462. if (err)
  463. pr_err("TWL4030 Unable to power off\n");
  464. }
  465. static bool twl4030_power_use_poweroff(struct twl4030_power_data *pdata,
  466. struct device_node *node)
  467. {
  468. if (pdata && pdata->use_poweroff)
  469. return true;
  470. if (of_property_read_bool(node, "ti,use_poweroff"))
  471. return true;
  472. return false;
  473. }
  474. static int twl4030_power_probe(struct platform_device *pdev)
  475. {
  476. struct twl4030_power_data *pdata = dev_get_platdata(&pdev->dev);
  477. struct device_node *node = pdev->dev.of_node;
  478. int err = 0;
  479. int err2 = 0;
  480. u8 val;
  481. if (!pdata && !node) {
  482. dev_err(&pdev->dev, "Platform data is missing\n");
  483. return -EINVAL;
  484. }
  485. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
  486. TWL4030_PM_MASTER_PROTECT_KEY);
  487. err |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
  488. TWL4030_PM_MASTER_KEY_CFG2,
  489. TWL4030_PM_MASTER_PROTECT_KEY);
  490. if (err) {
  491. pr_err("TWL4030 Unable to unlock registers\n");
  492. return err;
  493. }
  494. if (pdata) {
  495. /* TODO: convert to device tree */
  496. err = twl4030_power_configure_scripts(pdata);
  497. if (err) {
  498. pr_err("TWL4030 failed to load scripts\n");
  499. goto relock;
  500. }
  501. err = twl4030_power_configure_resources(pdata);
  502. if (err) {
  503. pr_err("TWL4030 failed to configure resource\n");
  504. goto relock;
  505. }
  506. }
  507. /* Board has to be wired properly to use this feature */
  508. if (twl4030_power_use_poweroff(pdata, node) && !pm_power_off) {
  509. /* Default for SEQ_OFFSYNC is set, lets ensure this */
  510. err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
  511. TWL4030_PM_MASTER_CFG_P123_TRANSITION);
  512. if (err) {
  513. pr_warning("TWL4030 Unable to read registers\n");
  514. } else if (!(val & SEQ_OFFSYNC)) {
  515. val |= SEQ_OFFSYNC;
  516. err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val,
  517. TWL4030_PM_MASTER_CFG_P123_TRANSITION);
  518. if (err) {
  519. pr_err("TWL4030 Unable to setup SEQ_OFFSYNC\n");
  520. goto relock;
  521. }
  522. }
  523. pm_power_off = twl4030_power_off;
  524. }
  525. relock:
  526. err2 = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
  527. TWL4030_PM_MASTER_PROTECT_KEY);
  528. if (err2) {
  529. pr_err("TWL4030 Unable to relock registers\n");
  530. return err2;
  531. }
  532. return err;
  533. }
  534. static int twl4030_power_remove(struct platform_device *pdev)
  535. {
  536. return 0;
  537. }
  538. #ifdef CONFIG_OF
  539. static const struct of_device_id twl4030_power_of_match[] = {
  540. {.compatible = "ti,twl4030-power", },
  541. { },
  542. };
  543. MODULE_DEVICE_TABLE(of, twl4030_power_of_match);
  544. #endif
  545. static struct platform_driver twl4030_power_driver = {
  546. .driver = {
  547. .name = "twl4030_power",
  548. .owner = THIS_MODULE,
  549. .of_match_table = of_match_ptr(twl4030_power_of_match),
  550. },
  551. .probe = twl4030_power_probe,
  552. .remove = twl4030_power_remove,
  553. };
  554. module_platform_driver(twl4030_power_driver);
  555. MODULE_AUTHOR("Nokia Corporation");
  556. MODULE_AUTHOR("Texas Instruments, Inc.");
  557. MODULE_DESCRIPTION("Power management for TWL4030");
  558. MODULE_LICENSE("GPL");
  559. MODULE_ALIAS("platform:twl4030_power");