mt9m111.c 28 KB

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  1. /*
  2. * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
  3. *
  4. * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/videodev2.h>
  11. #include <linux/slab.h>
  12. #include <linux/i2c.h>
  13. #include <linux/log2.h>
  14. #include <linux/gpio.h>
  15. #include <linux/delay.h>
  16. #include <linux/v4l2-mediabus.h>
  17. #include <linux/module.h>
  18. #include <media/soc_camera.h>
  19. #include <media/v4l2-clk.h>
  20. #include <media/v4l2-common.h>
  21. #include <media/v4l2-ctrls.h>
  22. /*
  23. * MT9M111, MT9M112 and MT9M131:
  24. * i2c address is 0x48 or 0x5d (depending on SADDR pin)
  25. * The platform has to define struct i2c_board_info objects and link to them
  26. * from struct soc_camera_host_desc
  27. */
  28. /*
  29. * Sensor core register addresses (0x000..0x0ff)
  30. */
  31. #define MT9M111_CHIP_VERSION 0x000
  32. #define MT9M111_ROW_START 0x001
  33. #define MT9M111_COLUMN_START 0x002
  34. #define MT9M111_WINDOW_HEIGHT 0x003
  35. #define MT9M111_WINDOW_WIDTH 0x004
  36. #define MT9M111_HORIZONTAL_BLANKING_B 0x005
  37. #define MT9M111_VERTICAL_BLANKING_B 0x006
  38. #define MT9M111_HORIZONTAL_BLANKING_A 0x007
  39. #define MT9M111_VERTICAL_BLANKING_A 0x008
  40. #define MT9M111_SHUTTER_WIDTH 0x009
  41. #define MT9M111_ROW_SPEED 0x00a
  42. #define MT9M111_EXTRA_DELAY 0x00b
  43. #define MT9M111_SHUTTER_DELAY 0x00c
  44. #define MT9M111_RESET 0x00d
  45. #define MT9M111_READ_MODE_B 0x020
  46. #define MT9M111_READ_MODE_A 0x021
  47. #define MT9M111_FLASH_CONTROL 0x023
  48. #define MT9M111_GREEN1_GAIN 0x02b
  49. #define MT9M111_BLUE_GAIN 0x02c
  50. #define MT9M111_RED_GAIN 0x02d
  51. #define MT9M111_GREEN2_GAIN 0x02e
  52. #define MT9M111_GLOBAL_GAIN 0x02f
  53. #define MT9M111_CONTEXT_CONTROL 0x0c8
  54. #define MT9M111_PAGE_MAP 0x0f0
  55. #define MT9M111_BYTE_WISE_ADDR 0x0f1
  56. #define MT9M111_RESET_SYNC_CHANGES (1 << 15)
  57. #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
  58. #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
  59. #define MT9M111_RESET_RESET_SOC (1 << 5)
  60. #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
  61. #define MT9M111_RESET_CHIP_ENABLE (1 << 3)
  62. #define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
  63. #define MT9M111_RESET_RESTART_FRAME (1 << 1)
  64. #define MT9M111_RESET_RESET_MODE (1 << 0)
  65. #define MT9M111_RM_FULL_POWER_RD (0 << 10)
  66. #define MT9M111_RM_LOW_POWER_RD (1 << 10)
  67. #define MT9M111_RM_COL_SKIP_4X (1 << 5)
  68. #define MT9M111_RM_ROW_SKIP_4X (1 << 4)
  69. #define MT9M111_RM_COL_SKIP_2X (1 << 3)
  70. #define MT9M111_RM_ROW_SKIP_2X (1 << 2)
  71. #define MT9M111_RMB_MIRROR_COLS (1 << 1)
  72. #define MT9M111_RMB_MIRROR_ROWS (1 << 0)
  73. #define MT9M111_CTXT_CTRL_RESTART (1 << 15)
  74. #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
  75. #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
  76. #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
  77. #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
  78. #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
  79. #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
  80. #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
  81. #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
  82. #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
  83. /*
  84. * Colorpipe register addresses (0x100..0x1ff)
  85. */
  86. #define MT9M111_OPER_MODE_CTRL 0x106
  87. #define MT9M111_OUTPUT_FORMAT_CTRL 0x108
  88. #define MT9M111_REDUCER_XZOOM_B 0x1a0
  89. #define MT9M111_REDUCER_XSIZE_B 0x1a1
  90. #define MT9M111_REDUCER_YZOOM_B 0x1a3
  91. #define MT9M111_REDUCER_YSIZE_B 0x1a4
  92. #define MT9M111_REDUCER_XZOOM_A 0x1a6
  93. #define MT9M111_REDUCER_XSIZE_A 0x1a7
  94. #define MT9M111_REDUCER_YZOOM_A 0x1a9
  95. #define MT9M111_REDUCER_YSIZE_A 0x1aa
  96. #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
  97. #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
  98. #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
  99. #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
  100. #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9)
  101. #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8)
  102. #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
  103. #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
  104. #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
  105. #define MT9M111_OUTFMT_RGB (1 << 8)
  106. #define MT9M111_OUTFMT_RGB565 (0 << 6)
  107. #define MT9M111_OUTFMT_RGB555 (1 << 6)
  108. #define MT9M111_OUTFMT_RGB444x (2 << 6)
  109. #define MT9M111_OUTFMT_RGBx444 (3 << 6)
  110. #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
  111. #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
  112. #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
  113. #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
  114. #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
  115. #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
  116. #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1)
  117. #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0)
  118. /*
  119. * Camera control register addresses (0x200..0x2ff not implemented)
  120. */
  121. #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
  122. #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
  123. #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
  124. #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
  125. #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \
  126. (val), (mask))
  127. #define MT9M111_MIN_DARK_ROWS 8
  128. #define MT9M111_MIN_DARK_COLS 26
  129. #define MT9M111_MAX_HEIGHT 1024
  130. #define MT9M111_MAX_WIDTH 1280
  131. struct mt9m111_context {
  132. u16 read_mode;
  133. u16 blanking_h;
  134. u16 blanking_v;
  135. u16 reducer_xzoom;
  136. u16 reducer_yzoom;
  137. u16 reducer_xsize;
  138. u16 reducer_ysize;
  139. u16 output_fmt_ctrl2;
  140. u16 control;
  141. };
  142. static struct mt9m111_context context_a = {
  143. .read_mode = MT9M111_READ_MODE_A,
  144. .blanking_h = MT9M111_HORIZONTAL_BLANKING_A,
  145. .blanking_v = MT9M111_VERTICAL_BLANKING_A,
  146. .reducer_xzoom = MT9M111_REDUCER_XZOOM_A,
  147. .reducer_yzoom = MT9M111_REDUCER_YZOOM_A,
  148. .reducer_xsize = MT9M111_REDUCER_XSIZE_A,
  149. .reducer_ysize = MT9M111_REDUCER_YSIZE_A,
  150. .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_A,
  151. .control = MT9M111_CTXT_CTRL_RESTART,
  152. };
  153. static struct mt9m111_context context_b = {
  154. .read_mode = MT9M111_READ_MODE_B,
  155. .blanking_h = MT9M111_HORIZONTAL_BLANKING_B,
  156. .blanking_v = MT9M111_VERTICAL_BLANKING_B,
  157. .reducer_xzoom = MT9M111_REDUCER_XZOOM_B,
  158. .reducer_yzoom = MT9M111_REDUCER_YZOOM_B,
  159. .reducer_xsize = MT9M111_REDUCER_XSIZE_B,
  160. .reducer_ysize = MT9M111_REDUCER_YSIZE_B,
  161. .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_B,
  162. .control = MT9M111_CTXT_CTRL_RESTART |
  163. MT9M111_CTXT_CTRL_DEFECTCOR_B | MT9M111_CTXT_CTRL_RESIZE_B |
  164. MT9M111_CTXT_CTRL_CTRL2_B | MT9M111_CTXT_CTRL_GAMMA_B |
  165. MT9M111_CTXT_CTRL_READ_MODE_B | MT9M111_CTXT_CTRL_VBLANK_SEL_B |
  166. MT9M111_CTXT_CTRL_HBLANK_SEL_B,
  167. };
  168. /* MT9M111 has only one fixed colorspace per pixelcode */
  169. struct mt9m111_datafmt {
  170. enum v4l2_mbus_pixelcode code;
  171. enum v4l2_colorspace colorspace;
  172. };
  173. static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
  174. {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
  175. {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
  176. {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG},
  177. {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG},
  178. {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  179. {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
  180. {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
  181. {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
  182. {V4L2_MBUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB},
  183. {V4L2_MBUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB},
  184. {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
  185. {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  186. };
  187. struct mt9m111 {
  188. struct v4l2_subdev subdev;
  189. struct v4l2_ctrl_handler hdl;
  190. struct v4l2_ctrl *gain;
  191. struct mt9m111_context *ctx;
  192. struct v4l2_rect rect; /* cropping rectangle */
  193. struct v4l2_clk *clk;
  194. int width; /* output */
  195. int height; /* sizes */
  196. struct mutex power_lock; /* lock to protect power_count */
  197. int power_count;
  198. const struct mt9m111_datafmt *fmt;
  199. int lastpage; /* PageMap cache value */
  200. };
  201. /* Find a data format by a pixel code */
  202. static const struct mt9m111_datafmt *mt9m111_find_datafmt(struct mt9m111 *mt9m111,
  203. enum v4l2_mbus_pixelcode code)
  204. {
  205. int i;
  206. for (i = 0; i < ARRAY_SIZE(mt9m111_colour_fmts); i++)
  207. if (mt9m111_colour_fmts[i].code == code)
  208. return mt9m111_colour_fmts + i;
  209. return mt9m111->fmt;
  210. }
  211. static struct mt9m111 *to_mt9m111(const struct i2c_client *client)
  212. {
  213. return container_of(i2c_get_clientdata(client), struct mt9m111, subdev);
  214. }
  215. static int reg_page_map_set(struct i2c_client *client, const u16 reg)
  216. {
  217. int ret;
  218. u16 page;
  219. struct mt9m111 *mt9m111 = to_mt9m111(client);
  220. page = (reg >> 8);
  221. if (page == mt9m111->lastpage)
  222. return 0;
  223. if (page > 2)
  224. return -EINVAL;
  225. ret = i2c_smbus_write_word_swapped(client, MT9M111_PAGE_MAP, page);
  226. if (!ret)
  227. mt9m111->lastpage = page;
  228. return ret;
  229. }
  230. static int mt9m111_reg_read(struct i2c_client *client, const u16 reg)
  231. {
  232. int ret;
  233. ret = reg_page_map_set(client, reg);
  234. if (!ret)
  235. ret = i2c_smbus_read_word_swapped(client, reg & 0xff);
  236. dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret);
  237. return ret;
  238. }
  239. static int mt9m111_reg_write(struct i2c_client *client, const u16 reg,
  240. const u16 data)
  241. {
  242. int ret;
  243. ret = reg_page_map_set(client, reg);
  244. if (!ret)
  245. ret = i2c_smbus_write_word_swapped(client, reg & 0xff, data);
  246. dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret);
  247. return ret;
  248. }
  249. static int mt9m111_reg_set(struct i2c_client *client, const u16 reg,
  250. const u16 data)
  251. {
  252. int ret;
  253. ret = mt9m111_reg_read(client, reg);
  254. if (ret >= 0)
  255. ret = mt9m111_reg_write(client, reg, ret | data);
  256. return ret;
  257. }
  258. static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg,
  259. const u16 data)
  260. {
  261. int ret;
  262. ret = mt9m111_reg_read(client, reg);
  263. if (ret >= 0)
  264. ret = mt9m111_reg_write(client, reg, ret & ~data);
  265. return ret;
  266. }
  267. static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg,
  268. const u16 data, const u16 mask)
  269. {
  270. int ret;
  271. ret = mt9m111_reg_read(client, reg);
  272. if (ret >= 0)
  273. ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data);
  274. return ret;
  275. }
  276. static int mt9m111_set_context(struct mt9m111 *mt9m111,
  277. struct mt9m111_context *ctx)
  278. {
  279. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  280. return reg_write(CONTEXT_CONTROL, ctx->control);
  281. }
  282. static int mt9m111_setup_rect_ctx(struct mt9m111 *mt9m111,
  283. struct mt9m111_context *ctx, struct v4l2_rect *rect,
  284. unsigned int width, unsigned int height)
  285. {
  286. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  287. int ret = mt9m111_reg_write(client, ctx->reducer_xzoom, rect->width);
  288. if (!ret)
  289. ret = mt9m111_reg_write(client, ctx->reducer_yzoom, rect->height);
  290. if (!ret)
  291. ret = mt9m111_reg_write(client, ctx->reducer_xsize, width);
  292. if (!ret)
  293. ret = mt9m111_reg_write(client, ctx->reducer_ysize, height);
  294. return ret;
  295. }
  296. static int mt9m111_setup_geometry(struct mt9m111 *mt9m111, struct v4l2_rect *rect,
  297. int width, int height, enum v4l2_mbus_pixelcode code)
  298. {
  299. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  300. int ret;
  301. ret = reg_write(COLUMN_START, rect->left);
  302. if (!ret)
  303. ret = reg_write(ROW_START, rect->top);
  304. if (!ret)
  305. ret = reg_write(WINDOW_WIDTH, rect->width);
  306. if (!ret)
  307. ret = reg_write(WINDOW_HEIGHT, rect->height);
  308. if (code != V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
  309. /* IFP in use, down-scaling possible */
  310. if (!ret)
  311. ret = mt9m111_setup_rect_ctx(mt9m111, &context_b,
  312. rect, width, height);
  313. if (!ret)
  314. ret = mt9m111_setup_rect_ctx(mt9m111, &context_a,
  315. rect, width, height);
  316. }
  317. dev_dbg(&client->dev, "%s(%x): %ux%u@%u:%u -> %ux%u = %d\n",
  318. __func__, code, rect->width, rect->height, rect->left, rect->top,
  319. width, height, ret);
  320. return ret;
  321. }
  322. static int mt9m111_enable(struct mt9m111 *mt9m111)
  323. {
  324. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  325. return reg_write(RESET, MT9M111_RESET_CHIP_ENABLE);
  326. }
  327. static int mt9m111_reset(struct mt9m111 *mt9m111)
  328. {
  329. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  330. int ret;
  331. ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
  332. if (!ret)
  333. ret = reg_set(RESET, MT9M111_RESET_RESET_SOC);
  334. if (!ret)
  335. ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE
  336. | MT9M111_RESET_RESET_SOC);
  337. return ret;
  338. }
  339. static int mt9m111_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a)
  340. {
  341. struct v4l2_rect rect = a->c;
  342. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  343. int width, height;
  344. int ret;
  345. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  346. return -EINVAL;
  347. if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  348. mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
  349. /* Bayer format - even size lengths */
  350. rect.width = ALIGN(rect.width, 2);
  351. rect.height = ALIGN(rect.height, 2);
  352. /* Let the user play with the starting pixel */
  353. }
  354. /* FIXME: the datasheet doesn't specify minimum sizes */
  355. soc_camera_limit_side(&rect.left, &rect.width,
  356. MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH);
  357. soc_camera_limit_side(&rect.top, &rect.height,
  358. MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT);
  359. width = min(mt9m111->width, rect.width);
  360. height = min(mt9m111->height, rect.height);
  361. ret = mt9m111_setup_geometry(mt9m111, &rect, width, height, mt9m111->fmt->code);
  362. if (!ret) {
  363. mt9m111->rect = rect;
  364. mt9m111->width = width;
  365. mt9m111->height = height;
  366. }
  367. return ret;
  368. }
  369. static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  370. {
  371. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  372. a->c = mt9m111->rect;
  373. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  374. return 0;
  375. }
  376. static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
  377. {
  378. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  379. return -EINVAL;
  380. a->bounds.left = MT9M111_MIN_DARK_COLS;
  381. a->bounds.top = MT9M111_MIN_DARK_ROWS;
  382. a->bounds.width = MT9M111_MAX_WIDTH;
  383. a->bounds.height = MT9M111_MAX_HEIGHT;
  384. a->defrect = a->bounds;
  385. a->pixelaspect.numerator = 1;
  386. a->pixelaspect.denominator = 1;
  387. return 0;
  388. }
  389. static int mt9m111_g_fmt(struct v4l2_subdev *sd,
  390. struct v4l2_mbus_framefmt *mf)
  391. {
  392. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  393. mf->width = mt9m111->width;
  394. mf->height = mt9m111->height;
  395. mf->code = mt9m111->fmt->code;
  396. mf->colorspace = mt9m111->fmt->colorspace;
  397. mf->field = V4L2_FIELD_NONE;
  398. return 0;
  399. }
  400. static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
  401. enum v4l2_mbus_pixelcode code)
  402. {
  403. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  404. u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
  405. MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB |
  406. MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 |
  407. MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 |
  408. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  409. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  410. int ret;
  411. switch (code) {
  412. case V4L2_MBUS_FMT_SBGGR8_1X8:
  413. data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
  414. MT9M111_OUTFMT_RGB;
  415. break;
  416. case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
  417. data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB;
  418. break;
  419. case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
  420. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 |
  421. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  422. break;
  423. case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
  424. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555;
  425. break;
  426. case V4L2_MBUS_FMT_RGB565_2X8_LE:
  427. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  428. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  429. break;
  430. case V4L2_MBUS_FMT_RGB565_2X8_BE:
  431. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565;
  432. break;
  433. case V4L2_MBUS_FMT_BGR565_2X8_BE:
  434. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  435. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  436. break;
  437. case V4L2_MBUS_FMT_BGR565_2X8_LE:
  438. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  439. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  440. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  441. break;
  442. case V4L2_MBUS_FMT_UYVY8_2X8:
  443. data_outfmt2 = 0;
  444. break;
  445. case V4L2_MBUS_FMT_VYUY8_2X8:
  446. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  447. break;
  448. case V4L2_MBUS_FMT_YUYV8_2X8:
  449. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  450. break;
  451. case V4L2_MBUS_FMT_YVYU8_2X8:
  452. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  453. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  454. break;
  455. default:
  456. dev_err(&client->dev, "Pixel format not handled: %x\n", code);
  457. return -EINVAL;
  458. }
  459. ret = mt9m111_reg_mask(client, context_a.output_fmt_ctrl2,
  460. data_outfmt2, mask_outfmt2);
  461. if (!ret)
  462. ret = mt9m111_reg_mask(client, context_b.output_fmt_ctrl2,
  463. data_outfmt2, mask_outfmt2);
  464. return ret;
  465. }
  466. static int mt9m111_try_fmt(struct v4l2_subdev *sd,
  467. struct v4l2_mbus_framefmt *mf)
  468. {
  469. struct i2c_client *client = v4l2_get_subdevdata(sd);
  470. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  471. const struct mt9m111_datafmt *fmt;
  472. struct v4l2_rect *rect = &mt9m111->rect;
  473. bool bayer;
  474. fmt = mt9m111_find_datafmt(mt9m111, mf->code);
  475. bayer = fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  476. fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
  477. /*
  478. * With Bayer format enforce even side lengths, but let the user play
  479. * with the starting pixel
  480. */
  481. if (bayer) {
  482. rect->width = ALIGN(rect->width, 2);
  483. rect->height = ALIGN(rect->height, 2);
  484. }
  485. if (fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
  486. /* IFP bypass mode, no scaling */
  487. mf->width = rect->width;
  488. mf->height = rect->height;
  489. } else {
  490. /* No upscaling */
  491. if (mf->width > rect->width)
  492. mf->width = rect->width;
  493. if (mf->height > rect->height)
  494. mf->height = rect->height;
  495. }
  496. dev_dbg(&client->dev, "%s(): %ux%u, code=%x\n", __func__,
  497. mf->width, mf->height, fmt->code);
  498. mf->code = fmt->code;
  499. mf->colorspace = fmt->colorspace;
  500. return 0;
  501. }
  502. static int mt9m111_s_fmt(struct v4l2_subdev *sd,
  503. struct v4l2_mbus_framefmt *mf)
  504. {
  505. const struct mt9m111_datafmt *fmt;
  506. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  507. struct v4l2_rect *rect = &mt9m111->rect;
  508. int ret;
  509. mt9m111_try_fmt(sd, mf);
  510. fmt = mt9m111_find_datafmt(mt9m111, mf->code);
  511. /* try_fmt() guarantees fmt != NULL && fmt->code == mf->code */
  512. ret = mt9m111_setup_geometry(mt9m111, rect, mf->width, mf->height, mf->code);
  513. if (!ret)
  514. ret = mt9m111_set_pixfmt(mt9m111, mf->code);
  515. if (!ret) {
  516. mt9m111->width = mf->width;
  517. mt9m111->height = mf->height;
  518. mt9m111->fmt = fmt;
  519. }
  520. return ret;
  521. }
  522. #ifdef CONFIG_VIDEO_ADV_DEBUG
  523. static int mt9m111_g_register(struct v4l2_subdev *sd,
  524. struct v4l2_dbg_register *reg)
  525. {
  526. struct i2c_client *client = v4l2_get_subdevdata(sd);
  527. int val;
  528. if (reg->reg > 0x2ff)
  529. return -EINVAL;
  530. val = mt9m111_reg_read(client, reg->reg);
  531. reg->size = 2;
  532. reg->val = (u64)val;
  533. if (reg->val > 0xffff)
  534. return -EIO;
  535. return 0;
  536. }
  537. static int mt9m111_s_register(struct v4l2_subdev *sd,
  538. const struct v4l2_dbg_register *reg)
  539. {
  540. struct i2c_client *client = v4l2_get_subdevdata(sd);
  541. if (reg->reg > 0x2ff)
  542. return -EINVAL;
  543. if (mt9m111_reg_write(client, reg->reg, reg->val) < 0)
  544. return -EIO;
  545. return 0;
  546. }
  547. #endif
  548. static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask)
  549. {
  550. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  551. int ret;
  552. if (flip)
  553. ret = mt9m111_reg_set(client, mt9m111->ctx->read_mode, mask);
  554. else
  555. ret = mt9m111_reg_clear(client, mt9m111->ctx->read_mode, mask);
  556. return ret;
  557. }
  558. static int mt9m111_get_global_gain(struct mt9m111 *mt9m111)
  559. {
  560. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  561. int data;
  562. data = reg_read(GLOBAL_GAIN);
  563. if (data >= 0)
  564. return (data & 0x2f) * (1 << ((data >> 10) & 1)) *
  565. (1 << ((data >> 9) & 1));
  566. return data;
  567. }
  568. static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain)
  569. {
  570. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  571. u16 val;
  572. if (gain > 63 * 2 * 2)
  573. return -EINVAL;
  574. if ((gain >= 64 * 2) && (gain < 63 * 2 * 2))
  575. val = (1 << 10) | (1 << 9) | (gain / 4);
  576. else if ((gain >= 64) && (gain < 64 * 2))
  577. val = (1 << 9) | (gain / 2);
  578. else
  579. val = gain;
  580. return reg_write(GLOBAL_GAIN, val);
  581. }
  582. static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int val)
  583. {
  584. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  585. if (val == V4L2_EXPOSURE_AUTO)
  586. return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
  587. return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
  588. }
  589. static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on)
  590. {
  591. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  592. if (on)
  593. return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
  594. return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
  595. }
  596. static int mt9m111_s_ctrl(struct v4l2_ctrl *ctrl)
  597. {
  598. struct mt9m111 *mt9m111 = container_of(ctrl->handler,
  599. struct mt9m111, hdl);
  600. switch (ctrl->id) {
  601. case V4L2_CID_VFLIP:
  602. return mt9m111_set_flip(mt9m111, ctrl->val,
  603. MT9M111_RMB_MIRROR_ROWS);
  604. case V4L2_CID_HFLIP:
  605. return mt9m111_set_flip(mt9m111, ctrl->val,
  606. MT9M111_RMB_MIRROR_COLS);
  607. case V4L2_CID_GAIN:
  608. return mt9m111_set_global_gain(mt9m111, ctrl->val);
  609. case V4L2_CID_EXPOSURE_AUTO:
  610. return mt9m111_set_autoexposure(mt9m111, ctrl->val);
  611. case V4L2_CID_AUTO_WHITE_BALANCE:
  612. return mt9m111_set_autowhitebalance(mt9m111, ctrl->val);
  613. }
  614. return -EINVAL;
  615. }
  616. static int mt9m111_suspend(struct mt9m111 *mt9m111)
  617. {
  618. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  619. int ret;
  620. v4l2_ctrl_s_ctrl(mt9m111->gain, mt9m111_get_global_gain(mt9m111));
  621. ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
  622. if (!ret)
  623. ret = reg_set(RESET, MT9M111_RESET_RESET_SOC |
  624. MT9M111_RESET_OUTPUT_DISABLE |
  625. MT9M111_RESET_ANALOG_STANDBY);
  626. if (!ret)
  627. ret = reg_clear(RESET, MT9M111_RESET_CHIP_ENABLE);
  628. return ret;
  629. }
  630. static void mt9m111_restore_state(struct mt9m111 *mt9m111)
  631. {
  632. mt9m111_set_context(mt9m111, mt9m111->ctx);
  633. mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code);
  634. mt9m111_setup_geometry(mt9m111, &mt9m111->rect,
  635. mt9m111->width, mt9m111->height, mt9m111->fmt->code);
  636. v4l2_ctrl_handler_setup(&mt9m111->hdl);
  637. }
  638. static int mt9m111_resume(struct mt9m111 *mt9m111)
  639. {
  640. int ret = mt9m111_enable(mt9m111);
  641. if (!ret)
  642. ret = mt9m111_reset(mt9m111);
  643. if (!ret)
  644. mt9m111_restore_state(mt9m111);
  645. return ret;
  646. }
  647. static int mt9m111_init(struct mt9m111 *mt9m111)
  648. {
  649. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  650. int ret;
  651. ret = mt9m111_enable(mt9m111);
  652. if (!ret)
  653. ret = mt9m111_reset(mt9m111);
  654. if (!ret)
  655. ret = mt9m111_set_context(mt9m111, mt9m111->ctx);
  656. if (ret)
  657. dev_err(&client->dev, "mt9m111 init failed: %d\n", ret);
  658. return ret;
  659. }
  660. static int mt9m111_power_on(struct mt9m111 *mt9m111)
  661. {
  662. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  663. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  664. int ret;
  665. ret = soc_camera_power_on(&client->dev, ssdd, mt9m111->clk);
  666. if (ret < 0)
  667. return ret;
  668. ret = mt9m111_resume(mt9m111);
  669. if (ret < 0) {
  670. dev_err(&client->dev, "Failed to resume the sensor: %d\n", ret);
  671. soc_camera_power_off(&client->dev, ssdd, mt9m111->clk);
  672. }
  673. return ret;
  674. }
  675. static void mt9m111_power_off(struct mt9m111 *mt9m111)
  676. {
  677. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  678. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  679. mt9m111_suspend(mt9m111);
  680. soc_camera_power_off(&client->dev, ssdd, mt9m111->clk);
  681. }
  682. static int mt9m111_s_power(struct v4l2_subdev *sd, int on)
  683. {
  684. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  685. int ret = 0;
  686. mutex_lock(&mt9m111->power_lock);
  687. /*
  688. * If the power count is modified from 0 to != 0 or from != 0 to 0,
  689. * update the power state.
  690. */
  691. if (mt9m111->power_count == !on) {
  692. if (on)
  693. ret = mt9m111_power_on(mt9m111);
  694. else
  695. mt9m111_power_off(mt9m111);
  696. }
  697. if (!ret) {
  698. /* Update the power count. */
  699. mt9m111->power_count += on ? 1 : -1;
  700. WARN_ON(mt9m111->power_count < 0);
  701. }
  702. mutex_unlock(&mt9m111->power_lock);
  703. return ret;
  704. }
  705. static const struct v4l2_ctrl_ops mt9m111_ctrl_ops = {
  706. .s_ctrl = mt9m111_s_ctrl,
  707. };
  708. static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = {
  709. .s_power = mt9m111_s_power,
  710. #ifdef CONFIG_VIDEO_ADV_DEBUG
  711. .g_register = mt9m111_g_register,
  712. .s_register = mt9m111_s_register,
  713. #endif
  714. };
  715. static int mt9m111_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
  716. enum v4l2_mbus_pixelcode *code)
  717. {
  718. if (index >= ARRAY_SIZE(mt9m111_colour_fmts))
  719. return -EINVAL;
  720. *code = mt9m111_colour_fmts[index].code;
  721. return 0;
  722. }
  723. static int mt9m111_g_mbus_config(struct v4l2_subdev *sd,
  724. struct v4l2_mbus_config *cfg)
  725. {
  726. struct i2c_client *client = v4l2_get_subdevdata(sd);
  727. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  728. cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
  729. V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH |
  730. V4L2_MBUS_DATA_ACTIVE_HIGH;
  731. cfg->type = V4L2_MBUS_PARALLEL;
  732. cfg->flags = soc_camera_apply_board_flags(ssdd, cfg);
  733. return 0;
  734. }
  735. static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = {
  736. .s_mbus_fmt = mt9m111_s_fmt,
  737. .g_mbus_fmt = mt9m111_g_fmt,
  738. .try_mbus_fmt = mt9m111_try_fmt,
  739. .s_crop = mt9m111_s_crop,
  740. .g_crop = mt9m111_g_crop,
  741. .cropcap = mt9m111_cropcap,
  742. .enum_mbus_fmt = mt9m111_enum_fmt,
  743. .g_mbus_config = mt9m111_g_mbus_config,
  744. };
  745. static struct v4l2_subdev_ops mt9m111_subdev_ops = {
  746. .core = &mt9m111_subdev_core_ops,
  747. .video = &mt9m111_subdev_video_ops,
  748. };
  749. /*
  750. * Interface active, can use i2c. If it fails, it can indeed mean, that
  751. * this wasn't our capture interface, so, we wait for the right one
  752. */
  753. static int mt9m111_video_probe(struct i2c_client *client)
  754. {
  755. struct mt9m111 *mt9m111 = to_mt9m111(client);
  756. s32 data;
  757. int ret;
  758. ret = mt9m111_s_power(&mt9m111->subdev, 1);
  759. if (ret < 0)
  760. return ret;
  761. data = reg_read(CHIP_VERSION);
  762. switch (data) {
  763. case 0x143a: /* MT9M111 or MT9M131 */
  764. dev_info(&client->dev,
  765. "Detected a MT9M111/MT9M131 chip ID %x\n", data);
  766. break;
  767. case 0x148c: /* MT9M112 */
  768. dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data);
  769. break;
  770. default:
  771. dev_err(&client->dev,
  772. "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
  773. data);
  774. ret = -ENODEV;
  775. goto done;
  776. }
  777. ret = mt9m111_init(mt9m111);
  778. if (ret)
  779. goto done;
  780. ret = v4l2_ctrl_handler_setup(&mt9m111->hdl);
  781. done:
  782. mt9m111_s_power(&mt9m111->subdev, 0);
  783. return ret;
  784. }
  785. static int mt9m111_probe(struct i2c_client *client,
  786. const struct i2c_device_id *did)
  787. {
  788. struct mt9m111 *mt9m111;
  789. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  790. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  791. int ret;
  792. if (!ssdd) {
  793. dev_err(&client->dev, "mt9m111: driver needs platform data\n");
  794. return -EINVAL;
  795. }
  796. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
  797. dev_warn(&adapter->dev,
  798. "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
  799. return -EIO;
  800. }
  801. mt9m111 = devm_kzalloc(&client->dev, sizeof(struct mt9m111), GFP_KERNEL);
  802. if (!mt9m111)
  803. return -ENOMEM;
  804. mt9m111->clk = v4l2_clk_get(&client->dev, "mclk");
  805. if (IS_ERR(mt9m111->clk))
  806. return -EPROBE_DEFER;
  807. /* Default HIGHPOWER context */
  808. mt9m111->ctx = &context_b;
  809. v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops);
  810. v4l2_ctrl_handler_init(&mt9m111->hdl, 5);
  811. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  812. V4L2_CID_VFLIP, 0, 1, 1, 0);
  813. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  814. V4L2_CID_HFLIP, 0, 1, 1, 0);
  815. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  816. V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
  817. mt9m111->gain = v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  818. V4L2_CID_GAIN, 0, 63 * 2 * 2, 1, 32);
  819. v4l2_ctrl_new_std_menu(&mt9m111->hdl,
  820. &mt9m111_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0,
  821. V4L2_EXPOSURE_AUTO);
  822. mt9m111->subdev.ctrl_handler = &mt9m111->hdl;
  823. if (mt9m111->hdl.error) {
  824. ret = mt9m111->hdl.error;
  825. goto out_clkput;
  826. }
  827. /* Second stage probe - when a capture adapter is there */
  828. mt9m111->rect.left = MT9M111_MIN_DARK_COLS;
  829. mt9m111->rect.top = MT9M111_MIN_DARK_ROWS;
  830. mt9m111->rect.width = MT9M111_MAX_WIDTH;
  831. mt9m111->rect.height = MT9M111_MAX_HEIGHT;
  832. mt9m111->fmt = &mt9m111_colour_fmts[0];
  833. mt9m111->lastpage = -1;
  834. mutex_init(&mt9m111->power_lock);
  835. ret = soc_camera_power_init(&client->dev, ssdd);
  836. if (ret < 0)
  837. goto out_hdlfree;
  838. ret = mt9m111_video_probe(client);
  839. if (ret < 0)
  840. goto out_hdlfree;
  841. mt9m111->subdev.dev = &client->dev;
  842. ret = v4l2_async_register_subdev(&mt9m111->subdev);
  843. if (ret < 0)
  844. goto out_hdlfree;
  845. return 0;
  846. out_hdlfree:
  847. v4l2_ctrl_handler_free(&mt9m111->hdl);
  848. out_clkput:
  849. v4l2_clk_put(mt9m111->clk);
  850. return ret;
  851. }
  852. static int mt9m111_remove(struct i2c_client *client)
  853. {
  854. struct mt9m111 *mt9m111 = to_mt9m111(client);
  855. v4l2_async_unregister_subdev(&mt9m111->subdev);
  856. v4l2_clk_put(mt9m111->clk);
  857. v4l2_device_unregister_subdev(&mt9m111->subdev);
  858. v4l2_ctrl_handler_free(&mt9m111->hdl);
  859. return 0;
  860. }
  861. static const struct i2c_device_id mt9m111_id[] = {
  862. { "mt9m111", 0 },
  863. { }
  864. };
  865. MODULE_DEVICE_TABLE(i2c, mt9m111_id);
  866. static struct i2c_driver mt9m111_i2c_driver = {
  867. .driver = {
  868. .name = "mt9m111",
  869. },
  870. .probe = mt9m111_probe,
  871. .remove = mt9m111_remove,
  872. .id_table = mt9m111_id,
  873. };
  874. module_i2c_driver(mt9m111_i2c_driver);
  875. MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
  876. MODULE_AUTHOR("Robert Jarzmik");
  877. MODULE_LICENSE("GPL");