ev.c 5.5 KB

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  1. /*
  2. * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/slab.h>
  33. #include <linux/mman.h>
  34. #include <net/sock.h>
  35. #include "iw_cxgb4.h"
  36. static void post_qp_event(struct c4iw_dev *dev, struct c4iw_cq *chp,
  37. struct c4iw_qp *qhp,
  38. struct t4_cqe *err_cqe,
  39. enum ib_event_type ib_event)
  40. {
  41. struct ib_event event;
  42. struct c4iw_qp_attributes attrs;
  43. unsigned long flag;
  44. printk(KERN_ERR MOD "AE qpid 0x%x opcode %d status 0x%x "
  45. "type %d wrid.hi 0x%x wrid.lo 0x%x\n",
  46. CQE_QPID(err_cqe), CQE_OPCODE(err_cqe),
  47. CQE_STATUS(err_cqe), CQE_TYPE(err_cqe),
  48. CQE_WRID_HI(err_cqe), CQE_WRID_LOW(err_cqe));
  49. if (qhp->attr.state == C4IW_QP_STATE_RTS) {
  50. attrs.next_state = C4IW_QP_STATE_TERMINATE;
  51. c4iw_modify_qp(qhp->rhp, qhp, C4IW_QP_ATTR_NEXT_STATE,
  52. &attrs, 0);
  53. }
  54. event.event = ib_event;
  55. event.device = chp->ibcq.device;
  56. if (ib_event == IB_EVENT_CQ_ERR)
  57. event.element.cq = &chp->ibcq;
  58. else
  59. event.element.qp = &qhp->ibqp;
  60. if (qhp->ibqp.event_handler)
  61. (*qhp->ibqp.event_handler)(&event, qhp->ibqp.qp_context);
  62. spin_lock_irqsave(&chp->comp_handler_lock, flag);
  63. (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context);
  64. spin_unlock_irqrestore(&chp->comp_handler_lock, flag);
  65. }
  66. void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe)
  67. {
  68. struct c4iw_cq *chp;
  69. struct c4iw_qp *qhp;
  70. u32 cqid;
  71. spin_lock_irq(&dev->lock);
  72. qhp = get_qhp(dev, CQE_QPID(err_cqe));
  73. if (!qhp) {
  74. printk(KERN_ERR MOD "BAD AE qpid 0x%x opcode %d "
  75. "status 0x%x type %d wrid.hi 0x%x wrid.lo 0x%x\n",
  76. CQE_QPID(err_cqe),
  77. CQE_OPCODE(err_cqe), CQE_STATUS(err_cqe),
  78. CQE_TYPE(err_cqe), CQE_WRID_HI(err_cqe),
  79. CQE_WRID_LOW(err_cqe));
  80. spin_unlock_irq(&dev->lock);
  81. goto out;
  82. }
  83. if (SQ_TYPE(err_cqe))
  84. cqid = qhp->attr.scq;
  85. else
  86. cqid = qhp->attr.rcq;
  87. chp = get_chp(dev, cqid);
  88. if (!chp) {
  89. printk(KERN_ERR MOD "BAD AE cqid 0x%x qpid 0x%x opcode %d "
  90. "status 0x%x type %d wrid.hi 0x%x wrid.lo 0x%x\n",
  91. cqid, CQE_QPID(err_cqe),
  92. CQE_OPCODE(err_cqe), CQE_STATUS(err_cqe),
  93. CQE_TYPE(err_cqe), CQE_WRID_HI(err_cqe),
  94. CQE_WRID_LOW(err_cqe));
  95. spin_unlock_irq(&dev->lock);
  96. goto out;
  97. }
  98. c4iw_qp_add_ref(&qhp->ibqp);
  99. atomic_inc(&chp->refcnt);
  100. spin_unlock_irq(&dev->lock);
  101. /* Bad incoming write */
  102. if (RQ_TYPE(err_cqe) &&
  103. (CQE_OPCODE(err_cqe) == FW_RI_RDMA_WRITE)) {
  104. post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_REQ_ERR);
  105. goto done;
  106. }
  107. switch (CQE_STATUS(err_cqe)) {
  108. /* Completion Events */
  109. case T4_ERR_SUCCESS:
  110. printk(KERN_ERR MOD "AE with status 0!\n");
  111. break;
  112. case T4_ERR_STAG:
  113. case T4_ERR_PDID:
  114. case T4_ERR_QPID:
  115. case T4_ERR_ACCESS:
  116. case T4_ERR_WRAP:
  117. case T4_ERR_BOUND:
  118. case T4_ERR_INVALIDATE_SHARED_MR:
  119. case T4_ERR_INVALIDATE_MR_WITH_MW_BOUND:
  120. post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_ACCESS_ERR);
  121. break;
  122. /* Device Fatal Errors */
  123. case T4_ERR_ECC:
  124. case T4_ERR_ECC_PSTAG:
  125. case T4_ERR_INTERNAL_ERR:
  126. post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_DEVICE_FATAL);
  127. break;
  128. /* QP Fatal Errors */
  129. case T4_ERR_OUT_OF_RQE:
  130. case T4_ERR_PBL_ADDR_BOUND:
  131. case T4_ERR_CRC:
  132. case T4_ERR_MARKER:
  133. case T4_ERR_PDU_LEN_ERR:
  134. case T4_ERR_DDP_VERSION:
  135. case T4_ERR_RDMA_VERSION:
  136. case T4_ERR_OPCODE:
  137. case T4_ERR_DDP_QUEUE_NUM:
  138. case T4_ERR_MSN:
  139. case T4_ERR_TBIT:
  140. case T4_ERR_MO:
  141. case T4_ERR_MSN_GAP:
  142. case T4_ERR_MSN_RANGE:
  143. case T4_ERR_RQE_ADDR_BOUND:
  144. case T4_ERR_IRD_OVERFLOW:
  145. post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_FATAL);
  146. break;
  147. default:
  148. printk(KERN_ERR MOD "Unknown T4 status 0x%x QPID 0x%x\n",
  149. CQE_STATUS(err_cqe), qhp->wq.sq.qid);
  150. post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_FATAL);
  151. break;
  152. }
  153. done:
  154. if (atomic_dec_and_test(&chp->refcnt))
  155. wake_up(&chp->wait);
  156. c4iw_qp_rem_ref(&qhp->ibqp);
  157. out:
  158. return;
  159. }
  160. int c4iw_ev_handler(struct c4iw_dev *dev, u32 qid)
  161. {
  162. struct c4iw_cq *chp;
  163. unsigned long flag;
  164. chp = get_chp(dev, qid);
  165. if (chp) {
  166. spin_lock_irqsave(&chp->comp_handler_lock, flag);
  167. (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context);
  168. spin_unlock_irqrestore(&chp->comp_handler_lock, flag);
  169. } else
  170. PDBG("%s unknown cqid 0x%x\n", __func__, qid);
  171. return 0;
  172. }