nouveau_display.c 18 KB

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  1. /*
  2. * Copyright (C) 2008 Maarten Maathuis.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include <drm/drmP.h>
  27. #include <drm/drm_crtc_helper.h>
  28. #include <drm/ttm/ttm_execbuf_util.h>
  29. #include "nouveau_fbcon.h"
  30. #include "dispnv04/hw.h"
  31. #include "nouveau_crtc.h"
  32. #include "nouveau_dma.h"
  33. #include "nouveau_gem.h"
  34. #include "nouveau_connector.h"
  35. #include "nv50_display.h"
  36. #include "nouveau_fence.h"
  37. #include <subdev/bios/gpio.h>
  38. #include <subdev/gpio.h>
  39. #include <engine/disp.h>
  40. #include <core/class.h>
  41. static void
  42. nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
  43. {
  44. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  45. if (fb->nvbo)
  46. drm_gem_object_unreference_unlocked(fb->nvbo->gem);
  47. drm_framebuffer_cleanup(drm_fb);
  48. kfree(fb);
  49. }
  50. static int
  51. nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
  52. struct drm_file *file_priv,
  53. unsigned int *handle)
  54. {
  55. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  56. return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
  57. }
  58. static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
  59. .destroy = nouveau_user_framebuffer_destroy,
  60. .create_handle = nouveau_user_framebuffer_create_handle,
  61. };
  62. int
  63. nouveau_framebuffer_init(struct drm_device *dev,
  64. struct nouveau_framebuffer *nv_fb,
  65. struct drm_mode_fb_cmd2 *mode_cmd,
  66. struct nouveau_bo *nvbo)
  67. {
  68. struct nouveau_drm *drm = nouveau_drm(dev);
  69. struct drm_framebuffer *fb = &nv_fb->base;
  70. int ret;
  71. drm_helper_mode_fill_fb_struct(fb, mode_cmd);
  72. nv_fb->nvbo = nvbo;
  73. if (nv_device(drm->device)->card_type >= NV_50) {
  74. u32 tile_flags = nouveau_bo_tile_layout(nvbo);
  75. if (tile_flags == 0x7a00 ||
  76. tile_flags == 0xfe00)
  77. nv_fb->r_dma = NvEvoFB32;
  78. else
  79. if (tile_flags == 0x7000)
  80. nv_fb->r_dma = NvEvoFB16;
  81. else
  82. nv_fb->r_dma = NvEvoVRAM_LP;
  83. switch (fb->depth) {
  84. case 8: nv_fb->r_format = 0x1e00; break;
  85. case 15: nv_fb->r_format = 0xe900; break;
  86. case 16: nv_fb->r_format = 0xe800; break;
  87. case 24:
  88. case 32: nv_fb->r_format = 0xcf00; break;
  89. case 30: nv_fb->r_format = 0xd100; break;
  90. default:
  91. NV_ERROR(drm, "unknown depth %d\n", fb->depth);
  92. return -EINVAL;
  93. }
  94. if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG) {
  95. NV_ERROR(drm, "framebuffer requires contiguous bo\n");
  96. return -EINVAL;
  97. }
  98. if (nv_device(drm->device)->chipset == 0x50)
  99. nv_fb->r_format |= (tile_flags << 8);
  100. if (!tile_flags) {
  101. if (nv_device(drm->device)->card_type < NV_D0)
  102. nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
  103. else
  104. nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
  105. } else {
  106. u32 mode = nvbo->tile_mode;
  107. if (nv_device(drm->device)->card_type >= NV_C0)
  108. mode >>= 4;
  109. nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
  110. }
  111. }
  112. ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
  113. if (ret) {
  114. return ret;
  115. }
  116. return 0;
  117. }
  118. static struct drm_framebuffer *
  119. nouveau_user_framebuffer_create(struct drm_device *dev,
  120. struct drm_file *file_priv,
  121. struct drm_mode_fb_cmd2 *mode_cmd)
  122. {
  123. struct nouveau_framebuffer *nouveau_fb;
  124. struct drm_gem_object *gem;
  125. int ret = -ENOMEM;
  126. gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
  127. if (!gem)
  128. return ERR_PTR(-ENOENT);
  129. nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
  130. if (!nouveau_fb)
  131. goto err_unref;
  132. ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
  133. if (ret)
  134. goto err;
  135. return &nouveau_fb->base;
  136. err:
  137. kfree(nouveau_fb);
  138. err_unref:
  139. drm_gem_object_unreference(gem);
  140. return ERR_PTR(ret);
  141. }
  142. static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
  143. .fb_create = nouveau_user_framebuffer_create,
  144. .output_poll_changed = nouveau_fbcon_output_poll_changed,
  145. };
  146. struct nouveau_drm_prop_enum_list {
  147. u8 gen_mask;
  148. int type;
  149. char *name;
  150. };
  151. static struct nouveau_drm_prop_enum_list underscan[] = {
  152. { 6, UNDERSCAN_AUTO, "auto" },
  153. { 6, UNDERSCAN_OFF, "off" },
  154. { 6, UNDERSCAN_ON, "on" },
  155. {}
  156. };
  157. static struct nouveau_drm_prop_enum_list dither_mode[] = {
  158. { 7, DITHERING_MODE_AUTO, "auto" },
  159. { 7, DITHERING_MODE_OFF, "off" },
  160. { 1, DITHERING_MODE_ON, "on" },
  161. { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
  162. { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
  163. { 4, DITHERING_MODE_TEMPORAL, "temporal" },
  164. {}
  165. };
  166. static struct nouveau_drm_prop_enum_list dither_depth[] = {
  167. { 6, DITHERING_DEPTH_AUTO, "auto" },
  168. { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
  169. { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
  170. {}
  171. };
  172. #define PROP_ENUM(p,gen,n,list) do { \
  173. struct nouveau_drm_prop_enum_list *l = (list); \
  174. int c = 0; \
  175. while (l->gen_mask) { \
  176. if (l->gen_mask & (1 << (gen))) \
  177. c++; \
  178. l++; \
  179. } \
  180. if (c) { \
  181. p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
  182. l = (list); \
  183. c = 0; \
  184. while (p && l->gen_mask) { \
  185. if (l->gen_mask & (1 << (gen))) { \
  186. drm_property_add_enum(p, c, l->type, l->name); \
  187. c++; \
  188. } \
  189. l++; \
  190. } \
  191. } \
  192. } while(0)
  193. int
  194. nouveau_display_init(struct drm_device *dev)
  195. {
  196. struct nouveau_drm *drm = nouveau_drm(dev);
  197. struct nouveau_display *disp = nouveau_display(dev);
  198. struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
  199. struct drm_connector *connector;
  200. int ret;
  201. ret = disp->init(dev);
  202. if (ret)
  203. return ret;
  204. /* enable polling for external displays */
  205. drm_kms_helper_poll_enable(dev);
  206. /* enable hotplug interrupts */
  207. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  208. struct nouveau_connector *conn = nouveau_connector(connector);
  209. if (gpio && conn->hpd.func != DCB_GPIO_UNUSED) {
  210. nouveau_event_get(gpio->events, conn->hpd.line,
  211. &conn->hpd_func);
  212. }
  213. }
  214. return ret;
  215. }
  216. void
  217. nouveau_display_fini(struct drm_device *dev)
  218. {
  219. struct nouveau_drm *drm = nouveau_drm(dev);
  220. struct nouveau_display *disp = nouveau_display(dev);
  221. struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
  222. struct drm_connector *connector;
  223. /* disable hotplug interrupts */
  224. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  225. struct nouveau_connector *conn = nouveau_connector(connector);
  226. if (gpio && conn->hpd.func != DCB_GPIO_UNUSED) {
  227. nouveau_event_put(gpio->events, conn->hpd.line,
  228. &conn->hpd_func);
  229. }
  230. }
  231. drm_kms_helper_poll_disable(dev);
  232. disp->fini(dev);
  233. }
  234. int
  235. nouveau_display_create(struct drm_device *dev)
  236. {
  237. struct nouveau_drm *drm = nouveau_drm(dev);
  238. struct nouveau_display *disp;
  239. u32 pclass = dev->pdev->class >> 8;
  240. int ret, gen;
  241. disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
  242. if (!disp)
  243. return -ENOMEM;
  244. drm_mode_config_init(dev);
  245. drm_mode_create_scaling_mode_property(dev);
  246. drm_mode_create_dvi_i_properties(dev);
  247. if (nv_device(drm->device)->card_type < NV_50)
  248. gen = 0;
  249. else
  250. if (nv_device(drm->device)->card_type < NV_D0)
  251. gen = 1;
  252. else
  253. gen = 2;
  254. PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
  255. PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
  256. PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
  257. disp->underscan_hborder_property =
  258. drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
  259. disp->underscan_vborder_property =
  260. drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
  261. if (gen >= 1) {
  262. /* -90..+90 */
  263. disp->vibrant_hue_property =
  264. drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
  265. /* -100..+100 */
  266. disp->color_vibrance_property =
  267. drm_property_create_range(dev, 0, "color vibrance", 0, 200);
  268. }
  269. dev->mode_config.funcs = &nouveau_mode_config_funcs;
  270. dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
  271. dev->mode_config.min_width = 0;
  272. dev->mode_config.min_height = 0;
  273. if (nv_device(drm->device)->card_type < NV_10) {
  274. dev->mode_config.max_width = 2048;
  275. dev->mode_config.max_height = 2048;
  276. } else
  277. if (nv_device(drm->device)->card_type < NV_50) {
  278. dev->mode_config.max_width = 4096;
  279. dev->mode_config.max_height = 4096;
  280. } else {
  281. dev->mode_config.max_width = 8192;
  282. dev->mode_config.max_height = 8192;
  283. }
  284. dev->mode_config.preferred_depth = 24;
  285. dev->mode_config.prefer_shadow = 1;
  286. drm_kms_helper_poll_init(dev);
  287. drm_kms_helper_poll_disable(dev);
  288. if (nouveau_modeset == 1 ||
  289. (nouveau_modeset < 0 && pclass == PCI_CLASS_DISPLAY_VGA)) {
  290. if (drm->vbios.dcb.entries) {
  291. if (nv_device(drm->device)->card_type < NV_50)
  292. ret = nv04_display_create(dev);
  293. else
  294. ret = nv50_display_create(dev);
  295. } else {
  296. ret = 0;
  297. }
  298. if (ret)
  299. goto disp_create_err;
  300. if (dev->mode_config.num_crtc) {
  301. ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
  302. if (ret)
  303. goto vblank_err;
  304. }
  305. nouveau_backlight_init(dev);
  306. }
  307. return 0;
  308. vblank_err:
  309. disp->dtor(dev);
  310. disp_create_err:
  311. drm_kms_helper_poll_fini(dev);
  312. drm_mode_config_cleanup(dev);
  313. return ret;
  314. }
  315. void
  316. nouveau_display_destroy(struct drm_device *dev)
  317. {
  318. struct nouveau_display *disp = nouveau_display(dev);
  319. nouveau_backlight_exit(dev);
  320. drm_vblank_cleanup(dev);
  321. drm_kms_helper_poll_fini(dev);
  322. drm_mode_config_cleanup(dev);
  323. if (disp->dtor)
  324. disp->dtor(dev);
  325. nouveau_drm(dev)->display = NULL;
  326. kfree(disp);
  327. }
  328. int
  329. nouveau_display_suspend(struct drm_device *dev)
  330. {
  331. struct nouveau_drm *drm = nouveau_drm(dev);
  332. struct drm_crtc *crtc;
  333. nouveau_display_fini(dev);
  334. NV_SUSPEND(drm, "unpinning framebuffer(s)...\n");
  335. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  336. struct nouveau_framebuffer *nouveau_fb;
  337. nouveau_fb = nouveau_framebuffer(crtc->fb);
  338. if (!nouveau_fb || !nouveau_fb->nvbo)
  339. continue;
  340. nouveau_bo_unpin(nouveau_fb->nvbo);
  341. }
  342. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  343. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  344. nouveau_bo_unmap(nv_crtc->cursor.nvbo);
  345. nouveau_bo_unpin(nv_crtc->cursor.nvbo);
  346. }
  347. return 0;
  348. }
  349. void
  350. nouveau_display_repin(struct drm_device *dev)
  351. {
  352. struct nouveau_drm *drm = nouveau_drm(dev);
  353. struct drm_crtc *crtc;
  354. int ret;
  355. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  356. struct nouveau_framebuffer *nouveau_fb;
  357. nouveau_fb = nouveau_framebuffer(crtc->fb);
  358. if (!nouveau_fb || !nouveau_fb->nvbo)
  359. continue;
  360. nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
  361. }
  362. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  363. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  364. ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
  365. if (!ret)
  366. ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
  367. if (ret)
  368. NV_ERROR(drm, "Could not pin/map cursor.\n");
  369. }
  370. }
  371. void
  372. nouveau_display_resume(struct drm_device *dev)
  373. {
  374. struct drm_crtc *crtc;
  375. nouveau_display_init(dev);
  376. /* Force CLUT to get re-loaded during modeset */
  377. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  378. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  379. nv_crtc->lut.depth = 0;
  380. }
  381. drm_helper_resume_force_mode(dev);
  382. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  383. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  384. u32 offset = nv_crtc->cursor.nvbo->bo.offset;
  385. nv_crtc->cursor.set_offset(nv_crtc, offset);
  386. nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
  387. nv_crtc->cursor_saved_y);
  388. }
  389. }
  390. static int
  391. nouveau_page_flip_emit(struct nouveau_channel *chan,
  392. struct nouveau_bo *old_bo,
  393. struct nouveau_bo *new_bo,
  394. struct nouveau_page_flip_state *s,
  395. struct nouveau_fence **pfence)
  396. {
  397. struct nouveau_fence_chan *fctx = chan->fence;
  398. struct nouveau_drm *drm = chan->drm;
  399. struct drm_device *dev = drm->dev;
  400. unsigned long flags;
  401. int ret;
  402. /* Queue it to the pending list */
  403. spin_lock_irqsave(&dev->event_lock, flags);
  404. list_add_tail(&s->head, &fctx->flip);
  405. spin_unlock_irqrestore(&dev->event_lock, flags);
  406. /* Synchronize with the old framebuffer */
  407. ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
  408. if (ret)
  409. goto fail;
  410. /* Emit the pageflip */
  411. ret = RING_SPACE(chan, 3);
  412. if (ret)
  413. goto fail;
  414. if (nv_device(drm->device)->card_type < NV_C0) {
  415. BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
  416. OUT_RING (chan, 0x00000000);
  417. OUT_RING (chan, 0x00000000);
  418. } else {
  419. BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
  420. OUT_RING (chan, 0);
  421. BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
  422. }
  423. FIRE_RING (chan);
  424. ret = nouveau_fence_new(chan, false, pfence);
  425. if (ret)
  426. goto fail;
  427. return 0;
  428. fail:
  429. spin_lock_irqsave(&dev->event_lock, flags);
  430. list_del(&s->head);
  431. spin_unlock_irqrestore(&dev->event_lock, flags);
  432. return ret;
  433. }
  434. int
  435. nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
  436. struct drm_pending_vblank_event *event,
  437. uint32_t page_flip_flags)
  438. {
  439. struct drm_device *dev = crtc->dev;
  440. struct nouveau_drm *drm = nouveau_drm(dev);
  441. struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
  442. struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
  443. struct nouveau_page_flip_state *s;
  444. struct nouveau_channel *chan = NULL;
  445. struct nouveau_fence *fence;
  446. struct ttm_validate_buffer resv[2] = {
  447. { .bo = &old_bo->bo },
  448. { .bo = &new_bo->bo },
  449. };
  450. struct ww_acquire_ctx ticket;
  451. LIST_HEAD(res);
  452. int ret;
  453. if (!drm->channel)
  454. return -ENODEV;
  455. s = kzalloc(sizeof(*s), GFP_KERNEL);
  456. if (!s)
  457. return -ENOMEM;
  458. /* Choose the channel the flip will be handled in */
  459. spin_lock(&old_bo->bo.bdev->fence_lock);
  460. fence = new_bo->bo.sync_obj;
  461. if (fence)
  462. chan = fence->channel;
  463. if (!chan)
  464. chan = drm->channel;
  465. spin_unlock(&old_bo->bo.bdev->fence_lock);
  466. if (new_bo != old_bo) {
  467. ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
  468. if (ret)
  469. goto fail_free;
  470. list_add(&resv[1].head, &res);
  471. }
  472. list_add(&resv[0].head, &res);
  473. mutex_lock(&chan->cli->mutex);
  474. ret = ttm_eu_reserve_buffers(&ticket, &res);
  475. if (ret)
  476. goto fail_unpin;
  477. /* Initialize a page flip struct */
  478. *s = (struct nouveau_page_flip_state)
  479. { { }, event, nouveau_crtc(crtc)->index,
  480. fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
  481. new_bo->bo.offset };
  482. /* Emit a page flip */
  483. if (nv_device(drm->device)->card_type >= NV_50) {
  484. ret = nv50_display_flip_next(crtc, fb, chan, 0);
  485. if (ret)
  486. goto fail_unreserve;
  487. } else {
  488. struct nv04_display *dispnv04 = nv04_display(dev);
  489. nouveau_bo_ref(new_bo, &dispnv04->image[nouveau_crtc(crtc)->index]);
  490. }
  491. ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
  492. mutex_unlock(&chan->cli->mutex);
  493. if (ret)
  494. goto fail_unreserve;
  495. /* Update the crtc struct and cleanup */
  496. crtc->fb = fb;
  497. ttm_eu_fence_buffer_objects(&ticket, &res, fence);
  498. if (old_bo != new_bo)
  499. nouveau_bo_unpin(old_bo);
  500. nouveau_fence_unref(&fence);
  501. return 0;
  502. fail_unreserve:
  503. ttm_eu_backoff_reservation(&ticket, &res);
  504. fail_unpin:
  505. mutex_unlock(&chan->cli->mutex);
  506. if (old_bo != new_bo)
  507. nouveau_bo_unpin(new_bo);
  508. fail_free:
  509. kfree(s);
  510. return ret;
  511. }
  512. int
  513. nouveau_finish_page_flip(struct nouveau_channel *chan,
  514. struct nouveau_page_flip_state *ps)
  515. {
  516. struct nouveau_fence_chan *fctx = chan->fence;
  517. struct nouveau_drm *drm = chan->drm;
  518. struct drm_device *dev = drm->dev;
  519. struct nouveau_page_flip_state *s;
  520. unsigned long flags;
  521. spin_lock_irqsave(&dev->event_lock, flags);
  522. if (list_empty(&fctx->flip)) {
  523. NV_ERROR(drm, "unexpected pageflip\n");
  524. spin_unlock_irqrestore(&dev->event_lock, flags);
  525. return -EINVAL;
  526. }
  527. s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
  528. if (s->event)
  529. drm_send_vblank_event(dev, -1, s->event);
  530. list_del(&s->head);
  531. if (ps)
  532. *ps = *s;
  533. kfree(s);
  534. spin_unlock_irqrestore(&dev->event_lock, flags);
  535. return 0;
  536. }
  537. int
  538. nouveau_flip_complete(void *data)
  539. {
  540. struct nouveau_channel *chan = data;
  541. struct nouveau_drm *drm = chan->drm;
  542. struct nouveau_page_flip_state state;
  543. if (!nouveau_finish_page_flip(chan, &state)) {
  544. if (nv_device(drm->device)->card_type < NV_50) {
  545. nv_set_crtc_base(drm->dev, state.crtc, state.offset +
  546. state.y * state.pitch +
  547. state.x * state.bpp / 8);
  548. }
  549. }
  550. return 0;
  551. }
  552. int
  553. nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
  554. struct drm_mode_create_dumb *args)
  555. {
  556. struct nouveau_bo *bo;
  557. int ret;
  558. args->pitch = roundup(args->width * (args->bpp / 8), 256);
  559. args->size = args->pitch * args->height;
  560. args->size = roundup(args->size, PAGE_SIZE);
  561. ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
  562. if (ret)
  563. return ret;
  564. ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
  565. drm_gem_object_unreference_unlocked(bo->gem);
  566. return ret;
  567. }
  568. int
  569. nouveau_display_dumb_map_offset(struct drm_file *file_priv,
  570. struct drm_device *dev,
  571. uint32_t handle, uint64_t *poffset)
  572. {
  573. struct drm_gem_object *gem;
  574. gem = drm_gem_object_lookup(dev, file_priv, handle);
  575. if (gem) {
  576. struct nouveau_bo *bo = gem->driver_private;
  577. *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node);
  578. drm_gem_object_unreference_unlocked(gem);
  579. return 0;
  580. }
  581. return -ENOENT;
  582. }