clk-prcmu.c 8.3 KB

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  1. /*
  2. * PRCMU clock implementation for ux500 platform.
  3. *
  4. * Copyright (C) 2012 ST-Ericsson SA
  5. * Author: Ulf Hansson <ulf.hansson@linaro.org>
  6. *
  7. * License terms: GNU General Public License (GPL) version 2
  8. */
  9. #include <linux/clk-provider.h>
  10. #include <linux/clk-private.h>
  11. #include <linux/mfd/dbx500-prcmu.h>
  12. #include <linux/slab.h>
  13. #include <linux/io.h>
  14. #include <linux/err.h>
  15. #include "clk.h"
  16. #define to_clk_prcmu(_hw) container_of(_hw, struct clk_prcmu, hw)
  17. struct clk_prcmu {
  18. struct clk_hw hw;
  19. u8 cg_sel;
  20. int is_prepared;
  21. int is_enabled;
  22. int opp_requested;
  23. };
  24. /* PRCMU clock operations. */
  25. static int clk_prcmu_prepare(struct clk_hw *hw)
  26. {
  27. int ret;
  28. struct clk_prcmu *clk = to_clk_prcmu(hw);
  29. ret = prcmu_request_clock(clk->cg_sel, true);
  30. if (!ret)
  31. clk->is_prepared = 1;
  32. return ret;;
  33. }
  34. static void clk_prcmu_unprepare(struct clk_hw *hw)
  35. {
  36. struct clk_prcmu *clk = to_clk_prcmu(hw);
  37. if (prcmu_request_clock(clk->cg_sel, false))
  38. pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
  39. __clk_get_name(hw->clk));
  40. else
  41. clk->is_prepared = 0;
  42. }
  43. static int clk_prcmu_is_prepared(struct clk_hw *hw)
  44. {
  45. struct clk_prcmu *clk = to_clk_prcmu(hw);
  46. return clk->is_prepared;
  47. }
  48. static int clk_prcmu_enable(struct clk_hw *hw)
  49. {
  50. struct clk_prcmu *clk = to_clk_prcmu(hw);
  51. clk->is_enabled = 1;
  52. return 0;
  53. }
  54. static void clk_prcmu_disable(struct clk_hw *hw)
  55. {
  56. struct clk_prcmu *clk = to_clk_prcmu(hw);
  57. clk->is_enabled = 0;
  58. }
  59. static int clk_prcmu_is_enabled(struct clk_hw *hw)
  60. {
  61. struct clk_prcmu *clk = to_clk_prcmu(hw);
  62. return clk->is_enabled;
  63. }
  64. static unsigned long clk_prcmu_recalc_rate(struct clk_hw *hw,
  65. unsigned long parent_rate)
  66. {
  67. struct clk_prcmu *clk = to_clk_prcmu(hw);
  68. return prcmu_clock_rate(clk->cg_sel);
  69. }
  70. static long clk_prcmu_round_rate(struct clk_hw *hw, unsigned long rate,
  71. unsigned long *parent_rate)
  72. {
  73. struct clk_prcmu *clk = to_clk_prcmu(hw);
  74. return prcmu_round_clock_rate(clk->cg_sel, rate);
  75. }
  76. static int clk_prcmu_set_rate(struct clk_hw *hw, unsigned long rate,
  77. unsigned long parent_rate)
  78. {
  79. struct clk_prcmu *clk = to_clk_prcmu(hw);
  80. return prcmu_set_clock_rate(clk->cg_sel, rate);
  81. }
  82. static int clk_prcmu_opp_prepare(struct clk_hw *hw)
  83. {
  84. int err;
  85. struct clk_prcmu *clk = to_clk_prcmu(hw);
  86. if (!clk->opp_requested) {
  87. err = prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP,
  88. (char *)__clk_get_name(hw->clk),
  89. 100);
  90. if (err) {
  91. pr_err("clk_prcmu: %s fail req APE OPP for %s.\n",
  92. __func__, __clk_get_name(hw->clk));
  93. return err;
  94. }
  95. clk->opp_requested = 1;
  96. }
  97. err = prcmu_request_clock(clk->cg_sel, true);
  98. if (err) {
  99. prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
  100. (char *)__clk_get_name(hw->clk));
  101. clk->opp_requested = 0;
  102. return err;
  103. }
  104. clk->is_prepared = 1;
  105. return 0;
  106. }
  107. static void clk_prcmu_opp_unprepare(struct clk_hw *hw)
  108. {
  109. struct clk_prcmu *clk = to_clk_prcmu(hw);
  110. if (prcmu_request_clock(clk->cg_sel, false)) {
  111. pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
  112. __clk_get_name(hw->clk));
  113. return;
  114. }
  115. if (clk->opp_requested) {
  116. prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
  117. (char *)__clk_get_name(hw->clk));
  118. clk->opp_requested = 0;
  119. }
  120. clk->is_prepared = 0;
  121. }
  122. static int clk_prcmu_opp_volt_prepare(struct clk_hw *hw)
  123. {
  124. int err;
  125. struct clk_prcmu *clk = to_clk_prcmu(hw);
  126. if (!clk->opp_requested) {
  127. err = prcmu_request_ape_opp_100_voltage(true);
  128. if (err) {
  129. pr_err("clk_prcmu: %s fail req APE OPP VOLT for %s.\n",
  130. __func__, __clk_get_name(hw->clk));
  131. return err;
  132. }
  133. clk->opp_requested = 1;
  134. }
  135. err = prcmu_request_clock(clk->cg_sel, true);
  136. if (err) {
  137. prcmu_request_ape_opp_100_voltage(false);
  138. clk->opp_requested = 0;
  139. return err;
  140. }
  141. clk->is_prepared = 1;
  142. return 0;
  143. }
  144. static void clk_prcmu_opp_volt_unprepare(struct clk_hw *hw)
  145. {
  146. struct clk_prcmu *clk = to_clk_prcmu(hw);
  147. if (prcmu_request_clock(clk->cg_sel, false)) {
  148. pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
  149. __clk_get_name(hw->clk));
  150. return;
  151. }
  152. if (clk->opp_requested) {
  153. prcmu_request_ape_opp_100_voltage(false);
  154. clk->opp_requested = 0;
  155. }
  156. clk->is_prepared = 0;
  157. }
  158. static struct clk_ops clk_prcmu_scalable_ops = {
  159. .prepare = clk_prcmu_prepare,
  160. .unprepare = clk_prcmu_unprepare,
  161. .is_prepared = clk_prcmu_is_prepared,
  162. .enable = clk_prcmu_enable,
  163. .disable = clk_prcmu_disable,
  164. .is_enabled = clk_prcmu_is_enabled,
  165. .recalc_rate = clk_prcmu_recalc_rate,
  166. .round_rate = clk_prcmu_round_rate,
  167. .set_rate = clk_prcmu_set_rate,
  168. };
  169. static struct clk_ops clk_prcmu_gate_ops = {
  170. .prepare = clk_prcmu_prepare,
  171. .unprepare = clk_prcmu_unprepare,
  172. .is_prepared = clk_prcmu_is_prepared,
  173. .enable = clk_prcmu_enable,
  174. .disable = clk_prcmu_disable,
  175. .is_enabled = clk_prcmu_is_enabled,
  176. .recalc_rate = clk_prcmu_recalc_rate,
  177. };
  178. static struct clk_ops clk_prcmu_scalable_rate_ops = {
  179. .is_enabled = clk_prcmu_is_enabled,
  180. .recalc_rate = clk_prcmu_recalc_rate,
  181. .round_rate = clk_prcmu_round_rate,
  182. .set_rate = clk_prcmu_set_rate,
  183. };
  184. static struct clk_ops clk_prcmu_rate_ops = {
  185. .is_enabled = clk_prcmu_is_enabled,
  186. .recalc_rate = clk_prcmu_recalc_rate,
  187. };
  188. static struct clk_ops clk_prcmu_opp_gate_ops = {
  189. .prepare = clk_prcmu_opp_prepare,
  190. .unprepare = clk_prcmu_opp_unprepare,
  191. .is_prepared = clk_prcmu_is_prepared,
  192. .enable = clk_prcmu_enable,
  193. .disable = clk_prcmu_disable,
  194. .is_enabled = clk_prcmu_is_enabled,
  195. .recalc_rate = clk_prcmu_recalc_rate,
  196. };
  197. static struct clk_ops clk_prcmu_opp_volt_scalable_ops = {
  198. .prepare = clk_prcmu_opp_volt_prepare,
  199. .unprepare = clk_prcmu_opp_volt_unprepare,
  200. .is_prepared = clk_prcmu_is_prepared,
  201. .enable = clk_prcmu_enable,
  202. .disable = clk_prcmu_disable,
  203. .is_enabled = clk_prcmu_is_enabled,
  204. .recalc_rate = clk_prcmu_recalc_rate,
  205. .round_rate = clk_prcmu_round_rate,
  206. .set_rate = clk_prcmu_set_rate,
  207. };
  208. static struct clk *clk_reg_prcmu(const char *name,
  209. const char *parent_name,
  210. u8 cg_sel,
  211. unsigned long rate,
  212. unsigned long flags,
  213. struct clk_ops *clk_prcmu_ops)
  214. {
  215. struct clk_prcmu *clk;
  216. struct clk_init_data clk_prcmu_init;
  217. struct clk *clk_reg;
  218. if (!name) {
  219. pr_err("clk_prcmu: %s invalid arguments passed\n", __func__);
  220. return ERR_PTR(-EINVAL);
  221. }
  222. clk = kzalloc(sizeof(struct clk_prcmu), GFP_KERNEL);
  223. if (!clk) {
  224. pr_err("clk_prcmu: %s could not allocate clk\n", __func__);
  225. return ERR_PTR(-ENOMEM);
  226. }
  227. clk->cg_sel = cg_sel;
  228. clk->is_prepared = 1;
  229. clk->is_enabled = 1;
  230. clk->opp_requested = 0;
  231. /* "rate" can be used for changing the initial frequency */
  232. if (rate)
  233. prcmu_set_clock_rate(cg_sel, rate);
  234. clk_prcmu_init.name = name;
  235. clk_prcmu_init.ops = clk_prcmu_ops;
  236. clk_prcmu_init.flags = flags;
  237. clk_prcmu_init.parent_names = (parent_name ? &parent_name : NULL);
  238. clk_prcmu_init.num_parents = (parent_name ? 1 : 0);
  239. clk->hw.init = &clk_prcmu_init;
  240. clk_reg = clk_register(NULL, &clk->hw);
  241. if (IS_ERR_OR_NULL(clk_reg))
  242. goto free_clk;
  243. return clk_reg;
  244. free_clk:
  245. kfree(clk);
  246. pr_err("clk_prcmu: %s failed to register clk\n", __func__);
  247. return ERR_PTR(-ENOMEM);
  248. }
  249. struct clk *clk_reg_prcmu_scalable(const char *name,
  250. const char *parent_name,
  251. u8 cg_sel,
  252. unsigned long rate,
  253. unsigned long flags)
  254. {
  255. return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
  256. &clk_prcmu_scalable_ops);
  257. }
  258. struct clk *clk_reg_prcmu_gate(const char *name,
  259. const char *parent_name,
  260. u8 cg_sel,
  261. unsigned long flags)
  262. {
  263. return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
  264. &clk_prcmu_gate_ops);
  265. }
  266. struct clk *clk_reg_prcmu_scalable_rate(const char *name,
  267. const char *parent_name,
  268. u8 cg_sel,
  269. unsigned long rate,
  270. unsigned long flags)
  271. {
  272. return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
  273. &clk_prcmu_scalable_rate_ops);
  274. }
  275. struct clk *clk_reg_prcmu_rate(const char *name,
  276. const char *parent_name,
  277. u8 cg_sel,
  278. unsigned long flags)
  279. {
  280. return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
  281. &clk_prcmu_rate_ops);
  282. }
  283. struct clk *clk_reg_prcmu_opp_gate(const char *name,
  284. const char *parent_name,
  285. u8 cg_sel,
  286. unsigned long flags)
  287. {
  288. return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
  289. &clk_prcmu_opp_gate_ops);
  290. }
  291. struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name,
  292. const char *parent_name,
  293. u8 cg_sel,
  294. unsigned long rate,
  295. unsigned long flags)
  296. {
  297. return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
  298. &clk_prcmu_opp_volt_scalable_ops);
  299. }