clk-s2mps11.c 6.5 KB

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  1. /*
  2. * clk-s2mps11.c - Clock driver for S2MPS11.
  3. *
  4. * Copyright (C) 2013 Samsung Electornics
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/err.h>
  23. #include <linux/of.h>
  24. #include <linux/clkdev.h>
  25. #include <linux/regmap.h>
  26. #include <linux/clk-provider.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/mfd/samsung/s2mps11.h>
  29. #include <linux/mfd/samsung/core.h>
  30. #define s2mps11_name(a) (a->hw.init->name)
  31. static struct clk **clk_table;
  32. static struct clk_onecell_data clk_data;
  33. enum {
  34. S2MPS11_CLK_AP = 0,
  35. S2MPS11_CLK_CP,
  36. S2MPS11_CLK_BT,
  37. S2MPS11_CLKS_NUM,
  38. };
  39. struct s2mps11_clk {
  40. struct sec_pmic_dev *iodev;
  41. struct clk_hw hw;
  42. struct clk *clk;
  43. struct clk_lookup *lookup;
  44. u32 mask;
  45. bool enabled;
  46. };
  47. static struct s2mps11_clk *to_s2mps11_clk(struct clk_hw *hw)
  48. {
  49. return container_of(hw, struct s2mps11_clk, hw);
  50. }
  51. static int s2mps11_clk_prepare(struct clk_hw *hw)
  52. {
  53. struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
  54. int ret;
  55. ret = regmap_update_bits(s2mps11->iodev->regmap,
  56. S2MPS11_REG_RTC_CTRL,
  57. s2mps11->mask, s2mps11->mask);
  58. if (!ret)
  59. s2mps11->enabled = true;
  60. return ret;
  61. }
  62. static void s2mps11_clk_unprepare(struct clk_hw *hw)
  63. {
  64. struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
  65. int ret;
  66. ret = regmap_update_bits(s2mps11->iodev->regmap, S2MPS11_REG_RTC_CTRL,
  67. s2mps11->mask, ~s2mps11->mask);
  68. if (!ret)
  69. s2mps11->enabled = false;
  70. }
  71. static int s2mps11_clk_is_enabled(struct clk_hw *hw)
  72. {
  73. struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
  74. return s2mps11->enabled;
  75. }
  76. static unsigned long s2mps11_clk_recalc_rate(struct clk_hw *hw,
  77. unsigned long parent_rate)
  78. {
  79. struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
  80. if (s2mps11->enabled)
  81. return 32768;
  82. else
  83. return 0;
  84. }
  85. static struct clk_ops s2mps11_clk_ops = {
  86. .prepare = s2mps11_clk_prepare,
  87. .unprepare = s2mps11_clk_unprepare,
  88. .is_enabled = s2mps11_clk_is_enabled,
  89. .recalc_rate = s2mps11_clk_recalc_rate,
  90. };
  91. static struct clk_init_data s2mps11_clks_init[S2MPS11_CLKS_NUM] = {
  92. [S2MPS11_CLK_AP] = {
  93. .name = "s2mps11_ap",
  94. .ops = &s2mps11_clk_ops,
  95. .flags = CLK_IS_ROOT,
  96. },
  97. [S2MPS11_CLK_CP] = {
  98. .name = "s2mps11_cp",
  99. .ops = &s2mps11_clk_ops,
  100. .flags = CLK_IS_ROOT,
  101. },
  102. [S2MPS11_CLK_BT] = {
  103. .name = "s2mps11_bt",
  104. .ops = &s2mps11_clk_ops,
  105. .flags = CLK_IS_ROOT,
  106. },
  107. };
  108. static struct device_node *s2mps11_clk_parse_dt(struct platform_device *pdev)
  109. {
  110. struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  111. struct device_node *clk_np;
  112. int i;
  113. if (!iodev->dev->of_node)
  114. return NULL;
  115. clk_np = of_find_node_by_name(iodev->dev->of_node, "clocks");
  116. if (!clk_np) {
  117. dev_err(&pdev->dev, "could not find clock sub-node\n");
  118. return ERR_PTR(-EINVAL);
  119. }
  120. clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk *) *
  121. S2MPS11_CLKS_NUM, GFP_KERNEL);
  122. if (!clk_table)
  123. return ERR_PTR(-ENOMEM);
  124. for (i = 0; i < S2MPS11_CLKS_NUM; i++)
  125. of_property_read_string_index(clk_np, "clock-output-names", i,
  126. &s2mps11_clks_init[i].name);
  127. return clk_np;
  128. }
  129. static int s2mps11_clk_probe(struct platform_device *pdev)
  130. {
  131. struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  132. struct s2mps11_clk *s2mps11_clks, *s2mps11_clk;
  133. struct device_node *clk_np = NULL;
  134. int i, ret = 0;
  135. u32 val;
  136. s2mps11_clks = devm_kzalloc(&pdev->dev, sizeof(*s2mps11_clk) *
  137. S2MPS11_CLKS_NUM, GFP_KERNEL);
  138. if (!s2mps11_clks)
  139. return -ENOMEM;
  140. s2mps11_clk = s2mps11_clks;
  141. clk_np = s2mps11_clk_parse_dt(pdev);
  142. if (IS_ERR(clk_np))
  143. return PTR_ERR(clk_np);
  144. for (i = 0; i < S2MPS11_CLKS_NUM; i++, s2mps11_clk++) {
  145. s2mps11_clk->iodev = iodev;
  146. s2mps11_clk->hw.init = &s2mps11_clks_init[i];
  147. s2mps11_clk->mask = 1 << i;
  148. ret = regmap_read(s2mps11_clk->iodev->regmap,
  149. S2MPS11_REG_RTC_CTRL, &val);
  150. if (ret < 0)
  151. goto err_reg;
  152. s2mps11_clk->enabled = val & s2mps11_clk->mask;
  153. s2mps11_clk->clk = devm_clk_register(&pdev->dev,
  154. &s2mps11_clk->hw);
  155. if (IS_ERR(s2mps11_clk->clk)) {
  156. dev_err(&pdev->dev, "Fail to register : %s\n",
  157. s2mps11_name(s2mps11_clk));
  158. ret = PTR_ERR(s2mps11_clk->clk);
  159. goto err_reg;
  160. }
  161. s2mps11_clk->lookup = devm_kzalloc(&pdev->dev,
  162. sizeof(struct clk_lookup), GFP_KERNEL);
  163. if (!s2mps11_clk->lookup) {
  164. ret = -ENOMEM;
  165. goto err_lup;
  166. }
  167. s2mps11_clk->lookup->con_id = s2mps11_name(s2mps11_clk);
  168. s2mps11_clk->lookup->clk = s2mps11_clk->clk;
  169. clkdev_add(s2mps11_clk->lookup);
  170. }
  171. if (clk_table) {
  172. for (i = 0; i < S2MPS11_CLKS_NUM; i++)
  173. clk_table[i] = s2mps11_clks[i].clk;
  174. clk_data.clks = clk_table;
  175. clk_data.clk_num = S2MPS11_CLKS_NUM;
  176. of_clk_add_provider(clk_np, of_clk_src_onecell_get, &clk_data);
  177. }
  178. platform_set_drvdata(pdev, s2mps11_clks);
  179. return ret;
  180. err_lup:
  181. devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
  182. err_reg:
  183. while (s2mps11_clk > s2mps11_clks) {
  184. if (s2mps11_clk->lookup) {
  185. clkdev_drop(s2mps11_clk->lookup);
  186. devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
  187. }
  188. s2mps11_clk--;
  189. }
  190. return ret;
  191. }
  192. static int s2mps11_clk_remove(struct platform_device *pdev)
  193. {
  194. struct s2mps11_clk *s2mps11_clks = platform_get_drvdata(pdev);
  195. int i;
  196. for (i = 0; i < S2MPS11_CLKS_NUM; i++)
  197. clkdev_drop(s2mps11_clks[i].lookup);
  198. return 0;
  199. }
  200. static const struct platform_device_id s2mps11_clk_id[] = {
  201. { "s2mps11-clk", 0},
  202. { },
  203. };
  204. MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
  205. static struct platform_driver s2mps11_clk_driver = {
  206. .driver = {
  207. .name = "s2mps11-clk",
  208. .owner = THIS_MODULE,
  209. },
  210. .probe = s2mps11_clk_probe,
  211. .remove = s2mps11_clk_remove,
  212. .id_table = s2mps11_clk_id,
  213. };
  214. static int __init s2mps11_clk_init(void)
  215. {
  216. return platform_driver_register(&s2mps11_clk_driver);
  217. }
  218. subsys_initcall(s2mps11_clk_init);
  219. static void __init s2mps11_clk_cleanup(void)
  220. {
  221. platform_driver_unregister(&s2mps11_clk_driver);
  222. }
  223. module_exit(s2mps11_clk_cleanup);
  224. MODULE_DESCRIPTION("S2MPS11 Clock Driver");
  225. MODULE_AUTHOR("Yadwinder Singh Brar <yadi.brar@samsung.com>");
  226. MODULE_LICENSE("GPL");