time.c 46 KB

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  1. /*
  2. * Time of day based timer functions.
  3. *
  4. * S390 version
  5. * Copyright IBM Corp. 1999, 2008
  6. * Author(s): Hartmut Penner (hp@de.ibm.com),
  7. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  8. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  9. *
  10. * Derived from "arch/i386/kernel/time.c"
  11. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  12. */
  13. #define KMSG_COMPONENT "time"
  14. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  15. #include <linux/kernel_stat.h>
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/device.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/timekeeper_internal.h>
  36. #include <linux/clockchips.h>
  37. #include <linux/gfp.h>
  38. #include <linux/kprobes.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/delay.h>
  41. #include <asm/div64.h>
  42. #include <asm/vdso.h>
  43. #include <asm/irq.h>
  44. #include <asm/irq_regs.h>
  45. #include <asm/vtimer.h>
  46. #include <asm/etr.h>
  47. #include <asm/cio.h>
  48. #include "entry.h"
  49. /* change this if you have some constant time drift */
  50. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  51. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  52. u64 sched_clock_base_cc = -1; /* Force to data section. */
  53. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  54. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  55. /*
  56. * Scheduler clock - returns current time in nanosec units.
  57. */
  58. unsigned long long notrace __kprobes sched_clock(void)
  59. {
  60. return tod_to_ns(get_tod_clock_monotonic());
  61. }
  62. /*
  63. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  64. */
  65. unsigned long long monotonic_clock(void)
  66. {
  67. return sched_clock();
  68. }
  69. EXPORT_SYMBOL(monotonic_clock);
  70. void tod_to_timeval(__u64 todval, struct timespec *xt)
  71. {
  72. unsigned long long sec;
  73. sec = todval >> 12;
  74. do_div(sec, 1000000);
  75. xt->tv_sec = sec;
  76. todval -= (sec * 1000000) << 12;
  77. xt->tv_nsec = ((todval * 1000) >> 12);
  78. }
  79. EXPORT_SYMBOL(tod_to_timeval);
  80. void clock_comparator_work(void)
  81. {
  82. struct clock_event_device *cd;
  83. S390_lowcore.clock_comparator = -1ULL;
  84. cd = &__get_cpu_var(comparators);
  85. cd->event_handler(cd);
  86. }
  87. /*
  88. * Fixup the clock comparator.
  89. */
  90. static void fixup_clock_comparator(unsigned long long delta)
  91. {
  92. /* If nobody is waiting there's nothing to fix. */
  93. if (S390_lowcore.clock_comparator == -1ULL)
  94. return;
  95. S390_lowcore.clock_comparator += delta;
  96. set_clock_comparator(S390_lowcore.clock_comparator);
  97. }
  98. static int s390_next_ktime(ktime_t expires,
  99. struct clock_event_device *evt)
  100. {
  101. struct timespec ts;
  102. u64 nsecs;
  103. ts.tv_sec = ts.tv_nsec = 0;
  104. monotonic_to_bootbased(&ts);
  105. nsecs = ktime_to_ns(ktime_add(timespec_to_ktime(ts), expires));
  106. do_div(nsecs, 125);
  107. S390_lowcore.clock_comparator = sched_clock_base_cc + (nsecs << 9);
  108. /* Program the maximum value if we have an overflow (== year 2042) */
  109. if (unlikely(S390_lowcore.clock_comparator < sched_clock_base_cc))
  110. S390_lowcore.clock_comparator = -1ULL;
  111. set_clock_comparator(S390_lowcore.clock_comparator);
  112. return 0;
  113. }
  114. static void s390_set_mode(enum clock_event_mode mode,
  115. struct clock_event_device *evt)
  116. {
  117. }
  118. /*
  119. * Set up lowcore and control register of the current cpu to
  120. * enable TOD clock and clock comparator interrupts.
  121. */
  122. void init_cpu_timer(void)
  123. {
  124. struct clock_event_device *cd;
  125. int cpu;
  126. S390_lowcore.clock_comparator = -1ULL;
  127. set_clock_comparator(S390_lowcore.clock_comparator);
  128. cpu = smp_processor_id();
  129. cd = &per_cpu(comparators, cpu);
  130. cd->name = "comparator";
  131. cd->features = CLOCK_EVT_FEAT_ONESHOT |
  132. CLOCK_EVT_FEAT_KTIME;
  133. cd->mult = 16777;
  134. cd->shift = 12;
  135. cd->min_delta_ns = 1;
  136. cd->max_delta_ns = LONG_MAX;
  137. cd->rating = 400;
  138. cd->cpumask = cpumask_of(cpu);
  139. cd->set_next_ktime = s390_next_ktime;
  140. cd->set_mode = s390_set_mode;
  141. clockevents_register_device(cd);
  142. /* Enable clock comparator timer interrupt. */
  143. __ctl_set_bit(0,11);
  144. /* Always allow the timing alert external interrupt. */
  145. __ctl_set_bit(0, 4);
  146. }
  147. static void clock_comparator_interrupt(struct ext_code ext_code,
  148. unsigned int param32,
  149. unsigned long param64)
  150. {
  151. inc_irq_stat(IRQEXT_CLK);
  152. if (S390_lowcore.clock_comparator == -1ULL)
  153. set_clock_comparator(S390_lowcore.clock_comparator);
  154. }
  155. static void etr_timing_alert(struct etr_irq_parm *);
  156. static void stp_timing_alert(struct stp_irq_parm *);
  157. static void timing_alert_interrupt(struct ext_code ext_code,
  158. unsigned int param32, unsigned long param64)
  159. {
  160. inc_irq_stat(IRQEXT_TLA);
  161. if (param32 & 0x00c40000)
  162. etr_timing_alert((struct etr_irq_parm *) &param32);
  163. if (param32 & 0x00038000)
  164. stp_timing_alert((struct stp_irq_parm *) &param32);
  165. }
  166. static void etr_reset(void);
  167. static void stp_reset(void);
  168. void read_persistent_clock(struct timespec *ts)
  169. {
  170. tod_to_timeval(get_tod_clock() - TOD_UNIX_EPOCH, ts);
  171. }
  172. void read_boot_clock(struct timespec *ts)
  173. {
  174. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  175. }
  176. static cycle_t read_tod_clock(struct clocksource *cs)
  177. {
  178. return get_tod_clock();
  179. }
  180. static struct clocksource clocksource_tod = {
  181. .name = "tod",
  182. .rating = 400,
  183. .read = read_tod_clock,
  184. .mask = -1ULL,
  185. .mult = 1000,
  186. .shift = 12,
  187. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  188. };
  189. struct clocksource * __init clocksource_default_clock(void)
  190. {
  191. return &clocksource_tod;
  192. }
  193. void update_vsyscall_old(struct timespec *wall_time, struct timespec *wtm,
  194. struct clocksource *clock, u32 mult)
  195. {
  196. if (clock != &clocksource_tod)
  197. return;
  198. /* Make userspace gettimeofday spin until we're done. */
  199. ++vdso_data->tb_update_count;
  200. smp_wmb();
  201. vdso_data->xtime_tod_stamp = clock->cycle_last;
  202. vdso_data->xtime_clock_sec = wall_time->tv_sec;
  203. vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
  204. vdso_data->wtom_clock_sec = wtm->tv_sec;
  205. vdso_data->wtom_clock_nsec = wtm->tv_nsec;
  206. vdso_data->ntp_mult = mult;
  207. smp_wmb();
  208. ++vdso_data->tb_update_count;
  209. }
  210. extern struct timezone sys_tz;
  211. void update_vsyscall_tz(void)
  212. {
  213. /* Make userspace gettimeofday spin until we're done. */
  214. ++vdso_data->tb_update_count;
  215. smp_wmb();
  216. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  217. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  218. smp_wmb();
  219. ++vdso_data->tb_update_count;
  220. }
  221. /*
  222. * Initialize the TOD clock and the CPU timer of
  223. * the boot cpu.
  224. */
  225. void __init time_init(void)
  226. {
  227. /* Reset time synchronization interfaces. */
  228. etr_reset();
  229. stp_reset();
  230. /* request the clock comparator external interrupt */
  231. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  232. panic("Couldn't request external interrupt 0x1004");
  233. /* request the timing alert external interrupt */
  234. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  235. panic("Couldn't request external interrupt 0x1406");
  236. if (clocksource_register(&clocksource_tod) != 0)
  237. panic("Could not register TOD clock source");
  238. /* Enable TOD clock interrupts on the boot cpu. */
  239. init_cpu_timer();
  240. /* Enable cpu timer interrupts on the boot cpu. */
  241. vtime_init();
  242. }
  243. /*
  244. * The time is "clock". old is what we think the time is.
  245. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  246. * "delay" is an approximation how long the synchronization took. If
  247. * the time correction is positive, then "delay" is subtracted from
  248. * the time difference and only the remaining part is passed to ntp.
  249. */
  250. static unsigned long long adjust_time(unsigned long long old,
  251. unsigned long long clock,
  252. unsigned long long delay)
  253. {
  254. unsigned long long delta, ticks;
  255. struct timex adjust;
  256. if (clock > old) {
  257. /* It is later than we thought. */
  258. delta = ticks = clock - old;
  259. delta = ticks = (delta < delay) ? 0 : delta - delay;
  260. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  261. adjust.offset = ticks * (1000000 / HZ);
  262. } else {
  263. /* It is earlier than we thought. */
  264. delta = ticks = old - clock;
  265. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  266. delta = -delta;
  267. adjust.offset = -ticks * (1000000 / HZ);
  268. }
  269. sched_clock_base_cc += delta;
  270. if (adjust.offset != 0) {
  271. pr_notice("The ETR interface has adjusted the clock "
  272. "by %li microseconds\n", adjust.offset);
  273. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  274. do_adjtimex(&adjust);
  275. }
  276. return delta;
  277. }
  278. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  279. static DEFINE_MUTEX(clock_sync_mutex);
  280. static unsigned long clock_sync_flags;
  281. #define CLOCK_SYNC_HAS_ETR 0
  282. #define CLOCK_SYNC_HAS_STP 1
  283. #define CLOCK_SYNC_ETR 2
  284. #define CLOCK_SYNC_STP 3
  285. /*
  286. * The synchronous get_clock function. It will write the current clock
  287. * value to the clock pointer and return 0 if the clock is in sync with
  288. * the external time source. If the clock mode is local it will return
  289. * -EOPNOTSUPP and -EAGAIN if the clock is not in sync with the external
  290. * reference.
  291. */
  292. int get_sync_clock(unsigned long long *clock)
  293. {
  294. atomic_t *sw_ptr;
  295. unsigned int sw0, sw1;
  296. sw_ptr = &get_cpu_var(clock_sync_word);
  297. sw0 = atomic_read(sw_ptr);
  298. *clock = get_tod_clock();
  299. sw1 = atomic_read(sw_ptr);
  300. put_cpu_var(clock_sync_word);
  301. if (sw0 == sw1 && (sw0 & 0x80000000U))
  302. /* Success: time is in sync. */
  303. return 0;
  304. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  305. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  306. return -EOPNOTSUPP;
  307. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  308. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  309. return -EACCES;
  310. return -EAGAIN;
  311. }
  312. EXPORT_SYMBOL(get_sync_clock);
  313. /*
  314. * Make get_sync_clock return -EAGAIN.
  315. */
  316. static void disable_sync_clock(void *dummy)
  317. {
  318. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  319. /*
  320. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  321. * fail until the sync bit is turned back on. In addition
  322. * increase the "sequence" counter to avoid the race of an
  323. * etr event and the complete recovery against get_sync_clock.
  324. */
  325. atomic_clear_mask(0x80000000, sw_ptr);
  326. atomic_inc(sw_ptr);
  327. }
  328. /*
  329. * Make get_sync_clock return 0 again.
  330. * Needs to be called from a context disabled for preemption.
  331. */
  332. static void enable_sync_clock(void)
  333. {
  334. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  335. atomic_set_mask(0x80000000, sw_ptr);
  336. }
  337. /*
  338. * Function to check if the clock is in sync.
  339. */
  340. static inline int check_sync_clock(void)
  341. {
  342. atomic_t *sw_ptr;
  343. int rc;
  344. sw_ptr = &get_cpu_var(clock_sync_word);
  345. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  346. put_cpu_var(clock_sync_word);
  347. return rc;
  348. }
  349. /* Single threaded workqueue used for etr and stp sync events */
  350. static struct workqueue_struct *time_sync_wq;
  351. static void __init time_init_wq(void)
  352. {
  353. if (time_sync_wq)
  354. return;
  355. time_sync_wq = create_singlethread_workqueue("timesync");
  356. }
  357. /*
  358. * External Time Reference (ETR) code.
  359. */
  360. static int etr_port0_online;
  361. static int etr_port1_online;
  362. static int etr_steai_available;
  363. static int __init early_parse_etr(char *p)
  364. {
  365. if (strncmp(p, "off", 3) == 0)
  366. etr_port0_online = etr_port1_online = 0;
  367. else if (strncmp(p, "port0", 5) == 0)
  368. etr_port0_online = 1;
  369. else if (strncmp(p, "port1", 5) == 0)
  370. etr_port1_online = 1;
  371. else if (strncmp(p, "on", 2) == 0)
  372. etr_port0_online = etr_port1_online = 1;
  373. return 0;
  374. }
  375. early_param("etr", early_parse_etr);
  376. enum etr_event {
  377. ETR_EVENT_PORT0_CHANGE,
  378. ETR_EVENT_PORT1_CHANGE,
  379. ETR_EVENT_PORT_ALERT,
  380. ETR_EVENT_SYNC_CHECK,
  381. ETR_EVENT_SWITCH_LOCAL,
  382. ETR_EVENT_UPDATE,
  383. };
  384. /*
  385. * Valid bit combinations of the eacr register are (x = don't care):
  386. * e0 e1 dp p0 p1 ea es sl
  387. * 0 0 x 0 0 0 0 0 initial, disabled state
  388. * 0 0 x 0 1 1 0 0 port 1 online
  389. * 0 0 x 1 0 1 0 0 port 0 online
  390. * 0 0 x 1 1 1 0 0 both ports online
  391. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  392. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  393. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  394. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  395. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  396. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  397. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  398. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  399. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  400. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  401. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  402. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  403. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  404. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  405. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  406. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  407. */
  408. static struct etr_eacr etr_eacr;
  409. static u64 etr_tolec; /* time of last eacr update */
  410. static struct etr_aib etr_port0;
  411. static int etr_port0_uptodate;
  412. static struct etr_aib etr_port1;
  413. static int etr_port1_uptodate;
  414. static unsigned long etr_events;
  415. static struct timer_list etr_timer;
  416. static void etr_timeout(unsigned long dummy);
  417. static void etr_work_fn(struct work_struct *work);
  418. static DEFINE_MUTEX(etr_work_mutex);
  419. static DECLARE_WORK(etr_work, etr_work_fn);
  420. /*
  421. * Reset ETR attachment.
  422. */
  423. static void etr_reset(void)
  424. {
  425. etr_eacr = (struct etr_eacr) {
  426. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  427. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  428. .es = 0, .sl = 0 };
  429. if (etr_setr(&etr_eacr) == 0) {
  430. etr_tolec = get_tod_clock();
  431. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  432. if (etr_port0_online && etr_port1_online)
  433. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  434. } else if (etr_port0_online || etr_port1_online) {
  435. pr_warning("The real or virtual hardware system does "
  436. "not provide an ETR interface\n");
  437. etr_port0_online = etr_port1_online = 0;
  438. }
  439. }
  440. static int __init etr_init(void)
  441. {
  442. struct etr_aib aib;
  443. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  444. return 0;
  445. time_init_wq();
  446. /* Check if this machine has the steai instruction. */
  447. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  448. etr_steai_available = 1;
  449. setup_timer(&etr_timer, etr_timeout, 0UL);
  450. if (etr_port0_online) {
  451. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  452. queue_work(time_sync_wq, &etr_work);
  453. }
  454. if (etr_port1_online) {
  455. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  456. queue_work(time_sync_wq, &etr_work);
  457. }
  458. return 0;
  459. }
  460. arch_initcall(etr_init);
  461. /*
  462. * Two sorts of ETR machine checks. The architecture reads:
  463. * "When a machine-check niterruption occurs and if a switch-to-local or
  464. * ETR-sync-check interrupt request is pending but disabled, this pending
  465. * disabled interruption request is indicated and is cleared".
  466. * Which means that we can get etr_switch_to_local events from the machine
  467. * check handler although the interruption condition is disabled. Lovely..
  468. */
  469. /*
  470. * Switch to local machine check. This is called when the last usable
  471. * ETR port goes inactive. After switch to local the clock is not in sync.
  472. */
  473. void etr_switch_to_local(void)
  474. {
  475. if (!etr_eacr.sl)
  476. return;
  477. disable_sync_clock(NULL);
  478. if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
  479. etr_eacr.es = etr_eacr.sl = 0;
  480. etr_setr(&etr_eacr);
  481. queue_work(time_sync_wq, &etr_work);
  482. }
  483. }
  484. /*
  485. * ETR sync check machine check. This is called when the ETR OTE and the
  486. * local clock OTE are farther apart than the ETR sync check tolerance.
  487. * After a ETR sync check the clock is not in sync. The machine check
  488. * is broadcasted to all cpus at the same time.
  489. */
  490. void etr_sync_check(void)
  491. {
  492. if (!etr_eacr.es)
  493. return;
  494. disable_sync_clock(NULL);
  495. if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
  496. etr_eacr.es = 0;
  497. etr_setr(&etr_eacr);
  498. queue_work(time_sync_wq, &etr_work);
  499. }
  500. }
  501. /*
  502. * ETR timing alert. There are two causes:
  503. * 1) port state change, check the usability of the port
  504. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  505. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  506. * or ETR-data word 4 (edf4) has changed.
  507. */
  508. static void etr_timing_alert(struct etr_irq_parm *intparm)
  509. {
  510. if (intparm->pc0)
  511. /* ETR port 0 state change. */
  512. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  513. if (intparm->pc1)
  514. /* ETR port 1 state change. */
  515. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  516. if (intparm->eai)
  517. /*
  518. * ETR port alert on either port 0, 1 or both.
  519. * Both ports are not up-to-date now.
  520. */
  521. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  522. queue_work(time_sync_wq, &etr_work);
  523. }
  524. static void etr_timeout(unsigned long dummy)
  525. {
  526. set_bit(ETR_EVENT_UPDATE, &etr_events);
  527. queue_work(time_sync_wq, &etr_work);
  528. }
  529. /*
  530. * Check if the etr mode is pss.
  531. */
  532. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  533. {
  534. return eacr.es && !eacr.sl;
  535. }
  536. /*
  537. * Check if the etr mode is etr.
  538. */
  539. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  540. {
  541. return eacr.es && eacr.sl;
  542. }
  543. /*
  544. * Check if the port can be used for TOD synchronization.
  545. * For PPS mode the port has to receive OTEs. For ETR mode
  546. * the port has to receive OTEs, the ETR stepping bit has to
  547. * be zero and the validity bits for data frame 1, 2, and 3
  548. * have to be 1.
  549. */
  550. static int etr_port_valid(struct etr_aib *aib, int port)
  551. {
  552. unsigned int psc;
  553. /* Check that this port is receiving OTEs. */
  554. if (aib->tsp == 0)
  555. return 0;
  556. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  557. if (psc == etr_lpsc_pps_mode)
  558. return 1;
  559. if (psc == etr_lpsc_operational_step)
  560. return !aib->esw.y && aib->slsw.v1 &&
  561. aib->slsw.v2 && aib->slsw.v3;
  562. return 0;
  563. }
  564. /*
  565. * Check if two ports are on the same network.
  566. */
  567. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  568. {
  569. // FIXME: any other fields we have to compare?
  570. return aib1->edf1.net_id == aib2->edf1.net_id;
  571. }
  572. /*
  573. * Wrapper for etr_stei that converts physical port states
  574. * to logical port states to be consistent with the output
  575. * of stetr (see etr_psc vs. etr_lpsc).
  576. */
  577. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  578. {
  579. BUG_ON(etr_steai(aib, func) != 0);
  580. /* Convert port state to logical port state. */
  581. if (aib->esw.psc0 == 1)
  582. aib->esw.psc0 = 2;
  583. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  584. aib->esw.psc0 = 1;
  585. if (aib->esw.psc1 == 1)
  586. aib->esw.psc1 = 2;
  587. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  588. aib->esw.psc1 = 1;
  589. }
  590. /*
  591. * Check if the aib a2 is still connected to the same attachment as
  592. * aib a1, the etv values differ by one and a2 is valid.
  593. */
  594. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  595. {
  596. int state_a1, state_a2;
  597. /* Paranoia check: e0/e1 should better be the same. */
  598. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  599. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  600. return 0;
  601. /* Still connected to the same etr ? */
  602. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  603. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  604. if (state_a1 == etr_lpsc_operational_step) {
  605. if (state_a2 != etr_lpsc_operational_step ||
  606. a1->edf1.net_id != a2->edf1.net_id ||
  607. a1->edf1.etr_id != a2->edf1.etr_id ||
  608. a1->edf1.etr_pn != a2->edf1.etr_pn)
  609. return 0;
  610. } else if (state_a2 != etr_lpsc_pps_mode)
  611. return 0;
  612. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  613. if (a1->edf2.etv + 1 != a2->edf2.etv)
  614. return 0;
  615. if (!etr_port_valid(a2, p))
  616. return 0;
  617. return 1;
  618. }
  619. struct clock_sync_data {
  620. atomic_t cpus;
  621. int in_sync;
  622. unsigned long long fixup_cc;
  623. int etr_port;
  624. struct etr_aib *etr_aib;
  625. };
  626. static void clock_sync_cpu(struct clock_sync_data *sync)
  627. {
  628. atomic_dec(&sync->cpus);
  629. enable_sync_clock();
  630. /*
  631. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  632. * is called on all other cpus while the TOD clocks is stopped.
  633. * __udelay will stop the cpu on an enabled wait psw until the
  634. * TOD is running again.
  635. */
  636. while (sync->in_sync == 0) {
  637. __udelay(1);
  638. /*
  639. * A different cpu changes *in_sync. Therefore use
  640. * barrier() to force memory access.
  641. */
  642. barrier();
  643. }
  644. if (sync->in_sync != 1)
  645. /* Didn't work. Clear per-cpu in sync bit again. */
  646. disable_sync_clock(NULL);
  647. /*
  648. * This round of TOD syncing is done. Set the clock comparator
  649. * to the next tick and let the processor continue.
  650. */
  651. fixup_clock_comparator(sync->fixup_cc);
  652. }
  653. /*
  654. * Sync the TOD clock using the port referred to by aibp. This port
  655. * has to be enabled and the other port has to be disabled. The
  656. * last eacr update has to be more than 1.6 seconds in the past.
  657. */
  658. static int etr_sync_clock(void *data)
  659. {
  660. static int first;
  661. unsigned long long clock, old_clock, delay, delta;
  662. struct clock_sync_data *etr_sync;
  663. struct etr_aib *sync_port, *aib;
  664. int port;
  665. int rc;
  666. etr_sync = data;
  667. if (xchg(&first, 1) == 1) {
  668. /* Slave */
  669. clock_sync_cpu(etr_sync);
  670. return 0;
  671. }
  672. /* Wait until all other cpus entered the sync function. */
  673. while (atomic_read(&etr_sync->cpus) != 0)
  674. cpu_relax();
  675. port = etr_sync->etr_port;
  676. aib = etr_sync->etr_aib;
  677. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  678. enable_sync_clock();
  679. /* Set clock to next OTE. */
  680. __ctl_set_bit(14, 21);
  681. __ctl_set_bit(0, 29);
  682. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  683. old_clock = get_tod_clock();
  684. if (set_tod_clock(clock) == 0) {
  685. __udelay(1); /* Wait for the clock to start. */
  686. __ctl_clear_bit(0, 29);
  687. __ctl_clear_bit(14, 21);
  688. etr_stetr(aib);
  689. /* Adjust Linux timing variables. */
  690. delay = (unsigned long long)
  691. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  692. delta = adjust_time(old_clock, clock, delay);
  693. etr_sync->fixup_cc = delta;
  694. fixup_clock_comparator(delta);
  695. /* Verify that the clock is properly set. */
  696. if (!etr_aib_follows(sync_port, aib, port)) {
  697. /* Didn't work. */
  698. disable_sync_clock(NULL);
  699. etr_sync->in_sync = -EAGAIN;
  700. rc = -EAGAIN;
  701. } else {
  702. etr_sync->in_sync = 1;
  703. rc = 0;
  704. }
  705. } else {
  706. /* Could not set the clock ?!? */
  707. __ctl_clear_bit(0, 29);
  708. __ctl_clear_bit(14, 21);
  709. disable_sync_clock(NULL);
  710. etr_sync->in_sync = -EAGAIN;
  711. rc = -EAGAIN;
  712. }
  713. xchg(&first, 0);
  714. return rc;
  715. }
  716. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  717. {
  718. struct clock_sync_data etr_sync;
  719. struct etr_aib *sync_port;
  720. int follows;
  721. int rc;
  722. /* Check if the current aib is adjacent to the sync port aib. */
  723. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  724. follows = etr_aib_follows(sync_port, aib, port);
  725. memcpy(sync_port, aib, sizeof(*aib));
  726. if (!follows)
  727. return -EAGAIN;
  728. memset(&etr_sync, 0, sizeof(etr_sync));
  729. etr_sync.etr_aib = aib;
  730. etr_sync.etr_port = port;
  731. get_online_cpus();
  732. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  733. rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
  734. put_online_cpus();
  735. return rc;
  736. }
  737. /*
  738. * Handle the immediate effects of the different events.
  739. * The port change event is used for online/offline changes.
  740. */
  741. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  742. {
  743. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  744. eacr.es = 0;
  745. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  746. eacr.es = eacr.sl = 0;
  747. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  748. etr_port0_uptodate = etr_port1_uptodate = 0;
  749. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  750. if (eacr.e0)
  751. /*
  752. * Port change of an enabled port. We have to
  753. * assume that this can have caused an stepping
  754. * port switch.
  755. */
  756. etr_tolec = get_tod_clock();
  757. eacr.p0 = etr_port0_online;
  758. if (!eacr.p0)
  759. eacr.e0 = 0;
  760. etr_port0_uptodate = 0;
  761. }
  762. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  763. if (eacr.e1)
  764. /*
  765. * Port change of an enabled port. We have to
  766. * assume that this can have caused an stepping
  767. * port switch.
  768. */
  769. etr_tolec = get_tod_clock();
  770. eacr.p1 = etr_port1_online;
  771. if (!eacr.p1)
  772. eacr.e1 = 0;
  773. etr_port1_uptodate = 0;
  774. }
  775. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  776. return eacr;
  777. }
  778. /*
  779. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  780. * one of the ports needs an update.
  781. */
  782. static void etr_set_tolec_timeout(unsigned long long now)
  783. {
  784. unsigned long micros;
  785. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  786. (!etr_eacr.p1 || etr_port1_uptodate))
  787. return;
  788. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  789. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  790. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  791. }
  792. /*
  793. * Set up a time that expires after 1/2 second.
  794. */
  795. static void etr_set_sync_timeout(void)
  796. {
  797. mod_timer(&etr_timer, jiffies + HZ/2);
  798. }
  799. /*
  800. * Update the aib information for one or both ports.
  801. */
  802. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  803. struct etr_eacr eacr)
  804. {
  805. /* With both ports disabled the aib information is useless. */
  806. if (!eacr.e0 && !eacr.e1)
  807. return eacr;
  808. /* Update port0 or port1 with aib stored in etr_work_fn. */
  809. if (aib->esw.q == 0) {
  810. /* Information for port 0 stored. */
  811. if (eacr.p0 && !etr_port0_uptodate) {
  812. etr_port0 = *aib;
  813. if (etr_port0_online)
  814. etr_port0_uptodate = 1;
  815. }
  816. } else {
  817. /* Information for port 1 stored. */
  818. if (eacr.p1 && !etr_port1_uptodate) {
  819. etr_port1 = *aib;
  820. if (etr_port0_online)
  821. etr_port1_uptodate = 1;
  822. }
  823. }
  824. /*
  825. * Do not try to get the alternate port aib if the clock
  826. * is not in sync yet.
  827. */
  828. if (!eacr.es || !check_sync_clock())
  829. return eacr;
  830. /*
  831. * If steai is available we can get the information about
  832. * the other port immediately. If only stetr is available the
  833. * data-port bit toggle has to be used.
  834. */
  835. if (etr_steai_available) {
  836. if (eacr.p0 && !etr_port0_uptodate) {
  837. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  838. etr_port0_uptodate = 1;
  839. }
  840. if (eacr.p1 && !etr_port1_uptodate) {
  841. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  842. etr_port1_uptodate = 1;
  843. }
  844. } else {
  845. /*
  846. * One port was updated above, if the other
  847. * port is not uptodate toggle dp bit.
  848. */
  849. if ((eacr.p0 && !etr_port0_uptodate) ||
  850. (eacr.p1 && !etr_port1_uptodate))
  851. eacr.dp ^= 1;
  852. else
  853. eacr.dp = 0;
  854. }
  855. return eacr;
  856. }
  857. /*
  858. * Write new etr control register if it differs from the current one.
  859. * Return 1 if etr_tolec has been updated as well.
  860. */
  861. static void etr_update_eacr(struct etr_eacr eacr)
  862. {
  863. int dp_changed;
  864. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  865. /* No change, return. */
  866. return;
  867. /*
  868. * The disable of an active port of the change of the data port
  869. * bit can/will cause a change in the data port.
  870. */
  871. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  872. (etr_eacr.dp ^ eacr.dp) != 0;
  873. etr_eacr = eacr;
  874. etr_setr(&etr_eacr);
  875. if (dp_changed)
  876. etr_tolec = get_tod_clock();
  877. }
  878. /*
  879. * ETR work. In this function you'll find the main logic. In
  880. * particular this is the only function that calls etr_update_eacr(),
  881. * it "controls" the etr control register.
  882. */
  883. static void etr_work_fn(struct work_struct *work)
  884. {
  885. unsigned long long now;
  886. struct etr_eacr eacr;
  887. struct etr_aib aib;
  888. int sync_port;
  889. /* prevent multiple execution. */
  890. mutex_lock(&etr_work_mutex);
  891. /* Create working copy of etr_eacr. */
  892. eacr = etr_eacr;
  893. /* Check for the different events and their immediate effects. */
  894. eacr = etr_handle_events(eacr);
  895. /* Check if ETR is supposed to be active. */
  896. eacr.ea = eacr.p0 || eacr.p1;
  897. if (!eacr.ea) {
  898. /* Both ports offline. Reset everything. */
  899. eacr.dp = eacr.es = eacr.sl = 0;
  900. on_each_cpu(disable_sync_clock, NULL, 1);
  901. del_timer_sync(&etr_timer);
  902. etr_update_eacr(eacr);
  903. goto out_unlock;
  904. }
  905. /* Store aib to get the current ETR status word. */
  906. BUG_ON(etr_stetr(&aib) != 0);
  907. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  908. now = get_tod_clock();
  909. /*
  910. * Update the port information if the last stepping port change
  911. * or data port change is older than 1.6 seconds.
  912. */
  913. if (now >= etr_tolec + (1600000 << 12))
  914. eacr = etr_handle_update(&aib, eacr);
  915. /*
  916. * Select ports to enable. The preferred synchronization mode is PPS.
  917. * If a port can be enabled depends on a number of things:
  918. * 1) The port needs to be online and uptodate. A port is not
  919. * disabled just because it is not uptodate, but it is only
  920. * enabled if it is uptodate.
  921. * 2) The port needs to have the same mode (pps / etr).
  922. * 3) The port needs to be usable -> etr_port_valid() == 1
  923. * 4) To enable the second port the clock needs to be in sync.
  924. * 5) If both ports are useable and are ETR ports, the network id
  925. * has to be the same.
  926. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  927. */
  928. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  929. eacr.sl = 0;
  930. eacr.e0 = 1;
  931. if (!etr_mode_is_pps(etr_eacr))
  932. eacr.es = 0;
  933. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  934. eacr.e1 = 0;
  935. // FIXME: uptodate checks ?
  936. else if (etr_port0_uptodate && etr_port1_uptodate)
  937. eacr.e1 = 1;
  938. sync_port = (etr_port0_uptodate &&
  939. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  940. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  941. eacr.sl = 0;
  942. eacr.e0 = 0;
  943. eacr.e1 = 1;
  944. if (!etr_mode_is_pps(etr_eacr))
  945. eacr.es = 0;
  946. sync_port = (etr_port1_uptodate &&
  947. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  948. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  949. eacr.sl = 1;
  950. eacr.e0 = 1;
  951. if (!etr_mode_is_etr(etr_eacr))
  952. eacr.es = 0;
  953. if (!eacr.es || !eacr.p1 ||
  954. aib.esw.psc1 != etr_lpsc_operational_alt)
  955. eacr.e1 = 0;
  956. else if (etr_port0_uptodate && etr_port1_uptodate &&
  957. etr_compare_network(&etr_port0, &etr_port1))
  958. eacr.e1 = 1;
  959. sync_port = (etr_port0_uptodate &&
  960. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  961. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  962. eacr.sl = 1;
  963. eacr.e0 = 0;
  964. eacr.e1 = 1;
  965. if (!etr_mode_is_etr(etr_eacr))
  966. eacr.es = 0;
  967. sync_port = (etr_port1_uptodate &&
  968. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  969. } else {
  970. /* Both ports not usable. */
  971. eacr.es = eacr.sl = 0;
  972. sync_port = -1;
  973. }
  974. /*
  975. * If the clock is in sync just update the eacr and return.
  976. * If there is no valid sync port wait for a port update.
  977. */
  978. if ((eacr.es && check_sync_clock()) || sync_port < 0) {
  979. etr_update_eacr(eacr);
  980. etr_set_tolec_timeout(now);
  981. goto out_unlock;
  982. }
  983. /*
  984. * Prepare control register for clock syncing
  985. * (reset data port bit, set sync check control.
  986. */
  987. eacr.dp = 0;
  988. eacr.es = 1;
  989. /*
  990. * Update eacr and try to synchronize the clock. If the update
  991. * of eacr caused a stepping port switch (or if we have to
  992. * assume that a stepping port switch has occurred) or the
  993. * clock syncing failed, reset the sync check control bit
  994. * and set up a timer to try again after 0.5 seconds
  995. */
  996. etr_update_eacr(eacr);
  997. if (now < etr_tolec + (1600000 << 12) ||
  998. etr_sync_clock_stop(&aib, sync_port) != 0) {
  999. /* Sync failed. Try again in 1/2 second. */
  1000. eacr.es = 0;
  1001. etr_update_eacr(eacr);
  1002. etr_set_sync_timeout();
  1003. } else
  1004. etr_set_tolec_timeout(now);
  1005. out_unlock:
  1006. mutex_unlock(&etr_work_mutex);
  1007. }
  1008. /*
  1009. * Sysfs interface functions
  1010. */
  1011. static struct bus_type etr_subsys = {
  1012. .name = "etr",
  1013. .dev_name = "etr",
  1014. };
  1015. static struct device etr_port0_dev = {
  1016. .id = 0,
  1017. .bus = &etr_subsys,
  1018. };
  1019. static struct device etr_port1_dev = {
  1020. .id = 1,
  1021. .bus = &etr_subsys,
  1022. };
  1023. /*
  1024. * ETR subsys attributes
  1025. */
  1026. static ssize_t etr_stepping_port_show(struct device *dev,
  1027. struct device_attribute *attr,
  1028. char *buf)
  1029. {
  1030. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1031. }
  1032. static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1033. static ssize_t etr_stepping_mode_show(struct device *dev,
  1034. struct device_attribute *attr,
  1035. char *buf)
  1036. {
  1037. char *mode_str;
  1038. if (etr_mode_is_pps(etr_eacr))
  1039. mode_str = "pps";
  1040. else if (etr_mode_is_etr(etr_eacr))
  1041. mode_str = "etr";
  1042. else
  1043. mode_str = "local";
  1044. return sprintf(buf, "%s\n", mode_str);
  1045. }
  1046. static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1047. /*
  1048. * ETR port attributes
  1049. */
  1050. static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
  1051. {
  1052. if (dev == &etr_port0_dev)
  1053. return etr_port0_online ? &etr_port0 : NULL;
  1054. else
  1055. return etr_port1_online ? &etr_port1 : NULL;
  1056. }
  1057. static ssize_t etr_online_show(struct device *dev,
  1058. struct device_attribute *attr,
  1059. char *buf)
  1060. {
  1061. unsigned int online;
  1062. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1063. return sprintf(buf, "%i\n", online);
  1064. }
  1065. static ssize_t etr_online_store(struct device *dev,
  1066. struct device_attribute *attr,
  1067. const char *buf, size_t count)
  1068. {
  1069. unsigned int value;
  1070. value = simple_strtoul(buf, NULL, 0);
  1071. if (value != 0 && value != 1)
  1072. return -EINVAL;
  1073. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1074. return -EOPNOTSUPP;
  1075. mutex_lock(&clock_sync_mutex);
  1076. if (dev == &etr_port0_dev) {
  1077. if (etr_port0_online == value)
  1078. goto out; /* Nothing to do. */
  1079. etr_port0_online = value;
  1080. if (etr_port0_online && etr_port1_online)
  1081. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1082. else
  1083. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1084. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1085. queue_work(time_sync_wq, &etr_work);
  1086. } else {
  1087. if (etr_port1_online == value)
  1088. goto out; /* Nothing to do. */
  1089. etr_port1_online = value;
  1090. if (etr_port0_online && etr_port1_online)
  1091. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1092. else
  1093. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1094. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1095. queue_work(time_sync_wq, &etr_work);
  1096. }
  1097. out:
  1098. mutex_unlock(&clock_sync_mutex);
  1099. return count;
  1100. }
  1101. static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
  1102. static ssize_t etr_stepping_control_show(struct device *dev,
  1103. struct device_attribute *attr,
  1104. char *buf)
  1105. {
  1106. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1107. etr_eacr.e0 : etr_eacr.e1);
  1108. }
  1109. static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1110. static ssize_t etr_mode_code_show(struct device *dev,
  1111. struct device_attribute *attr, char *buf)
  1112. {
  1113. if (!etr_port0_online && !etr_port1_online)
  1114. /* Status word is not uptodate if both ports are offline. */
  1115. return -ENODATA;
  1116. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1117. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1118. }
  1119. static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1120. static ssize_t etr_untuned_show(struct device *dev,
  1121. struct device_attribute *attr, char *buf)
  1122. {
  1123. struct etr_aib *aib = etr_aib_from_dev(dev);
  1124. if (!aib || !aib->slsw.v1)
  1125. return -ENODATA;
  1126. return sprintf(buf, "%i\n", aib->edf1.u);
  1127. }
  1128. static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1129. static ssize_t etr_network_id_show(struct device *dev,
  1130. struct device_attribute *attr, char *buf)
  1131. {
  1132. struct etr_aib *aib = etr_aib_from_dev(dev);
  1133. if (!aib || !aib->slsw.v1)
  1134. return -ENODATA;
  1135. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1136. }
  1137. static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
  1138. static ssize_t etr_id_show(struct device *dev,
  1139. struct device_attribute *attr, char *buf)
  1140. {
  1141. struct etr_aib *aib = etr_aib_from_dev(dev);
  1142. if (!aib || !aib->slsw.v1)
  1143. return -ENODATA;
  1144. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1145. }
  1146. static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
  1147. static ssize_t etr_port_number_show(struct device *dev,
  1148. struct device_attribute *attr, char *buf)
  1149. {
  1150. struct etr_aib *aib = etr_aib_from_dev(dev);
  1151. if (!aib || !aib->slsw.v1)
  1152. return -ENODATA;
  1153. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1154. }
  1155. static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
  1156. static ssize_t etr_coupled_show(struct device *dev,
  1157. struct device_attribute *attr, char *buf)
  1158. {
  1159. struct etr_aib *aib = etr_aib_from_dev(dev);
  1160. if (!aib || !aib->slsw.v3)
  1161. return -ENODATA;
  1162. return sprintf(buf, "%i\n", aib->edf3.c);
  1163. }
  1164. static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1165. static ssize_t etr_local_time_show(struct device *dev,
  1166. struct device_attribute *attr, char *buf)
  1167. {
  1168. struct etr_aib *aib = etr_aib_from_dev(dev);
  1169. if (!aib || !aib->slsw.v3)
  1170. return -ENODATA;
  1171. return sprintf(buf, "%i\n", aib->edf3.blto);
  1172. }
  1173. static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1174. static ssize_t etr_utc_offset_show(struct device *dev,
  1175. struct device_attribute *attr, char *buf)
  1176. {
  1177. struct etr_aib *aib = etr_aib_from_dev(dev);
  1178. if (!aib || !aib->slsw.v3)
  1179. return -ENODATA;
  1180. return sprintf(buf, "%i\n", aib->edf3.buo);
  1181. }
  1182. static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1183. static struct device_attribute *etr_port_attributes[] = {
  1184. &dev_attr_online,
  1185. &dev_attr_stepping_control,
  1186. &dev_attr_state_code,
  1187. &dev_attr_untuned,
  1188. &dev_attr_network,
  1189. &dev_attr_id,
  1190. &dev_attr_port,
  1191. &dev_attr_coupled,
  1192. &dev_attr_local_time,
  1193. &dev_attr_utc_offset,
  1194. NULL
  1195. };
  1196. static int __init etr_register_port(struct device *dev)
  1197. {
  1198. struct device_attribute **attr;
  1199. int rc;
  1200. rc = device_register(dev);
  1201. if (rc)
  1202. goto out;
  1203. for (attr = etr_port_attributes; *attr; attr++) {
  1204. rc = device_create_file(dev, *attr);
  1205. if (rc)
  1206. goto out_unreg;
  1207. }
  1208. return 0;
  1209. out_unreg:
  1210. for (; attr >= etr_port_attributes; attr--)
  1211. device_remove_file(dev, *attr);
  1212. device_unregister(dev);
  1213. out:
  1214. return rc;
  1215. }
  1216. static void __init etr_unregister_port(struct device *dev)
  1217. {
  1218. struct device_attribute **attr;
  1219. for (attr = etr_port_attributes; *attr; attr++)
  1220. device_remove_file(dev, *attr);
  1221. device_unregister(dev);
  1222. }
  1223. static int __init etr_init_sysfs(void)
  1224. {
  1225. int rc;
  1226. rc = subsys_system_register(&etr_subsys, NULL);
  1227. if (rc)
  1228. goto out;
  1229. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1230. if (rc)
  1231. goto out_unreg_subsys;
  1232. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1233. if (rc)
  1234. goto out_remove_stepping_port;
  1235. rc = etr_register_port(&etr_port0_dev);
  1236. if (rc)
  1237. goto out_remove_stepping_mode;
  1238. rc = etr_register_port(&etr_port1_dev);
  1239. if (rc)
  1240. goto out_remove_port0;
  1241. return 0;
  1242. out_remove_port0:
  1243. etr_unregister_port(&etr_port0_dev);
  1244. out_remove_stepping_mode:
  1245. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1246. out_remove_stepping_port:
  1247. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1248. out_unreg_subsys:
  1249. bus_unregister(&etr_subsys);
  1250. out:
  1251. return rc;
  1252. }
  1253. device_initcall(etr_init_sysfs);
  1254. /*
  1255. * Server Time Protocol (STP) code.
  1256. */
  1257. static int stp_online;
  1258. static struct stp_sstpi stp_info;
  1259. static void *stp_page;
  1260. static void stp_work_fn(struct work_struct *work);
  1261. static DEFINE_MUTEX(stp_work_mutex);
  1262. static DECLARE_WORK(stp_work, stp_work_fn);
  1263. static struct timer_list stp_timer;
  1264. static int __init early_parse_stp(char *p)
  1265. {
  1266. if (strncmp(p, "off", 3) == 0)
  1267. stp_online = 0;
  1268. else if (strncmp(p, "on", 2) == 0)
  1269. stp_online = 1;
  1270. return 0;
  1271. }
  1272. early_param("stp", early_parse_stp);
  1273. /*
  1274. * Reset STP attachment.
  1275. */
  1276. static void __init stp_reset(void)
  1277. {
  1278. int rc;
  1279. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1280. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1281. if (rc == 0)
  1282. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1283. else if (stp_online) {
  1284. pr_warning("The real or virtual hardware system does "
  1285. "not provide an STP interface\n");
  1286. free_page((unsigned long) stp_page);
  1287. stp_page = NULL;
  1288. stp_online = 0;
  1289. }
  1290. }
  1291. static void stp_timeout(unsigned long dummy)
  1292. {
  1293. queue_work(time_sync_wq, &stp_work);
  1294. }
  1295. static int __init stp_init(void)
  1296. {
  1297. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1298. return 0;
  1299. setup_timer(&stp_timer, stp_timeout, 0UL);
  1300. time_init_wq();
  1301. if (!stp_online)
  1302. return 0;
  1303. queue_work(time_sync_wq, &stp_work);
  1304. return 0;
  1305. }
  1306. arch_initcall(stp_init);
  1307. /*
  1308. * STP timing alert. There are three causes:
  1309. * 1) timing status change
  1310. * 2) link availability change
  1311. * 3) time control parameter change
  1312. * In all three cases we are only interested in the clock source state.
  1313. * If a STP clock source is now available use it.
  1314. */
  1315. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1316. {
  1317. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1318. queue_work(time_sync_wq, &stp_work);
  1319. }
  1320. /*
  1321. * STP sync check machine check. This is called when the timing state
  1322. * changes from the synchronized state to the unsynchronized state.
  1323. * After a STP sync check the clock is not in sync. The machine check
  1324. * is broadcasted to all cpus at the same time.
  1325. */
  1326. void stp_sync_check(void)
  1327. {
  1328. disable_sync_clock(NULL);
  1329. queue_work(time_sync_wq, &stp_work);
  1330. }
  1331. /*
  1332. * STP island condition machine check. This is called when an attached
  1333. * server attempts to communicate over an STP link and the servers
  1334. * have matching CTN ids and have a valid stratum-1 configuration
  1335. * but the configurations do not match.
  1336. */
  1337. void stp_island_check(void)
  1338. {
  1339. disable_sync_clock(NULL);
  1340. queue_work(time_sync_wq, &stp_work);
  1341. }
  1342. static int stp_sync_clock(void *data)
  1343. {
  1344. static int first;
  1345. unsigned long long old_clock, delta;
  1346. struct clock_sync_data *stp_sync;
  1347. int rc;
  1348. stp_sync = data;
  1349. if (xchg(&first, 1) == 1) {
  1350. /* Slave */
  1351. clock_sync_cpu(stp_sync);
  1352. return 0;
  1353. }
  1354. /* Wait until all other cpus entered the sync function. */
  1355. while (atomic_read(&stp_sync->cpus) != 0)
  1356. cpu_relax();
  1357. enable_sync_clock();
  1358. rc = 0;
  1359. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1360. stp_info.todoff[2] || stp_info.todoff[3] ||
  1361. stp_info.tmd != 2) {
  1362. old_clock = get_tod_clock();
  1363. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1364. if (rc == 0) {
  1365. delta = adjust_time(old_clock, get_tod_clock(), 0);
  1366. fixup_clock_comparator(delta);
  1367. rc = chsc_sstpi(stp_page, &stp_info,
  1368. sizeof(struct stp_sstpi));
  1369. if (rc == 0 && stp_info.tmd != 2)
  1370. rc = -EAGAIN;
  1371. }
  1372. }
  1373. if (rc) {
  1374. disable_sync_clock(NULL);
  1375. stp_sync->in_sync = -EAGAIN;
  1376. } else
  1377. stp_sync->in_sync = 1;
  1378. xchg(&first, 0);
  1379. return 0;
  1380. }
  1381. /*
  1382. * STP work. Check for the STP state and take over the clock
  1383. * synchronization if the STP clock source is usable.
  1384. */
  1385. static void stp_work_fn(struct work_struct *work)
  1386. {
  1387. struct clock_sync_data stp_sync;
  1388. int rc;
  1389. /* prevent multiple execution. */
  1390. mutex_lock(&stp_work_mutex);
  1391. if (!stp_online) {
  1392. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1393. del_timer_sync(&stp_timer);
  1394. goto out_unlock;
  1395. }
  1396. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1397. if (rc)
  1398. goto out_unlock;
  1399. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1400. if (rc || stp_info.c == 0)
  1401. goto out_unlock;
  1402. /* Skip synchronization if the clock is already in sync. */
  1403. if (check_sync_clock())
  1404. goto out_unlock;
  1405. memset(&stp_sync, 0, sizeof(stp_sync));
  1406. get_online_cpus();
  1407. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1408. stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
  1409. put_online_cpus();
  1410. if (!check_sync_clock())
  1411. /*
  1412. * There is a usable clock but the synchonization failed.
  1413. * Retry after a second.
  1414. */
  1415. mod_timer(&stp_timer, jiffies + HZ);
  1416. out_unlock:
  1417. mutex_unlock(&stp_work_mutex);
  1418. }
  1419. /*
  1420. * STP subsys sysfs interface functions
  1421. */
  1422. static struct bus_type stp_subsys = {
  1423. .name = "stp",
  1424. .dev_name = "stp",
  1425. };
  1426. static ssize_t stp_ctn_id_show(struct device *dev,
  1427. struct device_attribute *attr,
  1428. char *buf)
  1429. {
  1430. if (!stp_online)
  1431. return -ENODATA;
  1432. return sprintf(buf, "%016llx\n",
  1433. *(unsigned long long *) stp_info.ctnid);
  1434. }
  1435. static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1436. static ssize_t stp_ctn_type_show(struct device *dev,
  1437. struct device_attribute *attr,
  1438. char *buf)
  1439. {
  1440. if (!stp_online)
  1441. return -ENODATA;
  1442. return sprintf(buf, "%i\n", stp_info.ctn);
  1443. }
  1444. static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1445. static ssize_t stp_dst_offset_show(struct device *dev,
  1446. struct device_attribute *attr,
  1447. char *buf)
  1448. {
  1449. if (!stp_online || !(stp_info.vbits & 0x2000))
  1450. return -ENODATA;
  1451. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1452. }
  1453. static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1454. static ssize_t stp_leap_seconds_show(struct device *dev,
  1455. struct device_attribute *attr,
  1456. char *buf)
  1457. {
  1458. if (!stp_online || !(stp_info.vbits & 0x8000))
  1459. return -ENODATA;
  1460. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1461. }
  1462. static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1463. static ssize_t stp_stratum_show(struct device *dev,
  1464. struct device_attribute *attr,
  1465. char *buf)
  1466. {
  1467. if (!stp_online)
  1468. return -ENODATA;
  1469. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1470. }
  1471. static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1472. static ssize_t stp_time_offset_show(struct device *dev,
  1473. struct device_attribute *attr,
  1474. char *buf)
  1475. {
  1476. if (!stp_online || !(stp_info.vbits & 0x0800))
  1477. return -ENODATA;
  1478. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1479. }
  1480. static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1481. static ssize_t stp_time_zone_offset_show(struct device *dev,
  1482. struct device_attribute *attr,
  1483. char *buf)
  1484. {
  1485. if (!stp_online || !(stp_info.vbits & 0x4000))
  1486. return -ENODATA;
  1487. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1488. }
  1489. static DEVICE_ATTR(time_zone_offset, 0400,
  1490. stp_time_zone_offset_show, NULL);
  1491. static ssize_t stp_timing_mode_show(struct device *dev,
  1492. struct device_attribute *attr,
  1493. char *buf)
  1494. {
  1495. if (!stp_online)
  1496. return -ENODATA;
  1497. return sprintf(buf, "%i\n", stp_info.tmd);
  1498. }
  1499. static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1500. static ssize_t stp_timing_state_show(struct device *dev,
  1501. struct device_attribute *attr,
  1502. char *buf)
  1503. {
  1504. if (!stp_online)
  1505. return -ENODATA;
  1506. return sprintf(buf, "%i\n", stp_info.tst);
  1507. }
  1508. static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1509. static ssize_t stp_online_show(struct device *dev,
  1510. struct device_attribute *attr,
  1511. char *buf)
  1512. {
  1513. return sprintf(buf, "%i\n", stp_online);
  1514. }
  1515. static ssize_t stp_online_store(struct device *dev,
  1516. struct device_attribute *attr,
  1517. const char *buf, size_t count)
  1518. {
  1519. unsigned int value;
  1520. value = simple_strtoul(buf, NULL, 0);
  1521. if (value != 0 && value != 1)
  1522. return -EINVAL;
  1523. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1524. return -EOPNOTSUPP;
  1525. mutex_lock(&clock_sync_mutex);
  1526. stp_online = value;
  1527. if (stp_online)
  1528. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1529. else
  1530. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1531. queue_work(time_sync_wq, &stp_work);
  1532. mutex_unlock(&clock_sync_mutex);
  1533. return count;
  1534. }
  1535. /*
  1536. * Can't use DEVICE_ATTR because the attribute should be named
  1537. * stp/online but dev_attr_online already exists in this file ..
  1538. */
  1539. static struct device_attribute dev_attr_stp_online = {
  1540. .attr = { .name = "online", .mode = 0600 },
  1541. .show = stp_online_show,
  1542. .store = stp_online_store,
  1543. };
  1544. static struct device_attribute *stp_attributes[] = {
  1545. &dev_attr_ctn_id,
  1546. &dev_attr_ctn_type,
  1547. &dev_attr_dst_offset,
  1548. &dev_attr_leap_seconds,
  1549. &dev_attr_stp_online,
  1550. &dev_attr_stratum,
  1551. &dev_attr_time_offset,
  1552. &dev_attr_time_zone_offset,
  1553. &dev_attr_timing_mode,
  1554. &dev_attr_timing_state,
  1555. NULL
  1556. };
  1557. static int __init stp_init_sysfs(void)
  1558. {
  1559. struct device_attribute **attr;
  1560. int rc;
  1561. rc = subsys_system_register(&stp_subsys, NULL);
  1562. if (rc)
  1563. goto out;
  1564. for (attr = stp_attributes; *attr; attr++) {
  1565. rc = device_create_file(stp_subsys.dev_root, *attr);
  1566. if (rc)
  1567. goto out_unreg;
  1568. }
  1569. return 0;
  1570. out_unreg:
  1571. for (; attr >= stp_attributes; attr--)
  1572. device_remove_file(stp_subsys.dev_root, *attr);
  1573. bus_unregister(&stp_subsys);
  1574. out:
  1575. return rc;
  1576. }
  1577. device_initcall(stp_init_sysfs);