dma.c 5.6 KB

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  1. /*
  2. * DMA implementation for Hexagon
  3. *
  4. * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 and
  8. * only version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  18. * 02110-1301, USA.
  19. */
  20. #include <linux/dma-mapping.h>
  21. #include <linux/bootmem.h>
  22. #include <linux/genalloc.h>
  23. #include <asm/dma-mapping.h>
  24. #include <linux/module.h>
  25. #include <asm/page.h>
  26. struct dma_map_ops *dma_ops;
  27. EXPORT_SYMBOL(dma_ops);
  28. int bad_dma_address; /* globals are automatically initialized to zero */
  29. static inline void *dma_addr_to_virt(dma_addr_t dma_addr)
  30. {
  31. return phys_to_virt((unsigned long) dma_addr);
  32. }
  33. int dma_supported(struct device *dev, u64 mask)
  34. {
  35. if (mask == DMA_BIT_MASK(32))
  36. return 1;
  37. else
  38. return 0;
  39. }
  40. EXPORT_SYMBOL(dma_supported);
  41. int dma_set_mask(struct device *dev, u64 mask)
  42. {
  43. if (!dev->dma_mask || !dma_supported(dev, mask))
  44. return -EIO;
  45. *dev->dma_mask = mask;
  46. return 0;
  47. }
  48. EXPORT_SYMBOL(dma_set_mask);
  49. static struct gen_pool *coherent_pool;
  50. /* Allocates from a pool of uncached memory that was reserved at boot time */
  51. static void *hexagon_dma_alloc_coherent(struct device *dev, size_t size,
  52. dma_addr_t *dma_addr, gfp_t flag,
  53. struct dma_attrs *attrs)
  54. {
  55. void *ret;
  56. /*
  57. * Our max_low_pfn should have been backed off by 16MB in
  58. * mm/init.c to create DMA coherent space. Use that as the VA
  59. * for the pool.
  60. */
  61. if (coherent_pool == NULL) {
  62. coherent_pool = gen_pool_create(PAGE_SHIFT, -1);
  63. if (coherent_pool == NULL)
  64. panic("Can't create %s() memory pool!", __func__);
  65. else
  66. gen_pool_add(coherent_pool,
  67. pfn_to_virt(max_low_pfn),
  68. hexagon_coherent_pool_size, -1);
  69. }
  70. ret = (void *) gen_pool_alloc(coherent_pool, size);
  71. if (ret) {
  72. memset(ret, 0, size);
  73. *dma_addr = (dma_addr_t) virt_to_phys(ret);
  74. } else
  75. *dma_addr = ~0;
  76. return ret;
  77. }
  78. static void hexagon_free_coherent(struct device *dev, size_t size, void *vaddr,
  79. dma_addr_t dma_addr, struct dma_attrs *attrs)
  80. {
  81. gen_pool_free(coherent_pool, (unsigned long) vaddr, size);
  82. }
  83. static int check_addr(const char *name, struct device *hwdev,
  84. dma_addr_t bus, size_t size)
  85. {
  86. if (hwdev && hwdev->dma_mask && !dma_capable(hwdev, bus, size)) {
  87. if (*hwdev->dma_mask >= DMA_BIT_MASK(32))
  88. printk(KERN_ERR
  89. "%s: overflow %Lx+%zu of device mask %Lx\n",
  90. name, (long long)bus, size,
  91. (long long)*hwdev->dma_mask);
  92. return 0;
  93. }
  94. return 1;
  95. }
  96. static int hexagon_map_sg(struct device *hwdev, struct scatterlist *sg,
  97. int nents, enum dma_data_direction dir,
  98. struct dma_attrs *attrs)
  99. {
  100. struct scatterlist *s;
  101. int i;
  102. WARN_ON(nents == 0 || sg[0].length == 0);
  103. for_each_sg(sg, s, nents, i) {
  104. s->dma_address = sg_phys(s);
  105. if (!check_addr("map_sg", hwdev, s->dma_address, s->length))
  106. return 0;
  107. s->dma_length = s->length;
  108. flush_dcache_range(dma_addr_to_virt(s->dma_address),
  109. dma_addr_to_virt(s->dma_address + s->length));
  110. }
  111. return nents;
  112. }
  113. /*
  114. * address is virtual
  115. */
  116. static inline void dma_sync(void *addr, size_t size,
  117. enum dma_data_direction dir)
  118. {
  119. switch (dir) {
  120. case DMA_TO_DEVICE:
  121. hexagon_clean_dcache_range((unsigned long) addr,
  122. (unsigned long) addr + size);
  123. break;
  124. case DMA_FROM_DEVICE:
  125. hexagon_inv_dcache_range((unsigned long) addr,
  126. (unsigned long) addr + size);
  127. break;
  128. case DMA_BIDIRECTIONAL:
  129. flush_dcache_range((unsigned long) addr,
  130. (unsigned long) addr + size);
  131. break;
  132. default:
  133. BUG();
  134. }
  135. }
  136. /**
  137. * hexagon_map_page() - maps an address for device DMA
  138. * @dev: pointer to DMA device
  139. * @page: pointer to page struct of DMA memory
  140. * @offset: offset within page
  141. * @size: size of memory to map
  142. * @dir: transfer direction
  143. * @attrs: pointer to DMA attrs (not used)
  144. *
  145. * Called to map a memory address to a DMA address prior
  146. * to accesses to/from device.
  147. *
  148. * We don't particularly have many hoops to jump through
  149. * so far. Straight translation between phys and virtual.
  150. *
  151. * DMA is not cache coherent so sync is necessary; this
  152. * seems to be a convenient place to do it.
  153. *
  154. */
  155. static dma_addr_t hexagon_map_page(struct device *dev, struct page *page,
  156. unsigned long offset, size_t size,
  157. enum dma_data_direction dir,
  158. struct dma_attrs *attrs)
  159. {
  160. dma_addr_t bus = page_to_phys(page) + offset;
  161. WARN_ON(size == 0);
  162. if (!check_addr("map_single", dev, bus, size))
  163. return bad_dma_address;
  164. dma_sync(dma_addr_to_virt(bus), size, dir);
  165. return bus;
  166. }
  167. static void hexagon_sync_single_for_cpu(struct device *dev,
  168. dma_addr_t dma_handle, size_t size,
  169. enum dma_data_direction dir)
  170. {
  171. dma_sync(dma_addr_to_virt(dma_handle), size, dir);
  172. }
  173. static void hexagon_sync_single_for_device(struct device *dev,
  174. dma_addr_t dma_handle, size_t size,
  175. enum dma_data_direction dir)
  176. {
  177. dma_sync(dma_addr_to_virt(dma_handle), size, dir);
  178. }
  179. struct dma_map_ops hexagon_dma_ops = {
  180. .alloc = hexagon_dma_alloc_coherent,
  181. .free = hexagon_free_coherent,
  182. .map_sg = hexagon_map_sg,
  183. .map_page = hexagon_map_page,
  184. .sync_single_for_cpu = hexagon_sync_single_for_cpu,
  185. .sync_single_for_device = hexagon_sync_single_for_device,
  186. .is_phys = 1,
  187. };
  188. void __init hexagon_dma_init(void)
  189. {
  190. if (dma_ops)
  191. return;
  192. dma_ops = &hexagon_dma_ops;
  193. }