ezkit.c 39 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/irq.h>
  16. #include <linux/i2c.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <asm/bfin5xx_spi.h>
  20. #include <asm/dma.h>
  21. #include <asm/gpio.h>
  22. #include <asm/nand.h>
  23. #include <asm/dpmc.h>
  24. #include <asm/bfin_sport.h>
  25. #include <asm/portmux.h>
  26. #include <asm/bfin_sdh.h>
  27. #include <mach/bf54x_keys.h>
  28. #include <linux/input.h>
  29. #include <linux/spi/ad7877.h>
  30. /*
  31. * Name the Board for the /proc/cpuinfo
  32. */
  33. const char bfin_board_name[] = "ADI BF548-EZKIT";
  34. /*
  35. * Driver needs to know address, irq and flag pin.
  36. */
  37. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  38. #include <linux/usb/isp1760.h>
  39. static struct resource bfin_isp1760_resources[] = {
  40. [0] = {
  41. .start = 0x2C0C0000,
  42. .end = 0x2C0C0000 + 0xfffff,
  43. .flags = IORESOURCE_MEM,
  44. },
  45. [1] = {
  46. .start = IRQ_PG7,
  47. .end = IRQ_PG7,
  48. .flags = IORESOURCE_IRQ,
  49. },
  50. };
  51. static struct isp1760_platform_data isp1760_priv = {
  52. .is_isp1761 = 0,
  53. .bus_width_16 = 1,
  54. .port1_otg = 0,
  55. .analog_oc = 0,
  56. .dack_polarity_high = 0,
  57. .dreq_polarity_high = 0,
  58. };
  59. static struct platform_device bfin_isp1760_device = {
  60. .name = "isp1760",
  61. .id = 0,
  62. .dev = {
  63. .platform_data = &isp1760_priv,
  64. },
  65. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  66. .resource = bfin_isp1760_resources,
  67. };
  68. #endif
  69. #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  70. #include <mach/bf54x-lq043.h>
  71. static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
  72. .width = 95,
  73. .height = 54,
  74. .xres = {480, 480, 480},
  75. .yres = {272, 272, 272},
  76. .bpp = {24, 24, 24},
  77. .disp = GPIO_PE3,
  78. };
  79. static struct resource bf54x_lq043_resources[] = {
  80. {
  81. .start = IRQ_EPPI0_ERR,
  82. .end = IRQ_EPPI0_ERR,
  83. .flags = IORESOURCE_IRQ,
  84. },
  85. };
  86. static struct platform_device bf54x_lq043_device = {
  87. .name = "bf54x-lq043",
  88. .id = -1,
  89. .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
  90. .resource = bf54x_lq043_resources,
  91. .dev = {
  92. .platform_data = &bf54x_lq043_data,
  93. },
  94. };
  95. #endif
  96. #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  97. static const unsigned int bf548_keymap[] = {
  98. KEYVAL(0, 0, KEY_ENTER),
  99. KEYVAL(0, 1, KEY_HELP),
  100. KEYVAL(0, 2, KEY_0),
  101. KEYVAL(0, 3, KEY_BACKSPACE),
  102. KEYVAL(1, 0, KEY_TAB),
  103. KEYVAL(1, 1, KEY_9),
  104. KEYVAL(1, 2, KEY_8),
  105. KEYVAL(1, 3, KEY_7),
  106. KEYVAL(2, 0, KEY_DOWN),
  107. KEYVAL(2, 1, KEY_6),
  108. KEYVAL(2, 2, KEY_5),
  109. KEYVAL(2, 3, KEY_4),
  110. KEYVAL(3, 0, KEY_UP),
  111. KEYVAL(3, 1, KEY_3),
  112. KEYVAL(3, 2, KEY_2),
  113. KEYVAL(3, 3, KEY_1),
  114. };
  115. static struct bfin_kpad_platform_data bf54x_kpad_data = {
  116. .rows = 4,
  117. .cols = 4,
  118. .keymap = bf548_keymap,
  119. .keymapsize = ARRAY_SIZE(bf548_keymap),
  120. .repeat = 0,
  121. .debounce_time = 5000, /* ns (5ms) */
  122. .coldrive_time = 1000, /* ns (1ms) */
  123. .keyup_test_interval = 50, /* ms (50ms) */
  124. };
  125. static struct resource bf54x_kpad_resources[] = {
  126. {
  127. .start = IRQ_KEY,
  128. .end = IRQ_KEY,
  129. .flags = IORESOURCE_IRQ,
  130. },
  131. };
  132. static struct platform_device bf54x_kpad_device = {
  133. .name = "bf54x-keys",
  134. .id = -1,
  135. .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
  136. .resource = bf54x_kpad_resources,
  137. .dev = {
  138. .platform_data = &bf54x_kpad_data,
  139. },
  140. };
  141. #endif
  142. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  143. #include <asm/bfin_rotary.h>
  144. static struct bfin_rotary_platform_data bfin_rotary_data = {
  145. /*.rotary_up_key = KEY_UP,*/
  146. /*.rotary_down_key = KEY_DOWN,*/
  147. .rotary_rel_code = REL_WHEEL,
  148. .rotary_button_key = KEY_ENTER,
  149. .debounce = 10, /* 0..17 */
  150. .mode = ROT_QUAD_ENC | ROT_DEBE,
  151. .pm_wakeup = 1,
  152. };
  153. static struct resource bfin_rotary_resources[] = {
  154. {
  155. .start = IRQ_CNT,
  156. .end = IRQ_CNT,
  157. .flags = IORESOURCE_IRQ,
  158. },
  159. };
  160. static struct platform_device bfin_rotary_device = {
  161. .name = "bfin-rotary",
  162. .id = -1,
  163. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  164. .resource = bfin_rotary_resources,
  165. .dev = {
  166. .platform_data = &bfin_rotary_data,
  167. },
  168. };
  169. #endif
  170. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  171. #include <linux/input/adxl34x.h>
  172. static const struct adxl34x_platform_data adxl34x_info = {
  173. .x_axis_offset = 0,
  174. .y_axis_offset = 0,
  175. .z_axis_offset = 0,
  176. .tap_threshold = 0x31,
  177. .tap_duration = 0x10,
  178. .tap_latency = 0x60,
  179. .tap_window = 0xF0,
  180. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  181. .act_axis_control = 0xFF,
  182. .activity_threshold = 5,
  183. .inactivity_threshold = 3,
  184. .inactivity_time = 4,
  185. .free_fall_threshold = 0x7,
  186. .free_fall_time = 0x20,
  187. .data_rate = 0x8,
  188. .data_range = ADXL_FULL_RES,
  189. .ev_type = EV_ABS,
  190. .ev_code_x = ABS_X, /* EV_REL */
  191. .ev_code_y = ABS_Y, /* EV_REL */
  192. .ev_code_z = ABS_Z, /* EV_REL */
  193. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  194. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  195. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  196. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  197. .fifo_mode = ADXL_FIFO_STREAM,
  198. .orientation_enable = ADXL_EN_ORIENTATION_3D,
  199. .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
  200. .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
  201. /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
  202. .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
  203. };
  204. #endif
  205. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  206. static struct platform_device rtc_device = {
  207. .name = "rtc-bfin",
  208. .id = -1,
  209. };
  210. #endif
  211. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  212. #ifdef CONFIG_SERIAL_BFIN_UART0
  213. static struct resource bfin_uart0_resources[] = {
  214. {
  215. .start = UART0_DLL,
  216. .end = UART0_RBR+2,
  217. .flags = IORESOURCE_MEM,
  218. },
  219. {
  220. .start = IRQ_UART0_TX,
  221. .end = IRQ_UART0_TX,
  222. .flags = IORESOURCE_IRQ,
  223. },
  224. {
  225. .start = IRQ_UART0_RX,
  226. .end = IRQ_UART0_RX,
  227. .flags = IORESOURCE_IRQ,
  228. },
  229. {
  230. .start = IRQ_UART0_ERROR,
  231. .end = IRQ_UART0_ERROR,
  232. .flags = IORESOURCE_IRQ,
  233. },
  234. {
  235. .start = CH_UART0_TX,
  236. .end = CH_UART0_TX,
  237. .flags = IORESOURCE_DMA,
  238. },
  239. {
  240. .start = CH_UART0_RX,
  241. .end = CH_UART0_RX,
  242. .flags = IORESOURCE_DMA,
  243. },
  244. };
  245. static unsigned short bfin_uart0_peripherals[] = {
  246. P_UART0_TX, P_UART0_RX, 0
  247. };
  248. static struct platform_device bfin_uart0_device = {
  249. .name = "bfin-uart",
  250. .id = 0,
  251. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  252. .resource = bfin_uart0_resources,
  253. .dev = {
  254. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  255. },
  256. };
  257. #endif
  258. #ifdef CONFIG_SERIAL_BFIN_UART1
  259. static struct resource bfin_uart1_resources[] = {
  260. {
  261. .start = UART1_DLL,
  262. .end = UART1_RBR+2,
  263. .flags = IORESOURCE_MEM,
  264. },
  265. {
  266. .start = IRQ_UART1_TX,
  267. .end = IRQ_UART1_TX,
  268. .flags = IORESOURCE_IRQ,
  269. },
  270. {
  271. .start = IRQ_UART1_RX,
  272. .end = IRQ_UART1_RX,
  273. .flags = IORESOURCE_IRQ,
  274. },
  275. {
  276. .start = IRQ_UART1_ERROR,
  277. .end = IRQ_UART1_ERROR,
  278. .flags = IORESOURCE_IRQ,
  279. },
  280. {
  281. .start = CH_UART1_TX,
  282. .end = CH_UART1_TX,
  283. .flags = IORESOURCE_DMA,
  284. },
  285. {
  286. .start = CH_UART1_RX,
  287. .end = CH_UART1_RX,
  288. .flags = IORESOURCE_DMA,
  289. },
  290. #ifdef CONFIG_BFIN_UART1_CTSRTS
  291. { /* CTS pin -- 0 means not supported */
  292. .start = GPIO_PE10,
  293. .end = GPIO_PE10,
  294. .flags = IORESOURCE_IO,
  295. },
  296. { /* RTS pin -- 0 means not supported */
  297. .start = GPIO_PE9,
  298. .end = GPIO_PE9,
  299. .flags = IORESOURCE_IO,
  300. },
  301. #endif
  302. };
  303. static unsigned short bfin_uart1_peripherals[] = {
  304. P_UART1_TX, P_UART1_RX,
  305. #ifdef CONFIG_BFIN_UART1_CTSRTS
  306. P_UART1_RTS, P_UART1_CTS,
  307. #endif
  308. 0
  309. };
  310. static struct platform_device bfin_uart1_device = {
  311. .name = "bfin-uart",
  312. .id = 1,
  313. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  314. .resource = bfin_uart1_resources,
  315. .dev = {
  316. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  317. },
  318. };
  319. #endif
  320. #ifdef CONFIG_SERIAL_BFIN_UART2
  321. static struct resource bfin_uart2_resources[] = {
  322. {
  323. .start = UART2_DLL,
  324. .end = UART2_RBR+2,
  325. .flags = IORESOURCE_MEM,
  326. },
  327. {
  328. .start = IRQ_UART2_TX,
  329. .end = IRQ_UART2_TX,
  330. .flags = IORESOURCE_IRQ,
  331. },
  332. {
  333. .start = IRQ_UART2_RX,
  334. .end = IRQ_UART2_RX,
  335. .flags = IORESOURCE_IRQ,
  336. },
  337. {
  338. .start = IRQ_UART2_ERROR,
  339. .end = IRQ_UART2_ERROR,
  340. .flags = IORESOURCE_IRQ,
  341. },
  342. {
  343. .start = CH_UART2_TX,
  344. .end = CH_UART2_TX,
  345. .flags = IORESOURCE_DMA,
  346. },
  347. {
  348. .start = CH_UART2_RX,
  349. .end = CH_UART2_RX,
  350. .flags = IORESOURCE_DMA,
  351. },
  352. };
  353. static unsigned short bfin_uart2_peripherals[] = {
  354. P_UART2_TX, P_UART2_RX, 0
  355. };
  356. static struct platform_device bfin_uart2_device = {
  357. .name = "bfin-uart",
  358. .id = 2,
  359. .num_resources = ARRAY_SIZE(bfin_uart2_resources),
  360. .resource = bfin_uart2_resources,
  361. .dev = {
  362. .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
  363. },
  364. };
  365. #endif
  366. #ifdef CONFIG_SERIAL_BFIN_UART3
  367. static struct resource bfin_uart3_resources[] = {
  368. {
  369. .start = UART3_DLL,
  370. .end = UART3_RBR+2,
  371. .flags = IORESOURCE_MEM,
  372. },
  373. {
  374. .start = IRQ_UART3_TX,
  375. .end = IRQ_UART3_TX,
  376. .flags = IORESOURCE_IRQ,
  377. },
  378. {
  379. .start = IRQ_UART3_RX,
  380. .end = IRQ_UART3_RX,
  381. .flags = IORESOURCE_IRQ,
  382. },
  383. {
  384. .start = IRQ_UART3_ERROR,
  385. .end = IRQ_UART3_ERROR,
  386. .flags = IORESOURCE_IRQ,
  387. },
  388. {
  389. .start = CH_UART3_TX,
  390. .end = CH_UART3_TX,
  391. .flags = IORESOURCE_DMA,
  392. },
  393. {
  394. .start = CH_UART3_RX,
  395. .end = CH_UART3_RX,
  396. .flags = IORESOURCE_DMA,
  397. },
  398. #ifdef CONFIG_BFIN_UART3_CTSRTS
  399. { /* CTS pin -- 0 means not supported */
  400. .start = GPIO_PB3,
  401. .end = GPIO_PB3,
  402. .flags = IORESOURCE_IO,
  403. },
  404. { /* RTS pin -- 0 means not supported */
  405. .start = GPIO_PB2,
  406. .end = GPIO_PB2,
  407. .flags = IORESOURCE_IO,
  408. },
  409. #endif
  410. };
  411. static unsigned short bfin_uart3_peripherals[] = {
  412. P_UART3_TX, P_UART3_RX,
  413. #ifdef CONFIG_BFIN_UART3_CTSRTS
  414. P_UART3_RTS, P_UART3_CTS,
  415. #endif
  416. 0
  417. };
  418. static struct platform_device bfin_uart3_device = {
  419. .name = "bfin-uart",
  420. .id = 3,
  421. .num_resources = ARRAY_SIZE(bfin_uart3_resources),
  422. .resource = bfin_uart3_resources,
  423. .dev = {
  424. .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
  425. },
  426. };
  427. #endif
  428. #endif
  429. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  430. #ifdef CONFIG_BFIN_SIR0
  431. static struct resource bfin_sir0_resources[] = {
  432. {
  433. .start = 0xFFC00400,
  434. .end = 0xFFC004FF,
  435. .flags = IORESOURCE_MEM,
  436. },
  437. {
  438. .start = IRQ_UART0_RX,
  439. .end = IRQ_UART0_RX+1,
  440. .flags = IORESOURCE_IRQ,
  441. },
  442. {
  443. .start = CH_UART0_RX,
  444. .end = CH_UART0_RX+1,
  445. .flags = IORESOURCE_DMA,
  446. },
  447. };
  448. static struct platform_device bfin_sir0_device = {
  449. .name = "bfin_sir",
  450. .id = 0,
  451. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  452. .resource = bfin_sir0_resources,
  453. };
  454. #endif
  455. #ifdef CONFIG_BFIN_SIR1
  456. static struct resource bfin_sir1_resources[] = {
  457. {
  458. .start = 0xFFC02000,
  459. .end = 0xFFC020FF,
  460. .flags = IORESOURCE_MEM,
  461. },
  462. {
  463. .start = IRQ_UART1_RX,
  464. .end = IRQ_UART1_RX+1,
  465. .flags = IORESOURCE_IRQ,
  466. },
  467. {
  468. .start = CH_UART1_RX,
  469. .end = CH_UART1_RX+1,
  470. .flags = IORESOURCE_DMA,
  471. },
  472. };
  473. static struct platform_device bfin_sir1_device = {
  474. .name = "bfin_sir",
  475. .id = 1,
  476. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  477. .resource = bfin_sir1_resources,
  478. };
  479. #endif
  480. #ifdef CONFIG_BFIN_SIR2
  481. static struct resource bfin_sir2_resources[] = {
  482. {
  483. .start = 0xFFC02100,
  484. .end = 0xFFC021FF,
  485. .flags = IORESOURCE_MEM,
  486. },
  487. {
  488. .start = IRQ_UART2_RX,
  489. .end = IRQ_UART2_RX+1,
  490. .flags = IORESOURCE_IRQ,
  491. },
  492. {
  493. .start = CH_UART2_RX,
  494. .end = CH_UART2_RX+1,
  495. .flags = IORESOURCE_DMA,
  496. },
  497. };
  498. static struct platform_device bfin_sir2_device = {
  499. .name = "bfin_sir",
  500. .id = 2,
  501. .num_resources = ARRAY_SIZE(bfin_sir2_resources),
  502. .resource = bfin_sir2_resources,
  503. };
  504. #endif
  505. #ifdef CONFIG_BFIN_SIR3
  506. static struct resource bfin_sir3_resources[] = {
  507. {
  508. .start = 0xFFC03100,
  509. .end = 0xFFC031FF,
  510. .flags = IORESOURCE_MEM,
  511. },
  512. {
  513. .start = IRQ_UART3_RX,
  514. .end = IRQ_UART3_RX+1,
  515. .flags = IORESOURCE_IRQ,
  516. },
  517. {
  518. .start = CH_UART3_RX,
  519. .end = CH_UART3_RX+1,
  520. .flags = IORESOURCE_DMA,
  521. },
  522. };
  523. static struct platform_device bfin_sir3_device = {
  524. .name = "bfin_sir",
  525. .id = 3,
  526. .num_resources = ARRAY_SIZE(bfin_sir3_resources),
  527. .resource = bfin_sir3_resources,
  528. };
  529. #endif
  530. #endif
  531. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  532. #include <linux/smsc911x.h>
  533. static struct resource smsc911x_resources[] = {
  534. {
  535. .name = "smsc911x-memory",
  536. .start = 0x24000000,
  537. .end = 0x24000000 + 0xFF,
  538. .flags = IORESOURCE_MEM,
  539. },
  540. {
  541. .start = IRQ_PE8,
  542. .end = IRQ_PE8,
  543. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  544. },
  545. };
  546. static struct smsc911x_platform_config smsc911x_config = {
  547. .flags = SMSC911X_USE_32BIT,
  548. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  549. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  550. .phy_interface = PHY_INTERFACE_MODE_MII,
  551. };
  552. static struct platform_device smsc911x_device = {
  553. .name = "smsc911x",
  554. .id = 0,
  555. .num_resources = ARRAY_SIZE(smsc911x_resources),
  556. .resource = smsc911x_resources,
  557. .dev = {
  558. .platform_data = &smsc911x_config,
  559. },
  560. };
  561. #endif
  562. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  563. static struct resource musb_resources[] = {
  564. [0] = {
  565. .start = 0xFFC03C00,
  566. .end = 0xFFC040FF,
  567. .flags = IORESOURCE_MEM,
  568. },
  569. [1] = { /* general IRQ */
  570. .start = IRQ_USB_INT0,
  571. .end = IRQ_USB_INT0,
  572. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  573. .name = "mc"
  574. },
  575. [2] = { /* DMA IRQ */
  576. .start = IRQ_USB_DMA,
  577. .end = IRQ_USB_DMA,
  578. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  579. .name = "dma"
  580. },
  581. };
  582. static struct musb_hdrc_config musb_config = {
  583. .multipoint = 0,
  584. .dyn_fifo = 0,
  585. .soft_con = 1,
  586. .dma = 1,
  587. .num_eps = 8,
  588. .dma_channels = 8,
  589. .gpio_vrsel = GPIO_PE7,
  590. /* Some custom boards need to be active low, just set it to "0"
  591. * if it is the case.
  592. */
  593. .gpio_vrsel_active = 1,
  594. .clkin = 24, /* musb CLKIN in MHZ */
  595. };
  596. static struct musb_hdrc_platform_data musb_plat = {
  597. #if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
  598. .mode = MUSB_OTG,
  599. #elif defined(CONFIG_USB_MUSB_HDRC)
  600. .mode = MUSB_HOST,
  601. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  602. .mode = MUSB_PERIPHERAL,
  603. #endif
  604. .config = &musb_config,
  605. };
  606. static u64 musb_dmamask = ~(u32)0;
  607. static struct platform_device musb_device = {
  608. .name = "musb-blackfin",
  609. .id = 0,
  610. .dev = {
  611. .dma_mask = &musb_dmamask,
  612. .coherent_dma_mask = 0xffffffff,
  613. .platform_data = &musb_plat,
  614. },
  615. .num_resources = ARRAY_SIZE(musb_resources),
  616. .resource = musb_resources,
  617. };
  618. #endif
  619. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  620. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  621. static struct resource bfin_sport0_uart_resources[] = {
  622. {
  623. .start = SPORT0_TCR1,
  624. .end = SPORT0_MRCS3+4,
  625. .flags = IORESOURCE_MEM,
  626. },
  627. {
  628. .start = IRQ_SPORT0_RX,
  629. .end = IRQ_SPORT0_RX+1,
  630. .flags = IORESOURCE_IRQ,
  631. },
  632. {
  633. .start = IRQ_SPORT0_ERROR,
  634. .end = IRQ_SPORT0_ERROR,
  635. .flags = IORESOURCE_IRQ,
  636. },
  637. };
  638. static unsigned short bfin_sport0_peripherals[] = {
  639. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  640. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  641. };
  642. static struct platform_device bfin_sport0_uart_device = {
  643. .name = "bfin-sport-uart",
  644. .id = 0,
  645. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  646. .resource = bfin_sport0_uart_resources,
  647. .dev = {
  648. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  649. },
  650. };
  651. #endif
  652. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  653. static struct resource bfin_sport1_uart_resources[] = {
  654. {
  655. .start = SPORT1_TCR1,
  656. .end = SPORT1_MRCS3+4,
  657. .flags = IORESOURCE_MEM,
  658. },
  659. {
  660. .start = IRQ_SPORT1_RX,
  661. .end = IRQ_SPORT1_RX+1,
  662. .flags = IORESOURCE_IRQ,
  663. },
  664. {
  665. .start = IRQ_SPORT1_ERROR,
  666. .end = IRQ_SPORT1_ERROR,
  667. .flags = IORESOURCE_IRQ,
  668. },
  669. };
  670. static unsigned short bfin_sport1_peripherals[] = {
  671. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  672. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  673. };
  674. static struct platform_device bfin_sport1_uart_device = {
  675. .name = "bfin-sport-uart",
  676. .id = 1,
  677. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  678. .resource = bfin_sport1_uart_resources,
  679. .dev = {
  680. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  681. },
  682. };
  683. #endif
  684. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  685. static struct resource bfin_sport2_uart_resources[] = {
  686. {
  687. .start = SPORT2_TCR1,
  688. .end = SPORT2_MRCS3+4,
  689. .flags = IORESOURCE_MEM,
  690. },
  691. {
  692. .start = IRQ_SPORT2_RX,
  693. .end = IRQ_SPORT2_RX+1,
  694. .flags = IORESOURCE_IRQ,
  695. },
  696. {
  697. .start = IRQ_SPORT2_ERROR,
  698. .end = IRQ_SPORT2_ERROR,
  699. .flags = IORESOURCE_IRQ,
  700. },
  701. };
  702. static unsigned short bfin_sport2_peripherals[] = {
  703. P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
  704. P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
  705. };
  706. static struct platform_device bfin_sport2_uart_device = {
  707. .name = "bfin-sport-uart",
  708. .id = 2,
  709. .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
  710. .resource = bfin_sport2_uart_resources,
  711. .dev = {
  712. .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
  713. },
  714. };
  715. #endif
  716. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  717. static struct resource bfin_sport3_uart_resources[] = {
  718. {
  719. .start = SPORT3_TCR1,
  720. .end = SPORT3_MRCS3+4,
  721. .flags = IORESOURCE_MEM,
  722. },
  723. {
  724. .start = IRQ_SPORT3_RX,
  725. .end = IRQ_SPORT3_RX+1,
  726. .flags = IORESOURCE_IRQ,
  727. },
  728. {
  729. .start = IRQ_SPORT3_ERROR,
  730. .end = IRQ_SPORT3_ERROR,
  731. .flags = IORESOURCE_IRQ,
  732. },
  733. };
  734. static unsigned short bfin_sport3_peripherals[] = {
  735. P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
  736. P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
  737. };
  738. static struct platform_device bfin_sport3_uart_device = {
  739. .name = "bfin-sport-uart",
  740. .id = 3,
  741. .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
  742. .resource = bfin_sport3_uart_resources,
  743. .dev = {
  744. .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
  745. },
  746. };
  747. #endif
  748. #endif
  749. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  750. static unsigned short bfin_can0_peripherals[] = {
  751. P_CAN0_RX, P_CAN0_TX, 0
  752. };
  753. static struct resource bfin_can0_resources[] = {
  754. {
  755. .start = 0xFFC02A00,
  756. .end = 0xFFC02FFF,
  757. .flags = IORESOURCE_MEM,
  758. },
  759. {
  760. .start = IRQ_CAN0_RX,
  761. .end = IRQ_CAN0_RX,
  762. .flags = IORESOURCE_IRQ,
  763. },
  764. {
  765. .start = IRQ_CAN0_TX,
  766. .end = IRQ_CAN0_TX,
  767. .flags = IORESOURCE_IRQ,
  768. },
  769. {
  770. .start = IRQ_CAN0_ERROR,
  771. .end = IRQ_CAN0_ERROR,
  772. .flags = IORESOURCE_IRQ,
  773. },
  774. };
  775. static struct platform_device bfin_can0_device = {
  776. .name = "bfin_can",
  777. .id = 0,
  778. .num_resources = ARRAY_SIZE(bfin_can0_resources),
  779. .resource = bfin_can0_resources,
  780. .dev = {
  781. .platform_data = &bfin_can0_peripherals, /* Passed to driver */
  782. },
  783. };
  784. static unsigned short bfin_can1_peripherals[] = {
  785. P_CAN1_RX, P_CAN1_TX, 0
  786. };
  787. static struct resource bfin_can1_resources[] = {
  788. {
  789. .start = 0xFFC03200,
  790. .end = 0xFFC037FF,
  791. .flags = IORESOURCE_MEM,
  792. },
  793. {
  794. .start = IRQ_CAN1_RX,
  795. .end = IRQ_CAN1_RX,
  796. .flags = IORESOURCE_IRQ,
  797. },
  798. {
  799. .start = IRQ_CAN1_TX,
  800. .end = IRQ_CAN1_TX,
  801. .flags = IORESOURCE_IRQ,
  802. },
  803. {
  804. .start = IRQ_CAN1_ERROR,
  805. .end = IRQ_CAN1_ERROR,
  806. .flags = IORESOURCE_IRQ,
  807. },
  808. };
  809. static struct platform_device bfin_can1_device = {
  810. .name = "bfin_can",
  811. .id = 1,
  812. .num_resources = ARRAY_SIZE(bfin_can1_resources),
  813. .resource = bfin_can1_resources,
  814. .dev = {
  815. .platform_data = &bfin_can1_peripherals, /* Passed to driver */
  816. },
  817. };
  818. #endif
  819. #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
  820. static struct resource bfin_atapi_resources[] = {
  821. {
  822. .start = 0xFFC03800,
  823. .end = 0xFFC0386F,
  824. .flags = IORESOURCE_MEM,
  825. },
  826. {
  827. .start = IRQ_ATAPI_ERR,
  828. .end = IRQ_ATAPI_ERR,
  829. .flags = IORESOURCE_IRQ,
  830. },
  831. };
  832. static struct platform_device bfin_atapi_device = {
  833. .name = "pata-bf54x",
  834. .id = -1,
  835. .num_resources = ARRAY_SIZE(bfin_atapi_resources),
  836. .resource = bfin_atapi_resources,
  837. };
  838. #endif
  839. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  840. static struct mtd_partition partition_info[] = {
  841. {
  842. .name = "bootloader(nand)",
  843. .offset = 0,
  844. .size = 0x80000,
  845. }, {
  846. .name = "linux kernel(nand)",
  847. .offset = MTDPART_OFS_APPEND,
  848. .size = 4 * 1024 * 1024,
  849. },
  850. {
  851. .name = "file system(nand)",
  852. .offset = MTDPART_OFS_APPEND,
  853. .size = MTDPART_SIZ_FULL,
  854. },
  855. };
  856. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  857. .data_width = NFC_NWIDTH_8,
  858. .partitions = partition_info,
  859. .nr_partitions = ARRAY_SIZE(partition_info),
  860. .rd_dly = 3,
  861. .wr_dly = 3,
  862. };
  863. static struct resource bf5xx_nand_resources[] = {
  864. {
  865. .start = 0xFFC03B00,
  866. .end = 0xFFC03B4F,
  867. .flags = IORESOURCE_MEM,
  868. },
  869. {
  870. .start = CH_NFC,
  871. .end = CH_NFC,
  872. .flags = IORESOURCE_IRQ,
  873. },
  874. };
  875. static struct platform_device bf5xx_nand_device = {
  876. .name = "bf5xx-nand",
  877. .id = 0,
  878. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  879. .resource = bf5xx_nand_resources,
  880. .dev = {
  881. .platform_data = &bf5xx_nand_platform,
  882. },
  883. };
  884. #endif
  885. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  886. static struct bfin_sd_host bfin_sdh_data = {
  887. .dma_chan = CH_SDH,
  888. .irq_int0 = IRQ_SDH_MASK0,
  889. .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
  890. };
  891. static struct platform_device bf54x_sdh_device = {
  892. .name = "bfin-sdh",
  893. .id = 0,
  894. .dev = {
  895. .platform_data = &bfin_sdh_data,
  896. },
  897. };
  898. #endif
  899. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  900. static struct mtd_partition ezkit_partitions[] = {
  901. {
  902. .name = "bootloader(nor)",
  903. .size = 0x80000,
  904. .offset = 0,
  905. }, {
  906. .name = "linux kernel(nor)",
  907. .size = 0x400000,
  908. .offset = MTDPART_OFS_APPEND,
  909. }, {
  910. .name = "file system(nor)",
  911. .size = 0x1000000 - 0x80000 - 0x400000 - 0x8000 * 4,
  912. .offset = MTDPART_OFS_APPEND,
  913. }, {
  914. .name = "config(nor)",
  915. .size = 0x8000 * 3,
  916. .offset = MTDPART_OFS_APPEND,
  917. }, {
  918. .name = "u-boot env(nor)",
  919. .size = 0x8000,
  920. .offset = MTDPART_OFS_APPEND,
  921. }
  922. };
  923. static struct physmap_flash_data ezkit_flash_data = {
  924. .width = 2,
  925. .parts = ezkit_partitions,
  926. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  927. };
  928. static struct resource ezkit_flash_resource = {
  929. .start = 0x20000000,
  930. .end = 0x21ffffff,
  931. .flags = IORESOURCE_MEM,
  932. };
  933. static struct platform_device ezkit_flash_device = {
  934. .name = "physmap-flash",
  935. .id = 0,
  936. .dev = {
  937. .platform_data = &ezkit_flash_data,
  938. },
  939. .num_resources = 1,
  940. .resource = &ezkit_flash_resource,
  941. };
  942. #endif
  943. #if defined(CONFIG_MTD_M25P80) \
  944. || defined(CONFIG_MTD_M25P80_MODULE)
  945. /* SPI flash chip (m25p16) */
  946. static struct mtd_partition bfin_spi_flash_partitions[] = {
  947. {
  948. .name = "bootloader(spi)",
  949. .size = 0x00080000,
  950. .offset = 0,
  951. .mask_flags = MTD_CAP_ROM
  952. }, {
  953. .name = "linux kernel(spi)",
  954. .size = MTDPART_SIZ_FULL,
  955. .offset = MTDPART_OFS_APPEND,
  956. }
  957. };
  958. static struct flash_platform_data bfin_spi_flash_data = {
  959. .name = "m25p80",
  960. .parts = bfin_spi_flash_partitions,
  961. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  962. .type = "m25p16",
  963. };
  964. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  965. .enable_dma = 0, /* use dma transfer with this chip*/
  966. };
  967. #endif
  968. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  969. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  970. .model = 7877,
  971. .vref_delay_usecs = 50, /* internal, no capacitor */
  972. .x_plate_ohms = 419,
  973. .y_plate_ohms = 486,
  974. .pressure_max = 1000,
  975. .pressure_min = 0,
  976. .stopacq_polarity = 1,
  977. .first_conversion_delay = 3,
  978. .acquisition_time = 1,
  979. .averaging = 1,
  980. .pen_down_acc_interval = 1,
  981. };
  982. #endif
  983. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  984. #if defined(CONFIG_MTD_M25P80) \
  985. || defined(CONFIG_MTD_M25P80_MODULE)
  986. {
  987. /* the modalias must be the same as spi device driver name */
  988. .modalias = "m25p80", /* Name of spi_driver for this device */
  989. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  990. .bus_num = 0, /* Framework bus number */
  991. .chip_select = 1, /* SPI_SSEL1*/
  992. .platform_data = &bfin_spi_flash_data,
  993. .controller_data = &spi_flash_chip_info,
  994. .mode = SPI_MODE_3,
  995. },
  996. #endif
  997. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  998. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  999. {
  1000. .modalias = "ad183x",
  1001. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  1002. .bus_num = 1,
  1003. .chip_select = 4,
  1004. },
  1005. #endif
  1006. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  1007. {
  1008. .modalias = "ad7877",
  1009. .platform_data = &bfin_ad7877_ts_info,
  1010. .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */
  1011. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  1012. .bus_num = 0,
  1013. .chip_select = 2,
  1014. },
  1015. #endif
  1016. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  1017. {
  1018. .modalias = "spidev",
  1019. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  1020. .bus_num = 0,
  1021. .chip_select = 1,
  1022. },
  1023. #endif
  1024. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  1025. {
  1026. .modalias = "adxl34x",
  1027. .platform_data = &adxl34x_info,
  1028. .irq = IRQ_PC5,
  1029. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1030. .bus_num = 1,
  1031. .chip_select = 2,
  1032. .mode = SPI_MODE_3,
  1033. },
  1034. #endif
  1035. };
  1036. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  1037. /* SPI (0) */
  1038. static struct resource bfin_spi0_resource[] = {
  1039. [0] = {
  1040. .start = SPI0_REGBASE,
  1041. .end = SPI0_REGBASE + 0xFF,
  1042. .flags = IORESOURCE_MEM,
  1043. },
  1044. [1] = {
  1045. .start = CH_SPI0,
  1046. .end = CH_SPI0,
  1047. .flags = IORESOURCE_DMA,
  1048. },
  1049. [2] = {
  1050. .start = IRQ_SPI0,
  1051. .end = IRQ_SPI0,
  1052. .flags = IORESOURCE_IRQ,
  1053. }
  1054. };
  1055. /* SPI (1) */
  1056. static struct resource bfin_spi1_resource[] = {
  1057. [0] = {
  1058. .start = SPI1_REGBASE,
  1059. .end = SPI1_REGBASE + 0xFF,
  1060. .flags = IORESOURCE_MEM,
  1061. },
  1062. [1] = {
  1063. .start = CH_SPI1,
  1064. .end = CH_SPI1,
  1065. .flags = IORESOURCE_DMA,
  1066. },
  1067. [2] = {
  1068. .start = IRQ_SPI1,
  1069. .end = IRQ_SPI1,
  1070. .flags = IORESOURCE_IRQ,
  1071. }
  1072. };
  1073. /* SPI controller data */
  1074. static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
  1075. .num_chipselect = 4,
  1076. .enable_dma = 1, /* master has the ability to do dma transfer */
  1077. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  1078. };
  1079. static struct platform_device bf54x_spi_master0 = {
  1080. .name = "bfin-spi",
  1081. .id = 0, /* Bus number */
  1082. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  1083. .resource = bfin_spi0_resource,
  1084. .dev = {
  1085. .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
  1086. },
  1087. };
  1088. static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
  1089. .num_chipselect = 4,
  1090. .enable_dma = 1, /* master has the ability to do dma transfer */
  1091. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  1092. };
  1093. static struct platform_device bf54x_spi_master1 = {
  1094. .name = "bfin-spi",
  1095. .id = 1, /* Bus number */
  1096. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  1097. .resource = bfin_spi1_resource,
  1098. .dev = {
  1099. .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
  1100. },
  1101. };
  1102. #endif /* spi master and devices */
  1103. #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
  1104. || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
  1105. #include <linux/videodev2.h>
  1106. #include <media/blackfin/bfin_capture.h>
  1107. #include <media/blackfin/ppi.h>
  1108. static const unsigned short ppi_req[] = {
  1109. P_PPI1_D0, P_PPI1_D1, P_PPI1_D2, P_PPI1_D3,
  1110. P_PPI1_D4, P_PPI1_D5, P_PPI1_D6, P_PPI1_D7,
  1111. P_PPI1_CLK, P_PPI1_FS1, P_PPI1_FS2,
  1112. 0,
  1113. };
  1114. static const struct ppi_info ppi_info = {
  1115. .type = PPI_TYPE_EPPI,
  1116. .dma_ch = CH_EPPI1,
  1117. .irq_err = IRQ_EPPI1_ERROR,
  1118. .base = (void __iomem *)EPPI1_STATUS,
  1119. .pin_req = ppi_req,
  1120. };
  1121. #if defined(CONFIG_VIDEO_VS6624) \
  1122. || defined(CONFIG_VIDEO_VS6624_MODULE)
  1123. static struct v4l2_input vs6624_inputs[] = {
  1124. {
  1125. .index = 0,
  1126. .name = "Camera",
  1127. .type = V4L2_INPUT_TYPE_CAMERA,
  1128. .std = V4L2_STD_UNKNOWN,
  1129. },
  1130. };
  1131. static struct bcap_route vs6624_routes[] = {
  1132. {
  1133. .input = 0,
  1134. .output = 0,
  1135. },
  1136. };
  1137. static const unsigned vs6624_ce_pin = GPIO_PG6;
  1138. static struct bfin_capture_config bfin_capture_data = {
  1139. .card_name = "BF548",
  1140. .inputs = vs6624_inputs,
  1141. .num_inputs = ARRAY_SIZE(vs6624_inputs),
  1142. .routes = vs6624_routes,
  1143. .i2c_adapter_id = 0,
  1144. .board_info = {
  1145. .type = "vs6624",
  1146. .addr = 0x10,
  1147. .platform_data = (void *)&vs6624_ce_pin,
  1148. },
  1149. .ppi_info = &ppi_info,
  1150. .ppi_control = (POLC | PACKEN | DLEN_8 | XFR_TYPE | 0x20),
  1151. .int_mask = 0xFFFFFFFF, /* disable error interrupt on eppi */
  1152. .blank_clocks = 8, /* 8 clocks as SAV and EAV */
  1153. };
  1154. #endif
  1155. static struct platform_device bfin_capture_device = {
  1156. .name = "bfin_capture",
  1157. .dev = {
  1158. .platform_data = &bfin_capture_data,
  1159. },
  1160. };
  1161. #endif
  1162. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1163. static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
  1164. static struct resource bfin_twi0_resource[] = {
  1165. [0] = {
  1166. .start = TWI0_REGBASE,
  1167. .end = TWI0_REGBASE + 0xFF,
  1168. .flags = IORESOURCE_MEM,
  1169. },
  1170. [1] = {
  1171. .start = IRQ_TWI0,
  1172. .end = IRQ_TWI0,
  1173. .flags = IORESOURCE_IRQ,
  1174. },
  1175. };
  1176. static struct platform_device i2c_bfin_twi0_device = {
  1177. .name = "i2c-bfin-twi",
  1178. .id = 0,
  1179. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  1180. .resource = bfin_twi0_resource,
  1181. .dev = {
  1182. .platform_data = &bfin_twi0_pins,
  1183. },
  1184. };
  1185. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1186. static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};
  1187. static struct resource bfin_twi1_resource[] = {
  1188. [0] = {
  1189. .start = TWI1_REGBASE,
  1190. .end = TWI1_REGBASE + 0xFF,
  1191. .flags = IORESOURCE_MEM,
  1192. },
  1193. [1] = {
  1194. .start = IRQ_TWI1,
  1195. .end = IRQ_TWI1,
  1196. .flags = IORESOURCE_IRQ,
  1197. },
  1198. };
  1199. static struct platform_device i2c_bfin_twi1_device = {
  1200. .name = "i2c-bfin-twi",
  1201. .id = 1,
  1202. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  1203. .resource = bfin_twi1_resource,
  1204. .dev = {
  1205. .platform_data = &bfin_twi1_pins,
  1206. },
  1207. };
  1208. #endif
  1209. #endif
  1210. static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
  1211. #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
  1212. {
  1213. I2C_BOARD_INFO("ssm2602", 0x1b),
  1214. },
  1215. #endif
  1216. };
  1217. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1218. static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
  1219. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  1220. {
  1221. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  1222. },
  1223. #endif
  1224. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  1225. {
  1226. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  1227. .irq = 212,
  1228. },
  1229. #endif
  1230. #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  1231. {
  1232. I2C_BOARD_INFO("adxl34x", 0x53),
  1233. .irq = IRQ_PC5,
  1234. .platform_data = (void *)&adxl34x_info,
  1235. },
  1236. #endif
  1237. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  1238. {
  1239. I2C_BOARD_INFO("ad5252", 0x2f),
  1240. },
  1241. #endif
  1242. };
  1243. #endif
  1244. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1245. #include <linux/gpio_keys.h>
  1246. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  1247. {BTN_0, GPIO_PB8, 1, "gpio-keys: BTN0"},
  1248. {BTN_1, GPIO_PB9, 1, "gpio-keys: BTN1"},
  1249. {BTN_2, GPIO_PB10, 1, "gpio-keys: BTN2"},
  1250. {BTN_3, GPIO_PB11, 1, "gpio-keys: BTN3"},
  1251. };
  1252. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  1253. .buttons = bfin_gpio_keys_table,
  1254. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  1255. };
  1256. static struct platform_device bfin_device_gpiokeys = {
  1257. .name = "gpio-keys",
  1258. .dev = {
  1259. .platform_data = &bfin_gpio_keys_data,
  1260. },
  1261. };
  1262. #endif
  1263. static const unsigned int cclk_vlev_datasheet[] =
  1264. {
  1265. /*
  1266. * Internal VLEV BF54XSBBC1533
  1267. ****temporarily using these values until data sheet is updated
  1268. */
  1269. VRPAIR(VLEV_085, 150000000),
  1270. VRPAIR(VLEV_090, 250000000),
  1271. VRPAIR(VLEV_110, 276000000),
  1272. VRPAIR(VLEV_115, 301000000),
  1273. VRPAIR(VLEV_120, 525000000),
  1274. VRPAIR(VLEV_125, 550000000),
  1275. VRPAIR(VLEV_130, 600000000),
  1276. };
  1277. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  1278. .tuple_tab = cclk_vlev_datasheet,
  1279. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  1280. .vr_settling_time = 25 /* us */,
  1281. };
  1282. static struct platform_device bfin_dpmc = {
  1283. .name = "bfin dpmc",
  1284. .dev = {
  1285. .platform_data = &bfin_dmpc_vreg_data,
  1286. },
  1287. };
  1288. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
  1289. defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  1290. #define SPORT_REQ(x) \
  1291. [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
  1292. P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
  1293. static const u16 bfin_snd_pin[][7] = {
  1294. SPORT_REQ(0),
  1295. SPORT_REQ(1),
  1296. SPORT_REQ(2),
  1297. SPORT_REQ(3),
  1298. };
  1299. static struct bfin_snd_platform_data bfin_snd_data[] = {
  1300. {
  1301. .pin_req = &bfin_snd_pin[0][0],
  1302. },
  1303. {
  1304. .pin_req = &bfin_snd_pin[1][0],
  1305. },
  1306. {
  1307. .pin_req = &bfin_snd_pin[2][0],
  1308. },
  1309. {
  1310. .pin_req = &bfin_snd_pin[3][0],
  1311. },
  1312. };
  1313. #define BFIN_SND_RES(x) \
  1314. [x] = { \
  1315. { \
  1316. .start = SPORT##x##_TCR1, \
  1317. .end = SPORT##x##_TCR1, \
  1318. .flags = IORESOURCE_MEM \
  1319. }, \
  1320. { \
  1321. .start = CH_SPORT##x##_RX, \
  1322. .end = CH_SPORT##x##_RX, \
  1323. .flags = IORESOURCE_DMA, \
  1324. }, \
  1325. { \
  1326. .start = CH_SPORT##x##_TX, \
  1327. .end = CH_SPORT##x##_TX, \
  1328. .flags = IORESOURCE_DMA, \
  1329. }, \
  1330. { \
  1331. .start = IRQ_SPORT##x##_ERROR, \
  1332. .end = IRQ_SPORT##x##_ERROR, \
  1333. .flags = IORESOURCE_IRQ, \
  1334. } \
  1335. }
  1336. static struct resource bfin_snd_resources[][4] = {
  1337. BFIN_SND_RES(0),
  1338. BFIN_SND_RES(1),
  1339. BFIN_SND_RES(2),
  1340. BFIN_SND_RES(3),
  1341. };
  1342. #endif
  1343. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  1344. static struct platform_device bfin_i2s_pcm = {
  1345. .name = "bfin-i2s-pcm-audio",
  1346. .id = -1,
  1347. };
  1348. #endif
  1349. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  1350. static struct platform_device bfin_ac97_pcm = {
  1351. .name = "bfin-ac97-pcm-audio",
  1352. .id = -1,
  1353. };
  1354. #endif
  1355. #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
  1356. static struct platform_device bfin_ad73311_codec_device = {
  1357. .name = "ad73311",
  1358. .id = -1,
  1359. };
  1360. #endif
  1361. #if defined(CONFIG_SND_BF5XX_SOC_AD1980) || defined(CONFIG_SND_BF5XX_SOC_AD1980_MODULE)
  1362. static struct platform_device bfin_ad1980_codec_device = {
  1363. .name = "ad1980",
  1364. .id = -1,
  1365. };
  1366. #endif
  1367. #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
  1368. static struct platform_device bfin_i2s = {
  1369. .name = "bfin-i2s",
  1370. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  1371. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  1372. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  1373. .dev = {
  1374. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  1375. },
  1376. };
  1377. #endif
  1378. #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
  1379. static struct platform_device bfin_ac97 = {
  1380. .name = "bfin-ac97",
  1381. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  1382. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  1383. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  1384. .dev = {
  1385. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  1386. },
  1387. };
  1388. #endif
  1389. static struct platform_device *ezkit_devices[] __initdata = {
  1390. &bfin_dpmc,
  1391. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  1392. &rtc_device,
  1393. #endif
  1394. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1395. #ifdef CONFIG_SERIAL_BFIN_UART0
  1396. &bfin_uart0_device,
  1397. #endif
  1398. #ifdef CONFIG_SERIAL_BFIN_UART1
  1399. &bfin_uart1_device,
  1400. #endif
  1401. #ifdef CONFIG_SERIAL_BFIN_UART2
  1402. &bfin_uart2_device,
  1403. #endif
  1404. #ifdef CONFIG_SERIAL_BFIN_UART3
  1405. &bfin_uart3_device,
  1406. #endif
  1407. #endif
  1408. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1409. #ifdef CONFIG_BFIN_SIR0
  1410. &bfin_sir0_device,
  1411. #endif
  1412. #ifdef CONFIG_BFIN_SIR1
  1413. &bfin_sir1_device,
  1414. #endif
  1415. #ifdef CONFIG_BFIN_SIR2
  1416. &bfin_sir2_device,
  1417. #endif
  1418. #ifdef CONFIG_BFIN_SIR3
  1419. &bfin_sir3_device,
  1420. #endif
  1421. #endif
  1422. #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  1423. &bf54x_lq043_device,
  1424. #endif
  1425. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  1426. &smsc911x_device,
  1427. #endif
  1428. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  1429. &musb_device,
  1430. #endif
  1431. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  1432. &bfin_isp1760_device,
  1433. #endif
  1434. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1435. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1436. &bfin_sport0_uart_device,
  1437. #endif
  1438. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1439. &bfin_sport1_uart_device,
  1440. #endif
  1441. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1442. &bfin_sport2_uart_device,
  1443. #endif
  1444. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  1445. &bfin_sport3_uart_device,
  1446. #endif
  1447. #endif
  1448. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  1449. &bfin_can0_device,
  1450. &bfin_can1_device,
  1451. #endif
  1452. #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
  1453. &bfin_atapi_device,
  1454. #endif
  1455. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  1456. &bf5xx_nand_device,
  1457. #endif
  1458. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  1459. &bf54x_sdh_device,
  1460. #endif
  1461. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  1462. &bf54x_spi_master0,
  1463. &bf54x_spi_master1,
  1464. #endif
  1465. #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
  1466. || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
  1467. &bfin_capture_device,
  1468. #endif
  1469. #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  1470. &bf54x_kpad_device,
  1471. #endif
  1472. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  1473. &bfin_rotary_device,
  1474. #endif
  1475. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1476. &i2c_bfin_twi0_device,
  1477. #if !defined(CONFIG_BF542)
  1478. &i2c_bfin_twi1_device,
  1479. #endif
  1480. #endif
  1481. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1482. &bfin_device_gpiokeys,
  1483. #endif
  1484. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  1485. &ezkit_flash_device,
  1486. #endif
  1487. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  1488. &bfin_i2s_pcm,
  1489. #endif
  1490. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  1491. &bfin_ac97_pcm,
  1492. #endif
  1493. #if defined(CONFIG_SND_BF5XX_SOC_AD1980) || defined(CONFIG_SND_BF5XX_SOC_AD1980_MODULE)
  1494. &bfin_ad1980_codec_device,
  1495. #endif
  1496. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  1497. &bfin_i2s,
  1498. #endif
  1499. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  1500. &bfin_ac97,
  1501. #endif
  1502. };
  1503. static int __init ezkit_init(void)
  1504. {
  1505. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1506. i2c_register_board_info(0, bfin_i2c_board_info0,
  1507. ARRAY_SIZE(bfin_i2c_board_info0));
  1508. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1509. i2c_register_board_info(1, bfin_i2c_board_info1,
  1510. ARRAY_SIZE(bfin_i2c_board_info1));
  1511. #endif
  1512. platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
  1513. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1514. return 0;
  1515. }
  1516. arch_initcall(ezkit_init);
  1517. static struct platform_device *ezkit_early_devices[] __initdata = {
  1518. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  1519. #ifdef CONFIG_SERIAL_BFIN_UART0
  1520. &bfin_uart0_device,
  1521. #endif
  1522. #ifdef CONFIG_SERIAL_BFIN_UART1
  1523. &bfin_uart1_device,
  1524. #endif
  1525. #ifdef CONFIG_SERIAL_BFIN_UART2
  1526. &bfin_uart2_device,
  1527. #endif
  1528. #ifdef CONFIG_SERIAL_BFIN_UART3
  1529. &bfin_uart3_device,
  1530. #endif
  1531. #endif
  1532. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  1533. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1534. &bfin_sport0_uart_device,
  1535. #endif
  1536. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1537. &bfin_sport1_uart_device,
  1538. #endif
  1539. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1540. &bfin_sport2_uart_device,
  1541. #endif
  1542. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  1543. &bfin_sport3_uart_device,
  1544. #endif
  1545. #endif
  1546. };
  1547. void __init native_machine_early_platform_add_devices(void)
  1548. {
  1549. printk(KERN_INFO "register early platform devices\n");
  1550. early_platform_add_devices(ezkit_early_devices,
  1551. ARRAY_SIZE(ezkit_early_devices));
  1552. }