stamp.c 78 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/export.h>
  10. #include <linux/kernel.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/io.h>
  13. #include <linux/mtd/mtd.h>
  14. #include <linux/mtd/nand.h>
  15. #include <linux/mtd/partitions.h>
  16. #include <linux/mtd/plat-ram.h>
  17. #include <linux/mtd/physmap.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/spi/flash.h>
  20. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  21. #include <linux/usb/isp1362.h>
  22. #endif
  23. #include <linux/i2c.h>
  24. #include <linux/i2c/adp5588.h>
  25. #include <linux/etherdevice.h>
  26. #include <linux/ata_platform.h>
  27. #include <linux/irq.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/usb/sl811.h>
  30. #include <linux/spi/mmc_spi.h>
  31. #include <linux/leds.h>
  32. #include <linux/input.h>
  33. #include <asm/dma.h>
  34. #include <asm/bfin5xx_spi.h>
  35. #include <asm/reboot.h>
  36. #include <asm/portmux.h>
  37. #include <asm/dpmc.h>
  38. #include <asm/bfin_sport.h>
  39. #ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
  40. #include <linux/regulator/fixed.h>
  41. #endif
  42. #include <linux/regulator/machine.h>
  43. #include <linux/regulator/consumer.h>
  44. #include <linux/regulator/userspace-consumer.h>
  45. /*
  46. * Name the Board for the /proc/cpuinfo
  47. */
  48. const char bfin_board_name[] = "ADI BF537-STAMP";
  49. /*
  50. * Driver needs to know address, irq and flag pin.
  51. */
  52. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  53. #include <linux/usb/isp1760.h>
  54. static struct resource bfin_isp1760_resources[] = {
  55. [0] = {
  56. .start = 0x203C0000,
  57. .end = 0x203C0000 + 0x000fffff,
  58. .flags = IORESOURCE_MEM,
  59. },
  60. [1] = {
  61. .start = IRQ_PF7,
  62. .end = IRQ_PF7,
  63. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  64. },
  65. };
  66. static struct isp1760_platform_data isp1760_priv = {
  67. .is_isp1761 = 0,
  68. .bus_width_16 = 1,
  69. .port1_otg = 0,
  70. .analog_oc = 0,
  71. .dack_polarity_high = 0,
  72. .dreq_polarity_high = 0,
  73. };
  74. static struct platform_device bfin_isp1760_device = {
  75. .name = "isp1760",
  76. .id = 0,
  77. .dev = {
  78. .platform_data = &isp1760_priv,
  79. },
  80. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  81. .resource = bfin_isp1760_resources,
  82. };
  83. #endif
  84. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  85. #include <linux/gpio_keys.h>
  86. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  87. {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
  88. {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
  89. {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
  90. {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
  91. };
  92. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  93. .buttons = bfin_gpio_keys_table,
  94. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  95. };
  96. static struct platform_device bfin_device_gpiokeys = {
  97. .name = "gpio-keys",
  98. .dev = {
  99. .platform_data = &bfin_gpio_keys_data,
  100. },
  101. };
  102. #endif
  103. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  104. static struct resource bfin_pcmcia_cf_resources[] = {
  105. {
  106. .start = 0x20310000, /* IO PORT */
  107. .end = 0x20312000,
  108. .flags = IORESOURCE_MEM,
  109. }, {
  110. .start = 0x20311000, /* Attribute Memory */
  111. .end = 0x20311FFF,
  112. .flags = IORESOURCE_MEM,
  113. }, {
  114. .start = IRQ_PF4,
  115. .end = IRQ_PF4,
  116. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  117. }, {
  118. .start = 6, /* Card Detect PF6 */
  119. .end = 6,
  120. .flags = IORESOURCE_IRQ,
  121. },
  122. };
  123. static struct platform_device bfin_pcmcia_cf_device = {
  124. .name = "bfin_cf_pcmcia",
  125. .id = -1,
  126. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  127. .resource = bfin_pcmcia_cf_resources,
  128. };
  129. #endif
  130. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  131. static struct platform_device rtc_device = {
  132. .name = "rtc-bfin",
  133. .id = -1,
  134. };
  135. #endif
  136. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  137. #include <linux/smc91x.h>
  138. static struct smc91x_platdata smc91x_info = {
  139. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  140. .leda = RPC_LED_100_10,
  141. .ledb = RPC_LED_TX_RX,
  142. };
  143. static struct resource smc91x_resources[] = {
  144. {
  145. .name = "smc91x-regs",
  146. .start = 0x20300300,
  147. .end = 0x20300300 + 16,
  148. .flags = IORESOURCE_MEM,
  149. }, {
  150. .start = IRQ_PF7,
  151. .end = IRQ_PF7,
  152. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  153. },
  154. };
  155. static struct platform_device smc91x_device = {
  156. .name = "smc91x",
  157. .id = 0,
  158. .num_resources = ARRAY_SIZE(smc91x_resources),
  159. .resource = smc91x_resources,
  160. .dev = {
  161. .platform_data = &smc91x_info,
  162. },
  163. };
  164. #endif
  165. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  166. static struct resource dm9000_resources[] = {
  167. [0] = {
  168. .start = 0x203FB800,
  169. .end = 0x203FB800 + 1,
  170. .flags = IORESOURCE_MEM,
  171. },
  172. [1] = {
  173. .start = 0x203FB804,
  174. .end = 0x203FB804 + 1,
  175. .flags = IORESOURCE_MEM,
  176. },
  177. [2] = {
  178. .start = IRQ_PF9,
  179. .end = IRQ_PF9,
  180. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  181. },
  182. };
  183. static struct platform_device dm9000_device = {
  184. .name = "dm9000",
  185. .id = -1,
  186. .num_resources = ARRAY_SIZE(dm9000_resources),
  187. .resource = dm9000_resources,
  188. };
  189. #endif
  190. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  191. static struct resource sl811_hcd_resources[] = {
  192. {
  193. .start = 0x20340000,
  194. .end = 0x20340000,
  195. .flags = IORESOURCE_MEM,
  196. }, {
  197. .start = 0x20340004,
  198. .end = 0x20340004,
  199. .flags = IORESOURCE_MEM,
  200. }, {
  201. .start = IRQ_PF4,
  202. .end = IRQ_PF4,
  203. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  204. },
  205. };
  206. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  207. void sl811_port_power(struct device *dev, int is_on)
  208. {
  209. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  210. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  211. }
  212. #endif
  213. static struct sl811_platform_data sl811_priv = {
  214. .potpg = 10,
  215. .power = 250, /* == 500mA */
  216. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  217. .port_power = &sl811_port_power,
  218. #endif
  219. };
  220. static struct platform_device sl811_hcd_device = {
  221. .name = "sl811-hcd",
  222. .id = 0,
  223. .dev = {
  224. .platform_data = &sl811_priv,
  225. },
  226. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  227. .resource = sl811_hcd_resources,
  228. };
  229. #endif
  230. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  231. static struct resource isp1362_hcd_resources[] = {
  232. {
  233. .start = 0x20360000,
  234. .end = 0x20360000,
  235. .flags = IORESOURCE_MEM,
  236. }, {
  237. .start = 0x20360004,
  238. .end = 0x20360004,
  239. .flags = IORESOURCE_MEM,
  240. }, {
  241. .start = IRQ_PF3,
  242. .end = IRQ_PF3,
  243. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  244. },
  245. };
  246. static struct isp1362_platform_data isp1362_priv = {
  247. .sel15Kres = 1,
  248. .clknotstop = 0,
  249. .oc_enable = 0,
  250. .int_act_high = 0,
  251. .int_edge_triggered = 0,
  252. .remote_wakeup_connected = 0,
  253. .no_power_switching = 1,
  254. .power_switching_mode = 0,
  255. };
  256. static struct platform_device isp1362_hcd_device = {
  257. .name = "isp1362-hcd",
  258. .id = 0,
  259. .dev = {
  260. .platform_data = &isp1362_priv,
  261. },
  262. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  263. .resource = isp1362_hcd_resources,
  264. };
  265. #endif
  266. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  267. static unsigned short bfin_can_peripherals[] = {
  268. P_CAN0_RX, P_CAN0_TX, 0
  269. };
  270. static struct resource bfin_can_resources[] = {
  271. {
  272. .start = 0xFFC02A00,
  273. .end = 0xFFC02FFF,
  274. .flags = IORESOURCE_MEM,
  275. },
  276. {
  277. .start = IRQ_CAN_RX,
  278. .end = IRQ_CAN_RX,
  279. .flags = IORESOURCE_IRQ,
  280. },
  281. {
  282. .start = IRQ_CAN_TX,
  283. .end = IRQ_CAN_TX,
  284. .flags = IORESOURCE_IRQ,
  285. },
  286. {
  287. .start = IRQ_CAN_ERROR,
  288. .end = IRQ_CAN_ERROR,
  289. .flags = IORESOURCE_IRQ,
  290. },
  291. };
  292. static struct platform_device bfin_can_device = {
  293. .name = "bfin_can",
  294. .num_resources = ARRAY_SIZE(bfin_can_resources),
  295. .resource = bfin_can_resources,
  296. .dev = {
  297. .platform_data = &bfin_can_peripherals, /* Passed to driver */
  298. },
  299. };
  300. #endif
  301. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  302. #include <linux/bfin_mac.h>
  303. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  304. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  305. {
  306. .addr = 1,
  307. .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
  308. },
  309. };
  310. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  311. .phydev_number = 1,
  312. .phydev_data = bfin_phydev_data,
  313. .phy_mode = PHY_INTERFACE_MODE_MII,
  314. .mac_peripherals = bfin_mac_peripherals,
  315. };
  316. static struct platform_device bfin_mii_bus = {
  317. .name = "bfin_mii_bus",
  318. .dev = {
  319. .platform_data = &bfin_mii_bus_data,
  320. }
  321. };
  322. static struct platform_device bfin_mac_device = {
  323. .name = "bfin_mac",
  324. .dev = {
  325. .platform_data = &bfin_mii_bus,
  326. }
  327. };
  328. #endif
  329. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  330. static struct resource net2272_bfin_resources[] = {
  331. {
  332. .start = 0x20300000,
  333. .end = 0x20300000 + 0x100,
  334. .flags = IORESOURCE_MEM,
  335. }, {
  336. .start = 1,
  337. .flags = IORESOURCE_BUS,
  338. }, {
  339. .start = IRQ_PF7,
  340. .end = IRQ_PF7,
  341. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  342. },
  343. };
  344. static struct platform_device net2272_bfin_device = {
  345. .name = "net2272",
  346. .id = -1,
  347. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  348. .resource = net2272_bfin_resources,
  349. };
  350. #endif
  351. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  352. const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
  353. static struct mtd_partition bfin_plat_nand_partitions[] = {
  354. {
  355. .name = "linux kernel(nand)",
  356. .size = 0x400000,
  357. .offset = 0,
  358. }, {
  359. .name = "file system(nand)",
  360. .size = MTDPART_SIZ_FULL,
  361. .offset = MTDPART_OFS_APPEND,
  362. },
  363. };
  364. #define BFIN_NAND_PLAT_CLE 2
  365. #define BFIN_NAND_PLAT_ALE 1
  366. static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  367. {
  368. struct nand_chip *this = mtd->priv;
  369. if (cmd == NAND_CMD_NONE)
  370. return;
  371. if (ctrl & NAND_CLE)
  372. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
  373. else
  374. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
  375. }
  376. #define BFIN_NAND_PLAT_READY GPIO_PF3
  377. static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
  378. {
  379. return gpio_get_value(BFIN_NAND_PLAT_READY);
  380. }
  381. static struct platform_nand_data bfin_plat_nand_data = {
  382. .chip = {
  383. .nr_chips = 1,
  384. .chip_delay = 30,
  385. .part_probe_types = part_probes,
  386. .partitions = bfin_plat_nand_partitions,
  387. .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
  388. },
  389. .ctrl = {
  390. .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
  391. .dev_ready = bfin_plat_nand_dev_ready,
  392. },
  393. };
  394. #define MAX(x, y) (x > y ? x : y)
  395. static struct resource bfin_plat_nand_resources = {
  396. .start = 0x20212000,
  397. .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
  398. .flags = IORESOURCE_MEM,
  399. };
  400. static struct platform_device bfin_async_nand_device = {
  401. .name = "gen_nand",
  402. .id = -1,
  403. .num_resources = 1,
  404. .resource = &bfin_plat_nand_resources,
  405. .dev = {
  406. .platform_data = &bfin_plat_nand_data,
  407. },
  408. };
  409. static void bfin_plat_nand_init(void)
  410. {
  411. gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
  412. gpio_direction_input(BFIN_NAND_PLAT_READY);
  413. }
  414. #else
  415. static void bfin_plat_nand_init(void) {}
  416. #endif
  417. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  418. static struct mtd_partition stamp_partitions[] = {
  419. {
  420. .name = "bootloader(nor)",
  421. .size = 0x40000,
  422. .offset = 0,
  423. }, {
  424. .name = "linux kernel(nor)",
  425. .size = 0x180000,
  426. .offset = MTDPART_OFS_APPEND,
  427. }, {
  428. .name = "file system(nor)",
  429. .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
  430. .offset = MTDPART_OFS_APPEND,
  431. }, {
  432. .name = "MAC Address(nor)",
  433. .size = MTDPART_SIZ_FULL,
  434. .offset = 0x3F0000,
  435. .mask_flags = MTD_WRITEABLE,
  436. }
  437. };
  438. static struct physmap_flash_data stamp_flash_data = {
  439. .width = 2,
  440. .parts = stamp_partitions,
  441. .nr_parts = ARRAY_SIZE(stamp_partitions),
  442. #ifdef CONFIG_ROMKERNEL
  443. .probe_type = "map_rom",
  444. #endif
  445. };
  446. static struct resource stamp_flash_resource = {
  447. .start = 0x20000000,
  448. .end = 0x203fffff,
  449. .flags = IORESOURCE_MEM,
  450. };
  451. static struct platform_device stamp_flash_device = {
  452. .name = "physmap-flash",
  453. .id = 0,
  454. .dev = {
  455. .platform_data = &stamp_flash_data,
  456. },
  457. .num_resources = 1,
  458. .resource = &stamp_flash_resource,
  459. };
  460. #endif
  461. #if defined(CONFIG_MTD_M25P80) \
  462. || defined(CONFIG_MTD_M25P80_MODULE)
  463. static struct mtd_partition bfin_spi_flash_partitions[] = {
  464. {
  465. .name = "bootloader(spi)",
  466. .size = 0x00040000,
  467. .offset = 0,
  468. .mask_flags = MTD_CAP_ROM
  469. }, {
  470. .name = "linux kernel(spi)",
  471. .size = 0x180000,
  472. .offset = MTDPART_OFS_APPEND,
  473. }, {
  474. .name = "file system(spi)",
  475. .size = MTDPART_SIZ_FULL,
  476. .offset = MTDPART_OFS_APPEND,
  477. }
  478. };
  479. static struct flash_platform_data bfin_spi_flash_data = {
  480. .name = "m25p80",
  481. .parts = bfin_spi_flash_partitions,
  482. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  483. /* .type = "m25p64", */
  484. };
  485. /* SPI flash chip (m25p64) */
  486. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  487. .enable_dma = 0, /* use dma transfer with this chip*/
  488. };
  489. #endif
  490. #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
  491. #include <linux/input/ad714x.h>
  492. static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
  493. {
  494. .start_stage = 0,
  495. .end_stage = 7,
  496. .max_coord = 128,
  497. },
  498. };
  499. static struct ad714x_button_plat ad7147_spi_button_plat[] = {
  500. {
  501. .keycode = BTN_FORWARD,
  502. .l_mask = 0,
  503. .h_mask = 0x600,
  504. },
  505. {
  506. .keycode = BTN_LEFT,
  507. .l_mask = 0,
  508. .h_mask = 0x500,
  509. },
  510. {
  511. .keycode = BTN_MIDDLE,
  512. .l_mask = 0,
  513. .h_mask = 0x800,
  514. },
  515. {
  516. .keycode = BTN_RIGHT,
  517. .l_mask = 0x100,
  518. .h_mask = 0x400,
  519. },
  520. {
  521. .keycode = BTN_BACK,
  522. .l_mask = 0x200,
  523. .h_mask = 0x400,
  524. },
  525. };
  526. static struct ad714x_platform_data ad7147_spi_platform_data = {
  527. .slider_num = 1,
  528. .button_num = 5,
  529. .slider = ad7147_spi_slider_plat,
  530. .button = ad7147_spi_button_plat,
  531. .stage_cfg_reg = {
  532. {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  533. {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  534. {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
  535. {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
  536. {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
  537. {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
  538. {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  539. {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  540. {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
  541. {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
  542. {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
  543. {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
  544. },
  545. .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
  546. };
  547. #endif
  548. #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
  549. #include <linux/input/ad714x.h>
  550. static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
  551. {
  552. .keycode = BTN_1,
  553. .l_mask = 0,
  554. .h_mask = 0x1,
  555. },
  556. {
  557. .keycode = BTN_2,
  558. .l_mask = 0,
  559. .h_mask = 0x2,
  560. },
  561. {
  562. .keycode = BTN_3,
  563. .l_mask = 0,
  564. .h_mask = 0x4,
  565. },
  566. {
  567. .keycode = BTN_4,
  568. .l_mask = 0x0,
  569. .h_mask = 0x8,
  570. },
  571. };
  572. static struct ad714x_platform_data ad7142_i2c_platform_data = {
  573. .button_num = 4,
  574. .button = ad7142_i2c_button_plat,
  575. .stage_cfg_reg = {
  576. /* fixme: figure out right setting for all comoponent according
  577. * to hardware feature of EVAL-AD7142EB board */
  578. {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  579. {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  580. {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  581. {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  582. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  583. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  584. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  585. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  586. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  587. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  588. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  589. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  590. },
  591. .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
  592. };
  593. #endif
  594. #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
  595. static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
  596. .enable_dma = 0,
  597. };
  598. #endif
  599. #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
  600. static unsigned short ad2s120x_platform_data[] = {
  601. /* used as SAMPLE and RDVEL */
  602. GPIO_PF5, GPIO_PF6, 0
  603. };
  604. static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
  605. .enable_dma = 0,
  606. };
  607. #endif
  608. #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
  609. static unsigned short ad2s1210_platform_data[] = {
  610. /* use as SAMPLE, A0, A1 */
  611. GPIO_PF7, GPIO_PF8, GPIO_PF9,
  612. # if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
  613. /* the RES0 and RES1 pins */
  614. GPIO_PF4, GPIO_PF5,
  615. # endif
  616. 0,
  617. };
  618. static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
  619. .enable_dma = 0,
  620. };
  621. #endif
  622. #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
  623. static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
  624. .enable_dma = 0,
  625. };
  626. #endif
  627. #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
  628. static unsigned short ad7816_platform_data[] = {
  629. GPIO_PF4, /* rdwr_pin */
  630. GPIO_PF5, /* convert_pin */
  631. GPIO_PF7, /* busy_pin */
  632. 0,
  633. };
  634. static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
  635. .enable_dma = 0,
  636. };
  637. #endif
  638. #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
  639. static unsigned long adt7310_platform_data[3] = {
  640. /* INT bound temperature alarm event. line 1 */
  641. IRQ_PG4, IRQF_TRIGGER_LOW,
  642. /* CT bound temperature alarm event irq_flags. line 0 */
  643. IRQF_TRIGGER_LOW,
  644. };
  645. static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
  646. .enable_dma = 0,
  647. };
  648. #endif
  649. #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
  650. static unsigned short ad7298_platform_data[] = {
  651. GPIO_PF7, /* busy_pin */
  652. 0,
  653. };
  654. #endif
  655. #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
  656. static unsigned long adt7316_spi_data[2] = {
  657. IRQF_TRIGGER_LOW, /* interrupt flags */
  658. GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
  659. };
  660. static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
  661. .enable_dma = 0,
  662. };
  663. #endif
  664. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  665. #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
  666. static int bfin_mmc_spi_init(struct device *dev,
  667. irqreturn_t (*detect_int)(int, void *), void *data)
  668. {
  669. return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
  670. IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
  671. }
  672. static void bfin_mmc_spi_exit(struct device *dev, void *data)
  673. {
  674. free_irq(MMC_SPI_CARD_DETECT_INT, data);
  675. }
  676. static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
  677. .init = bfin_mmc_spi_init,
  678. .exit = bfin_mmc_spi_exit,
  679. .detect_delay = 100, /* msecs */
  680. };
  681. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  682. .enable_dma = 0,
  683. .pio_interrupt = 0,
  684. };
  685. #endif
  686. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  687. #include <linux/spi/ad7877.h>
  688. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  689. .model = 7877,
  690. .vref_delay_usecs = 50, /* internal, no capacitor */
  691. .x_plate_ohms = 419,
  692. .y_plate_ohms = 486,
  693. .pressure_max = 1000,
  694. .pressure_min = 0,
  695. .stopacq_polarity = 1,
  696. .first_conversion_delay = 3,
  697. .acquisition_time = 1,
  698. .averaging = 1,
  699. .pen_down_acc_interval = 1,
  700. };
  701. #endif
  702. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  703. #include <linux/spi/ad7879.h>
  704. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  705. .model = 7879, /* Model = AD7879 */
  706. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  707. .pressure_max = 10000,
  708. .pressure_min = 0,
  709. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  710. .acquisition_time = 1, /* 4us acquisition time per sample */
  711. .median = 2, /* do 8 measurements */
  712. .averaging = 1, /* take the average of 4 middle samples */
  713. .pen_down_acc_interval = 255, /* 9.4 ms */
  714. .gpio_export = 1, /* Export GPIO to gpiolib */
  715. .gpio_base = -1, /* Dynamic allocation */
  716. };
  717. #endif
  718. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  719. #include <linux/input/adxl34x.h>
  720. static const struct adxl34x_platform_data adxl34x_info = {
  721. .x_axis_offset = 0,
  722. .y_axis_offset = 0,
  723. .z_axis_offset = 0,
  724. .tap_threshold = 0x31,
  725. .tap_duration = 0x10,
  726. .tap_latency = 0x60,
  727. .tap_window = 0xF0,
  728. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  729. .act_axis_control = 0xFF,
  730. .activity_threshold = 5,
  731. .inactivity_threshold = 3,
  732. .inactivity_time = 4,
  733. .free_fall_threshold = 0x7,
  734. .free_fall_time = 0x20,
  735. .data_rate = 0x8,
  736. .data_range = ADXL_FULL_RES,
  737. .ev_type = EV_ABS,
  738. .ev_code_x = ABS_X, /* EV_REL */
  739. .ev_code_y = ABS_Y, /* EV_REL */
  740. .ev_code_z = ABS_Z, /* EV_REL */
  741. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  742. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  743. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  744. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  745. .fifo_mode = ADXL_FIFO_STREAM,
  746. .orientation_enable = ADXL_EN_ORIENTATION_3D,
  747. .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
  748. .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
  749. /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
  750. .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
  751. };
  752. #endif
  753. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  754. static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
  755. .enable_dma = 1,
  756. };
  757. #endif
  758. #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
  759. #include <linux/spi/adf702x.h>
  760. #define TXREG 0x0160A470
  761. static const u32 adf7021_regs[] = {
  762. 0x09608FA0,
  763. 0x00575011,
  764. 0x00A7F092,
  765. 0x2B141563,
  766. 0x81F29E94,
  767. 0x00003155,
  768. 0x050A4F66,
  769. 0x00000007,
  770. 0x00000008,
  771. 0x000231E9,
  772. 0x3296354A,
  773. 0x891A2B3B,
  774. 0x00000D9C,
  775. 0x0000000D,
  776. 0x0000000E,
  777. 0x0000000F,
  778. };
  779. static struct adf702x_platform_data adf7021_platform_data = {
  780. .regs_base = (void *)SPORT1_TCR1,
  781. .dma_ch_rx = CH_SPORT1_RX,
  782. .dma_ch_tx = CH_SPORT1_TX,
  783. .irq_sport_err = IRQ_SPORT1_ERROR,
  784. .gpio_int_rfs = GPIO_PF8,
  785. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
  786. P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
  787. .adf702x_model = MODEL_ADF7021,
  788. .adf702x_regs = adf7021_regs,
  789. .tx_reg = TXREG,
  790. };
  791. static inline void adf702x_mac_init(void)
  792. {
  793. eth_random_addr(adf7021_platform_data.mac_addr);
  794. }
  795. #else
  796. static inline void adf702x_mac_init(void) {}
  797. #endif
  798. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  799. #include <linux/spi/ads7846.h>
  800. static int ads7873_get_pendown_state(void)
  801. {
  802. return gpio_get_value(GPIO_PF6);
  803. }
  804. static struct ads7846_platform_data __initdata ad7873_pdata = {
  805. .model = 7873, /* AD7873 */
  806. .x_max = 0xfff,
  807. .y_max = 0xfff,
  808. .x_plate_ohms = 620,
  809. .debounce_max = 1,
  810. .debounce_rep = 0,
  811. .debounce_tol = (~0),
  812. .get_pendown_state = ads7873_get_pendown_state,
  813. };
  814. #endif
  815. #if defined(CONFIG_MTD_DATAFLASH) \
  816. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  817. static struct mtd_partition bfin_spi_dataflash_partitions[] = {
  818. {
  819. .name = "bootloader(spi)",
  820. .size = 0x00040000,
  821. .offset = 0,
  822. .mask_flags = MTD_CAP_ROM
  823. }, {
  824. .name = "linux kernel(spi)",
  825. .size = 0x180000,
  826. .offset = MTDPART_OFS_APPEND,
  827. }, {
  828. .name = "file system(spi)",
  829. .size = MTDPART_SIZ_FULL,
  830. .offset = MTDPART_OFS_APPEND,
  831. }
  832. };
  833. static struct flash_platform_data bfin_spi_dataflash_data = {
  834. .name = "SPI Dataflash",
  835. .parts = bfin_spi_dataflash_partitions,
  836. .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
  837. };
  838. /* DataFlash chip */
  839. static struct bfin5xx_spi_chip data_flash_chip_info = {
  840. .enable_dma = 0, /* use dma transfer with this chip*/
  841. };
  842. #endif
  843. #if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
  844. static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
  845. .enable_dma = 0, /* use dma transfer with this chip*/
  846. };
  847. #endif
  848. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  849. #if defined(CONFIG_MTD_M25P80) \
  850. || defined(CONFIG_MTD_M25P80_MODULE)
  851. {
  852. /* the modalias must be the same as spi device driver name */
  853. .modalias = "m25p80", /* Name of spi_driver for this device */
  854. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  855. .bus_num = 0, /* Framework bus number */
  856. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  857. .platform_data = &bfin_spi_flash_data,
  858. .controller_data = &spi_flash_chip_info,
  859. .mode = SPI_MODE_3,
  860. },
  861. #endif
  862. #if defined(CONFIG_MTD_DATAFLASH) \
  863. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  864. { /* DataFlash chip */
  865. .modalias = "mtd_dataflash",
  866. .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
  867. .bus_num = 0, /* Framework bus number */
  868. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  869. .platform_data = &bfin_spi_dataflash_data,
  870. .controller_data = &data_flash_chip_info,
  871. .mode = SPI_MODE_3,
  872. },
  873. #endif
  874. #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
  875. || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
  876. {
  877. .modalias = "ad1836",
  878. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  879. .bus_num = 0,
  880. .chip_select = 4,
  881. .platform_data = "ad1836", /* only includes chip name for the moment */
  882. .mode = SPI_MODE_3,
  883. },
  884. #endif
  885. #ifdef CONFIG_SND_SOC_AD193X_SPI
  886. {
  887. .modalias = "ad193x",
  888. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  889. .bus_num = 0,
  890. .chip_select = 5,
  891. .mode = SPI_MODE_3,
  892. },
  893. #endif
  894. #if defined(CONFIG_SND_SOC_ADAV80X) || defined(CONFIG_SND_SOC_ADV80X_MODULE)
  895. {
  896. .modalias = "adav801",
  897. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  898. .bus_num = 0,
  899. .chip_select = 1,
  900. .mode = SPI_MODE_3,
  901. },
  902. #endif
  903. #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
  904. {
  905. .modalias = "ad714x_captouch",
  906. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  907. .irq = IRQ_PF4,
  908. .bus_num = 0,
  909. .chip_select = 5,
  910. .mode = SPI_MODE_3,
  911. .platform_data = &ad7147_spi_platform_data,
  912. },
  913. #endif
  914. #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
  915. {
  916. .modalias = "ad2s90",
  917. .bus_num = 0,
  918. .chip_select = 3, /* change it for your board */
  919. .mode = SPI_MODE_3,
  920. .platform_data = NULL,
  921. .controller_data = &ad2s90_spi_chip_info,
  922. },
  923. #endif
  924. #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
  925. {
  926. .modalias = "ad2s120x",
  927. .bus_num = 0,
  928. .chip_select = 4, /* CS, change it for your board */
  929. .platform_data = ad2s120x_platform_data,
  930. .controller_data = &ad2s120x_spi_chip_info,
  931. },
  932. #endif
  933. #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
  934. {
  935. .modalias = "ad2s1210",
  936. .max_speed_hz = 8192000,
  937. .bus_num = 0,
  938. .chip_select = 4, /* CS, change it for your board */
  939. .platform_data = ad2s1210_platform_data,
  940. .controller_data = &ad2s1210_spi_chip_info,
  941. },
  942. #endif
  943. #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
  944. {
  945. .modalias = "ad7314",
  946. .max_speed_hz = 1000000,
  947. .bus_num = 0,
  948. .chip_select = 4, /* CS, change it for your board */
  949. .controller_data = &ad7314_spi_chip_info,
  950. .mode = SPI_MODE_1,
  951. },
  952. #endif
  953. #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
  954. {
  955. .modalias = "ad7818",
  956. .max_speed_hz = 1000000,
  957. .bus_num = 0,
  958. .chip_select = 4, /* CS, change it for your board */
  959. .platform_data = ad7816_platform_data,
  960. .controller_data = &ad7816_spi_chip_info,
  961. .mode = SPI_MODE_3,
  962. },
  963. #endif
  964. #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
  965. {
  966. .modalias = "adt7310",
  967. .max_speed_hz = 1000000,
  968. .irq = IRQ_PG5, /* CT alarm event. Line 0 */
  969. .bus_num = 0,
  970. .chip_select = 4, /* CS, change it for your board */
  971. .platform_data = adt7310_platform_data,
  972. .controller_data = &adt7310_spi_chip_info,
  973. .mode = SPI_MODE_3,
  974. },
  975. #endif
  976. #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
  977. {
  978. .modalias = "ad7298",
  979. .max_speed_hz = 1000000,
  980. .bus_num = 0,
  981. .chip_select = 4, /* CS, change it for your board */
  982. .platform_data = ad7298_platform_data,
  983. .mode = SPI_MODE_3,
  984. },
  985. #endif
  986. #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
  987. {
  988. .modalias = "adt7316",
  989. .max_speed_hz = 1000000,
  990. .irq = IRQ_PG5, /* interrupt line */
  991. .bus_num = 0,
  992. .chip_select = 4, /* CS, change it for your board */
  993. .platform_data = adt7316_spi_data,
  994. .controller_data = &adt7316_spi_chip_info,
  995. .mode = SPI_MODE_3,
  996. },
  997. #endif
  998. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  999. {
  1000. .modalias = "mmc_spi",
  1001. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1002. .bus_num = 0,
  1003. .chip_select = 4,
  1004. .platform_data = &bfin_mmc_spi_pdata,
  1005. .controller_data = &mmc_spi_chip_info,
  1006. .mode = SPI_MODE_3,
  1007. },
  1008. #endif
  1009. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  1010. {
  1011. .modalias = "ad7877",
  1012. .platform_data = &bfin_ad7877_ts_info,
  1013. .irq = IRQ_PF6,
  1014. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  1015. .bus_num = 0,
  1016. .chip_select = 1,
  1017. },
  1018. #endif
  1019. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  1020. {
  1021. .modalias = "ad7879",
  1022. .platform_data = &bfin_ad7879_ts_info,
  1023. .irq = IRQ_PF7,
  1024. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1025. .bus_num = 0,
  1026. .chip_select = 1,
  1027. .mode = SPI_CPHA | SPI_CPOL,
  1028. },
  1029. #endif
  1030. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  1031. {
  1032. .modalias = "spidev",
  1033. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  1034. .bus_num = 0,
  1035. .chip_select = 1,
  1036. },
  1037. #endif
  1038. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1039. {
  1040. .modalias = "bfin-lq035q1-spi",
  1041. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1042. .bus_num = 0,
  1043. .chip_select = 2,
  1044. .mode = SPI_CPHA | SPI_CPOL,
  1045. },
  1046. #endif
  1047. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  1048. {
  1049. .modalias = "enc28j60",
  1050. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1051. .irq = IRQ_PF6,
  1052. .bus_num = 0,
  1053. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1054. .controller_data = &enc28j60_spi_chip_info,
  1055. .mode = SPI_MODE_0,
  1056. },
  1057. #endif
  1058. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  1059. {
  1060. .modalias = "adxl34x",
  1061. .platform_data = &adxl34x_info,
  1062. .irq = IRQ_PF6,
  1063. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1064. .bus_num = 0,
  1065. .chip_select = 2,
  1066. .mode = SPI_MODE_3,
  1067. },
  1068. #endif
  1069. #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
  1070. {
  1071. .modalias = "adf702x",
  1072. .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
  1073. .bus_num = 0,
  1074. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1075. .platform_data = &adf7021_platform_data,
  1076. .mode = SPI_MODE_0,
  1077. },
  1078. #endif
  1079. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  1080. {
  1081. .modalias = "ads7846",
  1082. .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
  1083. .bus_num = 0,
  1084. .irq = IRQ_PF6,
  1085. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1086. .platform_data = &ad7873_pdata,
  1087. .mode = SPI_MODE_0,
  1088. },
  1089. #endif
  1090. #if defined(CONFIG_AD7476) \
  1091. || defined(CONFIG_AD7476_MODULE)
  1092. {
  1093. .modalias = "ad7476", /* Name of spi_driver for this device */
  1094. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  1095. .bus_num = 0, /* Framework bus number */
  1096. .chip_select = 1, /* Framework chip select. */
  1097. .platform_data = NULL, /* No spi_driver specific config */
  1098. .controller_data = &spi_ad7476_chip_info,
  1099. .mode = SPI_MODE_3,
  1100. },
  1101. #endif
  1102. #if defined(CONFIG_ADE7753) \
  1103. || defined(CONFIG_ADE7753_MODULE)
  1104. {
  1105. .modalias = "ade7753",
  1106. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1107. .bus_num = 0,
  1108. .chip_select = 1, /* CS, change it for your board */
  1109. .platform_data = NULL, /* No spi_driver specific config */
  1110. .mode = SPI_MODE_1,
  1111. },
  1112. #endif
  1113. #if defined(CONFIG_ADE7754) \
  1114. || defined(CONFIG_ADE7754_MODULE)
  1115. {
  1116. .modalias = "ade7754",
  1117. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1118. .bus_num = 0,
  1119. .chip_select = 1, /* CS, change it for your board */
  1120. .platform_data = NULL, /* No spi_driver specific config */
  1121. .mode = SPI_MODE_1,
  1122. },
  1123. #endif
  1124. #if defined(CONFIG_ADE7758) \
  1125. || defined(CONFIG_ADE7758_MODULE)
  1126. {
  1127. .modalias = "ade7758",
  1128. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1129. .bus_num = 0,
  1130. .chip_select = 1, /* CS, change it for your board */
  1131. .platform_data = NULL, /* No spi_driver specific config */
  1132. .mode = SPI_MODE_1,
  1133. },
  1134. #endif
  1135. #if defined(CONFIG_ADE7759) \
  1136. || defined(CONFIG_ADE7759_MODULE)
  1137. {
  1138. .modalias = "ade7759",
  1139. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1140. .bus_num = 0,
  1141. .chip_select = 1, /* CS, change it for your board */
  1142. .platform_data = NULL, /* No spi_driver specific config */
  1143. .mode = SPI_MODE_1,
  1144. },
  1145. #endif
  1146. #if defined(CONFIG_ADE7854_SPI) \
  1147. || defined(CONFIG_ADE7854_SPI_MODULE)
  1148. {
  1149. .modalias = "ade7854",
  1150. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1151. .bus_num = 0,
  1152. .chip_select = 1, /* CS, change it for your board */
  1153. .platform_data = NULL, /* No spi_driver specific config */
  1154. .mode = SPI_MODE_3,
  1155. },
  1156. #endif
  1157. #if defined(CONFIG_ADIS16060) \
  1158. || defined(CONFIG_ADIS16060_MODULE)
  1159. {
  1160. .modalias = "adis16060_r",
  1161. .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
  1162. .bus_num = 0,
  1163. .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
  1164. .platform_data = NULL, /* No spi_driver specific config */
  1165. .mode = SPI_MODE_0,
  1166. },
  1167. {
  1168. .modalias = "adis16060_w",
  1169. .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
  1170. .bus_num = 0,
  1171. .chip_select = 2, /* CS for write, change it for your board */
  1172. .platform_data = NULL, /* No spi_driver specific config */
  1173. .mode = SPI_MODE_1,
  1174. },
  1175. #endif
  1176. #if defined(CONFIG_ADIS16130) \
  1177. || defined(CONFIG_ADIS16130_MODULE)
  1178. {
  1179. .modalias = "adis16130",
  1180. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1181. .bus_num = 0,
  1182. .chip_select = 1, /* CS for read, change it for your board */
  1183. .platform_data = NULL, /* No spi_driver specific config */
  1184. .mode = SPI_MODE_3,
  1185. },
  1186. #endif
  1187. #if defined(CONFIG_ADIS16201) \
  1188. || defined(CONFIG_ADIS16201_MODULE)
  1189. {
  1190. .modalias = "adis16201",
  1191. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1192. .bus_num = 0,
  1193. .chip_select = 5, /* CS, change it for your board */
  1194. .platform_data = NULL, /* No spi_driver specific config */
  1195. .mode = SPI_MODE_3,
  1196. .irq = IRQ_PF4,
  1197. },
  1198. #endif
  1199. #if defined(CONFIG_ADIS16203) \
  1200. || defined(CONFIG_ADIS16203_MODULE)
  1201. {
  1202. .modalias = "adis16203",
  1203. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1204. .bus_num = 0,
  1205. .chip_select = 5, /* CS, change it for your board */
  1206. .platform_data = NULL, /* No spi_driver specific config */
  1207. .mode = SPI_MODE_3,
  1208. .irq = IRQ_PF4,
  1209. },
  1210. #endif
  1211. #if defined(CONFIG_ADIS16204) \
  1212. || defined(CONFIG_ADIS16204_MODULE)
  1213. {
  1214. .modalias = "adis16204",
  1215. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1216. .bus_num = 0,
  1217. .chip_select = 5, /* CS, change it for your board */
  1218. .platform_data = NULL, /* No spi_driver specific config */
  1219. .mode = SPI_MODE_3,
  1220. .irq = IRQ_PF4,
  1221. },
  1222. #endif
  1223. #if defined(CONFIG_ADIS16209) \
  1224. || defined(CONFIG_ADIS16209_MODULE)
  1225. {
  1226. .modalias = "adis16209",
  1227. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1228. .bus_num = 0,
  1229. .chip_select = 5, /* CS, change it for your board */
  1230. .platform_data = NULL, /* No spi_driver specific config */
  1231. .mode = SPI_MODE_3,
  1232. .irq = IRQ_PF4,
  1233. },
  1234. #endif
  1235. #if defined(CONFIG_ADIS16220) \
  1236. || defined(CONFIG_ADIS16220_MODULE)
  1237. {
  1238. .modalias = "adis16220",
  1239. .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
  1240. .bus_num = 0,
  1241. .chip_select = 5, /* CS, change it for your board */
  1242. .platform_data = NULL, /* No spi_driver specific config */
  1243. .mode = SPI_MODE_3,
  1244. .irq = IRQ_PF4,
  1245. },
  1246. #endif
  1247. #if defined(CONFIG_ADIS16240) \
  1248. || defined(CONFIG_ADIS16240_MODULE)
  1249. {
  1250. .modalias = "adis16240",
  1251. .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
  1252. .bus_num = 0,
  1253. .chip_select = 5, /* CS, change it for your board */
  1254. .platform_data = NULL, /* No spi_driver specific config */
  1255. .mode = SPI_MODE_3,
  1256. .irq = IRQ_PF4,
  1257. },
  1258. #endif
  1259. #if defined(CONFIG_ADIS16260) \
  1260. || defined(CONFIG_ADIS16260_MODULE)
  1261. {
  1262. .modalias = "adis16260",
  1263. .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
  1264. .bus_num = 0,
  1265. .chip_select = 5, /* CS, change it for your board */
  1266. .platform_data = NULL, /* No spi_driver specific config */
  1267. .mode = SPI_MODE_3,
  1268. .irq = IRQ_PF4,
  1269. },
  1270. #endif
  1271. #if defined(CONFIG_ADIS16261) \
  1272. || defined(CONFIG_ADIS16261_MODULE)
  1273. {
  1274. .modalias = "adis16261",
  1275. .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
  1276. .bus_num = 0,
  1277. .chip_select = 1, /* CS, change it for your board */
  1278. .platform_data = NULL, /* No spi_driver specific config */
  1279. .mode = SPI_MODE_3,
  1280. },
  1281. #endif
  1282. #if defined(CONFIG_ADIS16300) \
  1283. || defined(CONFIG_ADIS16300_MODULE)
  1284. {
  1285. .modalias = "adis16300",
  1286. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1287. .bus_num = 0,
  1288. .chip_select = 5, /* CS, change it for your board */
  1289. .platform_data = NULL, /* No spi_driver specific config */
  1290. .mode = SPI_MODE_3,
  1291. .irq = IRQ_PF4,
  1292. },
  1293. #endif
  1294. #if defined(CONFIG_ADIS16350) \
  1295. || defined(CONFIG_ADIS16350_MODULE)
  1296. {
  1297. .modalias = "adis16364",
  1298. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1299. .bus_num = 0,
  1300. .chip_select = 5, /* CS, change it for your board */
  1301. .platform_data = NULL, /* No spi_driver specific config */
  1302. .mode = SPI_MODE_3,
  1303. .irq = IRQ_PF4,
  1304. },
  1305. #endif
  1306. #if defined(CONFIG_ADIS16400) \
  1307. || defined(CONFIG_ADIS16400_MODULE)
  1308. {
  1309. .modalias = "adis16400",
  1310. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1311. .bus_num = 0,
  1312. .chip_select = 1, /* CS, change it for your board */
  1313. .platform_data = NULL, /* No spi_driver specific config */
  1314. .mode = SPI_MODE_3,
  1315. },
  1316. #endif
  1317. };
  1318. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  1319. /* SPI controller data */
  1320. static struct bfin5xx_spi_master bfin_spi0_info = {
  1321. .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
  1322. .enable_dma = 1, /* master has the ability to do dma transfer */
  1323. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  1324. };
  1325. /* SPI (0) */
  1326. static struct resource bfin_spi0_resource[] = {
  1327. [0] = {
  1328. .start = SPI0_REGBASE,
  1329. .end = SPI0_REGBASE + 0xFF,
  1330. .flags = IORESOURCE_MEM,
  1331. },
  1332. [1] = {
  1333. .start = CH_SPI,
  1334. .end = CH_SPI,
  1335. .flags = IORESOURCE_DMA,
  1336. },
  1337. [2] = {
  1338. .start = IRQ_SPI,
  1339. .end = IRQ_SPI,
  1340. .flags = IORESOURCE_IRQ,
  1341. },
  1342. };
  1343. static struct platform_device bfin_spi0_device = {
  1344. .name = "bfin-spi",
  1345. .id = 0, /* Bus number */
  1346. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  1347. .resource = bfin_spi0_resource,
  1348. .dev = {
  1349. .platform_data = &bfin_spi0_info, /* Passed to driver */
  1350. },
  1351. };
  1352. #endif /* spi master and devices */
  1353. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  1354. /* SPORT SPI controller data */
  1355. static struct bfin5xx_spi_master bfin_sport_spi0_info = {
  1356. .num_chipselect = MAX_BLACKFIN_GPIOS,
  1357. .enable_dma = 0, /* master don't support DMA */
  1358. .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
  1359. P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
  1360. };
  1361. static struct resource bfin_sport_spi0_resource[] = {
  1362. [0] = {
  1363. .start = SPORT0_TCR1,
  1364. .end = SPORT0_TCR1 + 0xFF,
  1365. .flags = IORESOURCE_MEM,
  1366. },
  1367. [1] = {
  1368. .start = IRQ_SPORT0_ERROR,
  1369. .end = IRQ_SPORT0_ERROR,
  1370. .flags = IORESOURCE_IRQ,
  1371. },
  1372. };
  1373. static struct platform_device bfin_sport_spi0_device = {
  1374. .name = "bfin-sport-spi",
  1375. .id = 1, /* Bus number */
  1376. .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
  1377. .resource = bfin_sport_spi0_resource,
  1378. .dev = {
  1379. .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
  1380. },
  1381. };
  1382. static struct bfin5xx_spi_master bfin_sport_spi1_info = {
  1383. .num_chipselect = MAX_BLACKFIN_GPIOS,
  1384. .enable_dma = 0, /* master don't support DMA */
  1385. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
  1386. P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
  1387. };
  1388. static struct resource bfin_sport_spi1_resource[] = {
  1389. [0] = {
  1390. .start = SPORT1_TCR1,
  1391. .end = SPORT1_TCR1 + 0xFF,
  1392. .flags = IORESOURCE_MEM,
  1393. },
  1394. [1] = {
  1395. .start = IRQ_SPORT1_ERROR,
  1396. .end = IRQ_SPORT1_ERROR,
  1397. .flags = IORESOURCE_IRQ,
  1398. },
  1399. };
  1400. static struct platform_device bfin_sport_spi1_device = {
  1401. .name = "bfin-sport-spi",
  1402. .id = 2, /* Bus number */
  1403. .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
  1404. .resource = bfin_sport_spi1_resource,
  1405. .dev = {
  1406. .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
  1407. },
  1408. };
  1409. #endif /* sport spi master and devices */
  1410. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  1411. static struct platform_device bfin_fb_device = {
  1412. .name = "bf537_lq035",
  1413. };
  1414. #endif
  1415. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1416. #include <asm/bfin-lq035q1.h>
  1417. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  1418. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  1419. .ppi_mode = USE_RGB565_16_BIT_PPI,
  1420. .use_bl = 0, /* let something else control the LCD Blacklight */
  1421. .gpio_bl = GPIO_PF7,
  1422. };
  1423. static struct resource bfin_lq035q1_resources[] = {
  1424. {
  1425. .start = IRQ_PPI_ERROR,
  1426. .end = IRQ_PPI_ERROR,
  1427. .flags = IORESOURCE_IRQ,
  1428. },
  1429. };
  1430. static struct platform_device bfin_lq035q1_device = {
  1431. .name = "bfin-lq035q1",
  1432. .id = -1,
  1433. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  1434. .resource = bfin_lq035q1_resources,
  1435. .dev = {
  1436. .platform_data = &bfin_lq035q1_data,
  1437. },
  1438. };
  1439. #endif
  1440. #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
  1441. || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
  1442. #include <linux/videodev2.h>
  1443. #include <media/blackfin/bfin_capture.h>
  1444. #include <media/blackfin/ppi.h>
  1445. static const unsigned short ppi_req[] = {
  1446. P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
  1447. P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
  1448. P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
  1449. 0,
  1450. };
  1451. static const struct ppi_info ppi_info = {
  1452. .type = PPI_TYPE_PPI,
  1453. .dma_ch = CH_PPI,
  1454. .irq_err = IRQ_PPI_ERROR,
  1455. .base = (void __iomem *)PPI_CONTROL,
  1456. .pin_req = ppi_req,
  1457. };
  1458. #if defined(CONFIG_VIDEO_VS6624) \
  1459. || defined(CONFIG_VIDEO_VS6624_MODULE)
  1460. static struct v4l2_input vs6624_inputs[] = {
  1461. {
  1462. .index = 0,
  1463. .name = "Camera",
  1464. .type = V4L2_INPUT_TYPE_CAMERA,
  1465. .std = V4L2_STD_UNKNOWN,
  1466. },
  1467. };
  1468. static struct bcap_route vs6624_routes[] = {
  1469. {
  1470. .input = 0,
  1471. .output = 0,
  1472. },
  1473. };
  1474. static const unsigned vs6624_ce_pin = GPIO_PF10;
  1475. static struct bfin_capture_config bfin_capture_data = {
  1476. .card_name = "BF537",
  1477. .inputs = vs6624_inputs,
  1478. .num_inputs = ARRAY_SIZE(vs6624_inputs),
  1479. .routes = vs6624_routes,
  1480. .i2c_adapter_id = 0,
  1481. .board_info = {
  1482. .type = "vs6624",
  1483. .addr = 0x10,
  1484. .platform_data = (void *)&vs6624_ce_pin,
  1485. },
  1486. .ppi_info = &ppi_info,
  1487. .ppi_control = (PACK_EN | DLEN_8 | XFR_TYPE | 0x0020),
  1488. };
  1489. #endif
  1490. static struct platform_device bfin_capture_device = {
  1491. .name = "bfin_capture",
  1492. .dev = {
  1493. .platform_data = &bfin_capture_data,
  1494. },
  1495. };
  1496. #endif
  1497. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1498. #ifdef CONFIG_SERIAL_BFIN_UART0
  1499. static struct resource bfin_uart0_resources[] = {
  1500. {
  1501. .start = UART0_THR,
  1502. .end = UART0_GCTL+2,
  1503. .flags = IORESOURCE_MEM,
  1504. },
  1505. {
  1506. .start = IRQ_UART0_TX,
  1507. .end = IRQ_UART0_TX,
  1508. .flags = IORESOURCE_IRQ,
  1509. },
  1510. {
  1511. .start = IRQ_UART0_RX,
  1512. .end = IRQ_UART0_RX,
  1513. .flags = IORESOURCE_IRQ,
  1514. },
  1515. {
  1516. .start = IRQ_UART0_ERROR,
  1517. .end = IRQ_UART0_ERROR,
  1518. .flags = IORESOURCE_IRQ,
  1519. },
  1520. {
  1521. .start = CH_UART0_TX,
  1522. .end = CH_UART0_TX,
  1523. .flags = IORESOURCE_DMA,
  1524. },
  1525. {
  1526. .start = CH_UART0_RX,
  1527. .end = CH_UART0_RX,
  1528. .flags = IORESOURCE_DMA,
  1529. },
  1530. #ifdef CONFIG_BFIN_UART0_CTSRTS
  1531. { /* CTS pin */
  1532. .start = GPIO_PG7,
  1533. .end = GPIO_PG7,
  1534. .flags = IORESOURCE_IO,
  1535. },
  1536. { /* RTS pin */
  1537. .start = GPIO_PG6,
  1538. .end = GPIO_PG6,
  1539. .flags = IORESOURCE_IO,
  1540. },
  1541. #endif
  1542. };
  1543. static unsigned short bfin_uart0_peripherals[] = {
  1544. P_UART0_TX, P_UART0_RX, 0
  1545. };
  1546. static struct platform_device bfin_uart0_device = {
  1547. .name = "bfin-uart",
  1548. .id = 0,
  1549. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  1550. .resource = bfin_uart0_resources,
  1551. .dev = {
  1552. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  1553. },
  1554. };
  1555. #endif
  1556. #ifdef CONFIG_SERIAL_BFIN_UART1
  1557. static struct resource bfin_uart1_resources[] = {
  1558. {
  1559. .start = UART1_THR,
  1560. .end = UART1_GCTL+2,
  1561. .flags = IORESOURCE_MEM,
  1562. },
  1563. {
  1564. .start = IRQ_UART1_TX,
  1565. .end = IRQ_UART1_TX,
  1566. .flags = IORESOURCE_IRQ,
  1567. },
  1568. {
  1569. .start = IRQ_UART1_RX,
  1570. .end = IRQ_UART1_RX,
  1571. .flags = IORESOURCE_IRQ,
  1572. },
  1573. {
  1574. .start = IRQ_UART1_ERROR,
  1575. .end = IRQ_UART1_ERROR,
  1576. .flags = IORESOURCE_IRQ,
  1577. },
  1578. {
  1579. .start = CH_UART1_TX,
  1580. .end = CH_UART1_TX,
  1581. .flags = IORESOURCE_DMA,
  1582. },
  1583. {
  1584. .start = CH_UART1_RX,
  1585. .end = CH_UART1_RX,
  1586. .flags = IORESOURCE_DMA,
  1587. },
  1588. };
  1589. static unsigned short bfin_uart1_peripherals[] = {
  1590. P_UART1_TX, P_UART1_RX, 0
  1591. };
  1592. static struct platform_device bfin_uart1_device = {
  1593. .name = "bfin-uart",
  1594. .id = 1,
  1595. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  1596. .resource = bfin_uart1_resources,
  1597. .dev = {
  1598. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  1599. },
  1600. };
  1601. #endif
  1602. #endif
  1603. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1604. #ifdef CONFIG_BFIN_SIR0
  1605. static struct resource bfin_sir0_resources[] = {
  1606. {
  1607. .start = 0xFFC00400,
  1608. .end = 0xFFC004FF,
  1609. .flags = IORESOURCE_MEM,
  1610. },
  1611. {
  1612. .start = IRQ_UART0_RX,
  1613. .end = IRQ_UART0_RX+1,
  1614. .flags = IORESOURCE_IRQ,
  1615. },
  1616. {
  1617. .start = CH_UART0_RX,
  1618. .end = CH_UART0_RX+1,
  1619. .flags = IORESOURCE_DMA,
  1620. },
  1621. };
  1622. static struct platform_device bfin_sir0_device = {
  1623. .name = "bfin_sir",
  1624. .id = 0,
  1625. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  1626. .resource = bfin_sir0_resources,
  1627. };
  1628. #endif
  1629. #ifdef CONFIG_BFIN_SIR1
  1630. static struct resource bfin_sir1_resources[] = {
  1631. {
  1632. .start = 0xFFC02000,
  1633. .end = 0xFFC020FF,
  1634. .flags = IORESOURCE_MEM,
  1635. },
  1636. {
  1637. .start = IRQ_UART1_RX,
  1638. .end = IRQ_UART1_RX+1,
  1639. .flags = IORESOURCE_IRQ,
  1640. },
  1641. {
  1642. .start = CH_UART1_RX,
  1643. .end = CH_UART1_RX+1,
  1644. .flags = IORESOURCE_DMA,
  1645. },
  1646. };
  1647. static struct platform_device bfin_sir1_device = {
  1648. .name = "bfin_sir",
  1649. .id = 1,
  1650. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  1651. .resource = bfin_sir1_resources,
  1652. };
  1653. #endif
  1654. #endif
  1655. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1656. static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
  1657. static struct resource bfin_twi0_resource[] = {
  1658. [0] = {
  1659. .start = TWI0_REGBASE,
  1660. .end = TWI0_REGBASE,
  1661. .flags = IORESOURCE_MEM,
  1662. },
  1663. [1] = {
  1664. .start = IRQ_TWI,
  1665. .end = IRQ_TWI,
  1666. .flags = IORESOURCE_IRQ,
  1667. },
  1668. };
  1669. static struct platform_device i2c_bfin_twi_device = {
  1670. .name = "i2c-bfin-twi",
  1671. .id = 0,
  1672. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  1673. .resource = bfin_twi0_resource,
  1674. .dev = {
  1675. .platform_data = &bfin_twi0_pins,
  1676. },
  1677. };
  1678. #endif
  1679. #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
  1680. static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
  1681. [0] = KEY_GRAVE,
  1682. [1] = KEY_1,
  1683. [2] = KEY_2,
  1684. [3] = KEY_3,
  1685. [4] = KEY_4,
  1686. [5] = KEY_5,
  1687. [6] = KEY_6,
  1688. [7] = KEY_7,
  1689. [8] = KEY_8,
  1690. [9] = KEY_9,
  1691. [10] = KEY_0,
  1692. [11] = KEY_MINUS,
  1693. [12] = KEY_EQUAL,
  1694. [13] = KEY_BACKSLASH,
  1695. [15] = KEY_KP0,
  1696. [16] = KEY_Q,
  1697. [17] = KEY_W,
  1698. [18] = KEY_E,
  1699. [19] = KEY_R,
  1700. [20] = KEY_T,
  1701. [21] = KEY_Y,
  1702. [22] = KEY_U,
  1703. [23] = KEY_I,
  1704. [24] = KEY_O,
  1705. [25] = KEY_P,
  1706. [26] = KEY_LEFTBRACE,
  1707. [27] = KEY_RIGHTBRACE,
  1708. [29] = KEY_KP1,
  1709. [30] = KEY_KP2,
  1710. [31] = KEY_KP3,
  1711. [32] = KEY_A,
  1712. [33] = KEY_S,
  1713. [34] = KEY_D,
  1714. [35] = KEY_F,
  1715. [36] = KEY_G,
  1716. [37] = KEY_H,
  1717. [38] = KEY_J,
  1718. [39] = KEY_K,
  1719. [40] = KEY_L,
  1720. [41] = KEY_SEMICOLON,
  1721. [42] = KEY_APOSTROPHE,
  1722. [43] = KEY_BACKSLASH,
  1723. [45] = KEY_KP4,
  1724. [46] = KEY_KP5,
  1725. [47] = KEY_KP6,
  1726. [48] = KEY_102ND,
  1727. [49] = KEY_Z,
  1728. [50] = KEY_X,
  1729. [51] = KEY_C,
  1730. [52] = KEY_V,
  1731. [53] = KEY_B,
  1732. [54] = KEY_N,
  1733. [55] = KEY_M,
  1734. [56] = KEY_COMMA,
  1735. [57] = KEY_DOT,
  1736. [58] = KEY_SLASH,
  1737. [60] = KEY_KPDOT,
  1738. [61] = KEY_KP7,
  1739. [62] = KEY_KP8,
  1740. [63] = KEY_KP9,
  1741. [64] = KEY_SPACE,
  1742. [65] = KEY_BACKSPACE,
  1743. [66] = KEY_TAB,
  1744. [67] = KEY_KPENTER,
  1745. [68] = KEY_ENTER,
  1746. [69] = KEY_ESC,
  1747. [70] = KEY_DELETE,
  1748. [74] = KEY_KPMINUS,
  1749. [76] = KEY_UP,
  1750. [77] = KEY_DOWN,
  1751. [78] = KEY_RIGHT,
  1752. [79] = KEY_LEFT,
  1753. };
  1754. static struct adp5588_kpad_platform_data adp5588_kpad_data = {
  1755. .rows = 8,
  1756. .cols = 10,
  1757. .keymap = adp5588_keymap,
  1758. .keymapsize = ARRAY_SIZE(adp5588_keymap),
  1759. .repeat = 0,
  1760. };
  1761. #endif
  1762. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  1763. #include <linux/mfd/adp5520.h>
  1764. /*
  1765. * ADP5520/5501 Backlight Data
  1766. */
  1767. static struct adp5520_backlight_platform_data adp5520_backlight_data = {
  1768. .fade_in = ADP5520_FADE_T_1200ms,
  1769. .fade_out = ADP5520_FADE_T_1200ms,
  1770. .fade_led_law = ADP5520_BL_LAW_LINEAR,
  1771. .en_ambl_sens = 1,
  1772. .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
  1773. .l1_daylight_max = ADP5520_BL_CUR_mA(15),
  1774. .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
  1775. .l2_office_max = ADP5520_BL_CUR_mA(7),
  1776. .l2_office_dim = ADP5520_BL_CUR_mA(0),
  1777. .l3_dark_max = ADP5520_BL_CUR_mA(3),
  1778. .l3_dark_dim = ADP5520_BL_CUR_mA(0),
  1779. .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
  1780. .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
  1781. .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
  1782. .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
  1783. };
  1784. /*
  1785. * ADP5520/5501 LEDs Data
  1786. */
  1787. static struct led_info adp5520_leds[] = {
  1788. {
  1789. .name = "adp5520-led1",
  1790. .default_trigger = "none",
  1791. .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
  1792. },
  1793. #ifdef ADP5520_EN_ALL_LEDS
  1794. {
  1795. .name = "adp5520-led2",
  1796. .default_trigger = "none",
  1797. .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
  1798. },
  1799. {
  1800. .name = "adp5520-led3",
  1801. .default_trigger = "none",
  1802. .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
  1803. },
  1804. #endif
  1805. };
  1806. static struct adp5520_leds_platform_data adp5520_leds_data = {
  1807. .num_leds = ARRAY_SIZE(adp5520_leds),
  1808. .leds = adp5520_leds,
  1809. .fade_in = ADP5520_FADE_T_600ms,
  1810. .fade_out = ADP5520_FADE_T_600ms,
  1811. .led_on_time = ADP5520_LED_ONT_600ms,
  1812. };
  1813. /*
  1814. * ADP5520 GPIO Data
  1815. */
  1816. static struct adp5520_gpio_platform_data adp5520_gpio_data = {
  1817. .gpio_start = 50,
  1818. .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
  1819. .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
  1820. };
  1821. /*
  1822. * ADP5520 Keypad Data
  1823. */
  1824. static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
  1825. [ADP5520_KEY(0, 0)] = KEY_GRAVE,
  1826. [ADP5520_KEY(0, 1)] = KEY_1,
  1827. [ADP5520_KEY(0, 2)] = KEY_2,
  1828. [ADP5520_KEY(0, 3)] = KEY_3,
  1829. [ADP5520_KEY(1, 0)] = KEY_4,
  1830. [ADP5520_KEY(1, 1)] = KEY_5,
  1831. [ADP5520_KEY(1, 2)] = KEY_6,
  1832. [ADP5520_KEY(1, 3)] = KEY_7,
  1833. [ADP5520_KEY(2, 0)] = KEY_8,
  1834. [ADP5520_KEY(2, 1)] = KEY_9,
  1835. [ADP5520_KEY(2, 2)] = KEY_0,
  1836. [ADP5520_KEY(2, 3)] = KEY_MINUS,
  1837. [ADP5520_KEY(3, 0)] = KEY_EQUAL,
  1838. [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
  1839. [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
  1840. [ADP5520_KEY(3, 3)] = KEY_ENTER,
  1841. };
  1842. static struct adp5520_keys_platform_data adp5520_keys_data = {
  1843. .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
  1844. .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
  1845. .keymap = adp5520_keymap,
  1846. .keymapsize = ARRAY_SIZE(adp5520_keymap),
  1847. .repeat = 0,
  1848. };
  1849. /*
  1850. * ADP5520/5501 Multifunction Device Init Data
  1851. */
  1852. static struct adp5520_platform_data adp5520_pdev_data = {
  1853. .backlight = &adp5520_backlight_data,
  1854. .leds = &adp5520_leds_data,
  1855. .gpio = &adp5520_gpio_data,
  1856. .keys = &adp5520_keys_data,
  1857. };
  1858. #endif
  1859. #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
  1860. static struct adp5588_gpio_platform_data adp5588_gpio_data = {
  1861. .gpio_start = 50,
  1862. .pullup_dis_mask = 0,
  1863. };
  1864. #endif
  1865. #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
  1866. #include <linux/i2c/adp8870.h>
  1867. static struct led_info adp8870_leds[] = {
  1868. {
  1869. .name = "adp8870-led7",
  1870. .default_trigger = "none",
  1871. .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
  1872. },
  1873. };
  1874. static struct adp8870_backlight_platform_data adp8870_pdata = {
  1875. .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
  1876. ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
  1877. .pwm_assign = 0, /* 1 = Enables PWM mode */
  1878. .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
  1879. .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
  1880. .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
  1881. .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
  1882. .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
  1883. .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1884. .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1885. .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1886. .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1887. .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1888. .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1889. .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1890. .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1891. .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1892. .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1893. .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1894. .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1895. .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
  1896. .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
  1897. .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
  1898. .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
  1899. .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1900. .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1901. .leds = adp8870_leds,
  1902. .num_leds = ARRAY_SIZE(adp8870_leds),
  1903. .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
  1904. .led_fade_in = ADP8870_FADE_T_600ms,
  1905. .led_fade_out = ADP8870_FADE_T_600ms,
  1906. .led_on_time = ADP8870_LED_ONT_200ms,
  1907. };
  1908. #endif
  1909. #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
  1910. #include <linux/i2c/adp8860.h>
  1911. static struct led_info adp8860_leds[] = {
  1912. {
  1913. .name = "adp8860-led7",
  1914. .default_trigger = "none",
  1915. .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
  1916. },
  1917. };
  1918. static struct adp8860_backlight_platform_data adp8860_pdata = {
  1919. .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
  1920. ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
  1921. .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
  1922. .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
  1923. .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
  1924. .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
  1925. .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
  1926. .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1927. .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1928. .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1929. .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1930. .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1931. .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1932. .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1933. .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1934. .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1935. .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1936. .leds = adp8860_leds,
  1937. .num_leds = ARRAY_SIZE(adp8860_leds),
  1938. .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
  1939. .led_fade_in = ADP8860_FADE_T_600ms,
  1940. .led_fade_out = ADP8860_FADE_T_600ms,
  1941. .led_on_time = ADP8860_LED_ONT_200ms,
  1942. };
  1943. #endif
  1944. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  1945. static struct regulator_consumer_supply ad5398_consumer = {
  1946. .supply = "current",
  1947. };
  1948. static struct regulator_init_data ad5398_regulator_data = {
  1949. .constraints = {
  1950. .name = "current range",
  1951. .max_uA = 120000,
  1952. .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
  1953. },
  1954. .num_consumer_supplies = 1,
  1955. .consumer_supplies = &ad5398_consumer,
  1956. };
  1957. #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
  1958. defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
  1959. static struct platform_device ad5398_virt_consumer_device = {
  1960. .name = "reg-virt-consumer",
  1961. .id = 0,
  1962. .dev = {
  1963. .platform_data = "current", /* Passed to driver */
  1964. },
  1965. };
  1966. #endif
  1967. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  1968. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  1969. static struct regulator_bulk_data ad5398_bulk_data = {
  1970. .supply = "current",
  1971. };
  1972. static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
  1973. .name = "ad5398",
  1974. .num_supplies = 1,
  1975. .supplies = &ad5398_bulk_data,
  1976. };
  1977. static struct platform_device ad5398_userspace_consumer_device = {
  1978. .name = "reg-userspace-consumer",
  1979. .id = 0,
  1980. .dev = {
  1981. .platform_data = &ad5398_userspace_comsumer_data,
  1982. },
  1983. };
  1984. #endif
  1985. #endif
  1986. #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
  1987. /* INT bound temperature alarm event. line 1 */
  1988. static unsigned long adt7410_platform_data[2] = {
  1989. IRQ_PG4, IRQF_TRIGGER_LOW,
  1990. };
  1991. #endif
  1992. #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
  1993. /* INT bound temperature alarm event. line 1 */
  1994. static unsigned long adt7316_i2c_data[2] = {
  1995. IRQF_TRIGGER_LOW, /* interrupt flags */
  1996. GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
  1997. };
  1998. #endif
  1999. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  2000. #ifdef CONFIG_SND_SOC_AD193X_I2C
  2001. {
  2002. I2C_BOARD_INFO("ad1937", 0x04),
  2003. },
  2004. #endif
  2005. #if defined(CONFIG_SND_SOC_ADAV80X) || defined(CONFIG_SND_SOC_ADAV80X_MODULE)
  2006. {
  2007. I2C_BOARD_INFO("adav803", 0x10),
  2008. },
  2009. #endif
  2010. #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
  2011. {
  2012. I2C_BOARD_INFO("ad7142_captouch", 0x2C),
  2013. .irq = IRQ_PG5,
  2014. .platform_data = (void *)&ad7142_i2c_platform_data,
  2015. },
  2016. #endif
  2017. #if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
  2018. {
  2019. I2C_BOARD_INFO("ad7150", 0x48),
  2020. .irq = IRQ_PG5, /* fixme: use real interrupt number */
  2021. },
  2022. #endif
  2023. #if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
  2024. {
  2025. I2C_BOARD_INFO("ad7152", 0x48),
  2026. },
  2027. #endif
  2028. #if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
  2029. {
  2030. I2C_BOARD_INFO("ad774x", 0x48),
  2031. },
  2032. #endif
  2033. #if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)
  2034. {
  2035. I2C_BOARD_INFO("ade7854", 0x38),
  2036. },
  2037. #endif
  2038. #if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)
  2039. {
  2040. I2C_BOARD_INFO("adt75", 0x9),
  2041. .irq = IRQ_PG5,
  2042. },
  2043. #endif
  2044. #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
  2045. {
  2046. I2C_BOARD_INFO("adt7410", 0x48),
  2047. /* CT critical temperature event. line 0 */
  2048. .irq = IRQ_PG5,
  2049. .platform_data = (void *)&adt7410_platform_data,
  2050. },
  2051. #endif
  2052. #if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)
  2053. {
  2054. I2C_BOARD_INFO("ad7291", 0x20),
  2055. .irq = IRQ_PG5,
  2056. },
  2057. #endif
  2058. #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
  2059. {
  2060. I2C_BOARD_INFO("adt7316", 0x48),
  2061. .irq = IRQ_PG6,
  2062. .platform_data = (void *)&adt7316_i2c_data,
  2063. },
  2064. #endif
  2065. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  2066. {
  2067. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  2068. },
  2069. #endif
  2070. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  2071. {
  2072. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  2073. .irq = IRQ_PG6,
  2074. },
  2075. #endif
  2076. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  2077. {
  2078. I2C_BOARD_INFO("ad7879", 0x2F),
  2079. .irq = IRQ_PG5,
  2080. .platform_data = (void *)&bfin_ad7879_ts_info,
  2081. },
  2082. #endif
  2083. #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
  2084. {
  2085. I2C_BOARD_INFO("adp5588-keys", 0x34),
  2086. .irq = IRQ_PG0,
  2087. .platform_data = (void *)&adp5588_kpad_data,
  2088. },
  2089. #endif
  2090. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  2091. {
  2092. I2C_BOARD_INFO("pmic-adp5520", 0x32),
  2093. .irq = IRQ_PG0,
  2094. .platform_data = (void *)&adp5520_pdev_data,
  2095. },
  2096. #endif
  2097. #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  2098. {
  2099. I2C_BOARD_INFO("adxl34x", 0x53),
  2100. .irq = IRQ_PG3,
  2101. .platform_data = (void *)&adxl34x_info,
  2102. },
  2103. #endif
  2104. #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
  2105. {
  2106. I2C_BOARD_INFO("adp5588-gpio", 0x34),
  2107. .platform_data = (void *)&adp5588_gpio_data,
  2108. },
  2109. #endif
  2110. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  2111. {
  2112. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  2113. },
  2114. #endif
  2115. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  2116. {
  2117. I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),
  2118. },
  2119. #endif
  2120. #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
  2121. {
  2122. I2C_BOARD_INFO("adp8870", 0x2B),
  2123. .platform_data = (void *)&adp8870_pdata,
  2124. },
  2125. #endif
  2126. #if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
  2127. {
  2128. I2C_BOARD_INFO("adau1371", 0x1A),
  2129. },
  2130. #endif
  2131. #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
  2132. {
  2133. I2C_BOARD_INFO("adau1761", 0x38),
  2134. },
  2135. #endif
  2136. #if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
  2137. {
  2138. I2C_BOARD_INFO("adau1361", 0x38),
  2139. },
  2140. #endif
  2141. #if defined(CONFIG_SND_SOC_ADAU1701) || defined(CONFIG_SND_SOC_ADAU1701_MODULE)
  2142. {
  2143. I2C_BOARD_INFO("adau1701", 0x34),
  2144. },
  2145. #endif
  2146. #if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
  2147. {
  2148. I2C_BOARD_INFO("ad5258", 0x18),
  2149. },
  2150. #endif
  2151. #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
  2152. {
  2153. I2C_BOARD_INFO("ssm2602", 0x1b),
  2154. },
  2155. #endif
  2156. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  2157. {
  2158. I2C_BOARD_INFO("ad5398", 0xC),
  2159. .platform_data = (void *)&ad5398_regulator_data,
  2160. },
  2161. #endif
  2162. #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
  2163. {
  2164. I2C_BOARD_INFO("adp8860", 0x2A),
  2165. .platform_data = (void *)&adp8860_pdata,
  2166. },
  2167. #endif
  2168. #if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
  2169. {
  2170. I2C_BOARD_INFO("adau1373", 0x1A),
  2171. },
  2172. #endif
  2173. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  2174. {
  2175. I2C_BOARD_INFO("ad5252", 0x2e),
  2176. },
  2177. #endif
  2178. };
  2179. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) \
  2180. || defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
  2181. unsigned short bfin_sport0_peripherals[] = {
  2182. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  2183. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  2184. };
  2185. #endif
  2186. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  2187. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2188. static struct resource bfin_sport0_uart_resources[] = {
  2189. {
  2190. .start = SPORT0_TCR1,
  2191. .end = SPORT0_MRCS3+4,
  2192. .flags = IORESOURCE_MEM,
  2193. },
  2194. {
  2195. .start = IRQ_SPORT0_RX,
  2196. .end = IRQ_SPORT0_RX+1,
  2197. .flags = IORESOURCE_IRQ,
  2198. },
  2199. {
  2200. .start = IRQ_SPORT0_ERROR,
  2201. .end = IRQ_SPORT0_ERROR,
  2202. .flags = IORESOURCE_IRQ,
  2203. },
  2204. };
  2205. static struct platform_device bfin_sport0_uart_device = {
  2206. .name = "bfin-sport-uart",
  2207. .id = 0,
  2208. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  2209. .resource = bfin_sport0_uart_resources,
  2210. .dev = {
  2211. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  2212. },
  2213. };
  2214. #endif
  2215. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2216. static struct resource bfin_sport1_uart_resources[] = {
  2217. {
  2218. .start = SPORT1_TCR1,
  2219. .end = SPORT1_MRCS3+4,
  2220. .flags = IORESOURCE_MEM,
  2221. },
  2222. {
  2223. .start = IRQ_SPORT1_RX,
  2224. .end = IRQ_SPORT1_RX+1,
  2225. .flags = IORESOURCE_IRQ,
  2226. },
  2227. {
  2228. .start = IRQ_SPORT1_ERROR,
  2229. .end = IRQ_SPORT1_ERROR,
  2230. .flags = IORESOURCE_IRQ,
  2231. },
  2232. };
  2233. static unsigned short bfin_sport1_peripherals[] = {
  2234. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  2235. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  2236. };
  2237. static struct platform_device bfin_sport1_uart_device = {
  2238. .name = "bfin-sport-uart",
  2239. .id = 1,
  2240. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  2241. .resource = bfin_sport1_uart_resources,
  2242. .dev = {
  2243. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  2244. },
  2245. };
  2246. #endif
  2247. #endif
  2248. #if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
  2249. static struct resource bfin_sport0_resources[] = {
  2250. {
  2251. .start = SPORT0_TCR1,
  2252. .end = SPORT0_MRCS3+4,
  2253. .flags = IORESOURCE_MEM,
  2254. },
  2255. {
  2256. .start = IRQ_SPORT0_RX,
  2257. .end = IRQ_SPORT0_RX+1,
  2258. .flags = IORESOURCE_IRQ,
  2259. },
  2260. {
  2261. .start = IRQ_SPORT0_TX,
  2262. .end = IRQ_SPORT0_TX+1,
  2263. .flags = IORESOURCE_IRQ,
  2264. },
  2265. {
  2266. .start = IRQ_SPORT0_ERROR,
  2267. .end = IRQ_SPORT0_ERROR,
  2268. .flags = IORESOURCE_IRQ,
  2269. },
  2270. {
  2271. .start = CH_SPORT0_TX,
  2272. .end = CH_SPORT0_TX,
  2273. .flags = IORESOURCE_DMA,
  2274. },
  2275. {
  2276. .start = CH_SPORT0_RX,
  2277. .end = CH_SPORT0_RX,
  2278. .flags = IORESOURCE_DMA,
  2279. },
  2280. };
  2281. static struct platform_device bfin_sport0_device = {
  2282. .name = "bfin_sport_raw",
  2283. .id = 0,
  2284. .num_resources = ARRAY_SIZE(bfin_sport0_resources),
  2285. .resource = bfin_sport0_resources,
  2286. .dev = {
  2287. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  2288. },
  2289. };
  2290. #endif
  2291. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  2292. #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  2293. /* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
  2294. #ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  2295. #define PATA_INT IRQ_PF5
  2296. static struct pata_platform_info bfin_pata_platform_data = {
  2297. .ioport_shift = 1,
  2298. .irq_flags = IRQF_TRIGGER_HIGH,
  2299. };
  2300. static struct resource bfin_pata_resources[] = {
  2301. {
  2302. .start = 0x20314020,
  2303. .end = 0x2031403F,
  2304. .flags = IORESOURCE_MEM,
  2305. },
  2306. {
  2307. .start = 0x2031401C,
  2308. .end = 0x2031401F,
  2309. .flags = IORESOURCE_MEM,
  2310. },
  2311. {
  2312. .start = PATA_INT,
  2313. .end = PATA_INT,
  2314. .flags = IORESOURCE_IRQ,
  2315. },
  2316. };
  2317. #elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
  2318. static struct pata_platform_info bfin_pata_platform_data = {
  2319. .ioport_shift = 0,
  2320. };
  2321. /* CompactFlash Storage Card Memory Mapped Addressing
  2322. * /REG = A11 = 1
  2323. */
  2324. static struct resource bfin_pata_resources[] = {
  2325. {
  2326. .start = 0x20211800,
  2327. .end = 0x20211807,
  2328. .flags = IORESOURCE_MEM,
  2329. },
  2330. {
  2331. .start = 0x2021180E, /* Device Ctl */
  2332. .end = 0x2021180E,
  2333. .flags = IORESOURCE_MEM,
  2334. },
  2335. };
  2336. #endif
  2337. static struct platform_device bfin_pata_device = {
  2338. .name = "pata_platform",
  2339. .id = -1,
  2340. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  2341. .resource = bfin_pata_resources,
  2342. .dev = {
  2343. .platform_data = &bfin_pata_platform_data,
  2344. }
  2345. };
  2346. #endif
  2347. static const unsigned int cclk_vlev_datasheet[] =
  2348. {
  2349. VRPAIR(VLEV_085, 250000000),
  2350. VRPAIR(VLEV_090, 376000000),
  2351. VRPAIR(VLEV_095, 426000000),
  2352. VRPAIR(VLEV_100, 426000000),
  2353. VRPAIR(VLEV_105, 476000000),
  2354. VRPAIR(VLEV_110, 476000000),
  2355. VRPAIR(VLEV_115, 476000000),
  2356. VRPAIR(VLEV_120, 500000000),
  2357. VRPAIR(VLEV_125, 533000000),
  2358. VRPAIR(VLEV_130, 600000000),
  2359. };
  2360. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  2361. .tuple_tab = cclk_vlev_datasheet,
  2362. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  2363. .vr_settling_time = 25 /* us */,
  2364. };
  2365. static struct platform_device bfin_dpmc = {
  2366. .name = "bfin dpmc",
  2367. .dev = {
  2368. .platform_data = &bfin_dmpc_vreg_data,
  2369. },
  2370. };
  2371. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
  2372. defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  2373. #define SPORT_REQ(x) \
  2374. [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
  2375. P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
  2376. static const u16 bfin_snd_pin[][7] = {
  2377. SPORT_REQ(0),
  2378. SPORT_REQ(1),
  2379. };
  2380. static struct bfin_snd_platform_data bfin_snd_data[] = {
  2381. {
  2382. .pin_req = &bfin_snd_pin[0][0],
  2383. },
  2384. {
  2385. .pin_req = &bfin_snd_pin[1][0],
  2386. },
  2387. };
  2388. #define BFIN_SND_RES(x) \
  2389. [x] = { \
  2390. { \
  2391. .start = SPORT##x##_TCR1, \
  2392. .end = SPORT##x##_TCR1, \
  2393. .flags = IORESOURCE_MEM \
  2394. }, \
  2395. { \
  2396. .start = CH_SPORT##x##_RX, \
  2397. .end = CH_SPORT##x##_RX, \
  2398. .flags = IORESOURCE_DMA, \
  2399. }, \
  2400. { \
  2401. .start = CH_SPORT##x##_TX, \
  2402. .end = CH_SPORT##x##_TX, \
  2403. .flags = IORESOURCE_DMA, \
  2404. }, \
  2405. { \
  2406. .start = IRQ_SPORT##x##_ERROR, \
  2407. .end = IRQ_SPORT##x##_ERROR, \
  2408. .flags = IORESOURCE_IRQ, \
  2409. } \
  2410. }
  2411. static struct resource bfin_snd_resources[][4] = {
  2412. BFIN_SND_RES(0),
  2413. BFIN_SND_RES(1),
  2414. };
  2415. #endif
  2416. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  2417. static struct platform_device bfin_i2s_pcm = {
  2418. .name = "bfin-i2s-pcm-audio",
  2419. .id = -1,
  2420. };
  2421. #endif
  2422. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  2423. static struct platform_device bfin_ac97_pcm = {
  2424. .name = "bfin-ac97-pcm-audio",
  2425. .id = -1,
  2426. };
  2427. #endif
  2428. #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
  2429. || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
  2430. static const char * const ad1836_link[] = {
  2431. "bfin-i2s.0",
  2432. "spi0.4",
  2433. };
  2434. static struct platform_device bfin_ad1836_machine = {
  2435. .name = "bfin-snd-ad1836",
  2436. .id = -1,
  2437. .dev = {
  2438. .platform_data = (void *)ad1836_link,
  2439. },
  2440. };
  2441. #endif
  2442. #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
  2443. defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
  2444. static const unsigned ad73311_gpio[] = {
  2445. GPIO_PF4,
  2446. };
  2447. static struct platform_device bfin_ad73311_machine = {
  2448. .name = "bfin-snd-ad73311",
  2449. .id = 1,
  2450. .dev = {
  2451. .platform_data = (void *)ad73311_gpio,
  2452. },
  2453. };
  2454. #endif
  2455. #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
  2456. static struct platform_device bfin_ad73311_codec_device = {
  2457. .name = "ad73311",
  2458. .id = -1,
  2459. };
  2460. #endif
  2461. #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X) || \
  2462. defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X_MODULE)
  2463. static struct platform_device bfin_eval_adav801_device = {
  2464. .name = "bfin-eval-adav801",
  2465. .id = -1,
  2466. };
  2467. #endif
  2468. #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
  2469. static struct platform_device bfin_i2s = {
  2470. .name = "bfin-i2s",
  2471. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2472. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  2473. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  2474. .dev = {
  2475. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  2476. },
  2477. };
  2478. #endif
  2479. #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
  2480. static struct platform_device bfin_ac97 = {
  2481. .name = "bfin-ac97",
  2482. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2483. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  2484. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  2485. .dev = {
  2486. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  2487. },
  2488. };
  2489. #endif
  2490. #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
  2491. #define REGULATOR_ADP122 "adp122"
  2492. #define REGULATOR_ADP122_UV 2500000
  2493. static struct regulator_consumer_supply adp122_consumers = {
  2494. .supply = REGULATOR_ADP122,
  2495. };
  2496. static struct regulator_init_data adp_switch_regulator_data = {
  2497. .constraints = {
  2498. .name = REGULATOR_ADP122,
  2499. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  2500. .min_uV = REGULATOR_ADP122_UV,
  2501. .max_uV = REGULATOR_ADP122_UV,
  2502. .min_uA = 0,
  2503. .max_uA = 300000,
  2504. },
  2505. .num_consumer_supplies = 1, /* only 1 */
  2506. .consumer_supplies = &adp122_consumers,
  2507. };
  2508. static struct fixed_voltage_config adp_switch_pdata = {
  2509. .supply_name = REGULATOR_ADP122,
  2510. .microvolts = REGULATOR_ADP122_UV,
  2511. .gpio = GPIO_PF2,
  2512. .enable_high = 1,
  2513. .enabled_at_boot = 0,
  2514. .init_data = &adp_switch_regulator_data,
  2515. };
  2516. static struct platform_device adp_switch_device = {
  2517. .name = "reg-fixed-voltage",
  2518. .id = 0,
  2519. .dev = {
  2520. .platform_data = &adp_switch_pdata,
  2521. },
  2522. };
  2523. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2524. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2525. static struct regulator_bulk_data adp122_bulk_data = {
  2526. .supply = REGULATOR_ADP122,
  2527. };
  2528. static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
  2529. .name = REGULATOR_ADP122,
  2530. .num_supplies = 1,
  2531. .supplies = &adp122_bulk_data,
  2532. };
  2533. static struct platform_device adp122_userspace_consumer_device = {
  2534. .name = "reg-userspace-consumer",
  2535. .id = 0,
  2536. .dev = {
  2537. .platform_data = &adp122_userspace_comsumer_data,
  2538. },
  2539. };
  2540. #endif
  2541. #endif
  2542. #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
  2543. defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
  2544. static struct resource iio_gpio_trigger_resources[] = {
  2545. [0] = {
  2546. .start = IRQ_PF5,
  2547. .end = IRQ_PF5,
  2548. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  2549. },
  2550. };
  2551. static struct platform_device iio_gpio_trigger = {
  2552. .name = "iio_gpio_trigger",
  2553. .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
  2554. .resource = iio_gpio_trigger_resources,
  2555. };
  2556. #endif
  2557. #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373) || \
  2558. defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373_MODULE)
  2559. static struct platform_device bf5xx_adau1373_device = {
  2560. .name = "bfin-eval-adau1373",
  2561. };
  2562. #endif
  2563. #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701) || \
  2564. defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701_MODULE)
  2565. static struct platform_device bf5xx_adau1701_device = {
  2566. .name = "bfin-eval-adau1701",
  2567. };
  2568. #endif
  2569. static struct platform_device *stamp_devices[] __initdata = {
  2570. &bfin_dpmc,
  2571. #if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
  2572. &bfin_sport0_device,
  2573. #endif
  2574. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  2575. &bfin_pcmcia_cf_device,
  2576. #endif
  2577. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  2578. &rtc_device,
  2579. #endif
  2580. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  2581. &sl811_hcd_device,
  2582. #endif
  2583. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  2584. &isp1362_hcd_device,
  2585. #endif
  2586. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  2587. &bfin_isp1760_device,
  2588. #endif
  2589. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  2590. &smc91x_device,
  2591. #endif
  2592. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  2593. &dm9000_device,
  2594. #endif
  2595. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  2596. &bfin_can_device,
  2597. #endif
  2598. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  2599. &bfin_mii_bus,
  2600. &bfin_mac_device,
  2601. #endif
  2602. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  2603. &net2272_bfin_device,
  2604. #endif
  2605. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  2606. &bfin_spi0_device,
  2607. #endif
  2608. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  2609. &bfin_sport_spi0_device,
  2610. &bfin_sport_spi1_device,
  2611. #endif
  2612. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  2613. &bfin_fb_device,
  2614. #endif
  2615. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  2616. &bfin_lq035q1_device,
  2617. #endif
  2618. #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
  2619. || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
  2620. &bfin_capture_device,
  2621. #endif
  2622. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  2623. #ifdef CONFIG_SERIAL_BFIN_UART0
  2624. &bfin_uart0_device,
  2625. #endif
  2626. #ifdef CONFIG_SERIAL_BFIN_UART1
  2627. &bfin_uart1_device,
  2628. #endif
  2629. #endif
  2630. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  2631. #ifdef CONFIG_BFIN_SIR0
  2632. &bfin_sir0_device,
  2633. #endif
  2634. #ifdef CONFIG_BFIN_SIR1
  2635. &bfin_sir1_device,
  2636. #endif
  2637. #endif
  2638. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  2639. &i2c_bfin_twi_device,
  2640. #endif
  2641. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  2642. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2643. &bfin_sport0_uart_device,
  2644. #endif
  2645. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2646. &bfin_sport1_uart_device,
  2647. #endif
  2648. #endif
  2649. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  2650. &bfin_pata_device,
  2651. #endif
  2652. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  2653. &bfin_device_gpiokeys,
  2654. #endif
  2655. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  2656. &bfin_async_nand_device,
  2657. #endif
  2658. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  2659. &stamp_flash_device,
  2660. #endif
  2661. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  2662. &bfin_i2s_pcm,
  2663. #endif
  2664. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  2665. &bfin_ac97_pcm,
  2666. #endif
  2667. #if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
  2668. defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
  2669. &bfin_ad1836_machine,
  2670. #endif
  2671. #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
  2672. defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
  2673. &bfin_ad73311_machine,
  2674. #endif
  2675. #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
  2676. &bfin_ad73311_codec_device,
  2677. #endif
  2678. #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
  2679. &bfin_i2s,
  2680. #endif
  2681. #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
  2682. &bfin_ac97,
  2683. #endif
  2684. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  2685. #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
  2686. defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
  2687. &ad5398_virt_consumer_device,
  2688. #endif
  2689. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2690. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2691. &ad5398_userspace_consumer_device,
  2692. #endif
  2693. #endif
  2694. #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
  2695. &adp_switch_device,
  2696. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2697. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2698. &adp122_userspace_consumer_device,
  2699. #endif
  2700. #endif
  2701. #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
  2702. defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
  2703. &iio_gpio_trigger,
  2704. #endif
  2705. #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373) || \
  2706. defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373_MODULE)
  2707. &bf5xx_adau1373_device,
  2708. #endif
  2709. #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701) || \
  2710. defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701_MODULE)
  2711. &bf5xx_adau1701_device,
  2712. #endif
  2713. #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X) || \
  2714. defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X_MODULE)
  2715. &bfin_eval_adav801_device,
  2716. #endif
  2717. };
  2718. static int __init net2272_init(void)
  2719. {
  2720. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  2721. int ret;
  2722. ret = gpio_request(GPIO_PF6, "net2272");
  2723. if (ret)
  2724. return ret;
  2725. /* Reset the USB chip */
  2726. gpio_direction_output(GPIO_PF6, 0);
  2727. mdelay(2);
  2728. gpio_set_value(GPIO_PF6, 1);
  2729. #endif
  2730. return 0;
  2731. }
  2732. static int __init stamp_init(void)
  2733. {
  2734. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  2735. bfin_plat_nand_init();
  2736. adf702x_mac_init();
  2737. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  2738. i2c_register_board_info(0, bfin_i2c_board_info,
  2739. ARRAY_SIZE(bfin_i2c_board_info));
  2740. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  2741. if (net2272_init())
  2742. pr_warning("unable to configure net2272; it probably won't work\n");
  2743. return 0;
  2744. }
  2745. arch_initcall(stamp_init);
  2746. static struct platform_device *stamp_early_devices[] __initdata = {
  2747. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  2748. #ifdef CONFIG_SERIAL_BFIN_UART0
  2749. &bfin_uart0_device,
  2750. #endif
  2751. #ifdef CONFIG_SERIAL_BFIN_UART1
  2752. &bfin_uart1_device,
  2753. #endif
  2754. #endif
  2755. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  2756. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2757. &bfin_sport0_uart_device,
  2758. #endif
  2759. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2760. &bfin_sport1_uart_device,
  2761. #endif
  2762. #endif
  2763. };
  2764. void __init native_machine_early_platform_add_devices(void)
  2765. {
  2766. printk(KERN_INFO "register early platform devices\n");
  2767. early_platform_add_devices(stamp_early_devices,
  2768. ARRAY_SIZE(stamp_early_devices));
  2769. }
  2770. void native_machine_restart(char *cmd)
  2771. {
  2772. /* workaround reboot hang when booting from SPI */
  2773. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  2774. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  2775. }
  2776. /*
  2777. * Currently the MAC address is saved in Flash by U-Boot
  2778. */
  2779. #define FLASH_MAC 0x203f0000
  2780. int bfin_get_ether_addr(char *addr)
  2781. {
  2782. *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
  2783. *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
  2784. return 0;
  2785. }
  2786. EXPORT_SYMBOL(bfin_get_ether_addr);