kvm_mmu.h 4.0 KB

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  1. /*
  2. * Copyright (C) 2012,2013 - ARM Ltd
  3. * Author: Marc Zyngier <marc.zyngier@arm.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #ifndef __ARM64_KVM_MMU_H__
  18. #define __ARM64_KVM_MMU_H__
  19. #include <asm/page.h>
  20. #include <asm/memory.h>
  21. /*
  22. * As we only have the TTBR0_EL2 register, we cannot express
  23. * "negative" addresses. This makes it impossible to directly share
  24. * mappings with the kernel.
  25. *
  26. * Instead, give the HYP mode its own VA region at a fixed offset from
  27. * the kernel by just masking the top bits (which are all ones for a
  28. * kernel address).
  29. */
  30. #define HYP_PAGE_OFFSET_SHIFT VA_BITS
  31. #define HYP_PAGE_OFFSET_MASK ((UL(1) << HYP_PAGE_OFFSET_SHIFT) - 1)
  32. #define HYP_PAGE_OFFSET (PAGE_OFFSET & HYP_PAGE_OFFSET_MASK)
  33. /*
  34. * Our virtual mapping for the idmap-ed MMU-enable code. Must be
  35. * shared across all the page-tables. Conveniently, we use the last
  36. * possible page, where no kernel mapping will ever exist.
  37. */
  38. #define TRAMPOLINE_VA (HYP_PAGE_OFFSET_MASK & PAGE_MASK)
  39. #ifdef __ASSEMBLY__
  40. /*
  41. * Convert a kernel VA into a HYP VA.
  42. * reg: VA to be converted.
  43. */
  44. .macro kern_hyp_va reg
  45. and \reg, \reg, #HYP_PAGE_OFFSET_MASK
  46. .endm
  47. #else
  48. #include <asm/cachetype.h>
  49. #include <asm/cacheflush.h>
  50. #define KERN_TO_HYP(kva) ((unsigned long)kva - PAGE_OFFSET + HYP_PAGE_OFFSET)
  51. /*
  52. * Align KVM with the kernel's view of physical memory. Should be
  53. * 40bit IPA, with PGD being 8kB aligned in the 4KB page configuration.
  54. */
  55. #define KVM_PHYS_SHIFT PHYS_MASK_SHIFT
  56. #define KVM_PHYS_SIZE (1UL << KVM_PHYS_SHIFT)
  57. #define KVM_PHYS_MASK (KVM_PHYS_SIZE - 1UL)
  58. /* Make sure we get the right size, and thus the right alignment */
  59. #define PTRS_PER_S2_PGD (1 << (KVM_PHYS_SHIFT - PGDIR_SHIFT))
  60. #define S2_PGD_ORDER get_order(PTRS_PER_S2_PGD * sizeof(pgd_t))
  61. int create_hyp_mappings(void *from, void *to);
  62. int create_hyp_io_mappings(void *from, void *to, phys_addr_t);
  63. void free_boot_hyp_pgd(void);
  64. void free_hyp_pgds(void);
  65. int kvm_alloc_stage2_pgd(struct kvm *kvm);
  66. void kvm_free_stage2_pgd(struct kvm *kvm);
  67. int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
  68. phys_addr_t pa, unsigned long size);
  69. int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run);
  70. void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu);
  71. phys_addr_t kvm_mmu_get_httbr(void);
  72. phys_addr_t kvm_mmu_get_boot_httbr(void);
  73. phys_addr_t kvm_get_idmap_vector(void);
  74. int kvm_mmu_init(void);
  75. void kvm_clear_hyp_idmap(void);
  76. #define kvm_set_pte(ptep, pte) set_pte(ptep, pte)
  77. static inline bool kvm_is_write_fault(unsigned long esr)
  78. {
  79. unsigned long esr_ec = esr >> ESR_EL2_EC_SHIFT;
  80. if (esr_ec == ESR_EL2_EC_IABT)
  81. return false;
  82. if ((esr & ESR_EL2_ISV) && !(esr & ESR_EL2_WNR))
  83. return false;
  84. return true;
  85. }
  86. static inline void kvm_clean_dcache_area(void *addr, size_t size) {}
  87. static inline void kvm_clean_pgd(pgd_t *pgd) {}
  88. static inline void kvm_clean_pmd_entry(pmd_t *pmd) {}
  89. static inline void kvm_clean_pte(pte_t *pte) {}
  90. static inline void kvm_clean_pte_entry(pte_t *pte) {}
  91. static inline void kvm_set_s2pte_writable(pte_t *pte)
  92. {
  93. pte_val(*pte) |= PTE_S2_RDWR;
  94. }
  95. struct kvm;
  96. static inline void coherent_icache_guest_page(struct kvm *kvm, gfn_t gfn)
  97. {
  98. if (!icache_is_aliasing()) { /* PIPT */
  99. unsigned long hva = gfn_to_hva(kvm, gfn);
  100. flush_icache_range(hva, hva + PAGE_SIZE);
  101. } else if (!icache_is_aivivt()) { /* non ASID-tagged VIVT */
  102. /* any kind of VIPT cache */
  103. __flush_icache_all();
  104. }
  105. }
  106. #define kvm_flush_dcache_to_poc(a,l) __flush_dcache_area((a), (l))
  107. #endif /* __ASSEMBLY__ */
  108. #endif /* __ARM64_KVM_MMU_H__ */