vt8500.c 4.5 KB

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  1. /*
  2. * arch/arm/mach-vt8500/vt8500.c
  3. *
  4. * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/clocksource.h>
  21. #include <linux/io.h>
  22. #include <linux/pm.h>
  23. #include <linux/reboot.h>
  24. #include <asm/mach-types.h>
  25. #include <asm/mach/arch.h>
  26. #include <asm/mach/time.h>
  27. #include <asm/mach/map.h>
  28. #include <linux/of.h>
  29. #include <linux/of_address.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/of_platform.h>
  32. #include "common.h"
  33. #define LEGACY_GPIO_BASE 0xD8110000
  34. #define LEGACY_PMC_BASE 0xD8130000
  35. /* Registers in GPIO Controller */
  36. #define VT8500_GPIO_MUX_REG 0x200
  37. /* Registers in Power Management Controller */
  38. #define VT8500_HCR_REG 0x12
  39. #define VT8500_PMSR_REG 0x60
  40. static void __iomem *pmc_base;
  41. void vt8500_restart(enum reboot_mode mode, const char *cmd)
  42. {
  43. if (pmc_base)
  44. writel(1, pmc_base + VT8500_PMSR_REG);
  45. }
  46. static struct map_desc vt8500_io_desc[] __initdata = {
  47. /* SoC MMIO registers */
  48. [0] = {
  49. .virtual = 0xf8000000,
  50. .pfn = __phys_to_pfn(0xd8000000),
  51. .length = 0x00390000, /* max of all chip variants */
  52. .type = MT_DEVICE
  53. },
  54. };
  55. void __init vt8500_map_io(void)
  56. {
  57. iotable_init(vt8500_io_desc, ARRAY_SIZE(vt8500_io_desc));
  58. }
  59. static void vt8500_power_off(void)
  60. {
  61. local_irq_disable();
  62. writew(5, pmc_base + VT8500_HCR_REG);
  63. asm("mcr%? p15, 0, %0, c7, c0, 4" : : "r" (0));
  64. }
  65. void __init vt8500_init(void)
  66. {
  67. struct device_node *np;
  68. #if defined(CONFIG_FB_VT8500) || defined(CONFIG_FB_WM8505)
  69. struct device_node *fb;
  70. void __iomem *gpio_base;
  71. #endif
  72. #ifdef CONFIG_FB_VT8500
  73. fb = of_find_compatible_node(NULL, NULL, "via,vt8500-fb");
  74. if (fb) {
  75. np = of_find_compatible_node(NULL, NULL, "via,vt8500-gpio");
  76. if (np) {
  77. gpio_base = of_iomap(np, 0);
  78. if (!gpio_base)
  79. pr_err("%s: of_iomap(gpio_mux) failed\n",
  80. __func__);
  81. of_node_put(np);
  82. } else {
  83. gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
  84. if (!gpio_base)
  85. pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
  86. __func__);
  87. }
  88. if (gpio_base) {
  89. writel(readl(gpio_base + VT8500_GPIO_MUX_REG) | 1,
  90. gpio_base + VT8500_GPIO_MUX_REG);
  91. iounmap(gpio_base);
  92. } else
  93. pr_err("%s: Could not remap GPIO mux\n", __func__);
  94. of_node_put(fb);
  95. }
  96. #endif
  97. #ifdef CONFIG_FB_WM8505
  98. fb = of_find_compatible_node(NULL, NULL, "wm,wm8505-fb");
  99. if (fb) {
  100. np = of_find_compatible_node(NULL, NULL, "wm,wm8505-gpio");
  101. if (!np)
  102. np = of_find_compatible_node(NULL, NULL,
  103. "wm,wm8650-gpio");
  104. if (np) {
  105. gpio_base = of_iomap(np, 0);
  106. if (!gpio_base)
  107. pr_err("%s: of_iomap(gpio_mux) failed\n",
  108. __func__);
  109. of_node_put(np);
  110. } else {
  111. gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
  112. if (!gpio_base)
  113. pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
  114. __func__);
  115. }
  116. if (gpio_base) {
  117. writel(readl(gpio_base + VT8500_GPIO_MUX_REG) |
  118. 0x80000000, gpio_base + VT8500_GPIO_MUX_REG);
  119. iounmap(gpio_base);
  120. } else
  121. pr_err("%s: Could not remap GPIO mux\n", __func__);
  122. of_node_put(fb);
  123. }
  124. #endif
  125. np = of_find_compatible_node(NULL, NULL, "via,vt8500-pmc");
  126. if (np) {
  127. pmc_base = of_iomap(np, 0);
  128. if (!pmc_base)
  129. pr_err("%s:of_iomap(pmc) failed\n", __func__);
  130. of_node_put(np);
  131. } else {
  132. pmc_base = ioremap(LEGACY_PMC_BASE, 0x1000);
  133. if (!pmc_base)
  134. pr_err("%s:ioremap(power_off) failed\n", __func__);
  135. }
  136. if (pmc_base)
  137. pm_power_off = &vt8500_power_off;
  138. else
  139. pr_err("%s: PMC Hibernation register could not be remapped, not enabling power off!\n", __func__);
  140. vtwm_clk_init(pmc_base);
  141. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  142. }
  143. static const char * const vt8500_dt_compat[] = {
  144. "via,vt8500",
  145. "wm,wm8650",
  146. "wm,wm8505",
  147. "wm,wm8750",
  148. "wm,wm8850",
  149. NULL
  150. };
  151. DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
  152. .dt_compat = vt8500_dt_compat,
  153. .map_io = vt8500_map_io,
  154. .init_machine = vt8500_init,
  155. .init_time = clocksource_of_init,
  156. .restart = vt8500_restart,
  157. MACHINE_END