clk.c 1.5 KB

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  1. #include <linux/clk.h>
  2. #include <linux/err.h>
  3. #include <linux/of.h>
  4. #include <linux/slab.h>
  5. #include <linux/spinlock.h>
  6. #include "clk.h"
  7. DEFINE_SPINLOCK(imx_ccm_lock);
  8. static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
  9. {
  10. struct of_phandle_args phandle;
  11. struct clk *clk = ERR_PTR(-ENODEV);
  12. char *path;
  13. path = kasprintf(GFP_KERNEL, "/clocks/%s", name);
  14. if (!path)
  15. return ERR_PTR(-ENOMEM);
  16. phandle.np = of_find_node_by_path(path);
  17. kfree(path);
  18. if (phandle.np) {
  19. clk = of_clk_get_from_provider(&phandle);
  20. of_node_put(phandle.np);
  21. }
  22. return clk;
  23. }
  24. struct clk * __init imx_obtain_fixed_clock(
  25. const char *name, unsigned long rate)
  26. {
  27. struct clk *clk;
  28. clk = imx_obtain_fixed_clock_from_dt(name);
  29. if (IS_ERR(clk))
  30. clk = imx_clk_fixed(name, rate);
  31. return clk;
  32. }
  33. /*
  34. * This fixups the register CCM_CSCMR1 write value.
  35. * The write/read/divider values of the aclk_podf field
  36. * of that register have the relationship described by
  37. * the following table:
  38. *
  39. * write value read value divider
  40. * 3b'000 3b'110 7
  41. * 3b'001 3b'111 8
  42. * 3b'010 3b'100 5
  43. * 3b'011 3b'101 6
  44. * 3b'100 3b'010 3
  45. * 3b'101 3b'011 4
  46. * 3b'110 3b'000 1
  47. * 3b'111 3b'001 2(default)
  48. *
  49. * That's why we do the xor operation below.
  50. */
  51. #define CSCMR1_FIXUP 0x00600000
  52. void imx_cscmr1_fixup(u32 *val)
  53. {
  54. *val ^= CSCMR1_FIXUP;
  55. return;
  56. }