smp.c 15 KB

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  1. /*
  2. * linux/arch/arm/kernel/smp.c
  3. *
  4. * Copyright (C) 2002 ARM Limited, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/sched.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/cache.h>
  17. #include <linux/profile.h>
  18. #include <linux/errno.h>
  19. #include <linux/mm.h>
  20. #include <linux/err.h>
  21. #include <linux/cpu.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/irq.h>
  24. #include <linux/percpu.h>
  25. #include <linux/clockchips.h>
  26. #include <linux/completion.h>
  27. #include <linux/cpufreq.h>
  28. #include <linux/atomic.h>
  29. #include <asm/smp.h>
  30. #include <asm/cacheflush.h>
  31. #include <asm/cpu.h>
  32. #include <asm/cputype.h>
  33. #include <asm/exception.h>
  34. #include <asm/idmap.h>
  35. #include <asm/topology.h>
  36. #include <asm/mmu_context.h>
  37. #include <asm/pgtable.h>
  38. #include <asm/pgalloc.h>
  39. #include <asm/processor.h>
  40. #include <asm/sections.h>
  41. #include <asm/tlbflush.h>
  42. #include <asm/ptrace.h>
  43. #include <asm/smp_plat.h>
  44. #include <asm/virt.h>
  45. #include <asm/mach/arch.h>
  46. #include <asm/mpu.h>
  47. /*
  48. * as from 2.5, kernels no longer have an init_tasks structure
  49. * so we need some other way of telling a new secondary core
  50. * where to place its SVC stack
  51. */
  52. struct secondary_data secondary_data;
  53. /*
  54. * control for which core is the next to come out of the secondary
  55. * boot "holding pen"
  56. */
  57. volatile int pen_release = -1;
  58. enum ipi_msg_type {
  59. IPI_WAKEUP,
  60. IPI_TIMER,
  61. IPI_RESCHEDULE,
  62. IPI_CALL_FUNC,
  63. IPI_CALL_FUNC_SINGLE,
  64. IPI_CPU_STOP,
  65. };
  66. static DECLARE_COMPLETION(cpu_running);
  67. static struct smp_operations smp_ops;
  68. void __init smp_set_ops(struct smp_operations *ops)
  69. {
  70. if (ops)
  71. smp_ops = *ops;
  72. };
  73. static unsigned long get_arch_pgd(pgd_t *pgd)
  74. {
  75. phys_addr_t pgdir = virt_to_phys(pgd);
  76. BUG_ON(pgdir & ARCH_PGD_MASK);
  77. return pgdir >> ARCH_PGD_SHIFT;
  78. }
  79. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  80. {
  81. int ret;
  82. /*
  83. * We need to tell the secondary core where to find
  84. * its stack and the page tables.
  85. */
  86. secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
  87. #ifdef CONFIG_ARM_MPU
  88. secondary_data.mpu_rgn_szr = mpu_rgn_info.rgns[MPU_RAM_REGION].drsr;
  89. #endif
  90. #ifdef CONFIG_MMU
  91. secondary_data.pgdir = get_arch_pgd(idmap_pgd);
  92. secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
  93. #endif
  94. __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data));
  95. outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1));
  96. /*
  97. * Now bring the CPU into our world.
  98. */
  99. ret = boot_secondary(cpu, idle);
  100. if (ret == 0) {
  101. /*
  102. * CPU was successfully started, wait for it
  103. * to come online or time out.
  104. */
  105. wait_for_completion_timeout(&cpu_running,
  106. msecs_to_jiffies(1000));
  107. if (!cpu_online(cpu)) {
  108. pr_crit("CPU%u: failed to come online\n", cpu);
  109. ret = -EIO;
  110. }
  111. } else {
  112. pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
  113. }
  114. memset(&secondary_data, 0, sizeof(secondary_data));
  115. return ret;
  116. }
  117. /* platform specific SMP operations */
  118. void __init smp_init_cpus(void)
  119. {
  120. if (smp_ops.smp_init_cpus)
  121. smp_ops.smp_init_cpus();
  122. }
  123. int boot_secondary(unsigned int cpu, struct task_struct *idle)
  124. {
  125. if (smp_ops.smp_boot_secondary)
  126. return smp_ops.smp_boot_secondary(cpu, idle);
  127. return -ENOSYS;
  128. }
  129. int platform_can_cpu_hotplug(void)
  130. {
  131. #ifdef CONFIG_HOTPLUG_CPU
  132. if (smp_ops.cpu_kill)
  133. return 1;
  134. #endif
  135. return 0;
  136. }
  137. #ifdef CONFIG_HOTPLUG_CPU
  138. static int platform_cpu_kill(unsigned int cpu)
  139. {
  140. if (smp_ops.cpu_kill)
  141. return smp_ops.cpu_kill(cpu);
  142. return 1;
  143. }
  144. static int platform_cpu_disable(unsigned int cpu)
  145. {
  146. if (smp_ops.cpu_disable)
  147. return smp_ops.cpu_disable(cpu);
  148. /*
  149. * By default, allow disabling all CPUs except the first one,
  150. * since this is special on a lot of platforms, e.g. because
  151. * of clock tick interrupts.
  152. */
  153. return cpu == 0 ? -EPERM : 0;
  154. }
  155. /*
  156. * __cpu_disable runs on the processor to be shutdown.
  157. */
  158. int __cpu_disable(void)
  159. {
  160. unsigned int cpu = smp_processor_id();
  161. int ret;
  162. ret = platform_cpu_disable(cpu);
  163. if (ret)
  164. return ret;
  165. /*
  166. * Take this CPU offline. Once we clear this, we can't return,
  167. * and we must not schedule until we're ready to give up the cpu.
  168. */
  169. set_cpu_online(cpu, false);
  170. /*
  171. * OK - migrate IRQs away from this CPU
  172. */
  173. migrate_irqs();
  174. /*
  175. * Flush user cache and TLB mappings, and then remove this CPU
  176. * from the vm mask set of all processes.
  177. *
  178. * Caches are flushed to the Level of Unification Inner Shareable
  179. * to write-back dirty lines to unified caches shared by all CPUs.
  180. */
  181. flush_cache_louis();
  182. local_flush_tlb_all();
  183. clear_tasks_mm_cpumask(cpu);
  184. return 0;
  185. }
  186. static DECLARE_COMPLETION(cpu_died);
  187. /*
  188. * called on the thread which is asking for a CPU to be shutdown -
  189. * waits until shutdown has completed, or it is timed out.
  190. */
  191. void __cpu_die(unsigned int cpu)
  192. {
  193. if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
  194. pr_err("CPU%u: cpu didn't die\n", cpu);
  195. return;
  196. }
  197. printk(KERN_NOTICE "CPU%u: shutdown\n", cpu);
  198. /*
  199. * platform_cpu_kill() is generally expected to do the powering off
  200. * and/or cutting of clocks to the dying CPU. Optionally, this may
  201. * be done by the CPU which is dying in preference to supporting
  202. * this call, but that means there is _no_ synchronisation between
  203. * the requesting CPU and the dying CPU actually losing power.
  204. */
  205. if (!platform_cpu_kill(cpu))
  206. printk("CPU%u: unable to kill\n", cpu);
  207. }
  208. /*
  209. * Called from the idle thread for the CPU which has been shutdown.
  210. *
  211. * Note that we disable IRQs here, but do not re-enable them
  212. * before returning to the caller. This is also the behaviour
  213. * of the other hotplug-cpu capable cores, so presumably coming
  214. * out of idle fixes this.
  215. */
  216. void __ref cpu_die(void)
  217. {
  218. unsigned int cpu = smp_processor_id();
  219. idle_task_exit();
  220. local_irq_disable();
  221. /*
  222. * Flush the data out of the L1 cache for this CPU. This must be
  223. * before the completion to ensure that data is safely written out
  224. * before platform_cpu_kill() gets called - which may disable
  225. * *this* CPU and power down its cache.
  226. */
  227. flush_cache_louis();
  228. /*
  229. * Tell __cpu_die() that this CPU is now safe to dispose of. Once
  230. * this returns, power and/or clocks can be removed at any point
  231. * from this CPU and its cache by platform_cpu_kill().
  232. */
  233. complete(&cpu_died);
  234. /*
  235. * Ensure that the cache lines associated with that completion are
  236. * written out. This covers the case where _this_ CPU is doing the
  237. * powering down, to ensure that the completion is visible to the
  238. * CPU waiting for this one.
  239. */
  240. flush_cache_louis();
  241. /*
  242. * The actual CPU shutdown procedure is at least platform (if not
  243. * CPU) specific. This may remove power, or it may simply spin.
  244. *
  245. * Platforms are generally expected *NOT* to return from this call,
  246. * although there are some which do because they have no way to
  247. * power down the CPU. These platforms are the _only_ reason we
  248. * have a return path which uses the fragment of assembly below.
  249. *
  250. * The return path should not be used for platforms which can
  251. * power off the CPU.
  252. */
  253. if (smp_ops.cpu_die)
  254. smp_ops.cpu_die(cpu);
  255. /*
  256. * Do not return to the idle loop - jump back to the secondary
  257. * cpu initialisation. There's some initialisation which needs
  258. * to be repeated to undo the effects of taking the CPU offline.
  259. */
  260. __asm__("mov sp, %0\n"
  261. " mov fp, #0\n"
  262. " b secondary_start_kernel"
  263. :
  264. : "r" (task_stack_page(current) + THREAD_SIZE - 8));
  265. }
  266. #endif /* CONFIG_HOTPLUG_CPU */
  267. /*
  268. * Called by both boot and secondaries to move global data into
  269. * per-processor storage.
  270. */
  271. static void smp_store_cpu_info(unsigned int cpuid)
  272. {
  273. struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
  274. cpu_info->loops_per_jiffy = loops_per_jiffy;
  275. cpu_info->cpuid = read_cpuid_id();
  276. store_cpu_topology(cpuid);
  277. }
  278. /*
  279. * This is the secondary CPU boot entry. We're using this CPUs
  280. * idle thread stack, but a set of temporary page tables.
  281. */
  282. asmlinkage void secondary_start_kernel(void)
  283. {
  284. struct mm_struct *mm = &init_mm;
  285. unsigned int cpu;
  286. /*
  287. * The identity mapping is uncached (strongly ordered), so
  288. * switch away from it before attempting any exclusive accesses.
  289. */
  290. cpu_switch_mm(mm->pgd, mm);
  291. local_flush_bp_all();
  292. enter_lazy_tlb(mm, current);
  293. local_flush_tlb_all();
  294. /*
  295. * All kernel threads share the same mm context; grab a
  296. * reference and switch to it.
  297. */
  298. cpu = smp_processor_id();
  299. atomic_inc(&mm->mm_count);
  300. current->active_mm = mm;
  301. cpumask_set_cpu(cpu, mm_cpumask(mm));
  302. cpu_init();
  303. printk("CPU%u: Booted secondary processor\n", cpu);
  304. preempt_disable();
  305. trace_hardirqs_off();
  306. /*
  307. * Give the platform a chance to do its own initialisation.
  308. */
  309. if (smp_ops.smp_secondary_init)
  310. smp_ops.smp_secondary_init(cpu);
  311. notify_cpu_starting(cpu);
  312. calibrate_delay();
  313. smp_store_cpu_info(cpu);
  314. /*
  315. * OK, now it's safe to let the boot CPU continue. Wait for
  316. * the CPU migration code to notice that the CPU is online
  317. * before we continue - which happens after __cpu_up returns.
  318. */
  319. set_cpu_online(cpu, true);
  320. complete(&cpu_running);
  321. local_irq_enable();
  322. local_fiq_enable();
  323. /*
  324. * OK, it's off to the idle thread for us
  325. */
  326. cpu_startup_entry(CPUHP_ONLINE);
  327. }
  328. void __init smp_cpus_done(unsigned int max_cpus)
  329. {
  330. printk(KERN_INFO "SMP: Total of %d processors activated.\n",
  331. num_online_cpus());
  332. hyp_mode_check();
  333. }
  334. void __init smp_prepare_boot_cpu(void)
  335. {
  336. set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
  337. }
  338. void __init smp_prepare_cpus(unsigned int max_cpus)
  339. {
  340. unsigned int ncores = num_possible_cpus();
  341. init_cpu_topology();
  342. smp_store_cpu_info(smp_processor_id());
  343. /*
  344. * are we trying to boot more cores than exist?
  345. */
  346. if (max_cpus > ncores)
  347. max_cpus = ncores;
  348. if (ncores > 1 && max_cpus) {
  349. /*
  350. * Initialise the present map, which describes the set of CPUs
  351. * actually populated at the present time. A platform should
  352. * re-initialize the map in the platforms smp_prepare_cpus()
  353. * if present != possible (e.g. physical hotplug).
  354. */
  355. init_cpu_present(cpu_possible_mask);
  356. /*
  357. * Initialise the SCU if there are more than one CPU
  358. * and let them know where to start.
  359. */
  360. if (smp_ops.smp_prepare_cpus)
  361. smp_ops.smp_prepare_cpus(max_cpus);
  362. }
  363. }
  364. static void (*smp_cross_call)(const struct cpumask *, unsigned int);
  365. void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
  366. {
  367. if (!smp_cross_call)
  368. smp_cross_call = fn;
  369. }
  370. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  371. {
  372. smp_cross_call(mask, IPI_CALL_FUNC);
  373. }
  374. void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
  375. {
  376. smp_cross_call(mask, IPI_WAKEUP);
  377. }
  378. void arch_send_call_function_single_ipi(int cpu)
  379. {
  380. smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
  381. }
  382. static const char *ipi_types[NR_IPI] = {
  383. #define S(x,s) [x] = s
  384. S(IPI_WAKEUP, "CPU wakeup interrupts"),
  385. S(IPI_TIMER, "Timer broadcast interrupts"),
  386. S(IPI_RESCHEDULE, "Rescheduling interrupts"),
  387. S(IPI_CALL_FUNC, "Function call interrupts"),
  388. S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
  389. S(IPI_CPU_STOP, "CPU stop interrupts"),
  390. };
  391. void show_ipi_list(struct seq_file *p, int prec)
  392. {
  393. unsigned int cpu, i;
  394. for (i = 0; i < NR_IPI; i++) {
  395. seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
  396. for_each_online_cpu(cpu)
  397. seq_printf(p, "%10u ",
  398. __get_irq_stat(cpu, ipi_irqs[i]));
  399. seq_printf(p, " %s\n", ipi_types[i]);
  400. }
  401. }
  402. u64 smp_irq_stat_cpu(unsigned int cpu)
  403. {
  404. u64 sum = 0;
  405. int i;
  406. for (i = 0; i < NR_IPI; i++)
  407. sum += __get_irq_stat(cpu, ipi_irqs[i]);
  408. return sum;
  409. }
  410. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  411. void tick_broadcast(const struct cpumask *mask)
  412. {
  413. smp_cross_call(mask, IPI_TIMER);
  414. }
  415. #endif
  416. static DEFINE_RAW_SPINLOCK(stop_lock);
  417. /*
  418. * ipi_cpu_stop - handle IPI from smp_send_stop()
  419. */
  420. static void ipi_cpu_stop(unsigned int cpu)
  421. {
  422. if (system_state == SYSTEM_BOOTING ||
  423. system_state == SYSTEM_RUNNING) {
  424. raw_spin_lock(&stop_lock);
  425. printk(KERN_CRIT "CPU%u: stopping\n", cpu);
  426. dump_stack();
  427. raw_spin_unlock(&stop_lock);
  428. }
  429. set_cpu_online(cpu, false);
  430. local_fiq_disable();
  431. local_irq_disable();
  432. while (1)
  433. cpu_relax();
  434. }
  435. /*
  436. * Main handler for inter-processor interrupts
  437. */
  438. asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
  439. {
  440. handle_IPI(ipinr, regs);
  441. }
  442. void handle_IPI(int ipinr, struct pt_regs *regs)
  443. {
  444. unsigned int cpu = smp_processor_id();
  445. struct pt_regs *old_regs = set_irq_regs(regs);
  446. if (ipinr < NR_IPI)
  447. __inc_irq_stat(cpu, ipi_irqs[ipinr]);
  448. switch (ipinr) {
  449. case IPI_WAKEUP:
  450. break;
  451. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  452. case IPI_TIMER:
  453. irq_enter();
  454. tick_receive_broadcast();
  455. irq_exit();
  456. break;
  457. #endif
  458. case IPI_RESCHEDULE:
  459. scheduler_ipi();
  460. break;
  461. case IPI_CALL_FUNC:
  462. irq_enter();
  463. generic_smp_call_function_interrupt();
  464. irq_exit();
  465. break;
  466. case IPI_CALL_FUNC_SINGLE:
  467. irq_enter();
  468. generic_smp_call_function_single_interrupt();
  469. irq_exit();
  470. break;
  471. case IPI_CPU_STOP:
  472. irq_enter();
  473. ipi_cpu_stop(cpu);
  474. irq_exit();
  475. break;
  476. default:
  477. printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%x\n",
  478. cpu, ipinr);
  479. break;
  480. }
  481. set_irq_regs(old_regs);
  482. }
  483. void smp_send_reschedule(int cpu)
  484. {
  485. smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
  486. }
  487. void smp_send_stop(void)
  488. {
  489. unsigned long timeout;
  490. struct cpumask mask;
  491. cpumask_copy(&mask, cpu_online_mask);
  492. cpumask_clear_cpu(smp_processor_id(), &mask);
  493. if (!cpumask_empty(&mask))
  494. smp_cross_call(&mask, IPI_CPU_STOP);
  495. /* Wait up to one second for other CPUs to stop */
  496. timeout = USEC_PER_SEC;
  497. while (num_online_cpus() > 1 && timeout--)
  498. udelay(1);
  499. if (num_online_cpus() > 1)
  500. pr_warning("SMP: failed to stop secondary CPUs\n");
  501. }
  502. /*
  503. * not supported here
  504. */
  505. int setup_profiling_timer(unsigned int multiplier)
  506. {
  507. return -EINVAL;
  508. }
  509. #ifdef CONFIG_CPU_FREQ
  510. static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
  511. static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
  512. static unsigned long global_l_p_j_ref;
  513. static unsigned long global_l_p_j_ref_freq;
  514. static int cpufreq_callback(struct notifier_block *nb,
  515. unsigned long val, void *data)
  516. {
  517. struct cpufreq_freqs *freq = data;
  518. int cpu = freq->cpu;
  519. if (freq->flags & CPUFREQ_CONST_LOOPS)
  520. return NOTIFY_OK;
  521. if (!per_cpu(l_p_j_ref, cpu)) {
  522. per_cpu(l_p_j_ref, cpu) =
  523. per_cpu(cpu_data, cpu).loops_per_jiffy;
  524. per_cpu(l_p_j_ref_freq, cpu) = freq->old;
  525. if (!global_l_p_j_ref) {
  526. global_l_p_j_ref = loops_per_jiffy;
  527. global_l_p_j_ref_freq = freq->old;
  528. }
  529. }
  530. if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
  531. (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
  532. (val == CPUFREQ_RESUMECHANGE || val == CPUFREQ_SUSPENDCHANGE)) {
  533. loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
  534. global_l_p_j_ref_freq,
  535. freq->new);
  536. per_cpu(cpu_data, cpu).loops_per_jiffy =
  537. cpufreq_scale(per_cpu(l_p_j_ref, cpu),
  538. per_cpu(l_p_j_ref_freq, cpu),
  539. freq->new);
  540. }
  541. return NOTIFY_OK;
  542. }
  543. static struct notifier_block cpufreq_notifier = {
  544. .notifier_call = cpufreq_callback,
  545. };
  546. static int __init register_cpufreq_notifier(void)
  547. {
  548. return cpufreq_register_notifier(&cpufreq_notifier,
  549. CPUFREQ_TRANSITION_NOTIFIER);
  550. }
  551. core_initcall(register_cpufreq_notifier);
  552. #endif