stih41x.dtsi 737 B

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. cpus {
  5. #address-cells = <1>;
  6. #size-cells = <0>;
  7. cpu@0 {
  8. device_type = "cpu";
  9. compatible = "arm,cortex-a9";
  10. reg = <0>;
  11. };
  12. cpu@1 {
  13. device_type = "cpu";
  14. compatible = "arm,cortex-a9";
  15. reg = <1>;
  16. };
  17. };
  18. intc: interrupt-controller@fffe1000 {
  19. compatible = "arm,cortex-a9-gic";
  20. #interrupt-cells = <3>;
  21. interrupt-controller;
  22. reg = <0xfffe1000 0x1000>,
  23. <0xfffe0100 0x100>;
  24. };
  25. scu@fffe0000 {
  26. compatible = "arm,cortex-a9-scu";
  27. reg = <0xfffe0000 0x1000>;
  28. };
  29. timer@fffe0200 {
  30. interrupt-parent = <&intc>;
  31. compatible = "arm,cortex-a9-global-timer";
  32. reg = <0xfffe0200 0x100>;
  33. interrupts = <1 11 0x04>;
  34. clocks = <&arm_periph_clk>;
  35. };
  36. };