spear13xx.dtsi 7.2 KB

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  1. /*
  2. * DTS file for all SPEAr13xx SoCs
  3. *
  4. * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  5. *
  6. * The code contained herein is licensed under the GNU General Public
  7. * License. You may obtain a copy of the GNU General Public License
  8. * Version 2 or later at the following locations:
  9. *
  10. * http://www.opensource.org/licenses/gpl-license.html
  11. * http://www.gnu.org/copyleft/gpl.html
  12. */
  13. /include/ "skeleton.dtsi"
  14. / {
  15. interrupt-parent = <&gic>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. cpu@0 {
  20. compatible = "arm,cortex-a9";
  21. device_type = "cpu";
  22. reg = <0>;
  23. next-level-cache = <&L2>;
  24. };
  25. cpu@1 {
  26. compatible = "arm,cortex-a9";
  27. device_type = "cpu";
  28. reg = <1>;
  29. next-level-cache = <&L2>;
  30. };
  31. };
  32. gic: interrupt-controller@ec801000 {
  33. compatible = "arm,cortex-a9-gic";
  34. interrupt-controller;
  35. #interrupt-cells = <3>;
  36. reg = < 0xec801000 0x1000 >,
  37. < 0xec800100 0x0100 >;
  38. };
  39. pmu {
  40. compatible = "arm,cortex-a9-pmu";
  41. interrupts = <0 6 0x04
  42. 0 7 0x04>;
  43. };
  44. L2: l2-cache {
  45. compatible = "arm,pl310-cache";
  46. reg = <0xed000000 0x1000>;
  47. cache-unified;
  48. cache-level = <2>;
  49. };
  50. memory {
  51. name = "memory";
  52. device_type = "memory";
  53. reg = <0 0x40000000>;
  54. };
  55. chosen {
  56. bootargs = "console=ttyAMA0,115200";
  57. };
  58. cpufreq {
  59. compatible = "st,cpufreq-spear";
  60. cpufreq_tbl = < 166000
  61. 200000
  62. 250000
  63. 300000
  64. 400000
  65. 500000
  66. 600000 >;
  67. status = "disabled";
  68. };
  69. ahb {
  70. #address-cells = <1>;
  71. #size-cells = <1>;
  72. compatible = "simple-bus";
  73. ranges = <0x50000000 0x50000000 0x10000000
  74. 0xb0000000 0xb0000000 0x10000000
  75. 0xd0000000 0xd0000000 0x02000000
  76. 0xd8000000 0xd8000000 0x01000000
  77. 0xe0000000 0xe0000000 0x10000000>;
  78. sdhci@b3000000 {
  79. compatible = "st,sdhci-spear";
  80. reg = <0xb3000000 0x100>;
  81. interrupts = <0 28 0x4>;
  82. status = "disabled";
  83. };
  84. cf@b2800000 {
  85. compatible = "arasan,cf-spear1340";
  86. reg = <0xb2800000 0x1000>;
  87. interrupts = <0 29 0x4>;
  88. status = "disabled";
  89. dmas = <&dwdma0 0 0 0 0>;
  90. dma-names = "data";
  91. };
  92. dwdma0: dma@ea800000 {
  93. compatible = "snps,dma-spear1340";
  94. reg = <0xea800000 0x1000>;
  95. interrupts = <0 19 0x4>;
  96. status = "disabled";
  97. dma-channels = <8>;
  98. #dma-cells = <3>;
  99. dma-requests = <32>;
  100. chan_allocation_order = <1>;
  101. chan_priority = <1>;
  102. block_size = <0xfff>;
  103. dma-masters = <2>;
  104. data_width = <3 3 0 0>;
  105. };
  106. dma@eb000000 {
  107. compatible = "snps,dma-spear1340";
  108. reg = <0xeb000000 0x1000>;
  109. interrupts = <0 59 0x4>;
  110. status = "disabled";
  111. dma-requests = <32>;
  112. dma-channels = <8>;
  113. dma-masters = <2>;
  114. #dma-cells = <3>;
  115. chan_allocation_order = <1>;
  116. chan_priority = <1>;
  117. block_size = <0xfff>;
  118. data_width = <3 3 0 0>;
  119. };
  120. fsmc: flash@b0000000 {
  121. compatible = "st,spear600-fsmc-nand";
  122. #address-cells = <1>;
  123. #size-cells = <1>;
  124. reg = <0xb0000000 0x1000 /* FSMC Register*/
  125. 0xb0800000 0x0010 /* NAND Base DATA */
  126. 0xb0820000 0x0010 /* NAND Base ADDR */
  127. 0xb0810000 0x0010>; /* NAND Base CMD */
  128. reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
  129. interrupts = <0 20 0x4
  130. 0 21 0x4
  131. 0 22 0x4
  132. 0 23 0x4>;
  133. st,mode = <2>;
  134. status = "disabled";
  135. };
  136. gmac0: eth@e2000000 {
  137. compatible = "st,spear600-gmac";
  138. reg = <0xe2000000 0x8000>;
  139. interrupts = <0 33 0x4
  140. 0 34 0x4>;
  141. interrupt-names = "macirq", "eth_wake_irq";
  142. status = "disabled";
  143. };
  144. pcm {
  145. compatible = "st,pcm-audio";
  146. #address-cells = <0>;
  147. #size-cells = <0>;
  148. status = "disabled";
  149. };
  150. smi: flash@ea000000 {
  151. compatible = "st,spear600-smi";
  152. #address-cells = <1>;
  153. #size-cells = <1>;
  154. reg = <0xea000000 0x1000>;
  155. interrupts = <0 30 0x4>;
  156. status = "disabled";
  157. };
  158. ehci@e4800000 {
  159. compatible = "st,spear600-ehci", "usb-ehci";
  160. reg = <0xe4800000 0x1000>;
  161. interrupts = <0 64 0x4>;
  162. usbh0_id = <0>;
  163. status = "disabled";
  164. };
  165. ehci@e5800000 {
  166. compatible = "st,spear600-ehci", "usb-ehci";
  167. reg = <0xe5800000 0x1000>;
  168. interrupts = <0 66 0x4>;
  169. usbh1_id = <1>;
  170. status = "disabled";
  171. };
  172. ohci@e4000000 {
  173. compatible = "st,spear600-ohci", "usb-ohci";
  174. reg = <0xe4000000 0x1000>;
  175. interrupts = <0 65 0x4>;
  176. usbh0_id = <0>;
  177. status = "disabled";
  178. };
  179. ohci@e5000000 {
  180. compatible = "st,spear600-ohci", "usb-ohci";
  181. reg = <0xe5000000 0x1000>;
  182. interrupts = <0 67 0x4>;
  183. usbh1_id = <1>;
  184. status = "disabled";
  185. };
  186. apb {
  187. #address-cells = <1>;
  188. #size-cells = <1>;
  189. compatible = "simple-bus";
  190. ranges = <0x50000000 0x50000000 0x10000000
  191. 0xb0000000 0xb0000000 0x10000000
  192. 0xd0000000 0xd0000000 0x02000000
  193. 0xd8000000 0xd8000000 0x01000000
  194. 0xe0000000 0xe0000000 0x10000000>;
  195. gpio0: gpio@e0600000 {
  196. compatible = "arm,pl061", "arm,primecell";
  197. reg = <0xe0600000 0x1000>;
  198. interrupts = <0 24 0x4>;
  199. gpio-controller;
  200. #gpio-cells = <2>;
  201. interrupt-controller;
  202. #interrupt-cells = <2>;
  203. status = "disabled";
  204. };
  205. gpio1: gpio@e0680000 {
  206. compatible = "arm,pl061", "arm,primecell";
  207. reg = <0xe0680000 0x1000>;
  208. interrupts = <0 25 0x4>;
  209. gpio-controller;
  210. #gpio-cells = <2>;
  211. interrupt-controller;
  212. #interrupt-cells = <2>;
  213. status = "disabled";
  214. };
  215. kbd@e0300000 {
  216. compatible = "st,spear300-kbd";
  217. reg = <0xe0300000 0x1000>;
  218. interrupts = <0 52 0x4>;
  219. status = "disabled";
  220. };
  221. i2c0: i2c@e0280000 {
  222. #address-cells = <1>;
  223. #size-cells = <0>;
  224. compatible = "snps,designware-i2c";
  225. reg = <0xe0280000 0x1000>;
  226. interrupts = <0 41 0x4>;
  227. status = "disabled";
  228. };
  229. i2s@e0180000 {
  230. compatible = "st,designware-i2s";
  231. reg = <0xe0180000 0x1000>;
  232. interrupt-names = "play_irq", "record_irq";
  233. interrupts = <0 10 0x4
  234. 0 11 0x4 >;
  235. status = "disabled";
  236. };
  237. i2s@e0200000 {
  238. compatible = "st,designware-i2s";
  239. reg = <0xe0200000 0x1000>;
  240. interrupt-names = "play_irq", "record_irq";
  241. interrupts = <0 26 0x4
  242. 0 53 0x4>;
  243. status = "disabled";
  244. };
  245. spi0: spi@e0100000 {
  246. compatible = "arm,pl022", "arm,primecell";
  247. reg = <0xe0100000 0x1000>;
  248. #address-cells = <1>;
  249. #size-cells = <0>;
  250. interrupts = <0 31 0x4>;
  251. status = "disabled";
  252. dmas = <&dwdma0 0x2000 0 0 0>, /* 0x4 << 11 */
  253. <&dwdma0 0x0280 0 0 0>; /* 0x5 << 7 */
  254. dma-names = "tx", "rx";
  255. };
  256. rtc@e0580000 {
  257. compatible = "st,spear600-rtc";
  258. reg = <0xe0580000 0x1000>;
  259. interrupts = <0 36 0x4>;
  260. status = "disabled";
  261. };
  262. serial@e0000000 {
  263. compatible = "arm,pl011", "arm,primecell";
  264. reg = <0xe0000000 0x1000>;
  265. interrupts = <0 35 0x4>;
  266. status = "disabled";
  267. };
  268. adc@e0080000 {
  269. compatible = "st,spear600-adc";
  270. reg = <0xe0080000 0x1000>;
  271. interrupts = <0 12 0x4>;
  272. status = "disabled";
  273. };
  274. timer@e0380000 {
  275. compatible = "st,spear-timer";
  276. reg = <0xe0380000 0x400>;
  277. interrupts = <0 37 0x4>;
  278. };
  279. timer@ec800600 {
  280. compatible = "arm,cortex-a9-twd-timer";
  281. reg = <0xec800600 0x20>;
  282. interrupts = <1 13 0x4>;
  283. status = "disabled";
  284. };
  285. wdt@ec800620 {
  286. compatible = "arm,cortex-a9-twd-wdt";
  287. reg = <0xec800620 0x20>;
  288. status = "disabled";
  289. };
  290. thermal@e07008c4 {
  291. compatible = "st,thermal-spear1340";
  292. reg = <0xe07008c4 0x4>;
  293. thermal_flags = <0x7000>;
  294. };
  295. };
  296. };
  297. };