r8a7790.dtsi 4.2 KB

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  1. /*
  2. * Device Tree Source for the r8a7790 SoC
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. / {
  11. compatible = "renesas,r8a7790";
  12. interrupt-parent = <&gic>;
  13. #address-cells = <2>;
  14. #size-cells = <2>;
  15. cpus {
  16. #address-cells = <1>;
  17. #size-cells = <0>;
  18. cpu0: cpu@0 {
  19. device_type = "cpu";
  20. compatible = "arm,cortex-a15";
  21. reg = <0>;
  22. clock-frequency = <1300000000>;
  23. };
  24. };
  25. gic: interrupt-controller@f1001000 {
  26. compatible = "arm,cortex-a15-gic";
  27. #interrupt-cells = <3>;
  28. #address-cells = <0>;
  29. interrupt-controller;
  30. reg = <0 0xf1001000 0 0x1000>,
  31. <0 0xf1002000 0 0x1000>,
  32. <0 0xf1004000 0 0x2000>,
  33. <0 0xf1006000 0 0x2000>;
  34. interrupts = <1 9 0xf04>;
  35. };
  36. gpio0: gpio@ffc40000 {
  37. compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
  38. reg = <0 0xffc40000 0 0x2c>;
  39. interrupt-parent = <&gic>;
  40. interrupts = <0 4 0x4>;
  41. #gpio-cells = <2>;
  42. gpio-controller;
  43. gpio-ranges = <&pfc 0 0 32>;
  44. #interrupt-cells = <2>;
  45. interrupt-controller;
  46. };
  47. gpio1: gpio@ffc41000 {
  48. compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
  49. reg = <0 0xffc41000 0 0x2c>;
  50. interrupt-parent = <&gic>;
  51. interrupts = <0 5 0x4>;
  52. #gpio-cells = <2>;
  53. gpio-controller;
  54. gpio-ranges = <&pfc 0 32 32>;
  55. #interrupt-cells = <2>;
  56. interrupt-controller;
  57. };
  58. gpio2: gpio@ffc42000 {
  59. compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
  60. reg = <0 0xffc42000 0 0x2c>;
  61. interrupt-parent = <&gic>;
  62. interrupts = <0 6 0x4>;
  63. #gpio-cells = <2>;
  64. gpio-controller;
  65. gpio-ranges = <&pfc 0 64 32>;
  66. #interrupt-cells = <2>;
  67. interrupt-controller;
  68. };
  69. gpio3: gpio@ffc43000 {
  70. compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
  71. reg = <0 0xffc43000 0 0x2c>;
  72. interrupt-parent = <&gic>;
  73. interrupts = <0 7 0x4>;
  74. #gpio-cells = <2>;
  75. gpio-controller;
  76. gpio-ranges = <&pfc 0 96 32>;
  77. #interrupt-cells = <2>;
  78. interrupt-controller;
  79. };
  80. gpio4: gpio@ffc44000 {
  81. compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
  82. reg = <0 0xffc44000 0 0x2c>;
  83. interrupt-parent = <&gic>;
  84. interrupts = <0 8 0x4>;
  85. #gpio-cells = <2>;
  86. gpio-controller;
  87. gpio-ranges = <&pfc 0 128 32>;
  88. #interrupt-cells = <2>;
  89. interrupt-controller;
  90. };
  91. gpio5: gpio@ffc45000 {
  92. compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
  93. reg = <0 0xffc45000 0 0x2c>;
  94. interrupt-parent = <&gic>;
  95. interrupts = <0 9 0x4>;
  96. #gpio-cells = <2>;
  97. gpio-controller;
  98. gpio-ranges = <&pfc 0 160 32>;
  99. #interrupt-cells = <2>;
  100. interrupt-controller;
  101. };
  102. timer {
  103. compatible = "arm,armv7-timer";
  104. interrupts = <1 13 0xf08>,
  105. <1 14 0xf08>,
  106. <1 11 0xf08>,
  107. <1 10 0xf08>;
  108. };
  109. irqc0: interrupt-controller@e61c0000 {
  110. compatible = "renesas,irqc";
  111. #interrupt-cells = <2>;
  112. interrupt-controller;
  113. reg = <0 0xe61c0000 0 0x200>;
  114. interrupt-parent = <&gic>;
  115. interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>;
  116. };
  117. mmcif0: mmcif@ee200000 {
  118. compatible = "renesas,sh-mmcif";
  119. reg = <0 0xee200000 0 0x80>;
  120. interrupt-parent = <&gic>;
  121. interrupts = <0 169 0x4>;
  122. reg-io-width = <4>;
  123. status = "disabled";
  124. };
  125. mmcif1: mmcif@ee220000 {
  126. compatible = "renesas,sh-mmcif";
  127. reg = <0 0xee220000 0 0x80>;
  128. interrupt-parent = <&gic>;
  129. interrupts = <0 170 0x4>;
  130. reg-io-width = <4>;
  131. status = "disabled";
  132. };
  133. pfc: pfc@e6060000 {
  134. compatible = "renesas,pfc-r8a7790";
  135. reg = <0 0xe6060000 0 0x250>;
  136. #gpio-range-cells = <3>;
  137. };
  138. sdhi0: sdhi@ee100000 {
  139. compatible = "renesas,r8a7790-sdhi";
  140. reg = <0 0xee100000 0 0x100>;
  141. interrupt-parent = <&gic>;
  142. interrupts = <0 165 4>;
  143. cap-sd-highspeed;
  144. status = "disabled";
  145. };
  146. sdhi1: sdhi@ee120000 {
  147. compatible = "renesas,r8a7790-sdhi";
  148. reg = <0 0xee120000 0 0x100>;
  149. interrupt-parent = <&gic>;
  150. interrupts = <0 166 4>;
  151. cap-sd-highspeed;
  152. status = "disabled";
  153. };
  154. sdhi2: sdhi@ee140000 {
  155. compatible = "renesas,r8a7790-sdhi";
  156. reg = <0 0xee140000 0 0x100>;
  157. interrupt-parent = <&gic>;
  158. interrupts = <0 167 4>;
  159. cap-sd-highspeed;
  160. status = "disabled";
  161. };
  162. sdhi3: sdhi@ee160000 {
  163. compatible = "renesas,r8a7790-sdhi";
  164. reg = <0 0xee160000 0 0x100>;
  165. interrupt-parent = <&gic>;
  166. interrupts = <0 168 4>;
  167. cap-sd-highspeed;
  168. status = "disabled";
  169. };
  170. };