imx6qdl-sabresd.dtsi 4.9 KB

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  1. /*
  2. * Copyright 2012 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. / {
  13. memory {
  14. reg = <0x10000000 0x40000000>;
  15. };
  16. regulators {
  17. compatible = "simple-bus";
  18. reg_usb_otg_vbus: usb_otg_vbus {
  19. compatible = "regulator-fixed";
  20. regulator-name = "usb_otg_vbus";
  21. regulator-min-microvolt = <5000000>;
  22. regulator-max-microvolt = <5000000>;
  23. gpio = <&gpio3 22 0>;
  24. enable-active-high;
  25. };
  26. reg_usb_h1_vbus: usb_h1_vbus {
  27. compatible = "regulator-fixed";
  28. regulator-name = "usb_h1_vbus";
  29. regulator-min-microvolt = <5000000>;
  30. regulator-max-microvolt = <5000000>;
  31. gpio = <&gpio1 29 0>;
  32. enable-active-high;
  33. };
  34. reg_audio: wm8962_supply {
  35. compatible = "regulator-fixed";
  36. regulator-name = "wm8962-supply";
  37. gpio = <&gpio4 10 0>;
  38. enable-active-high;
  39. };
  40. };
  41. gpio-keys {
  42. compatible = "gpio-keys";
  43. volume-up {
  44. label = "Volume Up";
  45. gpios = <&gpio1 4 0>;
  46. gpio-key,wakeup;
  47. linux,code = <115>; /* KEY_VOLUMEUP */
  48. };
  49. volume-down {
  50. label = "Volume Down";
  51. gpios = <&gpio1 5 0>;
  52. gpio-key,wakeup;
  53. linux,code = <114>; /* KEY_VOLUMEDOWN */
  54. };
  55. };
  56. sound {
  57. compatible = "fsl,imx6q-sabresd-wm8962",
  58. "fsl,imx-audio-wm8962";
  59. model = "wm8962-audio";
  60. ssi-controller = <&ssi2>;
  61. audio-codec = <&codec>;
  62. audio-routing =
  63. "Headphone Jack", "HPOUTL",
  64. "Headphone Jack", "HPOUTR",
  65. "Ext Spk", "SPKOUTL",
  66. "Ext Spk", "SPKOUTR",
  67. "MICBIAS", "AMIC",
  68. "IN3R", "MICBIAS",
  69. "DMIC", "MICBIAS",
  70. "DMICDAT", "DMIC";
  71. mux-int-port = <2>;
  72. mux-ext-port = <3>;
  73. };
  74. };
  75. &audmux {
  76. pinctrl-names = "default";
  77. pinctrl-0 = <&pinctrl_audmux_2>;
  78. status = "okay";
  79. };
  80. &ecspi1 {
  81. fsl,spi-num-chipselects = <1>;
  82. cs-gpios = <&gpio4 9 0>;
  83. pinctrl-names = "default";
  84. pinctrl-0 = <&pinctrl_ecspi1_2>;
  85. status = "okay";
  86. flash: m25p80@0 {
  87. #address-cells = <1>;
  88. #size-cells = <1>;
  89. compatible = "st,m25p32";
  90. spi-max-frequency = <20000000>;
  91. reg = <0>;
  92. };
  93. };
  94. &fec {
  95. pinctrl-names = "default";
  96. pinctrl-0 = <&pinctrl_enet_1>;
  97. phy-mode = "rgmii";
  98. status = "okay";
  99. };
  100. &i2c1 {
  101. clock-frequency = <100000>;
  102. pinctrl-names = "default";
  103. pinctrl-0 = <&pinctrl_i2c1_2>;
  104. status = "okay";
  105. codec: wm8962@1a {
  106. compatible = "wlf,wm8962";
  107. reg = <0x1a>;
  108. clocks = <&clks 201>;
  109. DCVDD-supply = <&reg_audio>;
  110. DBVDD-supply = <&reg_audio>;
  111. AVDD-supply = <&reg_audio>;
  112. CPVDD-supply = <&reg_audio>;
  113. MICVDD-supply = <&reg_audio>;
  114. PLLVDD-supply = <&reg_audio>;
  115. SPKVDD1-supply = <&reg_audio>;
  116. SPKVDD2-supply = <&reg_audio>;
  117. gpio-cfg = <
  118. 0x0000 /* 0:Default */
  119. 0x0000 /* 1:Default */
  120. 0x0013 /* 2:FN_DMICCLK */
  121. 0x0000 /* 3:Default */
  122. 0x8014 /* 4:FN_DMICCDAT */
  123. 0x0000 /* 5:Default */
  124. >;
  125. };
  126. };
  127. &i2c3 {
  128. clock-frequency = <100000>;
  129. pinctrl-names = "default";
  130. pinctrl-0 = <&pinctrl_i2c3_2>;
  131. status = "okay";
  132. egalax_ts@04 {
  133. compatible = "eeti,egalax_ts";
  134. reg = <0x04>;
  135. interrupt-parent = <&gpio6>;
  136. interrupts = <7 2>;
  137. wakeup-gpios = <&gpio6 7 0>;
  138. };
  139. };
  140. &iomuxc {
  141. pinctrl-names = "default";
  142. pinctrl-0 = <&pinctrl_hog>;
  143. hog {
  144. pinctrl_hog: hoggrp {
  145. fsl,pins = <
  146. MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
  147. MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000
  148. MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
  149. MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
  150. MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
  151. MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
  152. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
  153. MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
  154. MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
  155. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
  156. >;
  157. };
  158. };
  159. };
  160. &ldb {
  161. status = "okay";
  162. lvds-channel@1 {
  163. fsl,data-mapping = "spwg";
  164. fsl,data-width = <18>;
  165. status = "okay";
  166. display-timings {
  167. native-mode = <&timing0>;
  168. timing0: hsd100pxn1 {
  169. clock-frequency = <65000000>;
  170. hactive = <1024>;
  171. vactive = <768>;
  172. hback-porch = <220>;
  173. hfront-porch = <40>;
  174. vback-porch = <21>;
  175. vfront-porch = <7>;
  176. hsync-len = <60>;
  177. vsync-len = <10>;
  178. };
  179. };
  180. };
  181. };
  182. &ssi2 {
  183. fsl,mode = "i2s-slave";
  184. status = "okay";
  185. };
  186. &uart1 {
  187. pinctrl-names = "default";
  188. pinctrl-0 = <&pinctrl_uart1_1>;
  189. status = "okay";
  190. };
  191. &usbh1 {
  192. vbus-supply = <&reg_usb_h1_vbus>;
  193. status = "okay";
  194. };
  195. &usbotg {
  196. vbus-supply = <&reg_usb_otg_vbus>;
  197. pinctrl-names = "default";
  198. pinctrl-0 = <&pinctrl_usbotg_2>;
  199. disable-over-current;
  200. status = "okay";
  201. };
  202. &usdhc2 {
  203. pinctrl-names = "default";
  204. pinctrl-0 = <&pinctrl_usdhc2_1>;
  205. cd-gpios = <&gpio2 2 0>;
  206. wp-gpios = <&gpio2 3 0>;
  207. status = "okay";
  208. };
  209. &usdhc3 {
  210. pinctrl-names = "default";
  211. pinctrl-0 = <&pinctrl_usdhc3_1>;
  212. cd-gpios = <&gpio2 0 0>;
  213. wp-gpios = <&gpio2 1 0>;
  214. status = "okay";
  215. };