imx6q-phytec-pfla02.dtsi 3.7 KB

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  1. /*
  2. * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. #include "imx6q.dtsi"
  12. / {
  13. model = "Phytec phyFLEX-i.MX6 Ouad";
  14. compatible = "phytec,imx6q-pfla02", "fsl,imx6q";
  15. memory {
  16. reg = <0x10000000 0x80000000>;
  17. };
  18. };
  19. &ecspi3 {
  20. pinctrl-names = "default";
  21. pinctrl-0 = <&pinctrl_ecspi3_1>;
  22. status = "okay";
  23. fsl,spi-num-chipselects = <1>;
  24. cs-gpios = <&gpio4 24 0>;
  25. flash@0 {
  26. compatible = "m25p80";
  27. spi-max-frequency = <20000000>;
  28. reg = <0>;
  29. };
  30. };
  31. &i2c1 {
  32. pinctrl-names = "default";
  33. pinctrl-0 = <&pinctrl_i2c1_1>;
  34. status = "okay";
  35. eeprom@50 {
  36. compatible = "atmel,24c32";
  37. reg = <0x50>;
  38. };
  39. pmic@58 {
  40. compatible = "dialog,da9063";
  41. reg = <0x58>;
  42. interrupt-parent = <&gpio4>;
  43. interrupts = <17 0x8>; /* active-low GPIO4_17 */
  44. regulators {
  45. vddcore_reg: bcore1 {
  46. regulator-min-microvolt = <730000>;
  47. regulator-max-microvolt = <1380000>;
  48. regulator-always-on;
  49. };
  50. vddsoc_reg: bcore2 {
  51. regulator-min-microvolt = <730000>;
  52. regulator-max-microvolt = <1380000>;
  53. regulator-always-on;
  54. };
  55. vdd_ddr3_reg: bpro {
  56. regulator-min-microvolt = <1500000>;
  57. regulator-max-microvolt = <1500000>;
  58. regulator-always-on;
  59. };
  60. vdd_3v3_reg: bperi {
  61. regulator-min-microvolt = <3300000>;
  62. regulator-max-microvolt = <3300000>;
  63. regulator-always-on;
  64. };
  65. vdd_buckmem_reg: bmem {
  66. regulator-min-microvolt = <3300000>;
  67. regulator-max-microvolt = <3300000>;
  68. regulator-always-on;
  69. };
  70. vdd_eth_reg: bio {
  71. regulator-min-microvolt = <1200000>;
  72. regulator-max-microvolt = <1200000>;
  73. regulator-always-on;
  74. };
  75. vdd_eth_io_reg: ldo4 {
  76. regulator-min-microvolt = <2500000>;
  77. regulator-max-microvolt = <2500000>;
  78. regulator-always-on;
  79. };
  80. vdd_mx6_snvs_reg: ldo5 {
  81. regulator-min-microvolt = <3000000>;
  82. regulator-max-microvolt = <3000000>;
  83. regulator-always-on;
  84. };
  85. vdd_3v3_pmic_io_reg: ldo6 {
  86. regulator-min-microvolt = <3300000>;
  87. regulator-max-microvolt = <3300000>;
  88. regulator-always-on;
  89. };
  90. vdd_sd0_reg: ldo9 {
  91. regulator-min-microvolt = <3300000>;
  92. regulator-max-microvolt = <3300000>;
  93. };
  94. vdd_sd1_reg: ldo10 {
  95. regulator-min-microvolt = <3300000>;
  96. regulator-max-microvolt = <3300000>;
  97. };
  98. vdd_mx6_high_reg: ldo11 {
  99. regulator-min-microvolt = <3000000>;
  100. regulator-max-microvolt = <3000000>;
  101. regulator-always-on;
  102. };
  103. };
  104. };
  105. };
  106. &iomuxc {
  107. pinctrl-names = "default";
  108. pinctrl-0 = <&pinctrl_hog>;
  109. hog {
  110. pinctrl_hog: hoggrp {
  111. fsl,pins = <
  112. MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
  113. MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
  114. MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000 /* PMIC interrupt */
  115. >;
  116. };
  117. };
  118. pfla02 {
  119. pinctrl_usdhc3_pfla02: usdhc3grp-pfla02 {
  120. fsl,pins = <
  121. MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000
  122. MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
  123. >;
  124. };
  125. };
  126. };
  127. &fec {
  128. pinctrl-names = "default";
  129. pinctrl-0 = <&pinctrl_enet_3>;
  130. phy-mode = "rgmii";
  131. phy-reset-gpios = <&gpio3 23 0>;
  132. status = "disabled";
  133. };
  134. &uart4 {
  135. pinctrl-names = "default";
  136. pinctrl-0 = <&pinctrl_uart4_1>;
  137. status = "disabled";
  138. };
  139. &usdhc2 {
  140. pinctrl-names = "default";
  141. pinctrl-0 = <&pinctrl_usdhc2_2>;
  142. cd-gpios = <&gpio1 4 0>;
  143. wp-gpios = <&gpio1 2 0>;
  144. status = "disabled";
  145. };
  146. &usdhc3 {
  147. pinctrl-names = "default";
  148. pinctrl-0 = <&pinctrl_usdhc3_2
  149. &pinctrl_usdhc3_pfla02>;
  150. cd-gpios = <&gpio1 27 0>;
  151. wp-gpios = <&gpio1 29 0>;
  152. status = "disabled";
  153. };