am4372.dtsi 1.5 KB

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  1. /*
  2. * Device Tree Source for AM4372 SoC
  3. *
  4. * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. #include <dt-bindings/interrupt-controller/arm-gic.h>
  11. #include "skeleton.dtsi"
  12. / {
  13. compatible = "ti,am4372", "ti,am43";
  14. interrupt-parent = <&gic>;
  15. aliases {
  16. serial0 = &uart0;
  17. };
  18. cpus {
  19. cpu@0 {
  20. compatible = "arm,cortex-a9";
  21. };
  22. };
  23. gic: interrupt-controller@48241000 {
  24. compatible = "arm,cortex-a9-gic";
  25. interrupt-controller;
  26. #interrupt-cells = <3>;
  27. reg = <0x48241000 0x1000>,
  28. <0x48240100 0x0100>;
  29. };
  30. ocp {
  31. compatible = "simple-bus";
  32. #address-cells = <1>;
  33. #size-cells = <1>;
  34. ranges;
  35. uart0: serial@44e09000 {
  36. compatible = "ti,am4372-uart","ti,omap2-uart";
  37. reg = <0x44e09000 0x2000>;
  38. interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
  39. };
  40. timer1: timer@44e31000 {
  41. compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
  42. reg = <0x44e31000 0x400>;
  43. interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
  44. ti,timer-alwon;
  45. };
  46. timer2: timer@48040000 {
  47. compatible = "ti,am4372-timer","ti,am335x-timer";
  48. reg = <0x48040000 0x400>;
  49. interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
  50. };
  51. counter32k: counter@44e86000 {
  52. compatible = "ti,am4372-counter32k","ti,omap-counter32k";
  53. reg = <0x44e86000 0x40>;
  54. };
  55. };
  56. };