am33xx.dtsi 15 KB

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  1. /*
  2. * Device Tree Source for AM33XX SoC
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. #include <dt-bindings/gpio/gpio.h>
  11. #include <dt-bindings/pinctrl/am33xx.h>
  12. #include "skeleton.dtsi"
  13. / {
  14. compatible = "ti,am33xx";
  15. interrupt-parent = <&intc>;
  16. aliases {
  17. serial0 = &uart0;
  18. serial1 = &uart1;
  19. serial2 = &uart2;
  20. serial3 = &uart3;
  21. serial4 = &uart4;
  22. serial5 = &uart5;
  23. d_can0 = &dcan0;
  24. d_can1 = &dcan1;
  25. usb0 = &usb0;
  26. usb1 = &usb1;
  27. phy0 = &usb0_phy;
  28. phy1 = &usb1_phy;
  29. };
  30. cpus {
  31. #address-cells = <1>;
  32. #size-cells = <0>;
  33. cpu@0 {
  34. compatible = "arm,cortex-a8";
  35. device_type = "cpu";
  36. reg = <0>;
  37. /*
  38. * To consider voltage drop between PMIC and SoC,
  39. * tolerance value is reduced to 2% from 4% and
  40. * voltage value is increased as a precaution.
  41. */
  42. operating-points = <
  43. /* kHz uV */
  44. 720000 1285000
  45. 600000 1225000
  46. 500000 1125000
  47. 275000 1125000
  48. >;
  49. voltage-tolerance = <2>; /* 2 percentage */
  50. clock-latency = <300000>; /* From omap-cpufreq driver */
  51. };
  52. };
  53. /*
  54. * The soc node represents the soc top level view. It is uses for IPs
  55. * that are not memory mapped in the MPU view or for the MPU itself.
  56. */
  57. soc {
  58. compatible = "ti,omap-infra";
  59. mpu {
  60. compatible = "ti,omap3-mpu";
  61. ti,hwmods = "mpu";
  62. };
  63. };
  64. am33xx_pinmux: pinmux@44e10800 {
  65. compatible = "pinctrl-single";
  66. reg = <0x44e10800 0x0238>;
  67. #address-cells = <1>;
  68. #size-cells = <0>;
  69. pinctrl-single,register-width = <32>;
  70. pinctrl-single,function-mask = <0x7f>;
  71. };
  72. /*
  73. * XXX: Use a flat representation of the AM33XX interconnect.
  74. * The real AM33XX interconnect network is quite complex.Since
  75. * that will not bring real advantage to represent that in DT
  76. * for the moment, just use a fake OCP bus entry to represent
  77. * the whole bus hierarchy.
  78. */
  79. ocp {
  80. compatible = "simple-bus";
  81. #address-cells = <1>;
  82. #size-cells = <1>;
  83. ranges;
  84. ti,hwmods = "l3_main";
  85. intc: interrupt-controller@48200000 {
  86. compatible = "ti,omap2-intc";
  87. interrupt-controller;
  88. #interrupt-cells = <1>;
  89. ti,intc-size = <128>;
  90. reg = <0x48200000 0x1000>;
  91. };
  92. gpio0: gpio@44e07000 {
  93. compatible = "ti,omap4-gpio";
  94. ti,hwmods = "gpio1";
  95. gpio-controller;
  96. #gpio-cells = <2>;
  97. interrupt-controller;
  98. #interrupt-cells = <1>;
  99. reg = <0x44e07000 0x1000>;
  100. interrupts = <96>;
  101. };
  102. gpio1: gpio@4804c000 {
  103. compatible = "ti,omap4-gpio";
  104. ti,hwmods = "gpio2";
  105. gpio-controller;
  106. #gpio-cells = <2>;
  107. interrupt-controller;
  108. #interrupt-cells = <1>;
  109. reg = <0x4804c000 0x1000>;
  110. interrupts = <98>;
  111. };
  112. gpio2: gpio@481ac000 {
  113. compatible = "ti,omap4-gpio";
  114. ti,hwmods = "gpio3";
  115. gpio-controller;
  116. #gpio-cells = <2>;
  117. interrupt-controller;
  118. #interrupt-cells = <1>;
  119. reg = <0x481ac000 0x1000>;
  120. interrupts = <32>;
  121. };
  122. gpio3: gpio@481ae000 {
  123. compatible = "ti,omap4-gpio";
  124. ti,hwmods = "gpio4";
  125. gpio-controller;
  126. #gpio-cells = <2>;
  127. interrupt-controller;
  128. #interrupt-cells = <1>;
  129. reg = <0x481ae000 0x1000>;
  130. interrupts = <62>;
  131. };
  132. uart0: serial@44e09000 {
  133. compatible = "ti,omap3-uart";
  134. ti,hwmods = "uart1";
  135. clock-frequency = <48000000>;
  136. reg = <0x44e09000 0x2000>;
  137. interrupts = <72>;
  138. status = "disabled";
  139. };
  140. uart1: serial@48022000 {
  141. compatible = "ti,omap3-uart";
  142. ti,hwmods = "uart2";
  143. clock-frequency = <48000000>;
  144. reg = <0x48022000 0x2000>;
  145. interrupts = <73>;
  146. status = "disabled";
  147. };
  148. uart2: serial@48024000 {
  149. compatible = "ti,omap3-uart";
  150. ti,hwmods = "uart3";
  151. clock-frequency = <48000000>;
  152. reg = <0x48024000 0x2000>;
  153. interrupts = <74>;
  154. status = "disabled";
  155. };
  156. uart3: serial@481a6000 {
  157. compatible = "ti,omap3-uart";
  158. ti,hwmods = "uart4";
  159. clock-frequency = <48000000>;
  160. reg = <0x481a6000 0x2000>;
  161. interrupts = <44>;
  162. status = "disabled";
  163. };
  164. uart4: serial@481a8000 {
  165. compatible = "ti,omap3-uart";
  166. ti,hwmods = "uart5";
  167. clock-frequency = <48000000>;
  168. reg = <0x481a8000 0x2000>;
  169. interrupts = <45>;
  170. status = "disabled";
  171. };
  172. uart5: serial@481aa000 {
  173. compatible = "ti,omap3-uart";
  174. ti,hwmods = "uart6";
  175. clock-frequency = <48000000>;
  176. reg = <0x481aa000 0x2000>;
  177. interrupts = <46>;
  178. status = "disabled";
  179. };
  180. i2c0: i2c@44e0b000 {
  181. compatible = "ti,omap4-i2c";
  182. #address-cells = <1>;
  183. #size-cells = <0>;
  184. ti,hwmods = "i2c1";
  185. reg = <0x44e0b000 0x1000>;
  186. interrupts = <70>;
  187. status = "disabled";
  188. };
  189. i2c1: i2c@4802a000 {
  190. compatible = "ti,omap4-i2c";
  191. #address-cells = <1>;
  192. #size-cells = <0>;
  193. ti,hwmods = "i2c2";
  194. reg = <0x4802a000 0x1000>;
  195. interrupts = <71>;
  196. status = "disabled";
  197. };
  198. i2c2: i2c@4819c000 {
  199. compatible = "ti,omap4-i2c";
  200. #address-cells = <1>;
  201. #size-cells = <0>;
  202. ti,hwmods = "i2c3";
  203. reg = <0x4819c000 0x1000>;
  204. interrupts = <30>;
  205. status = "disabled";
  206. };
  207. wdt2: wdt@44e35000 {
  208. compatible = "ti,omap3-wdt";
  209. ti,hwmods = "wd_timer2";
  210. reg = <0x44e35000 0x1000>;
  211. interrupts = <91>;
  212. };
  213. dcan0: d_can@481cc000 {
  214. compatible = "bosch,d_can";
  215. ti,hwmods = "d_can0";
  216. reg = <0x481cc000 0x2000
  217. 0x44e10644 0x4>;
  218. interrupts = <52>;
  219. status = "disabled";
  220. };
  221. dcan1: d_can@481d0000 {
  222. compatible = "bosch,d_can";
  223. ti,hwmods = "d_can1";
  224. reg = <0x481d0000 0x2000
  225. 0x44e10644 0x4>;
  226. interrupts = <55>;
  227. status = "disabled";
  228. };
  229. timer1: timer@44e31000 {
  230. compatible = "ti,am335x-timer-1ms";
  231. reg = <0x44e31000 0x400>;
  232. interrupts = <67>;
  233. ti,hwmods = "timer1";
  234. ti,timer-alwon;
  235. };
  236. timer2: timer@48040000 {
  237. compatible = "ti,am335x-timer";
  238. reg = <0x48040000 0x400>;
  239. interrupts = <68>;
  240. ti,hwmods = "timer2";
  241. };
  242. timer3: timer@48042000 {
  243. compatible = "ti,am335x-timer";
  244. reg = <0x48042000 0x400>;
  245. interrupts = <69>;
  246. ti,hwmods = "timer3";
  247. };
  248. timer4: timer@48044000 {
  249. compatible = "ti,am335x-timer";
  250. reg = <0x48044000 0x400>;
  251. interrupts = <92>;
  252. ti,hwmods = "timer4";
  253. ti,timer-pwm;
  254. };
  255. timer5: timer@48046000 {
  256. compatible = "ti,am335x-timer";
  257. reg = <0x48046000 0x400>;
  258. interrupts = <93>;
  259. ti,hwmods = "timer5";
  260. ti,timer-pwm;
  261. };
  262. timer6: timer@48048000 {
  263. compatible = "ti,am335x-timer";
  264. reg = <0x48048000 0x400>;
  265. interrupts = <94>;
  266. ti,hwmods = "timer6";
  267. ti,timer-pwm;
  268. };
  269. timer7: timer@4804a000 {
  270. compatible = "ti,am335x-timer";
  271. reg = <0x4804a000 0x400>;
  272. interrupts = <95>;
  273. ti,hwmods = "timer7";
  274. ti,timer-pwm;
  275. };
  276. rtc@44e3e000 {
  277. compatible = "ti,da830-rtc";
  278. reg = <0x44e3e000 0x1000>;
  279. interrupts = <75
  280. 76>;
  281. ti,hwmods = "rtc";
  282. };
  283. spi0: spi@48030000 {
  284. compatible = "ti,omap4-mcspi";
  285. #address-cells = <1>;
  286. #size-cells = <0>;
  287. reg = <0x48030000 0x400>;
  288. interrupts = <65>;
  289. ti,spi-num-cs = <2>;
  290. ti,hwmods = "spi0";
  291. status = "disabled";
  292. };
  293. spi1: spi@481a0000 {
  294. compatible = "ti,omap4-mcspi";
  295. #address-cells = <1>;
  296. #size-cells = <0>;
  297. reg = <0x481a0000 0x400>;
  298. interrupts = <125>;
  299. ti,spi-num-cs = <2>;
  300. ti,hwmods = "spi1";
  301. status = "disabled";
  302. };
  303. usb: usb@47400000 {
  304. compatible = "ti,am33xx-usb";
  305. reg = <0x47400000 0x1000>;
  306. ranges;
  307. #address-cells = <1>;
  308. #size-cells = <1>;
  309. ti,hwmods = "usb_otg_hs";
  310. status = "disabled";
  311. ctrl_mod: control@44e10000 {
  312. compatible = "ti,am335x-usb-ctrl-module";
  313. reg = <0x44e10620 0x10
  314. 0x44e10648 0x4>;
  315. reg-names = "phy_ctrl", "wakeup";
  316. status = "disabled";
  317. };
  318. usb0_phy: usb-phy@47401300 {
  319. compatible = "ti,am335x-usb-phy";
  320. reg = <0x47401300 0x100>;
  321. reg-names = "phy";
  322. status = "disabled";
  323. ti,ctrl_mod = <&ctrl_mod>;
  324. };
  325. usb0: usb@47401000 {
  326. compatible = "ti,musb-am33xx";
  327. status = "disabled";
  328. reg = <0x47401400 0x400
  329. 0x47401000 0x200>;
  330. reg-names = "mc", "control";
  331. interrupts = <18>;
  332. interrupt-names = "mc";
  333. dr_mode = "otg";
  334. mentor,multipoint = <1>;
  335. mentor,num-eps = <16>;
  336. mentor,ram-bits = <12>;
  337. mentor,power = <500>;
  338. phys = <&usb0_phy>;
  339. dmas = <&cppi41dma 0 0 &cppi41dma 1 0
  340. &cppi41dma 2 0 &cppi41dma 3 0
  341. &cppi41dma 4 0 &cppi41dma 5 0
  342. &cppi41dma 6 0 &cppi41dma 7 0
  343. &cppi41dma 8 0 &cppi41dma 9 0
  344. &cppi41dma 10 0 &cppi41dma 11 0
  345. &cppi41dma 12 0 &cppi41dma 13 0
  346. &cppi41dma 14 0 &cppi41dma 0 1
  347. &cppi41dma 1 1 &cppi41dma 2 1
  348. &cppi41dma 3 1 &cppi41dma 4 1
  349. &cppi41dma 5 1 &cppi41dma 6 1
  350. &cppi41dma 7 1 &cppi41dma 8 1
  351. &cppi41dma 9 1 &cppi41dma 10 1
  352. &cppi41dma 11 1 &cppi41dma 12 1
  353. &cppi41dma 13 1 &cppi41dma 14 1>;
  354. dma-names =
  355. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  356. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  357. "rx14", "rx15",
  358. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  359. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  360. "tx14", "tx15";
  361. };
  362. usb1_phy: usb-phy@47401b00 {
  363. compatible = "ti,am335x-usb-phy";
  364. reg = <0x47401b00 0x100>;
  365. reg-names = "phy";
  366. status = "disabled";
  367. ti,ctrl_mod = <&ctrl_mod>;
  368. };
  369. usb1: usb@47401800 {
  370. compatible = "ti,musb-am33xx";
  371. status = "disabled";
  372. reg = <0x47401c00 0x400
  373. 0x47401800 0x200>;
  374. reg-names = "mc", "control";
  375. interrupts = <19>;
  376. interrupt-names = "mc";
  377. dr_mode = "otg";
  378. mentor,multipoint = <1>;
  379. mentor,num-eps = <16>;
  380. mentor,ram-bits = <12>;
  381. mentor,power = <500>;
  382. phys = <&usb1_phy>;
  383. dmas = <&cppi41dma 15 0 &cppi41dma 16 0
  384. &cppi41dma 17 0 &cppi41dma 18 0
  385. &cppi41dma 19 0 &cppi41dma 20 0
  386. &cppi41dma 21 0 &cppi41dma 22 0
  387. &cppi41dma 23 0 &cppi41dma 24 0
  388. &cppi41dma 25 0 &cppi41dma 26 0
  389. &cppi41dma 27 0 &cppi41dma 28 0
  390. &cppi41dma 29 0 &cppi41dma 15 1
  391. &cppi41dma 16 1 &cppi41dma 17 1
  392. &cppi41dma 18 1 &cppi41dma 19 1
  393. &cppi41dma 20 1 &cppi41dma 21 1
  394. &cppi41dma 22 1 &cppi41dma 23 1
  395. &cppi41dma 24 1 &cppi41dma 25 1
  396. &cppi41dma 26 1 &cppi41dma 27 1
  397. &cppi41dma 28 1 &cppi41dma 29 1>;
  398. dma-names =
  399. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  400. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  401. "rx14", "rx15",
  402. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  403. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  404. "tx14", "tx15";
  405. };
  406. cppi41dma: dma-controller@07402000 {
  407. compatible = "ti,am3359-cppi41";
  408. reg = <0x47400000 0x1000
  409. 0x47402000 0x1000
  410. 0x47403000 0x1000
  411. 0x47404000 0x4000>;
  412. reg-names = "glue", "controller", "scheduler", "queuemgr";
  413. interrupts = <17>;
  414. interrupt-names = "glue";
  415. #dma-cells = <2>;
  416. #dma-channels = <30>;
  417. #dma-requests = <256>;
  418. status = "disabled";
  419. };
  420. };
  421. epwmss0: epwmss@48300000 {
  422. compatible = "ti,am33xx-pwmss";
  423. reg = <0x48300000 0x10>;
  424. ti,hwmods = "epwmss0";
  425. #address-cells = <1>;
  426. #size-cells = <1>;
  427. status = "disabled";
  428. ranges = <0x48300100 0x48300100 0x80 /* ECAP */
  429. 0x48300180 0x48300180 0x80 /* EQEP */
  430. 0x48300200 0x48300200 0x80>; /* EHRPWM */
  431. ecap0: ecap@48300100 {
  432. compatible = "ti,am33xx-ecap";
  433. #pwm-cells = <3>;
  434. reg = <0x48300100 0x80>;
  435. ti,hwmods = "ecap0";
  436. status = "disabled";
  437. };
  438. ehrpwm0: ehrpwm@48300200 {
  439. compatible = "ti,am33xx-ehrpwm";
  440. #pwm-cells = <3>;
  441. reg = <0x48300200 0x80>;
  442. ti,hwmods = "ehrpwm0";
  443. status = "disabled";
  444. };
  445. };
  446. epwmss1: epwmss@48302000 {
  447. compatible = "ti,am33xx-pwmss";
  448. reg = <0x48302000 0x10>;
  449. ti,hwmods = "epwmss1";
  450. #address-cells = <1>;
  451. #size-cells = <1>;
  452. status = "disabled";
  453. ranges = <0x48302100 0x48302100 0x80 /* ECAP */
  454. 0x48302180 0x48302180 0x80 /* EQEP */
  455. 0x48302200 0x48302200 0x80>; /* EHRPWM */
  456. ecap1: ecap@48302100 {
  457. compatible = "ti,am33xx-ecap";
  458. #pwm-cells = <3>;
  459. reg = <0x48302100 0x80>;
  460. ti,hwmods = "ecap1";
  461. status = "disabled";
  462. };
  463. ehrpwm1: ehrpwm@48302200 {
  464. compatible = "ti,am33xx-ehrpwm";
  465. #pwm-cells = <3>;
  466. reg = <0x48302200 0x80>;
  467. ti,hwmods = "ehrpwm1";
  468. status = "disabled";
  469. };
  470. };
  471. epwmss2: epwmss@48304000 {
  472. compatible = "ti,am33xx-pwmss";
  473. reg = <0x48304000 0x10>;
  474. ti,hwmods = "epwmss2";
  475. #address-cells = <1>;
  476. #size-cells = <1>;
  477. status = "disabled";
  478. ranges = <0x48304100 0x48304100 0x80 /* ECAP */
  479. 0x48304180 0x48304180 0x80 /* EQEP */
  480. 0x48304200 0x48304200 0x80>; /* EHRPWM */
  481. ecap2: ecap@48304100 {
  482. compatible = "ti,am33xx-ecap";
  483. #pwm-cells = <3>;
  484. reg = <0x48304100 0x80>;
  485. ti,hwmods = "ecap2";
  486. status = "disabled";
  487. };
  488. ehrpwm2: ehrpwm@48304200 {
  489. compatible = "ti,am33xx-ehrpwm";
  490. #pwm-cells = <3>;
  491. reg = <0x48304200 0x80>;
  492. ti,hwmods = "ehrpwm2";
  493. status = "disabled";
  494. };
  495. };
  496. mac: ethernet@4a100000 {
  497. compatible = "ti,cpsw";
  498. ti,hwmods = "cpgmac0";
  499. cpdma_channels = <8>;
  500. ale_entries = <1024>;
  501. bd_ram_size = <0x2000>;
  502. no_bd_ram = <0>;
  503. rx_descs = <64>;
  504. mac_control = <0x20>;
  505. slaves = <2>;
  506. active_slave = <0>;
  507. cpts_clock_mult = <0x80000000>;
  508. cpts_clock_shift = <29>;
  509. reg = <0x4a100000 0x800
  510. 0x4a101200 0x100>;
  511. #address-cells = <1>;
  512. #size-cells = <1>;
  513. interrupt-parent = <&intc>;
  514. /*
  515. * c0_rx_thresh_pend
  516. * c0_rx_pend
  517. * c0_tx_pend
  518. * c0_misc_pend
  519. */
  520. interrupts = <40 41 42 43>;
  521. ranges;
  522. davinci_mdio: mdio@4a101000 {
  523. compatible = "ti,davinci_mdio";
  524. #address-cells = <1>;
  525. #size-cells = <0>;
  526. ti,hwmods = "davinci_mdio";
  527. bus_freq = <1000000>;
  528. reg = <0x4a101000 0x100>;
  529. };
  530. cpsw_emac0: slave@4a100200 {
  531. /* Filled in by U-Boot */
  532. mac-address = [ 00 00 00 00 00 00 ];
  533. };
  534. cpsw_emac1: slave@4a100300 {
  535. /* Filled in by U-Boot */
  536. mac-address = [ 00 00 00 00 00 00 ];
  537. };
  538. };
  539. ocmcram: ocmcram@40300000 {
  540. compatible = "ti,am3352-ocmcram";
  541. reg = <0x40300000 0x10000>;
  542. ti,hwmods = "ocmcram";
  543. };
  544. wkup_m3: wkup_m3@44d00000 {
  545. compatible = "ti,am3353-wkup-m3";
  546. reg = <0x44d00000 0x4000 /* M3 UMEM */
  547. 0x44d80000 0x2000>; /* M3 DMEM */
  548. ti,hwmods = "wkup_m3";
  549. };
  550. elm: elm@48080000 {
  551. compatible = "ti,am3352-elm";
  552. reg = <0x48080000 0x2000>;
  553. interrupts = <4>;
  554. ti,hwmods = "elm";
  555. status = "disabled";
  556. };
  557. tscadc: tscadc@44e0d000 {
  558. compatible = "ti,am3359-tscadc";
  559. reg = <0x44e0d000 0x1000>;
  560. interrupt-parent = <&intc>;
  561. interrupts = <16>;
  562. ti,hwmods = "adc_tsc";
  563. status = "disabled";
  564. tsc {
  565. compatible = "ti,am3359-tsc";
  566. };
  567. am335x_adc: adc {
  568. #io-channel-cells = <1>;
  569. compatible = "ti,am3359-adc";
  570. };
  571. };
  572. gpmc: gpmc@50000000 {
  573. compatible = "ti,am3352-gpmc";
  574. ti,hwmods = "gpmc";
  575. reg = <0x50000000 0x2000>;
  576. interrupts = <100>;
  577. gpmc,num-cs = <7>;
  578. gpmc,num-waitpins = <2>;
  579. #address-cells = <2>;
  580. #size-cells = <1>;
  581. status = "disabled";
  582. };
  583. };
  584. };