abilis_tb100.dtsi 8.4 KB

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  1. /*
  2. * Abilis Systems TB100 SOC device tree
  3. *
  4. * Copyright (C) Abilis Systems 2013
  5. *
  6. * Author: Christian Ruppert <christian.ruppert@abilis.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. /include/ "abilis_tb10x.dtsi"
  22. / {
  23. clock-frequency = <500000000>; /* 500 MHZ */
  24. soc100 {
  25. bus-frequency = <166666666>;
  26. pll0: oscillator {
  27. clock-frequency = <1000000000>;
  28. };
  29. cpu_clk: clkdiv_cpu {
  30. clock-mult = <1>;
  31. clock-div = <2>;
  32. };
  33. ahb_clk: clkdiv_ahb {
  34. clock-mult = <1>;
  35. clock-div = <6>;
  36. };
  37. iomux: iomux@FF10601c {
  38. /* Port 1 */
  39. pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
  40. pingrp = "mis0_pins";
  41. };
  42. pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
  43. pingrp = "mis1_pins";
  44. };
  45. pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
  46. pingrp = "gpioa_pins";
  47. };
  48. pctl_tsin_p1: pctl-tsin-p1 { /* Parallel TS-in 1 */
  49. pingrp = "mip1_pins";
  50. };
  51. /* Port 2 */
  52. pctl_tsin_s2: pctl-tsin-s2 { /* Serial TS-in 2 */
  53. pingrp = "mis2_pins";
  54. };
  55. pctl_tsin_s3: pctl-tsin-s3 { /* Serial TS-in 3 */
  56. pingrp = "mis3_pins";
  57. };
  58. pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */
  59. pingrp = "gpioc_pins";
  60. };
  61. pctl_tsin_p3: pctl-tsin-p3 { /* Parallel TS-in 3 */
  62. pingrp = "mip3_pins";
  63. };
  64. /* Port 3 */
  65. pctl_tsin_s4: pctl-tsin-s4 { /* Serial TS-in 4 */
  66. pingrp = "mis4_pins";
  67. };
  68. pctl_tsin_s5: pctl-tsin-s5 { /* Serial TS-in 5 */
  69. pingrp = "mis5_pins";
  70. };
  71. pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */
  72. pingrp = "gpioe_pins";
  73. };
  74. pctl_tsin_p5: pctl-tsin-p5 { /* Parallel TS-in 5 */
  75. pingrp = "mip5_pins";
  76. };
  77. /* Port 4 */
  78. pctl_tsin_s6: pctl-tsin-s6 { /* Serial TS-in 6 */
  79. pingrp = "mis6_pins";
  80. };
  81. pctl_tsin_s7: pctl-tsin-s7 { /* Serial TS-in 7 */
  82. pingrp = "mis7_pins";
  83. };
  84. pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */
  85. pingrp = "gpiog_pins";
  86. };
  87. pctl_tsin_p7: pctl-tsin-p7 { /* Parallel TS-in 7 */
  88. pingrp = "mip7_pins";
  89. };
  90. /* Port 5 */
  91. pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */
  92. pingrp = "gpioj_pins";
  93. };
  94. pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */
  95. pingrp = "gpiok_pins";
  96. };
  97. pctl_ciplus: pctl-ciplus { /* CI+ interface */
  98. pingrp = "ciplus_pins";
  99. };
  100. pctl_mcard: pctl-mcard { /* M-Card interface */
  101. pingrp = "mcard_pins";
  102. };
  103. /* Port 6 */
  104. pctl_tsout_p: pctl-tsout-p { /* Parallel TS-out */
  105. pingrp = "mop_pins";
  106. };
  107. pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */
  108. pingrp = "mos0_pins";
  109. };
  110. pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */
  111. pingrp = "mos1_pins";
  112. };
  113. pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */
  114. pingrp = "mos2_pins";
  115. };
  116. pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */
  117. pingrp = "mos3_pins";
  118. };
  119. /* Port 7 */
  120. pctl_uart0: pctl-uart0 { /* UART 0 */
  121. pingrp = "uart0_pins";
  122. };
  123. pctl_uart1: pctl-uart1 { /* UART 1 */
  124. pingrp = "uart1_pins";
  125. };
  126. pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */
  127. pingrp = "gpiol_pins";
  128. };
  129. pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */
  130. pingrp = "gpiom_pins";
  131. };
  132. /* Port 8 */
  133. pctl_spi3: pctl-spi3 {
  134. pingrp = "spi3_pins";
  135. };
  136. /* Port 9 */
  137. pctl_spi1: pctl-spi1 {
  138. pingrp = "spi1_pins";
  139. };
  140. pctl_gpio_n: pctl-gpio-n {
  141. pingrp = "gpion_pins";
  142. };
  143. /* Unmuxed GPIOs */
  144. pctl_gpio_b: pctl-gpio-b {
  145. pingrp = "gpiob_pins";
  146. };
  147. pctl_gpio_d: pctl-gpio-d {
  148. pingrp = "gpiod_pins";
  149. };
  150. pctl_gpio_f: pctl-gpio-f {
  151. pingrp = "gpiof_pins";
  152. };
  153. pctl_gpio_h: pctl-gpio-h {
  154. pingrp = "gpioh_pins";
  155. };
  156. pctl_gpio_i: pctl-gpio-i {
  157. pingrp = "gpioi_pins";
  158. };
  159. };
  160. gpioa: gpio@FF140000 {
  161. compatible = "abilis,tb10x-gpio";
  162. interrupt-controller;
  163. #interrupt-cells = <1>;
  164. interrupt-parent = <&tb10x_ictl>;
  165. interrupts = <27 2>;
  166. reg = <0xFF140000 0x1000>;
  167. gpio-controller;
  168. #gpio-cells = <1>;
  169. gpio-base = <0>;
  170. gpio-pins = <&pctl_gpio_a>;
  171. };
  172. gpiob: gpio@FF141000 {
  173. compatible = "abilis,tb10x-gpio";
  174. interrupt-controller;
  175. #interrupt-cells = <1>;
  176. interrupt-parent = <&tb10x_ictl>;
  177. interrupts = <27 2>;
  178. reg = <0xFF141000 0x1000>;
  179. gpio-controller;
  180. #gpio-cells = <1>;
  181. gpio-base = <3>;
  182. gpio-pins = <&pctl_gpio_b>;
  183. };
  184. gpioc: gpio@FF142000 {
  185. compatible = "abilis,tb10x-gpio";
  186. interrupt-controller;
  187. #interrupt-cells = <1>;
  188. interrupt-parent = <&tb10x_ictl>;
  189. interrupts = <27 2>;
  190. reg = <0xFF142000 0x1000>;
  191. gpio-controller;
  192. #gpio-cells = <1>;
  193. gpio-base = <5>;
  194. gpio-pins = <&pctl_gpio_c>;
  195. };
  196. gpiod: gpio@FF143000 {
  197. compatible = "abilis,tb10x-gpio";
  198. interrupt-controller;
  199. #interrupt-cells = <1>;
  200. interrupt-parent = <&tb10x_ictl>;
  201. interrupts = <27 2>;
  202. reg = <0xFF143000 0x1000>;
  203. gpio-controller;
  204. #gpio-cells = <1>;
  205. gpio-base = <8>;
  206. gpio-pins = <&pctl_gpio_d>;
  207. };
  208. gpioe: gpio@FF144000 {
  209. compatible = "abilis,tb10x-gpio";
  210. interrupt-controller;
  211. #interrupt-cells = <1>;
  212. interrupt-parent = <&tb10x_ictl>;
  213. interrupts = <27 2>;
  214. reg = <0xFF144000 0x1000>;
  215. gpio-controller;
  216. #gpio-cells = <1>;
  217. gpio-base = <10>;
  218. gpio-pins = <&pctl_gpio_e>;
  219. };
  220. gpiof: gpio@FF145000 {
  221. compatible = "abilis,tb10x-gpio";
  222. interrupt-controller;
  223. #interrupt-cells = <1>;
  224. interrupt-parent = <&tb10x_ictl>;
  225. interrupts = <27 2>;
  226. reg = <0xFF145000 0x1000>;
  227. gpio-controller;
  228. #gpio-cells = <1>;
  229. gpio-base = <13>;
  230. gpio-pins = <&pctl_gpio_f>;
  231. };
  232. gpiog: gpio@FF146000 {
  233. compatible = "abilis,tb10x-gpio";
  234. interrupt-controller;
  235. #interrupt-cells = <1>;
  236. interrupt-parent = <&tb10x_ictl>;
  237. interrupts = <27 2>;
  238. reg = <0xFF146000 0x1000>;
  239. gpio-controller;
  240. #gpio-cells = <1>;
  241. gpio-base = <15>;
  242. gpio-pins = <&pctl_gpio_g>;
  243. };
  244. gpioh: gpio@FF147000 {
  245. compatible = "abilis,tb10x-gpio";
  246. interrupt-controller;
  247. #interrupt-cells = <1>;
  248. interrupt-parent = <&tb10x_ictl>;
  249. interrupts = <27 2>;
  250. reg = <0xFF147000 0x1000>;
  251. gpio-controller;
  252. #gpio-cells = <1>;
  253. gpio-base = <18>;
  254. gpio-pins = <&pctl_gpio_h>;
  255. };
  256. gpioi: gpio@FF148000 {
  257. compatible = "abilis,tb10x-gpio";
  258. interrupt-controller;
  259. #interrupt-cells = <1>;
  260. interrupt-parent = <&tb10x_ictl>;
  261. interrupts = <27 2>;
  262. reg = <0xFF148000 0x1000>;
  263. gpio-controller;
  264. #gpio-cells = <1>;
  265. gpio-base = <20>;
  266. gpio-pins = <&pctl_gpio_i>;
  267. };
  268. gpioj: gpio@FF149000 {
  269. compatible = "abilis,tb10x-gpio";
  270. interrupt-controller;
  271. #interrupt-cells = <1>;
  272. interrupt-parent = <&tb10x_ictl>;
  273. interrupts = <27 2>;
  274. reg = <0xFF149000 0x1000>;
  275. gpio-controller;
  276. #gpio-cells = <1>;
  277. gpio-base = <32>;
  278. gpio-pins = <&pctl_gpio_j>;
  279. };
  280. gpiok: gpio@FF14a000 {
  281. compatible = "abilis,tb10x-gpio";
  282. interrupt-controller;
  283. #interrupt-cells = <1>;
  284. interrupt-parent = <&tb10x_ictl>;
  285. interrupts = <27 2>;
  286. reg = <0xFF14A000 0x1000>;
  287. gpio-controller;
  288. #gpio-cells = <1>;
  289. gpio-base = <64>;
  290. gpio-pins = <&pctl_gpio_k>;
  291. };
  292. gpiol: gpio@FF14b000 {
  293. compatible = "abilis,tb10x-gpio";
  294. interrupt-controller;
  295. #interrupt-cells = <1>;
  296. interrupt-parent = <&tb10x_ictl>;
  297. interrupts = <27 2>;
  298. reg = <0xFF14B000 0x1000>;
  299. gpio-controller;
  300. #gpio-cells = <1>;
  301. gpio-base = <86>;
  302. gpio-pins = <&pctl_gpio_l>;
  303. };
  304. gpiom: gpio@FF14c000 {
  305. compatible = "abilis,tb10x-gpio";
  306. interrupt-controller;
  307. #interrupt-cells = <1>;
  308. interrupt-parent = <&tb10x_ictl>;
  309. interrupts = <27 2>;
  310. reg = <0xFF14C000 0x1000>;
  311. gpio-controller;
  312. #gpio-cells = <1>;
  313. gpio-base = <90>;
  314. gpio-pins = <&pctl_gpio_m>;
  315. };
  316. gpion: gpio@FF14d000 {
  317. compatible = "abilis,tb10x-gpio";
  318. interrupt-controller;
  319. #interrupt-cells = <1>;
  320. interrupt-parent = <&tb10x_ictl>;
  321. interrupts = <27 2>;
  322. reg = <0xFF14D000 0x1000>;
  323. gpio-controller;
  324. #gpio-cells = <1>;
  325. gpio-base = <94>;
  326. gpio-pins = <&pctl_gpio_n>;
  327. };
  328. };
  329. };