mrvl-gpio.txt 1.8 KB

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  1. * Marvell PXA GPIO controller
  2. Required properties:
  3. - compatible : Should be "intel,pxa25x-gpio", "intel,pxa26x-gpio",
  4. "intel,pxa27x-gpio", "intel,pxa3xx-gpio",
  5. "marvell,pxa93x-gpio", "marvell,mmp-gpio" or
  6. "marvell,mmp2-gpio".
  7. - reg : Address and length of the register set for the device
  8. - interrupts : Should be the port interrupt shared by all gpio pins.
  9. There're three gpio interrupts in arch-pxa, and they're gpio0,
  10. gpio1 and gpio_mux. There're only one gpio interrupt in arch-mmp,
  11. gpio_mux.
  12. - interrupt-names : Should be the names of irq resources. Each interrupt
  13. uses its own interrupt name, so there should be as many interrupt names
  14. as referenced interrups.
  15. - interrupt-controller : Identifies the node as an interrupt controller.
  16. - #interrupt-cells: Specifies the number of cells needed to encode an
  17. interrupt source.
  18. - gpio-controller : Marks the device node as a gpio controller.
  19. - #gpio-cells : Should be one. It is the pin number.
  20. Example:
  21. gpio: gpio@d4019000 {
  22. compatible = "marvell,mmp-gpio";
  23. reg = <0xd4019000 0x1000>;
  24. interrupts = <49>;
  25. interrupt-names = "gpio_mux";
  26. gpio-controller;
  27. #gpio-cells = <1>;
  28. interrupt-controller;
  29. #interrupt-cells = <1>;
  30. };
  31. * Marvell Orion GPIO Controller
  32. Required properties:
  33. - compatible : Should be "marvell,orion-gpio"
  34. - reg : Address and length of the register set for controller.
  35. - gpio-controller : So we know this is a gpio controller.
  36. - ngpio : How many gpios this controller has.
  37. - interrupts : Up to 4 Interrupts for the controller.
  38. Optional properties:
  39. - mask-offset : For SMP Orions, offset for Nth CPU
  40. Example:
  41. gpio0: gpio@10100 {
  42. compatible = "marvell,orion-gpio";
  43. #gpio-cells = <2>;
  44. gpio-controller;
  45. reg = <0x10100 0x40>;
  46. ngpio = <32>;
  47. interrupts = <35>, <36>, <37>, <38>;
  48. };