intel_lvds.c 33 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include "drmP.h"
  33. #include "drm.h"
  34. #include "drm_crtc.h"
  35. #include "drm_edid.h"
  36. #include "intel_drv.h"
  37. #include "i915_drm.h"
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_priv {
  42. int fitting_mode;
  43. u32 pfit_control;
  44. u32 pfit_pgm_ratios;
  45. };
  46. /**
  47. * Sets the backlight level.
  48. *
  49. * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
  50. */
  51. static void intel_lvds_set_backlight(struct drm_device *dev, int level)
  52. {
  53. struct drm_i915_private *dev_priv = dev->dev_private;
  54. u32 blc_pwm_ctl, reg;
  55. if (IS_IRONLAKE(dev))
  56. reg = BLC_PWM_CPU_CTL;
  57. else
  58. reg = BLC_PWM_CTL;
  59. blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  60. I915_WRITE(reg, (blc_pwm_ctl |
  61. (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  62. }
  63. /**
  64. * Returns the maximum level of the backlight duty cycle field.
  65. */
  66. static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
  67. {
  68. struct drm_i915_private *dev_priv = dev->dev_private;
  69. u32 reg;
  70. if (IS_IRONLAKE(dev))
  71. reg = BLC_PWM_PCH_CTL2;
  72. else
  73. reg = BLC_PWM_CTL;
  74. return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
  75. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  76. }
  77. /**
  78. * Sets the power state for the panel.
  79. */
  80. static void intel_lvds_set_power(struct drm_device *dev, bool on)
  81. {
  82. struct drm_i915_private *dev_priv = dev->dev_private;
  83. u32 pp_status, ctl_reg, status_reg;
  84. if (IS_IRONLAKE(dev)) {
  85. ctl_reg = PCH_PP_CONTROL;
  86. status_reg = PCH_PP_STATUS;
  87. } else {
  88. ctl_reg = PP_CONTROL;
  89. status_reg = PP_STATUS;
  90. }
  91. if (on) {
  92. I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
  93. POWER_TARGET_ON);
  94. do {
  95. pp_status = I915_READ(status_reg);
  96. } while ((pp_status & PP_ON) == 0);
  97. intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
  98. } else {
  99. intel_lvds_set_backlight(dev, 0);
  100. I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
  101. ~POWER_TARGET_ON);
  102. do {
  103. pp_status = I915_READ(status_reg);
  104. } while (pp_status & PP_ON);
  105. }
  106. }
  107. static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
  108. {
  109. struct drm_device *dev = encoder->dev;
  110. if (mode == DRM_MODE_DPMS_ON)
  111. intel_lvds_set_power(dev, true);
  112. else
  113. intel_lvds_set_power(dev, false);
  114. /* XXX: We never power down the LVDS pairs. */
  115. }
  116. static void intel_lvds_save(struct drm_connector *connector)
  117. {
  118. struct drm_device *dev = connector->dev;
  119. struct drm_i915_private *dev_priv = dev->dev_private;
  120. u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
  121. u32 pwm_ctl_reg;
  122. if (IS_IRONLAKE(dev)) {
  123. pp_on_reg = PCH_PP_ON_DELAYS;
  124. pp_off_reg = PCH_PP_OFF_DELAYS;
  125. pp_ctl_reg = PCH_PP_CONTROL;
  126. pp_div_reg = PCH_PP_DIVISOR;
  127. pwm_ctl_reg = BLC_PWM_CPU_CTL;
  128. } else {
  129. pp_on_reg = PP_ON_DELAYS;
  130. pp_off_reg = PP_OFF_DELAYS;
  131. pp_ctl_reg = PP_CONTROL;
  132. pp_div_reg = PP_DIVISOR;
  133. pwm_ctl_reg = BLC_PWM_CTL;
  134. }
  135. dev_priv->savePP_ON = I915_READ(pp_on_reg);
  136. dev_priv->savePP_OFF = I915_READ(pp_off_reg);
  137. dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
  138. dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
  139. dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
  140. dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
  141. BACKLIGHT_DUTY_CYCLE_MASK);
  142. /*
  143. * If the light is off at server startup, just make it full brightness
  144. */
  145. if (dev_priv->backlight_duty_cycle == 0)
  146. dev_priv->backlight_duty_cycle =
  147. intel_lvds_get_max_backlight(dev);
  148. }
  149. static void intel_lvds_restore(struct drm_connector *connector)
  150. {
  151. struct drm_device *dev = connector->dev;
  152. struct drm_i915_private *dev_priv = dev->dev_private;
  153. u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
  154. u32 pwm_ctl_reg;
  155. if (IS_IRONLAKE(dev)) {
  156. pp_on_reg = PCH_PP_ON_DELAYS;
  157. pp_off_reg = PCH_PP_OFF_DELAYS;
  158. pp_ctl_reg = PCH_PP_CONTROL;
  159. pp_div_reg = PCH_PP_DIVISOR;
  160. pwm_ctl_reg = BLC_PWM_CPU_CTL;
  161. } else {
  162. pp_on_reg = PP_ON_DELAYS;
  163. pp_off_reg = PP_OFF_DELAYS;
  164. pp_ctl_reg = PP_CONTROL;
  165. pp_div_reg = PP_DIVISOR;
  166. pwm_ctl_reg = BLC_PWM_CTL;
  167. }
  168. I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
  169. I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
  170. I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
  171. I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
  172. I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
  173. if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
  174. intel_lvds_set_power(dev, true);
  175. else
  176. intel_lvds_set_power(dev, false);
  177. }
  178. static int intel_lvds_mode_valid(struct drm_connector *connector,
  179. struct drm_display_mode *mode)
  180. {
  181. struct drm_device *dev = connector->dev;
  182. struct drm_i915_private *dev_priv = dev->dev_private;
  183. struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
  184. if (fixed_mode) {
  185. if (mode->hdisplay > fixed_mode->hdisplay)
  186. return MODE_PANEL;
  187. if (mode->vdisplay > fixed_mode->vdisplay)
  188. return MODE_PANEL;
  189. }
  190. return MODE_OK;
  191. }
  192. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  193. struct drm_display_mode *mode,
  194. struct drm_display_mode *adjusted_mode)
  195. {
  196. /*
  197. * float point operation is not supported . So the PANEL_RATIO_FACTOR
  198. * is defined, which can avoid the float point computation when
  199. * calculating the panel ratio.
  200. */
  201. #define PANEL_RATIO_FACTOR 8192
  202. struct drm_device *dev = encoder->dev;
  203. struct drm_i915_private *dev_priv = dev->dev_private;
  204. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  205. struct drm_encoder *tmp_encoder;
  206. struct intel_output *intel_output = enc_to_intel_output(encoder);
  207. struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
  208. u32 pfit_control = 0, pfit_pgm_ratios = 0;
  209. int left_border = 0, right_border = 0, top_border = 0;
  210. int bottom_border = 0;
  211. bool border = 0;
  212. int panel_ratio, desired_ratio, vert_scale, horiz_scale;
  213. int horiz_ratio, vert_ratio;
  214. u32 hsync_width, vsync_width;
  215. u32 hblank_width, vblank_width;
  216. u32 hsync_pos, vsync_pos;
  217. /* Should never happen!! */
  218. if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
  219. DRM_ERROR("Can't support LVDS on pipe A\n");
  220. return false;
  221. }
  222. /* Should never happen!! */
  223. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
  224. if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
  225. DRM_ERROR("Can't enable LVDS and another "
  226. "encoder on the same pipe\n");
  227. return false;
  228. }
  229. }
  230. /* If we don't have a panel mode, there is nothing we can do */
  231. if (dev_priv->panel_fixed_mode == NULL)
  232. return true;
  233. /*
  234. * If we have timings from the BIOS for the panel, put them in
  235. * to the adjusted mode. The CRTC will be set up for this mode,
  236. * with the panel scaling set up to source from the H/VDisplay
  237. * of the original mode.
  238. */
  239. if (dev_priv->panel_fixed_mode != NULL) {
  240. adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
  241. adjusted_mode->hsync_start =
  242. dev_priv->panel_fixed_mode->hsync_start;
  243. adjusted_mode->hsync_end =
  244. dev_priv->panel_fixed_mode->hsync_end;
  245. adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
  246. adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
  247. adjusted_mode->vsync_start =
  248. dev_priv->panel_fixed_mode->vsync_start;
  249. adjusted_mode->vsync_end =
  250. dev_priv->panel_fixed_mode->vsync_end;
  251. adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
  252. adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
  253. drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
  254. }
  255. /* Make sure pre-965s set dither correctly */
  256. if (!IS_I965G(dev)) {
  257. if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
  258. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  259. }
  260. /* Native modes don't need fitting */
  261. if (adjusted_mode->hdisplay == mode->hdisplay &&
  262. adjusted_mode->vdisplay == mode->vdisplay) {
  263. pfit_pgm_ratios = 0;
  264. border = 0;
  265. goto out;
  266. }
  267. /* full screen scale for now */
  268. if (IS_IRONLAKE(dev))
  269. goto out;
  270. /* 965+ wants fuzzy fitting */
  271. if (IS_I965G(dev))
  272. pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  273. PFIT_FILTER_FUZZY;
  274. hsync_width = adjusted_mode->crtc_hsync_end -
  275. adjusted_mode->crtc_hsync_start;
  276. vsync_width = adjusted_mode->crtc_vsync_end -
  277. adjusted_mode->crtc_vsync_start;
  278. hblank_width = adjusted_mode->crtc_hblank_end -
  279. adjusted_mode->crtc_hblank_start;
  280. vblank_width = adjusted_mode->crtc_vblank_end -
  281. adjusted_mode->crtc_vblank_start;
  282. /*
  283. * Deal with panel fitting options. Figure out how to stretch the
  284. * image based on its aspect ratio & the current panel fitting mode.
  285. */
  286. panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
  287. adjusted_mode->vdisplay;
  288. desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
  289. mode->vdisplay;
  290. /*
  291. * Enable automatic panel scaling for non-native modes so that they fill
  292. * the screen. Should be enabled before the pipe is enabled, according
  293. * to register description and PRM.
  294. * Change the value here to see the borders for debugging
  295. */
  296. if (!IS_IRONLAKE(dev)) {
  297. I915_WRITE(BCLRPAT_A, 0);
  298. I915_WRITE(BCLRPAT_B, 0);
  299. }
  300. switch (lvds_priv->fitting_mode) {
  301. case DRM_MODE_SCALE_CENTER:
  302. /*
  303. * For centered modes, we have to calculate border widths &
  304. * heights and modify the values programmed into the CRTC.
  305. */
  306. left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
  307. right_border = left_border;
  308. if (mode->hdisplay & 1)
  309. right_border++;
  310. top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
  311. bottom_border = top_border;
  312. if (mode->vdisplay & 1)
  313. bottom_border++;
  314. /* Set active & border values */
  315. adjusted_mode->crtc_hdisplay = mode->hdisplay;
  316. /* Keep the boder be even */
  317. if (right_border & 1)
  318. right_border++;
  319. /* use the border directly instead of border minuse one */
  320. adjusted_mode->crtc_hblank_start = mode->hdisplay +
  321. right_border;
  322. /* keep the blank width constant */
  323. adjusted_mode->crtc_hblank_end =
  324. adjusted_mode->crtc_hblank_start + hblank_width;
  325. /* get the hsync pos relative to hblank start */
  326. hsync_pos = (hblank_width - hsync_width) / 2;
  327. /* keep the hsync pos be even */
  328. if (hsync_pos & 1)
  329. hsync_pos++;
  330. adjusted_mode->crtc_hsync_start =
  331. adjusted_mode->crtc_hblank_start + hsync_pos;
  332. /* keep the hsync width constant */
  333. adjusted_mode->crtc_hsync_end =
  334. adjusted_mode->crtc_hsync_start + hsync_width;
  335. adjusted_mode->crtc_vdisplay = mode->vdisplay;
  336. /* use the border instead of border minus one */
  337. adjusted_mode->crtc_vblank_start = mode->vdisplay +
  338. bottom_border;
  339. /* keep the vblank width constant */
  340. adjusted_mode->crtc_vblank_end =
  341. adjusted_mode->crtc_vblank_start + vblank_width;
  342. /* get the vsync start postion relative to vblank start */
  343. vsync_pos = (vblank_width - vsync_width) / 2;
  344. adjusted_mode->crtc_vsync_start =
  345. adjusted_mode->crtc_vblank_start + vsync_pos;
  346. /* keep the vsync width constant */
  347. adjusted_mode->crtc_vsync_end =
  348. adjusted_mode->crtc_vsync_start + vsync_width;
  349. border = 1;
  350. break;
  351. case DRM_MODE_SCALE_ASPECT:
  352. /* Scale but preserve the spect ratio */
  353. pfit_control |= PFIT_ENABLE;
  354. if (IS_I965G(dev)) {
  355. /* 965+ is easy, it does everything in hw */
  356. if (panel_ratio > desired_ratio)
  357. pfit_control |= PFIT_SCALING_PILLAR;
  358. else if (panel_ratio < desired_ratio)
  359. pfit_control |= PFIT_SCALING_LETTER;
  360. else
  361. pfit_control |= PFIT_SCALING_AUTO;
  362. } else {
  363. /*
  364. * For earlier chips we have to calculate the scaling
  365. * ratio by hand and program it into the
  366. * PFIT_PGM_RATIO register
  367. */
  368. u32 horiz_bits, vert_bits, bits = 12;
  369. horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
  370. adjusted_mode->hdisplay;
  371. vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
  372. adjusted_mode->vdisplay;
  373. horiz_scale = adjusted_mode->hdisplay *
  374. PANEL_RATIO_FACTOR / mode->hdisplay;
  375. vert_scale = adjusted_mode->vdisplay *
  376. PANEL_RATIO_FACTOR / mode->vdisplay;
  377. /* retain aspect ratio */
  378. if (panel_ratio > desired_ratio) { /* Pillar */
  379. u32 scaled_width;
  380. scaled_width = mode->hdisplay * vert_scale /
  381. PANEL_RATIO_FACTOR;
  382. horiz_ratio = vert_ratio;
  383. pfit_control |= (VERT_AUTO_SCALE |
  384. VERT_INTERP_BILINEAR |
  385. HORIZ_INTERP_BILINEAR);
  386. /* Pillar will have left/right borders */
  387. left_border = (adjusted_mode->hdisplay -
  388. scaled_width) / 2;
  389. right_border = left_border;
  390. if (mode->hdisplay & 1) /* odd resolutions */
  391. right_border++;
  392. /* keep the border be even */
  393. if (right_border & 1)
  394. right_border++;
  395. adjusted_mode->crtc_hdisplay = scaled_width;
  396. /* use border instead of border minus one */
  397. adjusted_mode->crtc_hblank_start =
  398. scaled_width + right_border;
  399. /* keep the hblank width constant */
  400. adjusted_mode->crtc_hblank_end =
  401. adjusted_mode->crtc_hblank_start +
  402. hblank_width;
  403. /*
  404. * get the hsync start pos relative to
  405. * hblank start
  406. */
  407. hsync_pos = (hblank_width - hsync_width) / 2;
  408. /* keep the hsync_pos be even */
  409. if (hsync_pos & 1)
  410. hsync_pos++;
  411. adjusted_mode->crtc_hsync_start =
  412. adjusted_mode->crtc_hblank_start +
  413. hsync_pos;
  414. /* keept hsync width constant */
  415. adjusted_mode->crtc_hsync_end =
  416. adjusted_mode->crtc_hsync_start +
  417. hsync_width;
  418. border = 1;
  419. } else if (panel_ratio < desired_ratio) { /* letter */
  420. u32 scaled_height = mode->vdisplay *
  421. horiz_scale / PANEL_RATIO_FACTOR;
  422. vert_ratio = horiz_ratio;
  423. pfit_control |= (HORIZ_AUTO_SCALE |
  424. VERT_INTERP_BILINEAR |
  425. HORIZ_INTERP_BILINEAR);
  426. /* Letterbox will have top/bottom border */
  427. top_border = (adjusted_mode->vdisplay -
  428. scaled_height) / 2;
  429. bottom_border = top_border;
  430. if (mode->vdisplay & 1)
  431. bottom_border++;
  432. adjusted_mode->crtc_vdisplay = scaled_height;
  433. /* use border instead of border minus one */
  434. adjusted_mode->crtc_vblank_start =
  435. scaled_height + bottom_border;
  436. /* keep the vblank width constant */
  437. adjusted_mode->crtc_vblank_end =
  438. adjusted_mode->crtc_vblank_start +
  439. vblank_width;
  440. /*
  441. * get the vsync start pos relative to
  442. * vblank start
  443. */
  444. vsync_pos = (vblank_width - vsync_width) / 2;
  445. adjusted_mode->crtc_vsync_start =
  446. adjusted_mode->crtc_vblank_start +
  447. vsync_pos;
  448. /* keep the vsync width constant */
  449. adjusted_mode->crtc_vsync_end =
  450. adjusted_mode->crtc_vsync_start +
  451. vsync_width;
  452. border = 1;
  453. } else {
  454. /* Aspects match, Let hw scale both directions */
  455. pfit_control |= (VERT_AUTO_SCALE |
  456. HORIZ_AUTO_SCALE |
  457. VERT_INTERP_BILINEAR |
  458. HORIZ_INTERP_BILINEAR);
  459. }
  460. horiz_bits = (1 << bits) * horiz_ratio /
  461. PANEL_RATIO_FACTOR;
  462. vert_bits = (1 << bits) * vert_ratio /
  463. PANEL_RATIO_FACTOR;
  464. pfit_pgm_ratios =
  465. ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
  466. PFIT_VERT_SCALE_MASK) |
  467. ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
  468. PFIT_HORIZ_SCALE_MASK);
  469. }
  470. break;
  471. case DRM_MODE_SCALE_FULLSCREEN:
  472. /*
  473. * Full scaling, even if it changes the aspect ratio.
  474. * Fortunately this is all done for us in hw.
  475. */
  476. pfit_control |= PFIT_ENABLE;
  477. if (IS_I965G(dev))
  478. pfit_control |= PFIT_SCALING_AUTO;
  479. else
  480. pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  481. VERT_INTERP_BILINEAR |
  482. HORIZ_INTERP_BILINEAR);
  483. break;
  484. default:
  485. break;
  486. }
  487. out:
  488. lvds_priv->pfit_control = pfit_control;
  489. lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
  490. /*
  491. * When there exists the border, it means that the LVDS_BORDR
  492. * should be enabled.
  493. */
  494. if (border)
  495. dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
  496. else
  497. dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
  498. /*
  499. * XXX: It would be nice to support lower refresh rates on the
  500. * panels to reduce power consumption, and perhaps match the
  501. * user's requested refresh rate.
  502. */
  503. return true;
  504. }
  505. static void intel_lvds_prepare(struct drm_encoder *encoder)
  506. {
  507. struct drm_device *dev = encoder->dev;
  508. struct drm_i915_private *dev_priv = dev->dev_private;
  509. u32 reg;
  510. if (IS_IRONLAKE(dev))
  511. reg = BLC_PWM_CPU_CTL;
  512. else
  513. reg = BLC_PWM_CTL;
  514. dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
  515. dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
  516. BACKLIGHT_DUTY_CYCLE_MASK);
  517. intel_lvds_set_power(dev, false);
  518. }
  519. static void intel_lvds_commit( struct drm_encoder *encoder)
  520. {
  521. struct drm_device *dev = encoder->dev;
  522. struct drm_i915_private *dev_priv = dev->dev_private;
  523. if (dev_priv->backlight_duty_cycle == 0)
  524. dev_priv->backlight_duty_cycle =
  525. intel_lvds_get_max_backlight(dev);
  526. intel_lvds_set_power(dev, true);
  527. }
  528. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  529. struct drm_display_mode *mode,
  530. struct drm_display_mode *adjusted_mode)
  531. {
  532. struct drm_device *dev = encoder->dev;
  533. struct drm_i915_private *dev_priv = dev->dev_private;
  534. struct intel_output *intel_output = enc_to_intel_output(encoder);
  535. struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
  536. /*
  537. * The LVDS pin pair will already have been turned on in the
  538. * intel_crtc_mode_set since it has a large impact on the DPLL
  539. * settings.
  540. */
  541. if (IS_IRONLAKE(dev))
  542. return;
  543. /*
  544. * Enable automatic panel scaling so that non-native modes fill the
  545. * screen. Should be enabled before the pipe is enabled, according to
  546. * register description and PRM.
  547. */
  548. I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
  549. I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
  550. }
  551. /* Some lid devices report incorrect lid status, assume they're connected */
  552. static const struct dmi_system_id bad_lid_status[] = {
  553. {
  554. .ident = "Compaq nx9020",
  555. .matches = {
  556. DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
  557. DMI_MATCH(DMI_BOARD_NAME, "3084"),
  558. },
  559. },
  560. {
  561. .ident = "Samsung SX20S",
  562. .matches = {
  563. DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
  564. DMI_MATCH(DMI_BOARD_NAME, "SX20S"),
  565. },
  566. },
  567. {
  568. .ident = "Aspire One",
  569. .matches = {
  570. DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
  571. DMI_MATCH(DMI_PRODUCT_NAME, "Aspire one"),
  572. },
  573. },
  574. {
  575. .ident = "PC-81005",
  576. .matches = {
  577. DMI_MATCH(DMI_SYS_VENDOR, "MALATA"),
  578. DMI_MATCH(DMI_PRODUCT_NAME, "PC-81005"),
  579. },
  580. },
  581. { }
  582. };
  583. /**
  584. * Detect the LVDS connection.
  585. *
  586. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  587. * connected and closed means disconnected. We also send hotplug events as
  588. * needed, using lid status notification from the input layer.
  589. */
  590. static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
  591. {
  592. enum drm_connector_status status = connector_status_connected;
  593. if (!acpi_lid_open() && !dmi_check_system(bad_lid_status))
  594. status = connector_status_disconnected;
  595. return status;
  596. }
  597. /**
  598. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  599. */
  600. static int intel_lvds_get_modes(struct drm_connector *connector)
  601. {
  602. struct drm_device *dev = connector->dev;
  603. struct intel_output *intel_output = to_intel_output(connector);
  604. struct drm_i915_private *dev_priv = dev->dev_private;
  605. int ret = 0;
  606. ret = intel_ddc_get_modes(intel_output);
  607. if (ret)
  608. return ret;
  609. /* Didn't get an EDID, so
  610. * Set wide sync ranges so we get all modes
  611. * handed to valid_mode for checking
  612. */
  613. connector->display_info.min_vfreq = 0;
  614. connector->display_info.max_vfreq = 200;
  615. connector->display_info.min_hfreq = 0;
  616. connector->display_info.max_hfreq = 200;
  617. if (dev_priv->panel_fixed_mode != NULL) {
  618. struct drm_display_mode *mode;
  619. mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
  620. drm_mode_probed_add(connector, mode);
  621. return 1;
  622. }
  623. return 0;
  624. }
  625. /*
  626. * Lid events. Note the use of 'modeset_on_lid':
  627. * - we set it on lid close, and reset it on open
  628. * - we use it as a "only once" bit (ie we ignore
  629. * duplicate events where it was already properly
  630. * set/reset)
  631. * - the suspend/resume paths will also set it to
  632. * zero, since they restore the mode ("lid open").
  633. */
  634. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  635. void *unused)
  636. {
  637. struct drm_i915_private *dev_priv =
  638. container_of(nb, struct drm_i915_private, lid_notifier);
  639. struct drm_device *dev = dev_priv->dev;
  640. struct drm_connector *connector = dev_priv->int_lvds_connector;
  641. /*
  642. * check and update the status of LVDS connector after receiving
  643. * the LID nofication event.
  644. */
  645. if (connector)
  646. connector->status = connector->funcs->detect(connector);
  647. if (!acpi_lid_open()) {
  648. dev_priv->modeset_on_lid = 1;
  649. return NOTIFY_OK;
  650. }
  651. if (!dev_priv->modeset_on_lid)
  652. return NOTIFY_OK;
  653. dev_priv->modeset_on_lid = 0;
  654. mutex_lock(&dev->mode_config.mutex);
  655. drm_helper_resume_force_mode(dev);
  656. mutex_unlock(&dev->mode_config.mutex);
  657. return NOTIFY_OK;
  658. }
  659. /**
  660. * intel_lvds_destroy - unregister and free LVDS structures
  661. * @connector: connector to free
  662. *
  663. * Unregister the DDC bus for this connector then free the driver private
  664. * structure.
  665. */
  666. static void intel_lvds_destroy(struct drm_connector *connector)
  667. {
  668. struct drm_device *dev = connector->dev;
  669. struct intel_output *intel_output = to_intel_output(connector);
  670. struct drm_i915_private *dev_priv = dev->dev_private;
  671. if (intel_output->ddc_bus)
  672. intel_i2c_destroy(intel_output->ddc_bus);
  673. if (dev_priv->lid_notifier.notifier_call)
  674. acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
  675. drm_sysfs_connector_remove(connector);
  676. drm_connector_cleanup(connector);
  677. kfree(connector);
  678. }
  679. static int intel_lvds_set_property(struct drm_connector *connector,
  680. struct drm_property *property,
  681. uint64_t value)
  682. {
  683. struct drm_device *dev = connector->dev;
  684. struct intel_output *intel_output =
  685. to_intel_output(connector);
  686. if (property == dev->mode_config.scaling_mode_property &&
  687. connector->encoder) {
  688. struct drm_crtc *crtc = connector->encoder->crtc;
  689. struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
  690. if (value == DRM_MODE_SCALE_NONE) {
  691. DRM_DEBUG_KMS("no scaling not supported\n");
  692. return 0;
  693. }
  694. if (lvds_priv->fitting_mode == value) {
  695. /* the LVDS scaling property is not changed */
  696. return 0;
  697. }
  698. lvds_priv->fitting_mode = value;
  699. if (crtc && crtc->enabled) {
  700. /*
  701. * If the CRTC is enabled, the display will be changed
  702. * according to the new panel fitting mode.
  703. */
  704. drm_crtc_helper_set_mode(crtc, &crtc->mode,
  705. crtc->x, crtc->y, crtc->fb);
  706. }
  707. }
  708. return 0;
  709. }
  710. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  711. .dpms = intel_lvds_dpms,
  712. .mode_fixup = intel_lvds_mode_fixup,
  713. .prepare = intel_lvds_prepare,
  714. .mode_set = intel_lvds_mode_set,
  715. .commit = intel_lvds_commit,
  716. };
  717. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  718. .get_modes = intel_lvds_get_modes,
  719. .mode_valid = intel_lvds_mode_valid,
  720. .best_encoder = intel_best_encoder,
  721. };
  722. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  723. .dpms = drm_helper_connector_dpms,
  724. .save = intel_lvds_save,
  725. .restore = intel_lvds_restore,
  726. .detect = intel_lvds_detect,
  727. .fill_modes = drm_helper_probe_single_connector_modes,
  728. .set_property = intel_lvds_set_property,
  729. .destroy = intel_lvds_destroy,
  730. };
  731. static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
  732. {
  733. drm_encoder_cleanup(encoder);
  734. }
  735. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  736. .destroy = intel_lvds_enc_destroy,
  737. };
  738. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  739. {
  740. DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
  741. return 1;
  742. }
  743. /* These systems claim to have LVDS, but really don't */
  744. static const struct dmi_system_id intel_no_lvds[] = {
  745. {
  746. .callback = intel_no_lvds_dmi_callback,
  747. .ident = "Apple Mac Mini (Core series)",
  748. .matches = {
  749. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  750. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  751. },
  752. },
  753. {
  754. .callback = intel_no_lvds_dmi_callback,
  755. .ident = "Apple Mac Mini (Core 2 series)",
  756. .matches = {
  757. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  758. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  759. },
  760. },
  761. {
  762. .callback = intel_no_lvds_dmi_callback,
  763. .ident = "MSI IM-945GSE-A",
  764. .matches = {
  765. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  766. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  767. },
  768. },
  769. {
  770. .callback = intel_no_lvds_dmi_callback,
  771. .ident = "Dell Studio Hybrid",
  772. .matches = {
  773. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  774. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  775. },
  776. },
  777. {
  778. .callback = intel_no_lvds_dmi_callback,
  779. .ident = "AOpen Mini PC",
  780. .matches = {
  781. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  782. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  783. },
  784. },
  785. {
  786. .callback = intel_no_lvds_dmi_callback,
  787. .ident = "AOpen Mini PC MP915",
  788. .matches = {
  789. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  790. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  791. },
  792. },
  793. {
  794. .callback = intel_no_lvds_dmi_callback,
  795. .ident = "Aopen i945GTt-VFA",
  796. .matches = {
  797. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  798. },
  799. },
  800. { } /* terminating entry */
  801. };
  802. /**
  803. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  804. * @dev: drm device
  805. * @connector: LVDS connector
  806. *
  807. * Find the reduced downclock for LVDS in EDID.
  808. */
  809. static void intel_find_lvds_downclock(struct drm_device *dev,
  810. struct drm_connector *connector)
  811. {
  812. struct drm_i915_private *dev_priv = dev->dev_private;
  813. struct drm_display_mode *scan, *panel_fixed_mode;
  814. int temp_downclock;
  815. panel_fixed_mode = dev_priv->panel_fixed_mode;
  816. temp_downclock = panel_fixed_mode->clock;
  817. mutex_lock(&dev->mode_config.mutex);
  818. list_for_each_entry(scan, &connector->probed_modes, head) {
  819. /*
  820. * If one mode has the same resolution with the fixed_panel
  821. * mode while they have the different refresh rate, it means
  822. * that the reduced downclock is found for the LVDS. In such
  823. * case we can set the different FPx0/1 to dynamically select
  824. * between low and high frequency.
  825. */
  826. if (scan->hdisplay == panel_fixed_mode->hdisplay &&
  827. scan->hsync_start == panel_fixed_mode->hsync_start &&
  828. scan->hsync_end == panel_fixed_mode->hsync_end &&
  829. scan->htotal == panel_fixed_mode->htotal &&
  830. scan->vdisplay == panel_fixed_mode->vdisplay &&
  831. scan->vsync_start == panel_fixed_mode->vsync_start &&
  832. scan->vsync_end == panel_fixed_mode->vsync_end &&
  833. scan->vtotal == panel_fixed_mode->vtotal) {
  834. if (scan->clock < temp_downclock) {
  835. /*
  836. * The downclock is already found. But we
  837. * expect to find the lower downclock.
  838. */
  839. temp_downclock = scan->clock;
  840. }
  841. }
  842. }
  843. mutex_unlock(&dev->mode_config.mutex);
  844. if (temp_downclock < panel_fixed_mode->clock &&
  845. i915_lvds_downclock) {
  846. /* We found the downclock for LVDS. */
  847. dev_priv->lvds_downclock_avail = 1;
  848. dev_priv->lvds_downclock = temp_downclock;
  849. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  850. "Normal clock %dKhz, downclock %dKhz\n",
  851. panel_fixed_mode->clock, temp_downclock);
  852. }
  853. return;
  854. }
  855. /*
  856. * Enumerate the child dev array parsed from VBT to check whether
  857. * the LVDS is present.
  858. * If it is present, return 1.
  859. * If it is not present, return false.
  860. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  861. * Note: The addin_offset should also be checked for LVDS panel.
  862. * Only when it is non-zero, it is assumed that it is present.
  863. */
  864. static int lvds_is_present_in_vbt(struct drm_device *dev)
  865. {
  866. struct drm_i915_private *dev_priv = dev->dev_private;
  867. struct child_device_config *p_child;
  868. int i, ret;
  869. if (!dev_priv->child_dev_num)
  870. return 1;
  871. ret = 0;
  872. for (i = 0; i < dev_priv->child_dev_num; i++) {
  873. p_child = dev_priv->child_dev + i;
  874. /*
  875. * If the device type is not LFP, continue.
  876. * If the device type is 0x22, it is also regarded as LFP.
  877. */
  878. if (p_child->device_type != DEVICE_TYPE_INT_LFP &&
  879. p_child->device_type != DEVICE_TYPE_LFP)
  880. continue;
  881. /* The addin_offset should be checked. Only when it is
  882. * non-zero, it is regarded as present.
  883. */
  884. if (p_child->addin_offset) {
  885. ret = 1;
  886. break;
  887. }
  888. }
  889. return ret;
  890. }
  891. /**
  892. * intel_lvds_init - setup LVDS connectors on this device
  893. * @dev: drm device
  894. *
  895. * Create the connector, register the LVDS DDC bus, and try to figure out what
  896. * modes we can display on the LVDS panel (if present).
  897. */
  898. void intel_lvds_init(struct drm_device *dev)
  899. {
  900. struct drm_i915_private *dev_priv = dev->dev_private;
  901. struct intel_output *intel_output;
  902. struct drm_connector *connector;
  903. struct drm_encoder *encoder;
  904. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  905. struct drm_crtc *crtc;
  906. struct intel_lvds_priv *lvds_priv;
  907. u32 lvds;
  908. int pipe, gpio = GPIOC;
  909. /* Skip init on machines we know falsely report LVDS */
  910. if (dmi_check_system(intel_no_lvds))
  911. return;
  912. if (!lvds_is_present_in_vbt(dev)) {
  913. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  914. return;
  915. }
  916. if (IS_IRONLAKE(dev)) {
  917. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  918. return;
  919. if (dev_priv->edp_support) {
  920. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  921. return;
  922. }
  923. gpio = PCH_GPIOC;
  924. }
  925. intel_output = kzalloc(sizeof(struct intel_output) +
  926. sizeof(struct intel_lvds_priv), GFP_KERNEL);
  927. if (!intel_output) {
  928. return;
  929. }
  930. connector = &intel_output->base;
  931. encoder = &intel_output->enc;
  932. drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs,
  933. DRM_MODE_CONNECTOR_LVDS);
  934. drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs,
  935. DRM_MODE_ENCODER_LVDS);
  936. drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
  937. intel_output->type = INTEL_OUTPUT_LVDS;
  938. intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
  939. intel_output->crtc_mask = (1 << 1);
  940. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  941. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  942. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  943. connector->interlace_allowed = false;
  944. connector->doublescan_allowed = false;
  945. lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
  946. intel_output->dev_priv = lvds_priv;
  947. /* create the scaling mode property */
  948. drm_mode_create_scaling_mode_property(dev);
  949. /*
  950. * the initial panel fitting mode will be FULL_SCREEN.
  951. */
  952. drm_connector_attach_property(&intel_output->base,
  953. dev->mode_config.scaling_mode_property,
  954. DRM_MODE_SCALE_FULLSCREEN);
  955. lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
  956. /*
  957. * LVDS discovery:
  958. * 1) check for EDID on DDC
  959. * 2) check for VBT data
  960. * 3) check to see if LVDS is already on
  961. * if none of the above, no panel
  962. * 4) make sure lid is open
  963. * if closed, act like it's not there for now
  964. */
  965. /* Set up the DDC bus. */
  966. intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
  967. if (!intel_output->ddc_bus) {
  968. dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
  969. "failed.\n");
  970. goto failed;
  971. }
  972. /*
  973. * Attempt to get the fixed panel mode from DDC. Assume that the
  974. * preferred mode is the right one.
  975. */
  976. intel_ddc_get_modes(intel_output);
  977. list_for_each_entry(scan, &connector->probed_modes, head) {
  978. mutex_lock(&dev->mode_config.mutex);
  979. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  980. dev_priv->panel_fixed_mode =
  981. drm_mode_duplicate(dev, scan);
  982. mutex_unlock(&dev->mode_config.mutex);
  983. intel_find_lvds_downclock(dev, connector);
  984. goto out;
  985. }
  986. mutex_unlock(&dev->mode_config.mutex);
  987. }
  988. /* Failed to get EDID, what about VBT? */
  989. if (dev_priv->lfp_lvds_vbt_mode) {
  990. mutex_lock(&dev->mode_config.mutex);
  991. dev_priv->panel_fixed_mode =
  992. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  993. mutex_unlock(&dev->mode_config.mutex);
  994. if (dev_priv->panel_fixed_mode) {
  995. dev_priv->panel_fixed_mode->type |=
  996. DRM_MODE_TYPE_PREFERRED;
  997. goto out;
  998. }
  999. }
  1000. /*
  1001. * If we didn't get EDID, try checking if the panel is already turned
  1002. * on. If so, assume that whatever is currently programmed is the
  1003. * correct mode.
  1004. */
  1005. /* Ironlake: FIXME if still fail, not try pipe mode now */
  1006. if (IS_IRONLAKE(dev))
  1007. goto failed;
  1008. lvds = I915_READ(LVDS);
  1009. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  1010. crtc = intel_get_crtc_from_pipe(dev, pipe);
  1011. if (crtc && (lvds & LVDS_PORT_EN)) {
  1012. dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
  1013. if (dev_priv->panel_fixed_mode) {
  1014. dev_priv->panel_fixed_mode->type |=
  1015. DRM_MODE_TYPE_PREFERRED;
  1016. goto out;
  1017. }
  1018. }
  1019. /* If we still don't have a mode after all that, give up. */
  1020. if (!dev_priv->panel_fixed_mode)
  1021. goto failed;
  1022. out:
  1023. if (IS_IRONLAKE(dev)) {
  1024. u32 pwm;
  1025. /* make sure PWM is enabled */
  1026. pwm = I915_READ(BLC_PWM_CPU_CTL2);
  1027. pwm |= (PWM_ENABLE | PWM_PIPE_B);
  1028. I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
  1029. pwm = I915_READ(BLC_PWM_PCH_CTL1);
  1030. pwm |= PWM_PCH_ENABLE;
  1031. I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
  1032. }
  1033. dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  1034. if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  1035. DRM_DEBUG_KMS("lid notifier registration failed\n");
  1036. dev_priv->lid_notifier.notifier_call = NULL;
  1037. }
  1038. /* keep the LVDS connector */
  1039. dev_priv->int_lvds_connector = connector;
  1040. drm_sysfs_connector_add(connector);
  1041. return;
  1042. failed:
  1043. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  1044. if (intel_output->ddc_bus)
  1045. intel_i2c_destroy(intel_output->ddc_bus);
  1046. drm_connector_cleanup(connector);
  1047. drm_encoder_cleanup(encoder);
  1048. kfree(intel_output);
  1049. }