platform.c 4.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187
  1. #include <linux/delay.h>
  2. #include <linux/if_ether.h>
  3. #include <linux/ioport.h>
  4. #include <linux/mv643xx.h>
  5. #include <linux/platform_device.h>
  6. #include "ocelot_c_fpga.h"
  7. #if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
  8. static struct resource mv643xx_eth_shared_resources[] = {
  9. [0] = {
  10. .name = "ethernet shared base",
  11. .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
  12. .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
  13. MV643XX_ETH_SHARED_REGS_SIZE - 1,
  14. .flags = IORESOURCE_MEM,
  15. },
  16. };
  17. static struct platform_device mv643xx_eth_shared_device = {
  18. .name = MV643XX_ETH_SHARED_NAME,
  19. .id = 0,
  20. .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
  21. .resource = mv643xx_eth_shared_resources,
  22. };
  23. #define MV_SRAM_BASE 0xfe000000UL
  24. #define MV_SRAM_SIZE (256 * 1024)
  25. #define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4)
  26. #define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4)
  27. #define MV_SRAM_BASE_ETH0 MV_SRAM_BASE
  28. #define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2))
  29. #define MV64x60_IRQ_ETH_0 48
  30. #define MV64x60_IRQ_ETH_1 49
  31. static struct resource mv64x60_eth0_resources[] = {
  32. [0] = {
  33. .name = "eth0 irq",
  34. .start = MV64x60_IRQ_ETH_0,
  35. .end = MV64x60_IRQ_ETH_0,
  36. .flags = IORESOURCE_IRQ,
  37. },
  38. };
  39. static char eth0_mac_addr[ETH_ALEN];
  40. static struct mv643xx_eth_platform_data eth0_pd = {
  41. .mac_addr = eth0_mac_addr,
  42. .tx_sram_addr = MV_SRAM_BASE_ETH0,
  43. .tx_sram_size = MV_SRAM_TXRING_SIZE,
  44. .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
  45. .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE,
  46. .rx_sram_size = MV_SRAM_RXRING_SIZE,
  47. .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
  48. };
  49. static struct platform_device eth0_device = {
  50. .name = MV643XX_ETH_NAME,
  51. .id = 0,
  52. .num_resources = ARRAY_SIZE(mv64x60_eth0_resources),
  53. .resource = mv64x60_eth0_resources,
  54. .dev = {
  55. .platform_data = &eth0_pd,
  56. },
  57. };
  58. static struct resource mv64x60_eth1_resources[] = {
  59. [0] = {
  60. .name = "eth1 irq",
  61. .start = MV64x60_IRQ_ETH_1,
  62. .end = MV64x60_IRQ_ETH_1,
  63. .flags = IORESOURCE_IRQ,
  64. },
  65. };
  66. static char eth1_mac_addr[ETH_ALEN];
  67. static struct mv643xx_eth_platform_data eth1_pd = {
  68. .mac_addr = eth1_mac_addr,
  69. .tx_sram_addr = MV_SRAM_BASE_ETH1,
  70. .tx_sram_size = MV_SRAM_TXRING_SIZE,
  71. .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
  72. .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE,
  73. .rx_sram_size = MV_SRAM_RXRING_SIZE,
  74. .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
  75. };
  76. static struct platform_device eth1_device = {
  77. .name = MV643XX_ETH_NAME,
  78. .id = 1,
  79. .num_resources = ARRAY_SIZE(mv64x60_eth1_resources),
  80. .resource = mv64x60_eth1_resources,
  81. .dev = {
  82. .platform_data = &eth1_pd,
  83. },
  84. };
  85. static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
  86. &mv643xx_eth_shared_device,
  87. &eth0_device,
  88. &eth1_device,
  89. /* The third port is not wired up on the Ocelot C */
  90. };
  91. static u8 __init exchange_bit(u8 val, u8 cs)
  92. {
  93. /* place the data */
  94. OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
  95. udelay(1);
  96. /* turn the clock on */
  97. OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
  98. udelay(1);
  99. /* turn the clock off and read-strobe */
  100. OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
  101. /* return the data */
  102. return (OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1;
  103. }
  104. static void __init get_mac(char dest[6])
  105. {
  106. u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
  107. int i,j;
  108. for (i = 0; i < 12; i++)
  109. exchange_bit(read_opcode[i], 1);
  110. for (j = 0; j < 6; j++) {
  111. dest[j] = 0;
  112. for (i = 0; i < 8; i++) {
  113. dest[j] <<= 1;
  114. dest[j] |= exchange_bit(0, 1);
  115. }
  116. }
  117. /* turn off CS */
  118. exchange_bit(0,0);
  119. }
  120. /*
  121. * Copy and increment ethernet MAC address by a small value.
  122. *
  123. * This is useful for systems where the only one MAC address is stored in
  124. * non-volatile memory for multiple ports.
  125. */
  126. static inline void eth_mac_add(unsigned char *dst, unsigned char *src,
  127. unsigned int add)
  128. {
  129. int i;
  130. BUG_ON(add >= 256);
  131. for (i = ETH_ALEN; i >= 0; i--) {
  132. dst[i] = src[i] + add;
  133. add = dst[i] < src[i]; /* compute carry */
  134. }
  135. WARN_ON(add);
  136. }
  137. static int __init mv643xx_eth_add_pds(void)
  138. {
  139. unsigned char mac[ETH_ALEN];
  140. int ret;
  141. get_mac(mac);
  142. eth_mac_add(eth1_mac_addr, mac, 0);
  143. eth_mac_add(eth1_mac_addr, mac, 1);
  144. ret = platform_add_devices(mv643xx_eth_pd_devs,
  145. ARRAY_SIZE(mv643xx_eth_pd_devs));
  146. return ret;
  147. }
  148. device_initcall(mv643xx_eth_add_pds);
  149. #endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */