ice1724.c 67 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <asm/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/pci.h>
  29. #include <linux/slab.h>
  30. #include <linux/moduleparam.h>
  31. #include <linux/mutex.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/mpu401.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "prodigy_hifi.h"
  47. #include "juli.h"
  48. #include "phase.h"
  49. #include "wtm.h"
  50. #include "se.h"
  51. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  52. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  53. MODULE_LICENSE("GPL");
  54. MODULE_SUPPORTED_DEVICE("{"
  55. REVO_DEVICE_DESC
  56. AMP_AUDIO2000_DEVICE_DESC
  57. AUREON_DEVICE_DESC
  58. VT1720_MOBO_DEVICE_DESC
  59. PONTIS_DEVICE_DESC
  60. PRODIGY192_DEVICE_DESC
  61. PRODIGY_HIFI_DEVICE_DESC
  62. JULI_DEVICE_DESC
  63. PHASE_DEVICE_DESC
  64. WTM_DEVICE_DESC
  65. SE_DEVICE_DESC
  66. "{VIA,VT1720},"
  67. "{VIA,VT1724},"
  68. "{ICEnsemble,Generic ICE1724},"
  69. "{ICEnsemble,Generic Envy24HT}"
  70. "{ICEnsemble,Generic Envy24PT}}");
  71. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  72. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  73. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  74. static char *model[SNDRV_CARDS];
  75. module_param_array(index, int, NULL, 0444);
  76. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  77. module_param_array(id, charp, NULL, 0444);
  78. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  79. module_param_array(enable, bool, NULL, 0444);
  80. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  81. module_param_array(model, charp, NULL, 0444);
  82. MODULE_PARM_DESC(model, "Use the given board model.");
  83. /* Both VT1720 and VT1724 have the same PCI IDs */
  84. static const struct pci_device_id snd_vt1724_ids[] = {
  85. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  86. { 0, }
  87. };
  88. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  89. static int PRO_RATE_LOCKED;
  90. static int PRO_RATE_RESET = 1;
  91. static unsigned int PRO_RATE_DEFAULT = 44100;
  92. /*
  93. * Basic I/O
  94. */
  95. /*
  96. * default rates, default clock routines
  97. */
  98. /* check whether the clock mode is spdif-in */
  99. static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
  100. {
  101. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  102. }
  103. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  104. {
  105. return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
  106. }
  107. /*
  108. * ac97 section
  109. */
  110. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  111. {
  112. unsigned char old_cmd;
  113. int tm;
  114. for (tm = 0; tm < 0x10000; tm++) {
  115. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  116. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  117. continue;
  118. if (!(old_cmd & VT1724_AC97_READY))
  119. continue;
  120. return old_cmd;
  121. }
  122. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  123. return old_cmd;
  124. }
  125. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  126. {
  127. int tm;
  128. for (tm = 0; tm < 0x10000; tm++)
  129. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  130. return 0;
  131. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  132. return -EIO;
  133. }
  134. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  135. unsigned short reg,
  136. unsigned short val)
  137. {
  138. struct snd_ice1712 *ice = ac97->private_data;
  139. unsigned char old_cmd;
  140. old_cmd = snd_vt1724_ac97_ready(ice);
  141. old_cmd &= ~VT1724_AC97_ID_MASK;
  142. old_cmd |= ac97->num;
  143. outb(reg, ICEMT1724(ice, AC97_INDEX));
  144. outw(val, ICEMT1724(ice, AC97_DATA));
  145. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  146. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  147. }
  148. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  149. {
  150. struct snd_ice1712 *ice = ac97->private_data;
  151. unsigned char old_cmd;
  152. old_cmd = snd_vt1724_ac97_ready(ice);
  153. old_cmd &= ~VT1724_AC97_ID_MASK;
  154. old_cmd |= ac97->num;
  155. outb(reg, ICEMT1724(ice, AC97_INDEX));
  156. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  157. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  158. return ~0;
  159. return inw(ICEMT1724(ice, AC97_DATA));
  160. }
  161. /*
  162. * GPIO operations
  163. */
  164. /* set gpio direction 0 = read, 1 = write */
  165. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  166. {
  167. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  168. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  169. }
  170. /* set the gpio mask (0 = writable) */
  171. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  172. {
  173. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  174. if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  175. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  176. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  177. }
  178. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  179. {
  180. outw(data, ICEREG1724(ice, GPIO_DATA));
  181. if (! ice->vt1720)
  182. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  183. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  184. }
  185. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  186. {
  187. unsigned int data;
  188. if (! ice->vt1720)
  189. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  190. else
  191. data = 0;
  192. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  193. return data;
  194. }
  195. /*
  196. * Interrupt handler
  197. */
  198. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
  199. {
  200. struct snd_ice1712 *ice = dev_id;
  201. unsigned char status;
  202. int handled = 0;
  203. while (1) {
  204. status = inb(ICEREG1724(ice, IRQSTAT));
  205. if (status == 0)
  206. break;
  207. handled = 1;
  208. /* these should probably be separated at some point,
  209. * but as we don't currently have MPU support on the board
  210. * I will leave it
  211. */
  212. if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) {
  213. if (ice->rmidi[0])
  214. snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
  215. outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT));
  216. status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX);
  217. }
  218. if (status & VT1724_IRQ_MTPCM) {
  219. /*
  220. * Multi-track PCM
  221. * PCM assignment are:
  222. * Playback DMA0 (M/C) = playback_pro_substream
  223. * Playback DMA1 = playback_con_substream_ds[0]
  224. * Playback DMA2 = playback_con_substream_ds[1]
  225. * Playback DMA3 = playback_con_substream_ds[2]
  226. * Playback DMA4 (SPDIF) = playback_con_substream
  227. * Record DMA0 = capture_pro_substream
  228. * Record DMA1 = capture_con_substream
  229. */
  230. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  231. if (mtstat & VT1724_MULTI_PDMA0) {
  232. if (ice->playback_pro_substream)
  233. snd_pcm_period_elapsed(ice->playback_pro_substream);
  234. }
  235. if (mtstat & VT1724_MULTI_RDMA0) {
  236. if (ice->capture_pro_substream)
  237. snd_pcm_period_elapsed(ice->capture_pro_substream);
  238. }
  239. if (mtstat & VT1724_MULTI_PDMA1) {
  240. if (ice->playback_con_substream_ds[0])
  241. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  242. }
  243. if (mtstat & VT1724_MULTI_PDMA2) {
  244. if (ice->playback_con_substream_ds[1])
  245. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  246. }
  247. if (mtstat & VT1724_MULTI_PDMA3) {
  248. if (ice->playback_con_substream_ds[2])
  249. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  250. }
  251. if (mtstat & VT1724_MULTI_PDMA4) {
  252. if (ice->playback_con_substream)
  253. snd_pcm_period_elapsed(ice->playback_con_substream);
  254. }
  255. if (mtstat & VT1724_MULTI_RDMA1) {
  256. if (ice->capture_con_substream)
  257. snd_pcm_period_elapsed(ice->capture_con_substream);
  258. }
  259. /* ack anyway to avoid freeze */
  260. outb(mtstat, ICEMT1724(ice, IRQ));
  261. /* ought to really handle this properly */
  262. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  263. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  264. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  265. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  266. /* If I don't do this, I get machine lockup due to continual interrupts */
  267. }
  268. }
  269. }
  270. return IRQ_RETVAL(handled);
  271. }
  272. /*
  273. * PCM code - professional part (multitrack)
  274. */
  275. static unsigned int rates[] = {
  276. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  277. 32000, 44100, 48000, 64000, 88200, 96000,
  278. 176400, 192000,
  279. };
  280. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  281. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  282. .list = rates,
  283. .mask = 0,
  284. };
  285. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  286. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  287. .list = rates,
  288. .mask = 0,
  289. };
  290. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  291. .count = ARRAY_SIZE(rates),
  292. .list = rates,
  293. .mask = 0,
  294. };
  295. struct vt1724_pcm_reg {
  296. unsigned int addr; /* ADDR register offset */
  297. unsigned int size; /* SIZE register offset */
  298. unsigned int count; /* COUNT register offset */
  299. unsigned int start; /* start & pause bit */
  300. };
  301. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  302. {
  303. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  304. unsigned char what;
  305. unsigned char old;
  306. struct snd_pcm_substream *s;
  307. what = 0;
  308. snd_pcm_group_for_each_entry(s, substream) {
  309. if (snd_pcm_substream_chip(s) == ice) {
  310. const struct vt1724_pcm_reg *reg;
  311. reg = s->runtime->private_data;
  312. what |= reg->start;
  313. snd_pcm_trigger_done(s, substream);
  314. }
  315. }
  316. switch (cmd) {
  317. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  318. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  319. spin_lock(&ice->reg_lock);
  320. old = inb(ICEMT1724(ice, DMA_PAUSE));
  321. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  322. old |= what;
  323. else
  324. old &= ~what;
  325. outb(old, ICEMT1724(ice, DMA_PAUSE));
  326. spin_unlock(&ice->reg_lock);
  327. break;
  328. case SNDRV_PCM_TRIGGER_START:
  329. case SNDRV_PCM_TRIGGER_STOP:
  330. spin_lock(&ice->reg_lock);
  331. old = inb(ICEMT1724(ice, DMA_CONTROL));
  332. if (cmd == SNDRV_PCM_TRIGGER_START)
  333. old |= what;
  334. else
  335. old &= ~what;
  336. outb(old, ICEMT1724(ice, DMA_CONTROL));
  337. spin_unlock(&ice->reg_lock);
  338. break;
  339. default:
  340. return -EINVAL;
  341. }
  342. return 0;
  343. }
  344. /*
  345. */
  346. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  347. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  348. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  349. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  350. static const unsigned int stdclock_rate_list[16] = {
  351. 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
  352. 22050, 11025, 88200, 176400, 0, 192000, 64000
  353. };
  354. static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
  355. {
  356. unsigned int rate;
  357. rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
  358. return rate;
  359. }
  360. static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
  361. {
  362. int i;
  363. for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
  364. if (stdclock_rate_list[i] == rate) {
  365. outb(i, ICEMT1724(ice, RATE));
  366. return;
  367. }
  368. }
  369. }
  370. static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
  371. unsigned int rate)
  372. {
  373. unsigned char val, old;
  374. /* check MT02 */
  375. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  376. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  377. if (rate > 96000)
  378. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  379. else
  380. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  381. if (val != old) {
  382. outb(val, ICEMT1724(ice, I2S_FORMAT));
  383. /* master clock changed */
  384. return 1;
  385. }
  386. }
  387. /* no change in master clock */
  388. return 0;
  389. }
  390. static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  391. int force)
  392. {
  393. unsigned long flags;
  394. unsigned char mclk_change;
  395. unsigned int i, old_rate;
  396. if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
  397. return;
  398. spin_lock_irqsave(&ice->reg_lock, flags);
  399. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  400. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  401. /* running? we cannot change the rate now... */
  402. spin_unlock_irqrestore(&ice->reg_lock, flags);
  403. return;
  404. }
  405. if (!force && is_pro_rate_locked(ice)) {
  406. spin_unlock_irqrestore(&ice->reg_lock, flags);
  407. return;
  408. }
  409. old_rate = ice->get_rate(ice);
  410. if (force || (old_rate != rate))
  411. ice->set_rate(ice, rate);
  412. else if (rate == ice->cur_rate) {
  413. spin_unlock_irqrestore(&ice->reg_lock, flags);
  414. return;
  415. }
  416. ice->cur_rate = rate;
  417. /* setting master clock */
  418. mclk_change = ice->set_mclk(ice, rate);
  419. spin_unlock_irqrestore(&ice->reg_lock, flags);
  420. if (mclk_change && ice->gpio.i2s_mclk_changed)
  421. ice->gpio.i2s_mclk_changed(ice);
  422. if (ice->gpio.set_pro_rate)
  423. ice->gpio.set_pro_rate(ice, rate);
  424. /* set up codecs */
  425. for (i = 0; i < ice->akm_codecs; i++) {
  426. if (ice->akm[i].ops.set_rate_val)
  427. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  428. }
  429. if (ice->spdif.ops.setup_rate)
  430. ice->spdif.ops.setup_rate(ice, rate);
  431. }
  432. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  433. struct snd_pcm_hw_params *hw_params)
  434. {
  435. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  436. int i, chs;
  437. chs = params_channels(hw_params);
  438. mutex_lock(&ice->open_mutex);
  439. /* mark surround channels */
  440. if (substream == ice->playback_pro_substream) {
  441. /* PDMA0 can be multi-channel up to 8 */
  442. chs = chs / 2 - 1;
  443. for (i = 0; i < chs; i++) {
  444. if (ice->pcm_reserved[i] &&
  445. ice->pcm_reserved[i] != substream) {
  446. mutex_unlock(&ice->open_mutex);
  447. return -EBUSY;
  448. }
  449. ice->pcm_reserved[i] = substream;
  450. }
  451. for (; i < 3; i++) {
  452. if (ice->pcm_reserved[i] == substream)
  453. ice->pcm_reserved[i] = NULL;
  454. }
  455. } else {
  456. for (i = 0; i < 3; i++) {
  457. /* check individual playback stream */
  458. if (ice->playback_con_substream_ds[i] == substream) {
  459. if (ice->pcm_reserved[i] &&
  460. ice->pcm_reserved[i] != substream) {
  461. mutex_unlock(&ice->open_mutex);
  462. return -EBUSY;
  463. }
  464. ice->pcm_reserved[i] = substream;
  465. break;
  466. }
  467. }
  468. }
  469. mutex_unlock(&ice->open_mutex);
  470. snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  471. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  472. }
  473. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  474. {
  475. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  476. int i;
  477. mutex_lock(&ice->open_mutex);
  478. /* unmark surround channels */
  479. for (i = 0; i < 3; i++)
  480. if (ice->pcm_reserved[i] == substream)
  481. ice->pcm_reserved[i] = NULL;
  482. mutex_unlock(&ice->open_mutex);
  483. return snd_pcm_lib_free_pages(substream);
  484. }
  485. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  486. {
  487. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  488. unsigned char val;
  489. unsigned int size;
  490. spin_lock_irq(&ice->reg_lock);
  491. val = (8 - substream->runtime->channels) >> 1;
  492. outb(val, ICEMT1724(ice, BURST));
  493. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  494. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  495. // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
  496. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  497. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  498. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  499. // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
  500. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  501. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  502. spin_unlock_irq(&ice->reg_lock);
  503. // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
  504. return 0;
  505. }
  506. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  507. {
  508. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  509. size_t ptr;
  510. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  511. return 0;
  512. #if 0 /* read PLAYBACK_ADDR */
  513. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  514. if (ptr < substream->runtime->dma_addr) {
  515. snd_printd("ice1724: invalid negative ptr\n");
  516. return 0;
  517. }
  518. ptr -= substream->runtime->dma_addr;
  519. ptr = bytes_to_frames(substream->runtime, ptr);
  520. if (ptr >= substream->runtime->buffer_size) {
  521. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  522. (int)ptr, (int)substream->runtime->period_size);
  523. return 0;
  524. }
  525. #else /* read PLAYBACK_SIZE */
  526. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  527. ptr = (ptr + 1) << 2;
  528. ptr = bytes_to_frames(substream->runtime, ptr);
  529. if (! ptr)
  530. ;
  531. else if (ptr <= substream->runtime->buffer_size)
  532. ptr = substream->runtime->buffer_size - ptr;
  533. else {
  534. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  535. (int)ptr, (int)substream->runtime->buffer_size);
  536. ptr = 0;
  537. }
  538. #endif
  539. return ptr;
  540. }
  541. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  542. {
  543. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  544. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  545. spin_lock_irq(&ice->reg_lock);
  546. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  547. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  548. ice->profi_port + reg->size);
  549. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  550. ice->profi_port + reg->count);
  551. spin_unlock_irq(&ice->reg_lock);
  552. return 0;
  553. }
  554. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  555. {
  556. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  557. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  558. size_t ptr;
  559. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  560. return 0;
  561. #if 0 /* use ADDR register */
  562. ptr = inl(ice->profi_port + reg->addr);
  563. ptr -= substream->runtime->dma_addr;
  564. return bytes_to_frames(substream->runtime, ptr);
  565. #else /* use SIZE register */
  566. ptr = inw(ice->profi_port + reg->size);
  567. ptr = (ptr + 1) << 2;
  568. ptr = bytes_to_frames(substream->runtime, ptr);
  569. if (! ptr)
  570. ;
  571. else if (ptr <= substream->runtime->buffer_size)
  572. ptr = substream->runtime->buffer_size - ptr;
  573. else {
  574. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  575. (int)ptr, (int)substream->runtime->buffer_size);
  576. ptr = 0;
  577. }
  578. return ptr;
  579. #endif
  580. }
  581. static const struct vt1724_pcm_reg vt1724_playback_pro_reg = {
  582. .addr = VT1724_MT_PLAYBACK_ADDR,
  583. .size = VT1724_MT_PLAYBACK_SIZE,
  584. .count = VT1724_MT_PLAYBACK_COUNT,
  585. .start = VT1724_PDMA0_START,
  586. };
  587. static const struct vt1724_pcm_reg vt1724_capture_pro_reg = {
  588. .addr = VT1724_MT_CAPTURE_ADDR,
  589. .size = VT1724_MT_CAPTURE_SIZE,
  590. .count = VT1724_MT_CAPTURE_COUNT,
  591. .start = VT1724_RDMA0_START,
  592. };
  593. static const struct snd_pcm_hardware snd_vt1724_playback_pro =
  594. {
  595. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  596. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  597. SNDRV_PCM_INFO_MMAP_VALID |
  598. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  599. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  600. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  601. .rate_min = 8000,
  602. .rate_max = 192000,
  603. .channels_min = 2,
  604. .channels_max = 8,
  605. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  606. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  607. .period_bytes_max = (1UL << 21),
  608. .periods_min = 2,
  609. .periods_max = 1024,
  610. };
  611. static const struct snd_pcm_hardware snd_vt1724_spdif =
  612. {
  613. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  614. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  615. SNDRV_PCM_INFO_MMAP_VALID |
  616. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  617. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  618. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  619. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  620. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  621. SNDRV_PCM_RATE_192000),
  622. .rate_min = 32000,
  623. .rate_max = 192000,
  624. .channels_min = 2,
  625. .channels_max = 2,
  626. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  627. .period_bytes_min = 2 * 4 * 2,
  628. .period_bytes_max = (1UL << 18),
  629. .periods_min = 2,
  630. .periods_max = 1024,
  631. };
  632. static const struct snd_pcm_hardware snd_vt1724_2ch_stereo =
  633. {
  634. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  635. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  636. SNDRV_PCM_INFO_MMAP_VALID |
  637. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  638. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  639. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  640. .rate_min = 8000,
  641. .rate_max = 192000,
  642. .channels_min = 2,
  643. .channels_max = 2,
  644. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  645. .period_bytes_min = 2 * 4 * 2,
  646. .period_bytes_max = (1UL << 18),
  647. .periods_min = 2,
  648. .periods_max = 1024,
  649. };
  650. /*
  651. * set rate constraints
  652. */
  653. static void set_std_hw_rates(struct snd_ice1712 *ice)
  654. {
  655. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  656. /* I2S */
  657. /* VT1720 doesn't support more than 96kHz */
  658. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  659. ice->hw_rates = &hw_constraints_rates_192;
  660. else
  661. ice->hw_rates = &hw_constraints_rates_96;
  662. } else {
  663. /* ACLINK */
  664. ice->hw_rates = &hw_constraints_rates_48;
  665. }
  666. }
  667. static int set_rate_constraints(struct snd_ice1712 *ice,
  668. struct snd_pcm_substream *substream)
  669. {
  670. struct snd_pcm_runtime *runtime = substream->runtime;
  671. runtime->hw.rate_min = ice->hw_rates->list[0];
  672. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  673. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  674. return snd_pcm_hw_constraint_list(runtime, 0,
  675. SNDRV_PCM_HW_PARAM_RATE,
  676. ice->hw_rates);
  677. }
  678. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  679. * actually used
  680. */
  681. #define VT1724_BUFFER_ALIGN 0x20
  682. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  683. {
  684. struct snd_pcm_runtime *runtime = substream->runtime;
  685. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  686. int chs;
  687. runtime->private_data = (void *)&vt1724_playback_pro_reg;
  688. ice->playback_pro_substream = substream;
  689. runtime->hw = snd_vt1724_playback_pro;
  690. snd_pcm_set_sync(substream);
  691. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  692. set_rate_constraints(ice, substream);
  693. mutex_lock(&ice->open_mutex);
  694. /* calculate the currently available channels */
  695. for (chs = 0; chs < 3; chs++) {
  696. if (ice->pcm_reserved[chs])
  697. break;
  698. }
  699. chs = (chs + 1) * 2;
  700. runtime->hw.channels_max = chs;
  701. if (chs > 2) /* channels must be even */
  702. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  703. mutex_unlock(&ice->open_mutex);
  704. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  705. VT1724_BUFFER_ALIGN);
  706. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  707. VT1724_BUFFER_ALIGN);
  708. return 0;
  709. }
  710. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  711. {
  712. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  713. struct snd_pcm_runtime *runtime = substream->runtime;
  714. runtime->private_data = (void *)&vt1724_capture_pro_reg;
  715. ice->capture_pro_substream = substream;
  716. runtime->hw = snd_vt1724_2ch_stereo;
  717. snd_pcm_set_sync(substream);
  718. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  719. set_rate_constraints(ice, substream);
  720. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  721. VT1724_BUFFER_ALIGN);
  722. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  723. VT1724_BUFFER_ALIGN);
  724. return 0;
  725. }
  726. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  727. {
  728. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  729. if (PRO_RATE_RESET)
  730. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  731. ice->playback_pro_substream = NULL;
  732. return 0;
  733. }
  734. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  735. {
  736. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  737. if (PRO_RATE_RESET)
  738. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  739. ice->capture_pro_substream = NULL;
  740. return 0;
  741. }
  742. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  743. .open = snd_vt1724_playback_pro_open,
  744. .close = snd_vt1724_playback_pro_close,
  745. .ioctl = snd_pcm_lib_ioctl,
  746. .hw_params = snd_vt1724_pcm_hw_params,
  747. .hw_free = snd_vt1724_pcm_hw_free,
  748. .prepare = snd_vt1724_playback_pro_prepare,
  749. .trigger = snd_vt1724_pcm_trigger,
  750. .pointer = snd_vt1724_playback_pro_pointer,
  751. };
  752. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  753. .open = snd_vt1724_capture_pro_open,
  754. .close = snd_vt1724_capture_pro_close,
  755. .ioctl = snd_pcm_lib_ioctl,
  756. .hw_params = snd_vt1724_pcm_hw_params,
  757. .hw_free = snd_vt1724_pcm_hw_free,
  758. .prepare = snd_vt1724_pcm_prepare,
  759. .trigger = snd_vt1724_pcm_trigger,
  760. .pointer = snd_vt1724_pcm_pointer,
  761. };
  762. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 * ice, int device)
  763. {
  764. struct snd_pcm *pcm;
  765. int err;
  766. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  767. if (err < 0)
  768. return err;
  769. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  770. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  771. pcm->private_data = ice;
  772. pcm->info_flags = 0;
  773. strcpy(pcm->name, "ICE1724");
  774. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  775. snd_dma_pci_data(ice->pci),
  776. 256*1024, 256*1024);
  777. ice->pcm_pro = pcm;
  778. return 0;
  779. }
  780. /*
  781. * SPDIF PCM
  782. */
  783. static const struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
  784. .addr = VT1724_MT_PDMA4_ADDR,
  785. .size = VT1724_MT_PDMA4_SIZE,
  786. .count = VT1724_MT_PDMA4_COUNT,
  787. .start = VT1724_PDMA4_START,
  788. };
  789. static const struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
  790. .addr = VT1724_MT_RDMA1_ADDR,
  791. .size = VT1724_MT_RDMA1_SIZE,
  792. .count = VT1724_MT_RDMA1_COUNT,
  793. .start = VT1724_RDMA1_START,
  794. };
  795. /* update spdif control bits; call with reg_lock */
  796. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  797. {
  798. unsigned char cbit, disabled;
  799. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  800. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  801. if (cbit != disabled)
  802. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  803. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  804. if (cbit != disabled)
  805. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  806. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  807. }
  808. /* update SPDIF control bits according to the given rate */
  809. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  810. {
  811. unsigned int val, nval;
  812. unsigned long flags;
  813. spin_lock_irqsave(&ice->reg_lock, flags);
  814. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  815. nval &= ~(7 << 12);
  816. switch (rate) {
  817. case 44100: break;
  818. case 48000: nval |= 2 << 12; break;
  819. case 32000: nval |= 3 << 12; break;
  820. case 88200: nval |= 4 << 12; break;
  821. case 96000: nval |= 5 << 12; break;
  822. case 192000: nval |= 6 << 12; break;
  823. case 176400: nval |= 7 << 12; break;
  824. }
  825. if (val != nval)
  826. update_spdif_bits(ice, nval);
  827. spin_unlock_irqrestore(&ice->reg_lock, flags);
  828. }
  829. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  830. {
  831. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  832. if (! ice->force_pdma4)
  833. update_spdif_rate(ice, substream->runtime->rate);
  834. return snd_vt1724_pcm_prepare(substream);
  835. }
  836. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  837. {
  838. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  839. struct snd_pcm_runtime *runtime = substream->runtime;
  840. runtime->private_data = (void *)&vt1724_playback_spdif_reg;
  841. ice->playback_con_substream = substream;
  842. if (ice->force_pdma4) {
  843. runtime->hw = snd_vt1724_2ch_stereo;
  844. set_rate_constraints(ice, substream);
  845. } else
  846. runtime->hw = snd_vt1724_spdif;
  847. snd_pcm_set_sync(substream);
  848. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  849. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  850. VT1724_BUFFER_ALIGN);
  851. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  852. VT1724_BUFFER_ALIGN);
  853. if (ice->spdif.ops.open)
  854. ice->spdif.ops.open(ice, substream);
  855. return 0;
  856. }
  857. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  858. {
  859. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  860. if (PRO_RATE_RESET)
  861. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  862. ice->playback_con_substream = NULL;
  863. if (ice->spdif.ops.close)
  864. ice->spdif.ops.close(ice, substream);
  865. return 0;
  866. }
  867. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  868. {
  869. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  870. struct snd_pcm_runtime *runtime = substream->runtime;
  871. runtime->private_data = (void *)&vt1724_capture_spdif_reg;
  872. ice->capture_con_substream = substream;
  873. if (ice->force_rdma1) {
  874. runtime->hw = snd_vt1724_2ch_stereo;
  875. set_rate_constraints(ice, substream);
  876. } else
  877. runtime->hw = snd_vt1724_spdif;
  878. snd_pcm_set_sync(substream);
  879. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  880. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  881. VT1724_BUFFER_ALIGN);
  882. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  883. VT1724_BUFFER_ALIGN);
  884. if (ice->spdif.ops.open)
  885. ice->spdif.ops.open(ice, substream);
  886. return 0;
  887. }
  888. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  889. {
  890. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  891. if (PRO_RATE_RESET)
  892. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  893. ice->capture_con_substream = NULL;
  894. if (ice->spdif.ops.close)
  895. ice->spdif.ops.close(ice, substream);
  896. return 0;
  897. }
  898. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  899. .open = snd_vt1724_playback_spdif_open,
  900. .close = snd_vt1724_playback_spdif_close,
  901. .ioctl = snd_pcm_lib_ioctl,
  902. .hw_params = snd_vt1724_pcm_hw_params,
  903. .hw_free = snd_vt1724_pcm_hw_free,
  904. .prepare = snd_vt1724_playback_spdif_prepare,
  905. .trigger = snd_vt1724_pcm_trigger,
  906. .pointer = snd_vt1724_pcm_pointer,
  907. };
  908. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  909. .open = snd_vt1724_capture_spdif_open,
  910. .close = snd_vt1724_capture_spdif_close,
  911. .ioctl = snd_pcm_lib_ioctl,
  912. .hw_params = snd_vt1724_pcm_hw_params,
  913. .hw_free = snd_vt1724_pcm_hw_free,
  914. .prepare = snd_vt1724_pcm_prepare,
  915. .trigger = snd_vt1724_pcm_trigger,
  916. .pointer = snd_vt1724_pcm_pointer,
  917. };
  918. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 * ice, int device)
  919. {
  920. char *name;
  921. struct snd_pcm *pcm;
  922. int play, capt;
  923. int err;
  924. if (ice->force_pdma4 ||
  925. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  926. play = 1;
  927. ice->has_spdif = 1;
  928. } else
  929. play = 0;
  930. if (ice->force_rdma1 ||
  931. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  932. capt = 1;
  933. ice->has_spdif = 1;
  934. } else
  935. capt = 0;
  936. if (! play && ! capt)
  937. return 0; /* no spdif device */
  938. if (ice->force_pdma4 || ice->force_rdma1)
  939. name = "ICE1724 Secondary";
  940. else
  941. name = "IEC1724 IEC958";
  942. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  943. if (err < 0)
  944. return err;
  945. if (play)
  946. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  947. &snd_vt1724_playback_spdif_ops);
  948. if (capt)
  949. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  950. &snd_vt1724_capture_spdif_ops);
  951. pcm->private_data = ice;
  952. pcm->info_flags = 0;
  953. strcpy(pcm->name, name);
  954. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  955. snd_dma_pci_data(ice->pci),
  956. 64*1024, 64*1024);
  957. ice->pcm = pcm;
  958. return 0;
  959. }
  960. /*
  961. * independent surround PCMs
  962. */
  963. static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  964. {
  965. .addr = VT1724_MT_PDMA1_ADDR,
  966. .size = VT1724_MT_PDMA1_SIZE,
  967. .count = VT1724_MT_PDMA1_COUNT,
  968. .start = VT1724_PDMA1_START,
  969. },
  970. {
  971. .addr = VT1724_MT_PDMA2_ADDR,
  972. .size = VT1724_MT_PDMA2_SIZE,
  973. .count = VT1724_MT_PDMA2_COUNT,
  974. .start = VT1724_PDMA2_START,
  975. },
  976. {
  977. .addr = VT1724_MT_PDMA3_ADDR,
  978. .size = VT1724_MT_PDMA3_SIZE,
  979. .count = VT1724_MT_PDMA3_COUNT,
  980. .start = VT1724_PDMA3_START,
  981. },
  982. };
  983. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  984. {
  985. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  986. unsigned char val;
  987. spin_lock_irq(&ice->reg_lock);
  988. val = 3 - substream->number;
  989. if (inb(ICEMT1724(ice, BURST)) < val)
  990. outb(val, ICEMT1724(ice, BURST));
  991. spin_unlock_irq(&ice->reg_lock);
  992. return snd_vt1724_pcm_prepare(substream);
  993. }
  994. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  995. {
  996. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  997. struct snd_pcm_runtime *runtime = substream->runtime;
  998. mutex_lock(&ice->open_mutex);
  999. /* already used by PDMA0? */
  1000. if (ice->pcm_reserved[substream->number]) {
  1001. mutex_unlock(&ice->open_mutex);
  1002. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1003. }
  1004. mutex_unlock(&ice->open_mutex);
  1005. runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
  1006. ice->playback_con_substream_ds[substream->number] = substream;
  1007. runtime->hw = snd_vt1724_2ch_stereo;
  1008. snd_pcm_set_sync(substream);
  1009. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1010. set_rate_constraints(ice, substream);
  1011. return 0;
  1012. }
  1013. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1014. {
  1015. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1016. if (PRO_RATE_RESET)
  1017. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1018. ice->playback_con_substream_ds[substream->number] = NULL;
  1019. ice->pcm_reserved[substream->number] = NULL;
  1020. return 0;
  1021. }
  1022. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1023. .open = snd_vt1724_playback_indep_open,
  1024. .close = snd_vt1724_playback_indep_close,
  1025. .ioctl = snd_pcm_lib_ioctl,
  1026. .hw_params = snd_vt1724_pcm_hw_params,
  1027. .hw_free = snd_vt1724_pcm_hw_free,
  1028. .prepare = snd_vt1724_playback_indep_prepare,
  1029. .trigger = snd_vt1724_pcm_trigger,
  1030. .pointer = snd_vt1724_pcm_pointer,
  1031. };
  1032. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 * ice, int device)
  1033. {
  1034. struct snd_pcm *pcm;
  1035. int play;
  1036. int err;
  1037. play = ice->num_total_dacs / 2 - 1;
  1038. if (play <= 0)
  1039. return 0;
  1040. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1041. if (err < 0)
  1042. return err;
  1043. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1044. &snd_vt1724_playback_indep_ops);
  1045. pcm->private_data = ice;
  1046. pcm->info_flags = 0;
  1047. strcpy(pcm->name, "ICE1724 Surround PCM");
  1048. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1049. snd_dma_pci_data(ice->pci),
  1050. 64*1024, 64*1024);
  1051. ice->pcm_ds = pcm;
  1052. return 0;
  1053. }
  1054. /*
  1055. * Mixer section
  1056. */
  1057. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 * ice)
  1058. {
  1059. int err;
  1060. if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1061. struct snd_ac97_bus *pbus;
  1062. struct snd_ac97_template ac97;
  1063. static struct snd_ac97_bus_ops ops = {
  1064. .write = snd_vt1724_ac97_write,
  1065. .read = snd_vt1724_ac97_read,
  1066. };
  1067. /* cold reset */
  1068. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1069. mdelay(5); /* FIXME */
  1070. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1071. if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
  1072. return err;
  1073. memset(&ac97, 0, sizeof(ac97));
  1074. ac97.private_data = ice;
  1075. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1076. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1077. else
  1078. return 0;
  1079. }
  1080. /* I2S mixer only */
  1081. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1082. return 0;
  1083. }
  1084. /*
  1085. *
  1086. */
  1087. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1088. {
  1089. return (unsigned int)ice->eeprom.data[idx] | \
  1090. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1091. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1092. }
  1093. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1094. struct snd_info_buffer *buffer)
  1095. {
  1096. struct snd_ice1712 *ice = entry->private_data;
  1097. unsigned int idx;
  1098. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1099. snd_iprintf(buffer, "EEPROM:\n");
  1100. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1101. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1102. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1103. snd_iprintf(buffer, " System Config : 0x%x\n",
  1104. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1105. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1106. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1107. snd_iprintf(buffer, " I2S : 0x%x\n",
  1108. ice->eeprom.data[ICE_EEP2_I2S]);
  1109. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1110. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1111. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1112. ice->eeprom.gpiodir);
  1113. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1114. ice->eeprom.gpiomask);
  1115. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1116. ice->eeprom.gpiostate);
  1117. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1118. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1119. idx, ice->eeprom.data[idx]);
  1120. snd_iprintf(buffer, "\nRegisters:\n");
  1121. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1122. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1123. for (idx = 0x0; idx < 0x20 ; idx++)
  1124. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1125. idx, inb(ice->port+idx));
  1126. for (idx = 0x0; idx < 0x30 ; idx++)
  1127. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1128. idx, inb(ice->profi_port+idx));
  1129. }
  1130. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 * ice)
  1131. {
  1132. struct snd_info_entry *entry;
  1133. if (! snd_card_proc_new(ice->card, "ice1724", &entry))
  1134. snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
  1135. }
  1136. /*
  1137. *
  1138. */
  1139. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1140. struct snd_ctl_elem_info *uinfo)
  1141. {
  1142. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1143. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1144. return 0;
  1145. }
  1146. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1147. struct snd_ctl_elem_value *ucontrol)
  1148. {
  1149. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1150. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1151. return 0;
  1152. }
  1153. static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1154. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1155. .name = "ICE1724 EEPROM",
  1156. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1157. .info = snd_vt1724_eeprom_info,
  1158. .get = snd_vt1724_eeprom_get
  1159. };
  1160. /*
  1161. */
  1162. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1163. struct snd_ctl_elem_info *uinfo)
  1164. {
  1165. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1166. uinfo->count = 1;
  1167. return 0;
  1168. }
  1169. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1170. {
  1171. unsigned int val, rbits;
  1172. val = diga->status[0] & 0x03; /* professional, non-audio */
  1173. if (val & 0x01) {
  1174. /* professional */
  1175. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1176. IEC958_AES0_PRO_EMPHASIS_5015)
  1177. val |= 1U << 3;
  1178. rbits = (diga->status[4] >> 3) & 0x0f;
  1179. if (rbits) {
  1180. switch (rbits) {
  1181. case 2: val |= 5 << 12; break; /* 96k */
  1182. case 3: val |= 6 << 12; break; /* 192k */
  1183. case 10: val |= 4 << 12; break; /* 88.2k */
  1184. case 11: val |= 7 << 12; break; /* 176.4k */
  1185. }
  1186. } else {
  1187. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1188. case IEC958_AES0_PRO_FS_44100:
  1189. break;
  1190. case IEC958_AES0_PRO_FS_32000:
  1191. val |= 3U << 12;
  1192. break;
  1193. default:
  1194. val |= 2U << 12;
  1195. break;
  1196. }
  1197. }
  1198. } else {
  1199. /* consumer */
  1200. val |= diga->status[1] & 0x04; /* copyright */
  1201. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1202. IEC958_AES0_CON_EMPHASIS_5015)
  1203. val |= 1U << 3;
  1204. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1205. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1206. }
  1207. return val;
  1208. }
  1209. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1210. {
  1211. memset(diga->status, 0, sizeof(diga->status));
  1212. diga->status[0] = val & 0x03; /* professional, non-audio */
  1213. if (val & 0x01) {
  1214. /* professional */
  1215. if (val & (1U << 3))
  1216. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1217. switch ((val >> 12) & 0x7) {
  1218. case 0:
  1219. break;
  1220. case 2:
  1221. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1222. break;
  1223. default:
  1224. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1225. break;
  1226. }
  1227. } else {
  1228. /* consumer */
  1229. diga->status[0] |= val & (1U << 2); /* copyright */
  1230. if (val & (1U << 3))
  1231. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1232. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1233. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1234. }
  1235. }
  1236. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1237. struct snd_ctl_elem_value *ucontrol)
  1238. {
  1239. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1240. unsigned int val;
  1241. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1242. decode_spdif_bits(&ucontrol->value.iec958, val);
  1243. return 0;
  1244. }
  1245. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1246. struct snd_ctl_elem_value *ucontrol)
  1247. {
  1248. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1249. unsigned int val, old;
  1250. val = encode_spdif_bits(&ucontrol->value.iec958);
  1251. spin_lock_irq(&ice->reg_lock);
  1252. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1253. if (val != old)
  1254. update_spdif_bits(ice, val);
  1255. spin_unlock_irq(&ice->reg_lock);
  1256. return (val != old);
  1257. }
  1258. static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1259. {
  1260. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1261. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1262. .info = snd_vt1724_spdif_info,
  1263. .get = snd_vt1724_spdif_default_get,
  1264. .put = snd_vt1724_spdif_default_put
  1265. };
  1266. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1267. struct snd_ctl_elem_value *ucontrol)
  1268. {
  1269. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1270. IEC958_AES0_PROFESSIONAL |
  1271. IEC958_AES0_CON_NOT_COPYRIGHT |
  1272. IEC958_AES0_CON_EMPHASIS;
  1273. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1274. IEC958_AES1_CON_CATEGORY;
  1275. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1276. return 0;
  1277. }
  1278. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1279. struct snd_ctl_elem_value *ucontrol)
  1280. {
  1281. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1282. IEC958_AES0_PROFESSIONAL |
  1283. IEC958_AES0_PRO_FS |
  1284. IEC958_AES0_PRO_EMPHASIS;
  1285. return 0;
  1286. }
  1287. static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1288. {
  1289. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1290. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1291. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1292. .info = snd_vt1724_spdif_info,
  1293. .get = snd_vt1724_spdif_maskc_get,
  1294. };
  1295. static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1296. {
  1297. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1298. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1299. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
  1300. .info = snd_vt1724_spdif_info,
  1301. .get = snd_vt1724_spdif_maskp_get,
  1302. };
  1303. #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
  1304. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1305. struct snd_ctl_elem_value *ucontrol)
  1306. {
  1307. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1308. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1309. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1310. return 0;
  1311. }
  1312. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1313. struct snd_ctl_elem_value *ucontrol)
  1314. {
  1315. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1316. unsigned char old, val;
  1317. spin_lock_irq(&ice->reg_lock);
  1318. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1319. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1320. if (ucontrol->value.integer.value[0])
  1321. val |= VT1724_CFG_SPDIF_OUT_EN;
  1322. if (old != val)
  1323. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1324. spin_unlock_irq(&ice->reg_lock);
  1325. return old != val;
  1326. }
  1327. static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1328. {
  1329. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1330. /* FIXME: the following conflict with IEC958 Playback Route */
  1331. // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
  1332. .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
  1333. .info = snd_vt1724_spdif_sw_info,
  1334. .get = snd_vt1724_spdif_sw_get,
  1335. .put = snd_vt1724_spdif_sw_put
  1336. };
  1337. #if 0 /* NOT USED YET */
  1338. /*
  1339. * GPIO access from extern
  1340. */
  1341. #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
  1342. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1343. struct snd_ctl_elem_value *ucontrol)
  1344. {
  1345. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1346. int shift = kcontrol->private_value & 0xff;
  1347. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1348. snd_ice1712_save_gpio_status(ice);
  1349. ucontrol->value.integer.value[0] =
  1350. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1351. snd_ice1712_restore_gpio_status(ice);
  1352. return 0;
  1353. }
  1354. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1355. struct snd_ctl_elem_value *ucontrol)
  1356. {
  1357. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1358. int shift = kcontrol->private_value & 0xff;
  1359. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1360. unsigned int val, nval;
  1361. if (kcontrol->private_value & (1 << 31))
  1362. return -EPERM;
  1363. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1364. snd_ice1712_save_gpio_status(ice);
  1365. val = snd_ice1712_gpio_read(ice);
  1366. nval |= val & ~(1 << shift);
  1367. if (val != nval)
  1368. snd_ice1712_gpio_write(ice, nval);
  1369. snd_ice1712_restore_gpio_status(ice);
  1370. return val != nval;
  1371. }
  1372. #endif /* NOT USED YET */
  1373. /*
  1374. * rate
  1375. */
  1376. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1377. struct snd_ctl_elem_info *uinfo)
  1378. {
  1379. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1380. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1381. uinfo->count = 1;
  1382. uinfo->value.enumerated.items = ice->hw_rates->count + 1;
  1383. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1384. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1385. if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
  1386. strcpy(uinfo->value.enumerated.name, "IEC958 Input");
  1387. else
  1388. sprintf(uinfo->value.enumerated.name, "%d",
  1389. ice->hw_rates->list[uinfo->value.enumerated.item]);
  1390. return 0;
  1391. }
  1392. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1393. struct snd_ctl_elem_value *ucontrol)
  1394. {
  1395. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1396. unsigned int i, rate;
  1397. spin_lock_irq(&ice->reg_lock);
  1398. if (ice->is_spdif_master(ice)) {
  1399. ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
  1400. } else {
  1401. rate = ice->get_rate(ice);
  1402. ucontrol->value.enumerated.item[0] = 0;
  1403. for (i = 0; i < ice->hw_rates->count; i++) {
  1404. if (ice->hw_rates->list[i] == rate) {
  1405. ucontrol->value.enumerated.item[0] = i;
  1406. break;
  1407. }
  1408. }
  1409. }
  1410. spin_unlock_irq(&ice->reg_lock);
  1411. return 0;
  1412. }
  1413. /* setting clock to external - SPDIF */
  1414. static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
  1415. {
  1416. unsigned char oval;
  1417. unsigned char i2s_oval;
  1418. oval = inb(ICEMT1724(ice, RATE));
  1419. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1420. /* setting 256fs */
  1421. i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
  1422. outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
  1423. }
  1424. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1425. struct snd_ctl_elem_value *ucontrol)
  1426. {
  1427. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1428. unsigned int old_rate, new_rate;
  1429. unsigned int item = ucontrol->value.enumerated.item[0];
  1430. unsigned int spdif = ice->hw_rates->count;
  1431. if (item > spdif)
  1432. return -EINVAL;
  1433. spin_lock_irq(&ice->reg_lock);
  1434. if (ice->is_spdif_master(ice))
  1435. old_rate = 0;
  1436. else
  1437. old_rate = ice->get_rate(ice);
  1438. if (item == spdif) {
  1439. /* switching to external clock via SPDIF */
  1440. ice->set_spdif_clock(ice);
  1441. new_rate = 0;
  1442. } else {
  1443. /* internal on-card clock */
  1444. new_rate = ice->hw_rates->list[item];
  1445. ice->pro_rate_default = new_rate;
  1446. spin_unlock_irq(&ice->reg_lock);
  1447. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
  1448. spin_lock_irq(&ice->reg_lock);
  1449. }
  1450. spin_unlock_irq(&ice->reg_lock);
  1451. /* the first reset to the SPDIF master mode? */
  1452. if (old_rate != new_rate && !new_rate) {
  1453. /* notify akm chips as well */
  1454. unsigned int i;
  1455. if (ice->gpio.set_pro_rate)
  1456. ice->gpio.set_pro_rate(ice, 0);
  1457. for (i = 0; i < ice->akm_codecs; i++) {
  1458. if (ice->akm[i].ops.set_rate_val)
  1459. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1460. }
  1461. }
  1462. return old_rate != new_rate;
  1463. }
  1464. static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1465. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1466. .name = "Multi Track Internal Clock",
  1467. .info = snd_vt1724_pro_internal_clock_info,
  1468. .get = snd_vt1724_pro_internal_clock_get,
  1469. .put = snd_vt1724_pro_internal_clock_put
  1470. };
  1471. #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
  1472. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1473. struct snd_ctl_elem_value *ucontrol)
  1474. {
  1475. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1476. return 0;
  1477. }
  1478. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1479. struct snd_ctl_elem_value *ucontrol)
  1480. {
  1481. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1482. int change = 0, nval;
  1483. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1484. spin_lock_irq(&ice->reg_lock);
  1485. change = PRO_RATE_LOCKED != nval;
  1486. PRO_RATE_LOCKED = nval;
  1487. spin_unlock_irq(&ice->reg_lock);
  1488. return change;
  1489. }
  1490. static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1491. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1492. .name = "Multi Track Rate Locking",
  1493. .info = snd_vt1724_pro_rate_locking_info,
  1494. .get = snd_vt1724_pro_rate_locking_get,
  1495. .put = snd_vt1724_pro_rate_locking_put
  1496. };
  1497. #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
  1498. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1499. struct snd_ctl_elem_value *ucontrol)
  1500. {
  1501. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1502. return 0;
  1503. }
  1504. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1505. struct snd_ctl_elem_value *ucontrol)
  1506. {
  1507. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1508. int change = 0, nval;
  1509. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1510. spin_lock_irq(&ice->reg_lock);
  1511. change = PRO_RATE_RESET != nval;
  1512. PRO_RATE_RESET = nval;
  1513. spin_unlock_irq(&ice->reg_lock);
  1514. return change;
  1515. }
  1516. static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1517. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1518. .name = "Multi Track Rate Reset",
  1519. .info = snd_vt1724_pro_rate_reset_info,
  1520. .get = snd_vt1724_pro_rate_reset_get,
  1521. .put = snd_vt1724_pro_rate_reset_put
  1522. };
  1523. /*
  1524. * routing
  1525. */
  1526. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1527. struct snd_ctl_elem_info *uinfo)
  1528. {
  1529. static char *texts[] = {
  1530. "PCM Out", /* 0 */
  1531. "H/W In 0", "H/W In 1", /* 1-2 */
  1532. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1533. };
  1534. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1535. uinfo->count = 1;
  1536. uinfo->value.enumerated.items = 5;
  1537. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1538. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1539. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1540. return 0;
  1541. }
  1542. static inline int analog_route_shift(int idx)
  1543. {
  1544. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1545. }
  1546. static inline int digital_route_shift(int idx)
  1547. {
  1548. return idx * 3;
  1549. }
  1550. static int get_route_val(struct snd_ice1712 *ice, int shift)
  1551. {
  1552. unsigned long val;
  1553. unsigned char eitem;
  1554. static const unsigned char xlate[8] = {
  1555. 0, 255, 1, 2, 255, 255, 3, 4,
  1556. };
  1557. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1558. val >>= shift;
  1559. val &= 7; //we now have 3 bits per output
  1560. eitem = xlate[val];
  1561. if (eitem == 255) {
  1562. snd_BUG();
  1563. return 0;
  1564. }
  1565. return eitem;
  1566. }
  1567. static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
  1568. {
  1569. unsigned int old_val, nval;
  1570. int change;
  1571. static const unsigned char xroute[8] = {
  1572. 0, /* PCM */
  1573. 2, /* PSDIN0 Left */
  1574. 3, /* PSDIN0 Right */
  1575. 6, /* SPDIN Left */
  1576. 7, /* SPDIN Right */
  1577. };
  1578. nval = xroute[val % 5];
  1579. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1580. val &= ~(0x07 << shift);
  1581. val |= nval << shift;
  1582. change = val != old_val;
  1583. if (change)
  1584. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1585. return change;
  1586. }
  1587. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1588. struct snd_ctl_elem_value *ucontrol)
  1589. {
  1590. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1591. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1592. ucontrol->value.enumerated.item[0] =
  1593. get_route_val(ice, analog_route_shift(idx));
  1594. return 0;
  1595. }
  1596. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1597. struct snd_ctl_elem_value *ucontrol)
  1598. {
  1599. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1600. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1601. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1602. analog_route_shift(idx));
  1603. }
  1604. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1605. struct snd_ctl_elem_value *ucontrol)
  1606. {
  1607. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1608. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1609. ucontrol->value.enumerated.item[0] =
  1610. get_route_val(ice, digital_route_shift(idx));
  1611. return 0;
  1612. }
  1613. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1614. struct snd_ctl_elem_value *ucontrol)
  1615. {
  1616. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1617. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1618. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1619. digital_route_shift(idx));
  1620. }
  1621. static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
  1622. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1623. .name = "H/W Playback Route",
  1624. .info = snd_vt1724_pro_route_info,
  1625. .get = snd_vt1724_pro_route_analog_get,
  1626. .put = snd_vt1724_pro_route_analog_put,
  1627. };
  1628. static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1629. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1630. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
  1631. .info = snd_vt1724_pro_route_info,
  1632. .get = snd_vt1724_pro_route_spdif_get,
  1633. .put = snd_vt1724_pro_route_spdif_put,
  1634. .count = 2,
  1635. };
  1636. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1637. struct snd_ctl_elem_info *uinfo)
  1638. {
  1639. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1640. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1641. uinfo->value.integer.min = 0;
  1642. uinfo->value.integer.max = 255;
  1643. return 0;
  1644. }
  1645. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1646. struct snd_ctl_elem_value *ucontrol)
  1647. {
  1648. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1649. int idx;
  1650. spin_lock_irq(&ice->reg_lock);
  1651. for (idx = 0; idx < 22; idx++) {
  1652. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1653. ucontrol->value.integer.value[idx] =
  1654. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1655. }
  1656. spin_unlock_irq(&ice->reg_lock);
  1657. return 0;
  1658. }
  1659. static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1660. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1661. .name = "Multi Track Peak",
  1662. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1663. .info = snd_vt1724_pro_peak_info,
  1664. .get = snd_vt1724_pro_peak_get
  1665. };
  1666. /*
  1667. *
  1668. */
  1669. static struct snd_ice1712_card_info no_matched __devinitdata;
  1670. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1671. snd_vt1724_revo_cards,
  1672. snd_vt1724_amp_cards,
  1673. snd_vt1724_aureon_cards,
  1674. snd_vt1720_mobo_cards,
  1675. snd_vt1720_pontis_cards,
  1676. snd_vt1724_prodigy_hifi_cards,
  1677. snd_vt1724_prodigy192_cards,
  1678. snd_vt1724_juli_cards,
  1679. snd_vt1724_phase_cards,
  1680. snd_vt1724_wtm_cards,
  1681. snd_vt1724_se_cards,
  1682. NULL,
  1683. };
  1684. /*
  1685. */
  1686. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1687. {
  1688. int t = 0x10000;
  1689. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1690. ;
  1691. if (t == -1)
  1692. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1693. }
  1694. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1695. unsigned char dev, unsigned char addr)
  1696. {
  1697. unsigned char val;
  1698. mutex_lock(&ice->i2c_mutex);
  1699. wait_i2c_busy(ice);
  1700. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1701. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1702. wait_i2c_busy(ice);
  1703. val = inb(ICEREG1724(ice, I2C_DATA));
  1704. mutex_unlock(&ice->i2c_mutex);
  1705. //printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  1706. return val;
  1707. }
  1708. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  1709. unsigned char dev, unsigned char addr, unsigned char data)
  1710. {
  1711. mutex_lock(&ice->i2c_mutex);
  1712. wait_i2c_busy(ice);
  1713. //printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  1714. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1715. outb(data, ICEREG1724(ice, I2C_DATA));
  1716. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1717. wait_i2c_busy(ice);
  1718. mutex_unlock(&ice->i2c_mutex);
  1719. }
  1720. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  1721. const char *modelname)
  1722. {
  1723. const int dev = 0xa0; /* EEPROM device address */
  1724. unsigned int i, size;
  1725. struct snd_ice1712_card_info * const *tbl, *c;
  1726. if (! modelname || ! *modelname) {
  1727. ice->eeprom.subvendor = 0;
  1728. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1729. ice->eeprom.subvendor =
  1730. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1731. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1732. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1733. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1734. if (ice->eeprom.subvendor == 0 ||
  1735. ice->eeprom.subvendor == (unsigned int)-1) {
  1736. /* invalid subvendor from EEPROM, try the PCI
  1737. * subststem ID instead
  1738. */
  1739. u16 vendor, device;
  1740. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  1741. &vendor);
  1742. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1743. ice->eeprom.subvendor =
  1744. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1745. if (ice->eeprom.subvendor == 0 ||
  1746. ice->eeprom.subvendor == (unsigned int)-1) {
  1747. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1748. return -ENXIO;
  1749. }
  1750. }
  1751. }
  1752. for (tbl = card_tables; *tbl; tbl++) {
  1753. for (c = *tbl; c->subvendor; c++) {
  1754. if (modelname && c->model &&
  1755. ! strcmp(modelname, c->model)) {
  1756. printk(KERN_INFO "ice1724: Using board model %s\n",
  1757. c->name);
  1758. ice->eeprom.subvendor = c->subvendor;
  1759. } else if (c->subvendor != ice->eeprom.subvendor)
  1760. continue;
  1761. if (! c->eeprom_size || ! c->eeprom_data)
  1762. goto found;
  1763. /* if the EEPROM is given by the driver, use it */
  1764. snd_printdd("using the defined eeprom..\n");
  1765. ice->eeprom.version = 2;
  1766. ice->eeprom.size = c->eeprom_size + 6;
  1767. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1768. goto read_skipped;
  1769. }
  1770. }
  1771. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  1772. ice->eeprom.subvendor);
  1773. found:
  1774. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1775. if (ice->eeprom.size < 6)
  1776. ice->eeprom.size = 32;
  1777. else if (ice->eeprom.size > 32) {
  1778. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  1779. ice->eeprom.size);
  1780. return -EIO;
  1781. }
  1782. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1783. if (ice->eeprom.version != 2)
  1784. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  1785. ice->eeprom.version);
  1786. size = ice->eeprom.size - 6;
  1787. for (i = 0; i < size; i++)
  1788. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1789. read_skipped:
  1790. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1791. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1792. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  1793. return 0;
  1794. }
  1795. static void __devinit snd_vt1724_chip_reset(struct snd_ice1712 *ice)
  1796. {
  1797. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  1798. msleep(10);
  1799. outb(0, ICEREG1724(ice, CONTROL));
  1800. msleep(10);
  1801. }
  1802. static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
  1803. {
  1804. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  1805. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  1806. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  1807. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  1808. ice->gpio.write_mask = ice->eeprom.gpiomask;
  1809. ice->gpio.direction = ice->eeprom.gpiodir;
  1810. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  1811. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  1812. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  1813. outb(0, ICEREG1724(ice, POWERDOWN));
  1814. return 0;
  1815. }
  1816. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  1817. {
  1818. int err;
  1819. struct snd_kcontrol *kctl;
  1820. snd_assert(ice->pcm != NULL, return -EIO);
  1821. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  1822. if (err < 0)
  1823. return err;
  1824. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  1825. if (err < 0)
  1826. return err;
  1827. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  1828. if (err < 0)
  1829. return err;
  1830. kctl->id.device = ice->pcm->device;
  1831. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  1832. if (err < 0)
  1833. return err;
  1834. kctl->id.device = ice->pcm->device;
  1835. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  1836. if (err < 0)
  1837. return err;
  1838. kctl->id.device = ice->pcm->device;
  1839. #if 0 /* use default only */
  1840. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  1841. if (err < 0)
  1842. return err;
  1843. kctl->id.device = ice->pcm->device;
  1844. ice->spdif.stream_ctl = kctl;
  1845. #endif
  1846. return 0;
  1847. }
  1848. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  1849. {
  1850. int err;
  1851. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  1852. if (err < 0)
  1853. return err;
  1854. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  1855. if (err < 0)
  1856. return err;
  1857. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  1858. if (err < 0)
  1859. return err;
  1860. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  1861. if (err < 0)
  1862. return err;
  1863. if (ice->num_total_dacs > 0) {
  1864. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  1865. tmp.count = ice->num_total_dacs;
  1866. if (ice->vt1720 && tmp.count > 2)
  1867. tmp.count = 2;
  1868. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  1869. if (err < 0)
  1870. return err;
  1871. }
  1872. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  1873. if (err < 0)
  1874. return err;
  1875. return 0;
  1876. }
  1877. static int snd_vt1724_free(struct snd_ice1712 *ice)
  1878. {
  1879. if (! ice->port)
  1880. goto __hw_end;
  1881. /* mask all interrupts */
  1882. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  1883. outb(0xff, ICEREG1724(ice, IRQMASK));
  1884. /* --- */
  1885. __hw_end:
  1886. if (ice->irq >= 0)
  1887. free_irq(ice->irq, ice);
  1888. pci_release_regions(ice->pci);
  1889. snd_ice1712_akm4xxx_free(ice);
  1890. pci_disable_device(ice->pci);
  1891. kfree(ice->spec);
  1892. kfree(ice);
  1893. return 0;
  1894. }
  1895. static int snd_vt1724_dev_free(struct snd_device *device)
  1896. {
  1897. struct snd_ice1712 *ice = device->device_data;
  1898. return snd_vt1724_free(ice);
  1899. }
  1900. static int __devinit snd_vt1724_create(struct snd_card *card,
  1901. struct pci_dev *pci,
  1902. const char *modelname,
  1903. struct snd_ice1712 ** r_ice1712)
  1904. {
  1905. struct snd_ice1712 *ice;
  1906. int err;
  1907. unsigned char mask;
  1908. static struct snd_device_ops ops = {
  1909. .dev_free = snd_vt1724_dev_free,
  1910. };
  1911. *r_ice1712 = NULL;
  1912. /* enable PCI device */
  1913. if ((err = pci_enable_device(pci)) < 0)
  1914. return err;
  1915. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  1916. if (ice == NULL) {
  1917. pci_disable_device(pci);
  1918. return -ENOMEM;
  1919. }
  1920. ice->vt1724 = 1;
  1921. spin_lock_init(&ice->reg_lock);
  1922. mutex_init(&ice->gpio_mutex);
  1923. mutex_init(&ice->open_mutex);
  1924. mutex_init(&ice->i2c_mutex);
  1925. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  1926. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  1927. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  1928. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  1929. ice->card = card;
  1930. ice->pci = pci;
  1931. ice->irq = -1;
  1932. pci_set_master(pci);
  1933. snd_vt1724_proc_init(ice);
  1934. synchronize_irq(pci->irq);
  1935. if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
  1936. kfree(ice);
  1937. pci_disable_device(pci);
  1938. return err;
  1939. }
  1940. ice->port = pci_resource_start(pci, 0);
  1941. ice->profi_port = pci_resource_start(pci, 1);
  1942. if (request_irq(pci->irq, snd_vt1724_interrupt,
  1943. IRQF_SHARED, "ICE1724", ice)) {
  1944. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  1945. snd_vt1724_free(ice);
  1946. return -EIO;
  1947. }
  1948. ice->irq = pci->irq;
  1949. snd_vt1724_chip_reset(ice);
  1950. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  1951. snd_vt1724_free(ice);
  1952. return -EIO;
  1953. }
  1954. if (snd_vt1724_chip_init(ice) < 0) {
  1955. snd_vt1724_free(ice);
  1956. return -EIO;
  1957. }
  1958. /* unmask used interrupts */
  1959. if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401))
  1960. mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
  1961. else
  1962. mask = 0;
  1963. outb(mask, ICEREG1724(ice, IRQMASK));
  1964. /* don't handle FIFO overrun/underruns (just yet),
  1965. * since they cause machine lockups
  1966. */
  1967. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  1968. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
  1969. snd_vt1724_free(ice);
  1970. return err;
  1971. }
  1972. snd_card_set_dev(card, &pci->dev);
  1973. *r_ice1712 = ice;
  1974. return 0;
  1975. }
  1976. /*
  1977. *
  1978. * Registration
  1979. *
  1980. */
  1981. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  1982. const struct pci_device_id *pci_id)
  1983. {
  1984. static int dev;
  1985. struct snd_card *card;
  1986. struct snd_ice1712 *ice;
  1987. int pcm_dev = 0, err;
  1988. struct snd_ice1712_card_info * const *tbl, *c;
  1989. if (dev >= SNDRV_CARDS)
  1990. return -ENODEV;
  1991. if (!enable[dev]) {
  1992. dev++;
  1993. return -ENOENT;
  1994. }
  1995. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1996. if (card == NULL)
  1997. return -ENOMEM;
  1998. strcpy(card->driver, "ICE1724");
  1999. strcpy(card->shortname, "ICEnsemble ICE1724");
  2000. if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
  2001. snd_card_free(card);
  2002. return err;
  2003. }
  2004. for (tbl = card_tables; *tbl; tbl++) {
  2005. for (c = *tbl; c->subvendor; c++) {
  2006. if (c->subvendor == ice->eeprom.subvendor) {
  2007. strcpy(card->shortname, c->name);
  2008. if (c->driver) /* specific driver? */
  2009. strcpy(card->driver, c->driver);
  2010. if (c->chip_init) {
  2011. if ((err = c->chip_init(ice)) < 0) {
  2012. snd_card_free(card);
  2013. return err;
  2014. }
  2015. }
  2016. goto __found;
  2017. }
  2018. }
  2019. }
  2020. c = &no_matched;
  2021. __found:
  2022. /*
  2023. * VT1724 has separate DMAs for the analog and the SPDIF streams while
  2024. * ICE1712 has only one for both (mixed up).
  2025. *
  2026. * Confusingly the analog PCM is named "professional" here because it
  2027. * was called so in ice1712 driver, and vt1724 driver is derived from
  2028. * ice1712 driver.
  2029. */
  2030. ice->pro_rate_default = PRO_RATE_DEFAULT;
  2031. if (!ice->is_spdif_master)
  2032. ice->is_spdif_master = stdclock_is_spdif_master;
  2033. if (!ice->get_rate)
  2034. ice->get_rate = stdclock_get_rate;
  2035. if (!ice->set_rate)
  2036. ice->set_rate = stdclock_set_rate;
  2037. if (!ice->set_mclk)
  2038. ice->set_mclk = stdclock_set_mclk;
  2039. if (!ice->set_spdif_clock)
  2040. ice->set_spdif_clock = stdclock_set_spdif_clock;
  2041. if (!ice->hw_rates)
  2042. set_std_hw_rates(ice);
  2043. if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
  2044. snd_card_free(card);
  2045. return err;
  2046. }
  2047. if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
  2048. snd_card_free(card);
  2049. return err;
  2050. }
  2051. if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
  2052. snd_card_free(card);
  2053. return err;
  2054. }
  2055. if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
  2056. snd_card_free(card);
  2057. return err;
  2058. }
  2059. if ((err = snd_vt1724_build_controls(ice)) < 0) {
  2060. snd_card_free(card);
  2061. return err;
  2062. }
  2063. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2064. if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
  2065. snd_card_free(card);
  2066. return err;
  2067. }
  2068. }
  2069. if (c->build_controls) {
  2070. if ((err = c->build_controls(ice)) < 0) {
  2071. snd_card_free(card);
  2072. return err;
  2073. }
  2074. }
  2075. if (! c->no_mpu401) {
  2076. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2077. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  2078. ICEREG1724(ice, MPU_CTRL),
  2079. MPU401_INFO_INTEGRATED,
  2080. ice->irq, 0,
  2081. &ice->rmidi[0])) < 0) {
  2082. snd_card_free(card);
  2083. return err;
  2084. }
  2085. }
  2086. }
  2087. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2088. card->shortname, ice->port, ice->irq);
  2089. if ((err = snd_card_register(card)) < 0) {
  2090. snd_card_free(card);
  2091. return err;
  2092. }
  2093. pci_set_drvdata(pci, card);
  2094. dev++;
  2095. return 0;
  2096. }
  2097. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2098. {
  2099. snd_card_free(pci_get_drvdata(pci));
  2100. pci_set_drvdata(pci, NULL);
  2101. }
  2102. static struct pci_driver driver = {
  2103. .name = "ICE1724",
  2104. .id_table = snd_vt1724_ids,
  2105. .probe = snd_vt1724_probe,
  2106. .remove = __devexit_p(snd_vt1724_remove),
  2107. };
  2108. static int __init alsa_card_ice1724_init(void)
  2109. {
  2110. return pci_register_driver(&driver);
  2111. }
  2112. static void __exit alsa_card_ice1724_exit(void)
  2113. {
  2114. pci_unregister_driver(&driver);
  2115. }
  2116. module_init(alsa_card_ice1724_init)
  2117. module_exit(alsa_card_ice1724_exit)