core.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802
  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/firmware.h>
  19. #include "core.h"
  20. #include "mac.h"
  21. #include "htc.h"
  22. #include "hif.h"
  23. #include "wmi.h"
  24. #include "bmi.h"
  25. #include "debug.h"
  26. #include "htt.h"
  27. unsigned int ath10k_debug_mask;
  28. static bool uart_print;
  29. static unsigned int ath10k_p2p;
  30. module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  31. module_param(uart_print, bool, 0644);
  32. module_param_named(p2p, ath10k_p2p, uint, 0644);
  33. MODULE_PARM_DESC(debug_mask, "Debugging mask");
  34. MODULE_PARM_DESC(uart_print, "Uart target debugging");
  35. MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
  36. static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  37. {
  38. .id = QCA988X_HW_2_0_VERSION,
  39. .name = "qca988x hw2.0",
  40. .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  41. .fw = {
  42. .dir = QCA988X_HW_2_0_FW_DIR,
  43. .fw = QCA988X_HW_2_0_FW_FILE,
  44. .otp = QCA988X_HW_2_0_OTP_FILE,
  45. .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  46. },
  47. },
  48. };
  49. static void ath10k_send_suspend_complete(struct ath10k *ar)
  50. {
  51. ath10k_dbg(ATH10K_DBG_BOOT, "boot suspend complete\n");
  52. ar->is_target_paused = true;
  53. wake_up(&ar->event_queue);
  54. }
  55. static int ath10k_check_fw_version(struct ath10k *ar)
  56. {
  57. char version[32];
  58. if (ar->fw_version_major >= SUPPORTED_FW_MAJOR &&
  59. ar->fw_version_minor >= SUPPORTED_FW_MINOR &&
  60. ar->fw_version_release >= SUPPORTED_FW_RELEASE &&
  61. ar->fw_version_build >= SUPPORTED_FW_BUILD)
  62. return 0;
  63. snprintf(version, sizeof(version), "%u.%u.%u.%u",
  64. SUPPORTED_FW_MAJOR, SUPPORTED_FW_MINOR,
  65. SUPPORTED_FW_RELEASE, SUPPORTED_FW_BUILD);
  66. ath10k_warn("WARNING: Firmware version %s is not officially supported.\n",
  67. ar->hw->wiphy->fw_version);
  68. ath10k_warn("Please upgrade to version %s (or newer)\n", version);
  69. return 0;
  70. }
  71. static int ath10k_init_connect_htc(struct ath10k *ar)
  72. {
  73. int status;
  74. status = ath10k_wmi_connect_htc_service(ar);
  75. if (status)
  76. goto conn_fail;
  77. /* Start HTC */
  78. status = ath10k_htc_start(&ar->htc);
  79. if (status)
  80. goto conn_fail;
  81. /* Wait for WMI event to be ready */
  82. status = ath10k_wmi_wait_for_service_ready(ar);
  83. if (status <= 0) {
  84. ath10k_warn("wmi service ready event not received");
  85. status = -ETIMEDOUT;
  86. goto timeout;
  87. }
  88. ath10k_dbg(ATH10K_DBG_BOOT, "boot wmi ready\n");
  89. return 0;
  90. timeout:
  91. ath10k_htc_stop(&ar->htc);
  92. conn_fail:
  93. return status;
  94. }
  95. static int ath10k_init_configure_target(struct ath10k *ar)
  96. {
  97. u32 param_host;
  98. int ret;
  99. /* tell target which HTC version it is used*/
  100. ret = ath10k_bmi_write32(ar, hi_app_host_interest,
  101. HTC_PROTOCOL_VERSION);
  102. if (ret) {
  103. ath10k_err("settings HTC version failed\n");
  104. return ret;
  105. }
  106. /* set the firmware mode to STA/IBSS/AP */
  107. ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
  108. if (ret) {
  109. ath10k_err("setting firmware mode (1/2) failed\n");
  110. return ret;
  111. }
  112. /* TODO following parameters need to be re-visited. */
  113. /* num_device */
  114. param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  115. /* Firmware mode */
  116. /* FIXME: Why FW_MODE_AP ??.*/
  117. param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
  118. /* mac_addr_method */
  119. param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  120. /* firmware_bridge */
  121. param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  122. /* fwsubmode */
  123. param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
  124. ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
  125. if (ret) {
  126. ath10k_err("setting firmware mode (2/2) failed\n");
  127. return ret;
  128. }
  129. /* We do all byte-swapping on the host */
  130. ret = ath10k_bmi_write32(ar, hi_be, 0);
  131. if (ret) {
  132. ath10k_err("setting host CPU BE mode failed\n");
  133. return ret;
  134. }
  135. /* FW descriptor/Data swap flags */
  136. ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
  137. if (ret) {
  138. ath10k_err("setting FW data/desc swap flags failed\n");
  139. return ret;
  140. }
  141. return 0;
  142. }
  143. static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
  144. const char *dir,
  145. const char *file)
  146. {
  147. char filename[100];
  148. const struct firmware *fw;
  149. int ret;
  150. if (file == NULL)
  151. return ERR_PTR(-ENOENT);
  152. if (dir == NULL)
  153. dir = ".";
  154. snprintf(filename, sizeof(filename), "%s/%s", dir, file);
  155. ret = request_firmware(&fw, filename, ar->dev);
  156. if (ret)
  157. return ERR_PTR(ret);
  158. return fw;
  159. }
  160. static int ath10k_push_board_ext_data(struct ath10k *ar,
  161. const struct firmware *fw)
  162. {
  163. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  164. u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
  165. u32 board_ext_data_addr;
  166. int ret;
  167. ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
  168. if (ret) {
  169. ath10k_err("could not read board ext data addr (%d)\n", ret);
  170. return ret;
  171. }
  172. ath10k_dbg(ATH10K_DBG_BOOT,
  173. "boot push board extended data addr 0x%x\n",
  174. board_ext_data_addr);
  175. if (board_ext_data_addr == 0)
  176. return 0;
  177. if (fw->size != (board_data_size + board_ext_data_size)) {
  178. ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n",
  179. fw->size, board_data_size, board_ext_data_size);
  180. return -EINVAL;
  181. }
  182. ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
  183. fw->data + board_data_size,
  184. board_ext_data_size);
  185. if (ret) {
  186. ath10k_err("could not write board ext data (%d)\n", ret);
  187. return ret;
  188. }
  189. ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
  190. (board_ext_data_size << 16) | 1);
  191. if (ret) {
  192. ath10k_err("could not write board ext data bit (%d)\n", ret);
  193. return ret;
  194. }
  195. return 0;
  196. }
  197. static int ath10k_download_board_data(struct ath10k *ar)
  198. {
  199. const struct firmware *fw = ar->board_data;
  200. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  201. u32 address;
  202. int ret;
  203. ret = ath10k_push_board_ext_data(ar, fw);
  204. if (ret) {
  205. ath10k_err("could not push board ext data (%d)\n", ret);
  206. goto exit;
  207. }
  208. ret = ath10k_bmi_read32(ar, hi_board_data, &address);
  209. if (ret) {
  210. ath10k_err("could not read board data addr (%d)\n", ret);
  211. goto exit;
  212. }
  213. ret = ath10k_bmi_write_memory(ar, address, fw->data,
  214. min_t(u32, board_data_size, fw->size));
  215. if (ret) {
  216. ath10k_err("could not write board data (%d)\n", ret);
  217. goto exit;
  218. }
  219. ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
  220. if (ret) {
  221. ath10k_err("could not write board data bit (%d)\n", ret);
  222. goto exit;
  223. }
  224. exit:
  225. return ret;
  226. }
  227. static int ath10k_download_and_run_otp(struct ath10k *ar)
  228. {
  229. const struct firmware *fw = ar->otp;
  230. u32 address = ar->hw_params.patch_load_addr;
  231. u32 exec_param;
  232. int ret;
  233. /* OTP is optional */
  234. if (!ar->otp)
  235. return 0;
  236. ret = ath10k_bmi_fast_download(ar, address, fw->data, fw->size);
  237. if (ret) {
  238. ath10k_err("could not write otp (%d)\n", ret);
  239. goto exit;
  240. }
  241. exec_param = 0;
  242. ret = ath10k_bmi_execute(ar, address, &exec_param);
  243. if (ret) {
  244. ath10k_err("could not execute otp (%d)\n", ret);
  245. goto exit;
  246. }
  247. exit:
  248. return ret;
  249. }
  250. static int ath10k_download_fw(struct ath10k *ar)
  251. {
  252. const struct firmware *fw = ar->firmware;
  253. u32 address;
  254. int ret;
  255. address = ar->hw_params.patch_load_addr;
  256. ret = ath10k_bmi_fast_download(ar, address, fw->data, fw->size);
  257. if (ret) {
  258. ath10k_err("could not write fw (%d)\n", ret);
  259. goto exit;
  260. }
  261. exit:
  262. return ret;
  263. }
  264. static void ath10k_core_free_firmware_files(struct ath10k *ar)
  265. {
  266. if (ar->board_data && !IS_ERR(ar->board_data))
  267. release_firmware(ar->board_data);
  268. if (ar->otp && !IS_ERR(ar->otp))
  269. release_firmware(ar->otp);
  270. if (ar->firmware && !IS_ERR(ar->firmware))
  271. release_firmware(ar->firmware);
  272. ar->board_data = NULL;
  273. ar->otp = NULL;
  274. ar->firmware = NULL;
  275. }
  276. static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
  277. {
  278. int ret = 0;
  279. if (ar->hw_params.fw.fw == NULL) {
  280. ath10k_err("firmware file not defined\n");
  281. return -EINVAL;
  282. }
  283. if (ar->hw_params.fw.board == NULL) {
  284. ath10k_err("board data file not defined");
  285. return -EINVAL;
  286. }
  287. ar->board_data = ath10k_fetch_fw_file(ar,
  288. ar->hw_params.fw.dir,
  289. ar->hw_params.fw.board);
  290. if (IS_ERR(ar->board_data)) {
  291. ret = PTR_ERR(ar->board_data);
  292. ath10k_err("could not fetch board data (%d)\n", ret);
  293. goto err;
  294. }
  295. ar->firmware = ath10k_fetch_fw_file(ar,
  296. ar->hw_params.fw.dir,
  297. ar->hw_params.fw.fw);
  298. if (IS_ERR(ar->firmware)) {
  299. ret = PTR_ERR(ar->firmware);
  300. ath10k_err("could not fetch firmware (%d)\n", ret);
  301. goto err;
  302. }
  303. /* OTP may be undefined. If so, don't fetch it at all */
  304. if (ar->hw_params.fw.otp == NULL)
  305. return 0;
  306. ar->otp = ath10k_fetch_fw_file(ar,
  307. ar->hw_params.fw.dir,
  308. ar->hw_params.fw.otp);
  309. if (IS_ERR(ar->otp)) {
  310. ret = PTR_ERR(ar->otp);
  311. ath10k_err("could not fetch otp (%d)\n", ret);
  312. goto err;
  313. }
  314. return 0;
  315. err:
  316. ath10k_core_free_firmware_files(ar);
  317. return ret;
  318. }
  319. static int ath10k_init_download_firmware(struct ath10k *ar)
  320. {
  321. int ret;
  322. ret = ath10k_download_board_data(ar);
  323. if (ret)
  324. return ret;
  325. ret = ath10k_download_and_run_otp(ar);
  326. if (ret)
  327. return ret;
  328. ret = ath10k_download_fw(ar);
  329. if (ret)
  330. return ret;
  331. return ret;
  332. }
  333. static int ath10k_init_uart(struct ath10k *ar)
  334. {
  335. int ret;
  336. /*
  337. * Explicitly setting UART prints to zero as target turns it on
  338. * based on scratch registers.
  339. */
  340. ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
  341. if (ret) {
  342. ath10k_warn("could not disable UART prints (%d)\n", ret);
  343. return ret;
  344. }
  345. if (!uart_print) {
  346. ath10k_info("UART prints disabled\n");
  347. return 0;
  348. }
  349. ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
  350. if (ret) {
  351. ath10k_warn("could not enable UART prints (%d)\n", ret);
  352. return ret;
  353. }
  354. ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
  355. if (ret) {
  356. ath10k_warn("could not enable UART prints (%d)\n", ret);
  357. return ret;
  358. }
  359. /* Set the UART baud rate to 19200. */
  360. ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
  361. if (ret) {
  362. ath10k_warn("could not set the baud rate (%d)\n", ret);
  363. return ret;
  364. }
  365. ath10k_info("UART prints enabled\n");
  366. return 0;
  367. }
  368. static int ath10k_init_hw_params(struct ath10k *ar)
  369. {
  370. const struct ath10k_hw_params *uninitialized_var(hw_params);
  371. int i;
  372. for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
  373. hw_params = &ath10k_hw_params_list[i];
  374. if (hw_params->id == ar->target_version)
  375. break;
  376. }
  377. if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
  378. ath10k_err("Unsupported hardware version: 0x%x\n",
  379. ar->target_version);
  380. return -EINVAL;
  381. }
  382. ar->hw_params = *hw_params;
  383. ath10k_info("Hardware name %s version 0x%x\n",
  384. ar->hw_params.name, ar->target_version);
  385. return 0;
  386. }
  387. static void ath10k_core_restart(struct work_struct *work)
  388. {
  389. struct ath10k *ar = container_of(work, struct ath10k, restart_work);
  390. mutex_lock(&ar->conf_mutex);
  391. switch (ar->state) {
  392. case ATH10K_STATE_ON:
  393. ath10k_halt(ar);
  394. ar->state = ATH10K_STATE_RESTARTING;
  395. ieee80211_restart_hw(ar->hw);
  396. break;
  397. case ATH10K_STATE_OFF:
  398. /* this can happen if driver is being unloaded */
  399. ath10k_warn("cannot restart a device that hasn't been started\n");
  400. break;
  401. case ATH10K_STATE_RESTARTING:
  402. case ATH10K_STATE_RESTARTED:
  403. ar->state = ATH10K_STATE_WEDGED;
  404. /* fall through */
  405. case ATH10K_STATE_WEDGED:
  406. ath10k_warn("device is wedged, will not restart\n");
  407. break;
  408. }
  409. mutex_unlock(&ar->conf_mutex);
  410. }
  411. struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
  412. const struct ath10k_hif_ops *hif_ops)
  413. {
  414. struct ath10k *ar;
  415. ar = ath10k_mac_create();
  416. if (!ar)
  417. return NULL;
  418. ar->ath_common.priv = ar;
  419. ar->ath_common.hw = ar->hw;
  420. ar->p2p = !!ath10k_p2p;
  421. ar->dev = dev;
  422. ar->hif.priv = hif_priv;
  423. ar->hif.ops = hif_ops;
  424. init_completion(&ar->scan.started);
  425. init_completion(&ar->scan.completed);
  426. init_completion(&ar->scan.on_channel);
  427. init_completion(&ar->install_key_done);
  428. init_completion(&ar->vdev_setup_done);
  429. setup_timer(&ar->scan.timeout, ath10k_reset_scan, (unsigned long)ar);
  430. ar->workqueue = create_singlethread_workqueue("ath10k_wq");
  431. if (!ar->workqueue)
  432. goto err_wq;
  433. mutex_init(&ar->conf_mutex);
  434. spin_lock_init(&ar->data_lock);
  435. INIT_LIST_HEAD(&ar->peers);
  436. init_waitqueue_head(&ar->peer_mapping_wq);
  437. init_completion(&ar->offchan_tx_completed);
  438. INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
  439. skb_queue_head_init(&ar->offchan_tx_queue);
  440. init_waitqueue_head(&ar->event_queue);
  441. INIT_WORK(&ar->restart_work, ath10k_core_restart);
  442. return ar;
  443. err_wq:
  444. ath10k_mac_destroy(ar);
  445. return NULL;
  446. }
  447. EXPORT_SYMBOL(ath10k_core_create);
  448. void ath10k_core_destroy(struct ath10k *ar)
  449. {
  450. flush_workqueue(ar->workqueue);
  451. destroy_workqueue(ar->workqueue);
  452. ath10k_mac_destroy(ar);
  453. }
  454. EXPORT_SYMBOL(ath10k_core_destroy);
  455. int ath10k_core_start(struct ath10k *ar)
  456. {
  457. int status;
  458. ath10k_bmi_start(ar);
  459. if (ath10k_init_configure_target(ar)) {
  460. status = -EINVAL;
  461. goto err;
  462. }
  463. status = ath10k_init_download_firmware(ar);
  464. if (status)
  465. goto err;
  466. status = ath10k_init_uart(ar);
  467. if (status)
  468. goto err;
  469. ar->htc.htc_ops.target_send_suspend_complete =
  470. ath10k_send_suspend_complete;
  471. status = ath10k_htc_init(ar);
  472. if (status) {
  473. ath10k_err("could not init HTC (%d)\n", status);
  474. goto err;
  475. }
  476. status = ath10k_bmi_done(ar);
  477. if (status)
  478. goto err;
  479. status = ath10k_wmi_attach(ar);
  480. if (status) {
  481. ath10k_err("WMI attach failed: %d\n", status);
  482. goto err;
  483. }
  484. status = ath10k_htc_wait_target(&ar->htc);
  485. if (status)
  486. goto err_wmi_detach;
  487. status = ath10k_htt_attach(ar);
  488. if (status) {
  489. ath10k_err("could not attach htt (%d)\n", status);
  490. goto err_wmi_detach;
  491. }
  492. status = ath10k_init_connect_htc(ar);
  493. if (status)
  494. goto err_htt_detach;
  495. ath10k_info("firmware %s booted\n", ar->hw->wiphy->fw_version);
  496. status = ath10k_check_fw_version(ar);
  497. if (status)
  498. goto err_disconnect_htc;
  499. status = ath10k_wmi_cmd_init(ar);
  500. if (status) {
  501. ath10k_err("could not send WMI init command (%d)\n", status);
  502. goto err_disconnect_htc;
  503. }
  504. status = ath10k_wmi_wait_for_unified_ready(ar);
  505. if (status <= 0) {
  506. ath10k_err("wmi unified ready event not received\n");
  507. status = -ETIMEDOUT;
  508. goto err_disconnect_htc;
  509. }
  510. status = ath10k_htt_attach_target(&ar->htt);
  511. if (status)
  512. goto err_disconnect_htc;
  513. status = ath10k_debug_start(ar);
  514. if (status)
  515. goto err_disconnect_htc;
  516. ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1;
  517. return 0;
  518. err_disconnect_htc:
  519. ath10k_htc_stop(&ar->htc);
  520. err_htt_detach:
  521. ath10k_htt_detach(&ar->htt);
  522. err_wmi_detach:
  523. ath10k_wmi_detach(ar);
  524. err:
  525. return status;
  526. }
  527. EXPORT_SYMBOL(ath10k_core_start);
  528. void ath10k_core_stop(struct ath10k *ar)
  529. {
  530. ath10k_debug_stop(ar);
  531. ath10k_htc_stop(&ar->htc);
  532. ath10k_htt_detach(&ar->htt);
  533. ath10k_wmi_detach(ar);
  534. }
  535. EXPORT_SYMBOL(ath10k_core_stop);
  536. /* mac80211 manages fw/hw initialization through start/stop hooks. However in
  537. * order to know what hw capabilities should be advertised to mac80211 it is
  538. * necessary to load the firmware (and tear it down immediately since start
  539. * hook will try to init it again) before registering */
  540. static int ath10k_core_probe_fw(struct ath10k *ar)
  541. {
  542. struct bmi_target_info target_info;
  543. int ret = 0;
  544. ret = ath10k_hif_power_up(ar);
  545. if (ret) {
  546. ath10k_err("could not start pci hif (%d)\n", ret);
  547. return ret;
  548. }
  549. memset(&target_info, 0, sizeof(target_info));
  550. ret = ath10k_bmi_get_target_info(ar, &target_info);
  551. if (ret) {
  552. ath10k_err("could not get target info (%d)\n", ret);
  553. ath10k_hif_power_down(ar);
  554. return ret;
  555. }
  556. ar->target_version = target_info.version;
  557. ar->hw->wiphy->hw_version = target_info.version;
  558. ret = ath10k_init_hw_params(ar);
  559. if (ret) {
  560. ath10k_err("could not get hw params (%d)\n", ret);
  561. ath10k_hif_power_down(ar);
  562. return ret;
  563. }
  564. ret = ath10k_core_fetch_firmware_files(ar);
  565. if (ret) {
  566. ath10k_err("could not fetch firmware files (%d)\n", ret);
  567. ath10k_hif_power_down(ar);
  568. return ret;
  569. }
  570. ret = ath10k_core_start(ar);
  571. if (ret) {
  572. ath10k_err("could not init core (%d)\n", ret);
  573. ath10k_core_free_firmware_files(ar);
  574. ath10k_hif_power_down(ar);
  575. return ret;
  576. }
  577. ath10k_core_stop(ar);
  578. ath10k_hif_power_down(ar);
  579. return 0;
  580. }
  581. static int ath10k_core_check_chip_id(struct ath10k *ar)
  582. {
  583. u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
  584. ath10k_dbg(ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
  585. ar->chip_id, hw_revision);
  586. /* Check that we are not using hw1.0 (some of them have same pci id
  587. * as hw2.0) before doing anything else as ath10k crashes horribly
  588. * due to missing hw1.0 workarounds. */
  589. switch (hw_revision) {
  590. case QCA988X_HW_1_0_CHIP_ID_REV:
  591. ath10k_err("ERROR: qca988x hw1.0 is not supported\n");
  592. return -EOPNOTSUPP;
  593. case QCA988X_HW_2_0_CHIP_ID_REV:
  594. /* known hardware revision, continue normally */
  595. return 0;
  596. default:
  597. ath10k_warn("Warning: hardware revision unknown (0x%x), expect problems\n",
  598. ar->chip_id);
  599. return 0;
  600. }
  601. return 0;
  602. }
  603. int ath10k_core_register(struct ath10k *ar, u32 chip_id)
  604. {
  605. int status;
  606. ar->chip_id = chip_id;
  607. status = ath10k_core_check_chip_id(ar);
  608. if (status) {
  609. ath10k_err("Unsupported chip id 0x%08x\n", ar->chip_id);
  610. return status;
  611. }
  612. status = ath10k_core_probe_fw(ar);
  613. if (status) {
  614. ath10k_err("could not probe fw (%d)\n", status);
  615. return status;
  616. }
  617. status = ath10k_mac_register(ar);
  618. if (status) {
  619. ath10k_err("could not register to mac80211 (%d)\n", status);
  620. goto err_release_fw;
  621. }
  622. status = ath10k_debug_create(ar);
  623. if (status) {
  624. ath10k_err("unable to initialize debugfs\n");
  625. goto err_unregister_mac;
  626. }
  627. return 0;
  628. err_unregister_mac:
  629. ath10k_mac_unregister(ar);
  630. err_release_fw:
  631. ath10k_core_free_firmware_files(ar);
  632. return status;
  633. }
  634. EXPORT_SYMBOL(ath10k_core_register);
  635. void ath10k_core_unregister(struct ath10k *ar)
  636. {
  637. /* We must unregister from mac80211 before we stop HTC and HIF.
  638. * Otherwise we will fail to submit commands to FW and mac80211 will be
  639. * unhappy about callback failures. */
  640. ath10k_mac_unregister(ar);
  641. ath10k_core_free_firmware_files(ar);
  642. }
  643. EXPORT_SYMBOL(ath10k_core_unregister);
  644. MODULE_AUTHOR("Qualcomm Atheros");
  645. MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
  646. MODULE_LICENSE("Dual BSD/GPL");