intel_sdvo.c 78 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the next
  14. * paragraph) shall be included in all copies or substantial portions of the
  15. * Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. * Authors:
  26. * Eric Anholt <eric@anholt.net>
  27. */
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/delay.h>
  31. #include <linux/export.h>
  32. #include "drmP.h"
  33. #include "drm.h"
  34. #include "drm_crtc.h"
  35. #include "drm_edid.h"
  36. #include "intel_drv.h"
  37. #include "i915_drm.h"
  38. #include "i915_drv.h"
  39. #include "intel_sdvo_regs.h"
  40. #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  41. #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  42. #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  43. #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  44. #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  45. SDVO_TV_MASK)
  46. #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
  47. #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
  48. #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
  49. #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  50. #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  51. static const char *tv_format_names[] = {
  52. "NTSC_M" , "NTSC_J" , "NTSC_443",
  53. "PAL_B" , "PAL_D" , "PAL_G" ,
  54. "PAL_H" , "PAL_I" , "PAL_M" ,
  55. "PAL_N" , "PAL_NC" , "PAL_60" ,
  56. "SECAM_B" , "SECAM_D" , "SECAM_G" ,
  57. "SECAM_K" , "SECAM_K1", "SECAM_L" ,
  58. "SECAM_60"
  59. };
  60. #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
  61. struct intel_sdvo {
  62. struct intel_encoder base;
  63. struct i2c_adapter *i2c;
  64. u8 slave_addr;
  65. struct i2c_adapter ddc;
  66. /* Register for the SDVO device: SDVOB or SDVOC */
  67. uint32_t sdvo_reg;
  68. /* Active outputs controlled by this SDVO output */
  69. uint16_t controlled_output;
  70. /*
  71. * Capabilities of the SDVO device returned by
  72. * i830_sdvo_get_capabilities()
  73. */
  74. struct intel_sdvo_caps caps;
  75. /* Pixel clock limitations reported by the SDVO device, in kHz */
  76. int pixel_clock_min, pixel_clock_max;
  77. /*
  78. * For multiple function SDVO device,
  79. * this is for current attached outputs.
  80. */
  81. uint16_t attached_output;
  82. /*
  83. * Hotplug activation bits for this device
  84. */
  85. uint8_t hotplug_active[2];
  86. /**
  87. * This is used to select the color range of RBG outputs in HDMI mode.
  88. * It is only valid when using TMDS encoding and 8 bit per color mode.
  89. */
  90. uint32_t color_range;
  91. /**
  92. * This is set if we're going to treat the device as TV-out.
  93. *
  94. * While we have these nice friendly flags for output types that ought
  95. * to decide this for us, the S-Video output on our HDMI+S-Video card
  96. * shows up as RGB1 (VGA).
  97. */
  98. bool is_tv;
  99. /* On different gens SDVOB is at different places. */
  100. bool is_sdvob;
  101. /* This is for current tv format name */
  102. int tv_format_index;
  103. /**
  104. * This is set if we treat the device as HDMI, instead of DVI.
  105. */
  106. bool is_hdmi;
  107. bool has_hdmi_monitor;
  108. bool has_hdmi_audio;
  109. /**
  110. * This is set if we detect output of sdvo device as LVDS and
  111. * have a valid fixed mode to use with the panel.
  112. */
  113. bool is_lvds;
  114. /**
  115. * This is sdvo fixed pannel mode pointer
  116. */
  117. struct drm_display_mode *sdvo_lvds_fixed_mode;
  118. /* DDC bus used by this SDVO encoder */
  119. uint8_t ddc_bus;
  120. /* Input timings for adjusted_mode */
  121. struct intel_sdvo_dtd input_dtd;
  122. };
  123. struct intel_sdvo_connector {
  124. struct intel_connector base;
  125. /* Mark the type of connector */
  126. uint16_t output_flag;
  127. enum hdmi_force_audio force_audio;
  128. /* This contains all current supported TV format */
  129. u8 tv_format_supported[TV_FORMAT_NUM];
  130. int format_supported_num;
  131. struct drm_property *tv_format;
  132. /* add the property for the SDVO-TV */
  133. struct drm_property *left;
  134. struct drm_property *right;
  135. struct drm_property *top;
  136. struct drm_property *bottom;
  137. struct drm_property *hpos;
  138. struct drm_property *vpos;
  139. struct drm_property *contrast;
  140. struct drm_property *saturation;
  141. struct drm_property *hue;
  142. struct drm_property *sharpness;
  143. struct drm_property *flicker_filter;
  144. struct drm_property *flicker_filter_adaptive;
  145. struct drm_property *flicker_filter_2d;
  146. struct drm_property *tv_chroma_filter;
  147. struct drm_property *tv_luma_filter;
  148. struct drm_property *dot_crawl;
  149. /* add the property for the SDVO-TV/LVDS */
  150. struct drm_property *brightness;
  151. /* Add variable to record current setting for the above property */
  152. u32 left_margin, right_margin, top_margin, bottom_margin;
  153. /* this is to get the range of margin.*/
  154. u32 max_hscan, max_vscan;
  155. u32 max_hpos, cur_hpos;
  156. u32 max_vpos, cur_vpos;
  157. u32 cur_brightness, max_brightness;
  158. u32 cur_contrast, max_contrast;
  159. u32 cur_saturation, max_saturation;
  160. u32 cur_hue, max_hue;
  161. u32 cur_sharpness, max_sharpness;
  162. u32 cur_flicker_filter, max_flicker_filter;
  163. u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
  164. u32 cur_flicker_filter_2d, max_flicker_filter_2d;
  165. u32 cur_tv_chroma_filter, max_tv_chroma_filter;
  166. u32 cur_tv_luma_filter, max_tv_luma_filter;
  167. u32 cur_dot_crawl, max_dot_crawl;
  168. };
  169. static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
  170. {
  171. return container_of(encoder, struct intel_sdvo, base.base);
  172. }
  173. static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
  174. {
  175. return container_of(intel_attached_encoder(connector),
  176. struct intel_sdvo, base);
  177. }
  178. static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
  179. {
  180. return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
  181. }
  182. static bool
  183. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
  184. static bool
  185. intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  186. struct intel_sdvo_connector *intel_sdvo_connector,
  187. int type);
  188. static bool
  189. intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  190. struct intel_sdvo_connector *intel_sdvo_connector);
  191. /**
  192. * Writes the SDVOB or SDVOC with the given value, but always writes both
  193. * SDVOB and SDVOC to work around apparent hardware issues (according to
  194. * comments in the BIOS).
  195. */
  196. static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
  197. {
  198. struct drm_device *dev = intel_sdvo->base.base.dev;
  199. struct drm_i915_private *dev_priv = dev->dev_private;
  200. u32 bval = val, cval = val;
  201. int i;
  202. if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
  203. I915_WRITE(intel_sdvo->sdvo_reg, val);
  204. I915_READ(intel_sdvo->sdvo_reg);
  205. return;
  206. }
  207. if (intel_sdvo->sdvo_reg == SDVOB) {
  208. cval = I915_READ(SDVOC);
  209. } else {
  210. bval = I915_READ(SDVOB);
  211. }
  212. /*
  213. * Write the registers twice for luck. Sometimes,
  214. * writing them only once doesn't appear to 'stick'.
  215. * The BIOS does this too. Yay, magic
  216. */
  217. for (i = 0; i < 2; i++)
  218. {
  219. I915_WRITE(SDVOB, bval);
  220. I915_READ(SDVOB);
  221. I915_WRITE(SDVOC, cval);
  222. I915_READ(SDVOC);
  223. }
  224. }
  225. static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
  226. {
  227. struct i2c_msg msgs[] = {
  228. {
  229. .addr = intel_sdvo->slave_addr,
  230. .flags = 0,
  231. .len = 1,
  232. .buf = &addr,
  233. },
  234. {
  235. .addr = intel_sdvo->slave_addr,
  236. .flags = I2C_M_RD,
  237. .len = 1,
  238. .buf = ch,
  239. }
  240. };
  241. int ret;
  242. if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
  243. return true;
  244. DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
  245. return false;
  246. }
  247. #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
  248. /** Mapping of command numbers to names, for debug output */
  249. static const struct _sdvo_cmd_name {
  250. u8 cmd;
  251. const char *name;
  252. } sdvo_cmd_names[] = {
  253. SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
  254. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
  255. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
  256. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
  257. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
  258. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
  259. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
  260. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
  261. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
  262. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
  263. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
  264. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
  265. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
  266. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
  267. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
  268. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
  269. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
  270. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  271. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
  272. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  273. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
  274. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
  275. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
  276. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
  277. SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
  278. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
  279. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
  280. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
  281. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
  282. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
  283. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
  284. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
  285. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
  286. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
  287. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
  288. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
  289. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
  290. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
  291. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
  292. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
  293. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
  294. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
  295. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
  296. /* Add the op code for SDVO enhancements */
  297. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
  298. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
  299. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
  300. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
  301. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
  302. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
  303. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
  304. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
  305. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
  306. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
  307. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
  308. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
  309. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
  310. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
  311. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
  312. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
  313. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
  314. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
  315. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
  316. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
  317. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
  318. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
  319. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
  320. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
  321. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
  322. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
  323. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
  324. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
  325. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
  326. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
  327. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
  328. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
  329. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
  330. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
  331. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
  332. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
  333. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
  334. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
  335. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
  336. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
  337. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
  338. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
  339. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
  340. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
  341. /* HDMI op code */
  342. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
  343. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
  344. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
  345. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
  346. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
  347. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
  348. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
  349. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
  350. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
  351. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
  352. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
  353. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
  354. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
  355. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
  356. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
  357. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
  358. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
  359. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
  360. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
  361. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
  362. };
  363. #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
  364. static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
  365. const void *args, int args_len)
  366. {
  367. int i;
  368. DRM_DEBUG_KMS("%s: W: %02X ",
  369. SDVO_NAME(intel_sdvo), cmd);
  370. for (i = 0; i < args_len; i++)
  371. DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
  372. for (; i < 8; i++)
  373. DRM_LOG_KMS(" ");
  374. for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
  375. if (cmd == sdvo_cmd_names[i].cmd) {
  376. DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
  377. break;
  378. }
  379. }
  380. if (i == ARRAY_SIZE(sdvo_cmd_names))
  381. DRM_LOG_KMS("(%02X)", cmd);
  382. DRM_LOG_KMS("\n");
  383. }
  384. static const char *cmd_status_names[] = {
  385. "Power on",
  386. "Success",
  387. "Not supported",
  388. "Invalid arg",
  389. "Pending",
  390. "Target not specified",
  391. "Scaling not supported"
  392. };
  393. static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
  394. const void *args, int args_len)
  395. {
  396. u8 buf[args_len*2 + 2], status;
  397. struct i2c_msg msgs[args_len + 3];
  398. int i, ret;
  399. intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
  400. for (i = 0; i < args_len; i++) {
  401. msgs[i].addr = intel_sdvo->slave_addr;
  402. msgs[i].flags = 0;
  403. msgs[i].len = 2;
  404. msgs[i].buf = buf + 2 *i;
  405. buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
  406. buf[2*i + 1] = ((u8*)args)[i];
  407. }
  408. msgs[i].addr = intel_sdvo->slave_addr;
  409. msgs[i].flags = 0;
  410. msgs[i].len = 2;
  411. msgs[i].buf = buf + 2*i;
  412. buf[2*i + 0] = SDVO_I2C_OPCODE;
  413. buf[2*i + 1] = cmd;
  414. /* the following two are to read the response */
  415. status = SDVO_I2C_CMD_STATUS;
  416. msgs[i+1].addr = intel_sdvo->slave_addr;
  417. msgs[i+1].flags = 0;
  418. msgs[i+1].len = 1;
  419. msgs[i+1].buf = &status;
  420. msgs[i+2].addr = intel_sdvo->slave_addr;
  421. msgs[i+2].flags = I2C_M_RD;
  422. msgs[i+2].len = 1;
  423. msgs[i+2].buf = &status;
  424. ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
  425. if (ret < 0) {
  426. DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
  427. return false;
  428. }
  429. if (ret != i+3) {
  430. /* failure in I2C transfer */
  431. DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
  432. return false;
  433. }
  434. return true;
  435. }
  436. static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
  437. void *response, int response_len)
  438. {
  439. u8 retry = 5;
  440. u8 status;
  441. int i;
  442. DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
  443. /*
  444. * The documentation states that all commands will be
  445. * processed within 15µs, and that we need only poll
  446. * the status byte a maximum of 3 times in order for the
  447. * command to be complete.
  448. *
  449. * Check 5 times in case the hardware failed to read the docs.
  450. */
  451. if (!intel_sdvo_read_byte(intel_sdvo,
  452. SDVO_I2C_CMD_STATUS,
  453. &status))
  454. goto log_fail;
  455. while (status == SDVO_CMD_STATUS_PENDING && retry--) {
  456. udelay(15);
  457. if (!intel_sdvo_read_byte(intel_sdvo,
  458. SDVO_I2C_CMD_STATUS,
  459. &status))
  460. goto log_fail;
  461. }
  462. if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
  463. DRM_LOG_KMS("(%s)", cmd_status_names[status]);
  464. else
  465. DRM_LOG_KMS("(??? %d)", status);
  466. if (status != SDVO_CMD_STATUS_SUCCESS)
  467. goto log_fail;
  468. /* Read the command response */
  469. for (i = 0; i < response_len; i++) {
  470. if (!intel_sdvo_read_byte(intel_sdvo,
  471. SDVO_I2C_RETURN_0 + i,
  472. &((u8 *)response)[i]))
  473. goto log_fail;
  474. DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
  475. }
  476. DRM_LOG_KMS("\n");
  477. return true;
  478. log_fail:
  479. DRM_LOG_KMS("... failed\n");
  480. return false;
  481. }
  482. static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
  483. {
  484. if (mode->clock >= 100000)
  485. return 1;
  486. else if (mode->clock >= 50000)
  487. return 2;
  488. else
  489. return 4;
  490. }
  491. static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
  492. u8 ddc_bus)
  493. {
  494. /* This must be the immediately preceding write before the i2c xfer */
  495. return intel_sdvo_write_cmd(intel_sdvo,
  496. SDVO_CMD_SET_CONTROL_BUS_SWITCH,
  497. &ddc_bus, 1);
  498. }
  499. static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
  500. {
  501. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
  502. return false;
  503. return intel_sdvo_read_response(intel_sdvo, NULL, 0);
  504. }
  505. static bool
  506. intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
  507. {
  508. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
  509. return false;
  510. return intel_sdvo_read_response(intel_sdvo, value, len);
  511. }
  512. static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
  513. {
  514. struct intel_sdvo_set_target_input_args targets = {0};
  515. return intel_sdvo_set_value(intel_sdvo,
  516. SDVO_CMD_SET_TARGET_INPUT,
  517. &targets, sizeof(targets));
  518. }
  519. /**
  520. * Return whether each input is trained.
  521. *
  522. * This function is making an assumption about the layout of the response,
  523. * which should be checked against the docs.
  524. */
  525. static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
  526. {
  527. struct intel_sdvo_get_trained_inputs_response response;
  528. BUILD_BUG_ON(sizeof(response) != 1);
  529. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
  530. &response, sizeof(response)))
  531. return false;
  532. *input_1 = response.input0_trained;
  533. *input_2 = response.input1_trained;
  534. return true;
  535. }
  536. static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
  537. u16 outputs)
  538. {
  539. return intel_sdvo_set_value(intel_sdvo,
  540. SDVO_CMD_SET_ACTIVE_OUTPUTS,
  541. &outputs, sizeof(outputs));
  542. }
  543. static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
  544. int mode)
  545. {
  546. u8 state = SDVO_ENCODER_STATE_ON;
  547. switch (mode) {
  548. case DRM_MODE_DPMS_ON:
  549. state = SDVO_ENCODER_STATE_ON;
  550. break;
  551. case DRM_MODE_DPMS_STANDBY:
  552. state = SDVO_ENCODER_STATE_STANDBY;
  553. break;
  554. case DRM_MODE_DPMS_SUSPEND:
  555. state = SDVO_ENCODER_STATE_SUSPEND;
  556. break;
  557. case DRM_MODE_DPMS_OFF:
  558. state = SDVO_ENCODER_STATE_OFF;
  559. break;
  560. }
  561. return intel_sdvo_set_value(intel_sdvo,
  562. SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
  563. }
  564. static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
  565. int *clock_min,
  566. int *clock_max)
  567. {
  568. struct intel_sdvo_pixel_clock_range clocks;
  569. BUILD_BUG_ON(sizeof(clocks) != 4);
  570. if (!intel_sdvo_get_value(intel_sdvo,
  571. SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
  572. &clocks, sizeof(clocks)))
  573. return false;
  574. /* Convert the values from units of 10 kHz to kHz. */
  575. *clock_min = clocks.min * 10;
  576. *clock_max = clocks.max * 10;
  577. return true;
  578. }
  579. static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
  580. u16 outputs)
  581. {
  582. return intel_sdvo_set_value(intel_sdvo,
  583. SDVO_CMD_SET_TARGET_OUTPUT,
  584. &outputs, sizeof(outputs));
  585. }
  586. static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
  587. struct intel_sdvo_dtd *dtd)
  588. {
  589. return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
  590. intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
  591. }
  592. static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
  593. struct intel_sdvo_dtd *dtd)
  594. {
  595. return intel_sdvo_set_timing(intel_sdvo,
  596. SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
  597. }
  598. static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
  599. struct intel_sdvo_dtd *dtd)
  600. {
  601. return intel_sdvo_set_timing(intel_sdvo,
  602. SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
  603. }
  604. static bool
  605. intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  606. uint16_t clock,
  607. uint16_t width,
  608. uint16_t height)
  609. {
  610. struct intel_sdvo_preferred_input_timing_args args;
  611. memset(&args, 0, sizeof(args));
  612. args.clock = clock;
  613. args.width = width;
  614. args.height = height;
  615. args.interlace = 0;
  616. if (intel_sdvo->is_lvds &&
  617. (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
  618. intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
  619. args.scaled = 1;
  620. return intel_sdvo_set_value(intel_sdvo,
  621. SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
  622. &args, sizeof(args));
  623. }
  624. static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  625. struct intel_sdvo_dtd *dtd)
  626. {
  627. BUILD_BUG_ON(sizeof(dtd->part1) != 8);
  628. BUILD_BUG_ON(sizeof(dtd->part2) != 8);
  629. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
  630. &dtd->part1, sizeof(dtd->part1)) &&
  631. intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
  632. &dtd->part2, sizeof(dtd->part2));
  633. }
  634. static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
  635. {
  636. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
  637. }
  638. static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
  639. const struct drm_display_mode *mode)
  640. {
  641. uint16_t width, height;
  642. uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
  643. uint16_t h_sync_offset, v_sync_offset;
  644. width = mode->crtc_hdisplay;
  645. height = mode->crtc_vdisplay;
  646. /* do some mode translations */
  647. h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
  648. h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
  649. v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
  650. v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
  651. h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
  652. v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
  653. dtd->part1.clock = mode->clock / 10;
  654. dtd->part1.h_active = width & 0xff;
  655. dtd->part1.h_blank = h_blank_len & 0xff;
  656. dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
  657. ((h_blank_len >> 8) & 0xf);
  658. dtd->part1.v_active = height & 0xff;
  659. dtd->part1.v_blank = v_blank_len & 0xff;
  660. dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
  661. ((v_blank_len >> 8) & 0xf);
  662. dtd->part2.h_sync_off = h_sync_offset & 0xff;
  663. dtd->part2.h_sync_width = h_sync_len & 0xff;
  664. dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
  665. (v_sync_len & 0xf);
  666. dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
  667. ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
  668. ((v_sync_len & 0x30) >> 4);
  669. dtd->part2.dtd_flags = 0x18;
  670. if (mode->flags & DRM_MODE_FLAG_PHSYNC)
  671. dtd->part2.dtd_flags |= 0x2;
  672. if (mode->flags & DRM_MODE_FLAG_PVSYNC)
  673. dtd->part2.dtd_flags |= 0x4;
  674. dtd->part2.sdvo_flags = 0;
  675. dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
  676. dtd->part2.reserved = 0;
  677. }
  678. static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
  679. const struct intel_sdvo_dtd *dtd)
  680. {
  681. mode->hdisplay = dtd->part1.h_active;
  682. mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
  683. mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
  684. mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
  685. mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
  686. mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
  687. mode->htotal = mode->hdisplay + dtd->part1.h_blank;
  688. mode->htotal += (dtd->part1.h_high & 0xf) << 8;
  689. mode->vdisplay = dtd->part1.v_active;
  690. mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
  691. mode->vsync_start = mode->vdisplay;
  692. mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
  693. mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
  694. mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
  695. mode->vsync_end = mode->vsync_start +
  696. (dtd->part2.v_sync_off_width & 0xf);
  697. mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
  698. mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
  699. mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
  700. mode->clock = dtd->part1.clock * 10;
  701. mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
  702. if (dtd->part2.dtd_flags & 0x2)
  703. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  704. if (dtd->part2.dtd_flags & 0x4)
  705. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  706. }
  707. static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
  708. {
  709. struct intel_sdvo_encode encode;
  710. BUILD_BUG_ON(sizeof(encode) != 2);
  711. return intel_sdvo_get_value(intel_sdvo,
  712. SDVO_CMD_GET_SUPP_ENCODE,
  713. &encode, sizeof(encode));
  714. }
  715. static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
  716. uint8_t mode)
  717. {
  718. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
  719. }
  720. static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
  721. uint8_t mode)
  722. {
  723. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
  724. }
  725. #if 0
  726. static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
  727. {
  728. int i, j;
  729. uint8_t set_buf_index[2];
  730. uint8_t av_split;
  731. uint8_t buf_size;
  732. uint8_t buf[48];
  733. uint8_t *pos;
  734. intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
  735. for (i = 0; i <= av_split; i++) {
  736. set_buf_index[0] = i; set_buf_index[1] = 0;
  737. intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
  738. set_buf_index, 2);
  739. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
  740. intel_sdvo_read_response(encoder, &buf_size, 1);
  741. pos = buf;
  742. for (j = 0; j <= buf_size; j += 8) {
  743. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
  744. NULL, 0);
  745. intel_sdvo_read_response(encoder, pos, 8);
  746. pos += 8;
  747. }
  748. }
  749. }
  750. #endif
  751. static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
  752. {
  753. struct dip_infoframe avi_if = {
  754. .type = DIP_TYPE_AVI,
  755. .ver = DIP_VERSION_AVI,
  756. .len = DIP_LEN_AVI,
  757. };
  758. uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
  759. uint8_t set_buf_index[2] = { 1, 0 };
  760. uint64_t *data = (uint64_t *)&avi_if;
  761. unsigned i;
  762. intel_dip_infoframe_csum(&avi_if);
  763. if (!intel_sdvo_set_value(intel_sdvo,
  764. SDVO_CMD_SET_HBUF_INDEX,
  765. set_buf_index, 2))
  766. return false;
  767. for (i = 0; i < sizeof(avi_if); i += 8) {
  768. if (!intel_sdvo_set_value(intel_sdvo,
  769. SDVO_CMD_SET_HBUF_DATA,
  770. data, 8))
  771. return false;
  772. data++;
  773. }
  774. return intel_sdvo_set_value(intel_sdvo,
  775. SDVO_CMD_SET_HBUF_TXRATE,
  776. &tx_rate, 1);
  777. }
  778. static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
  779. {
  780. struct intel_sdvo_tv_format format;
  781. uint32_t format_map;
  782. format_map = 1 << intel_sdvo->tv_format_index;
  783. memset(&format, 0, sizeof(format));
  784. memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
  785. BUILD_BUG_ON(sizeof(format) != 6);
  786. return intel_sdvo_set_value(intel_sdvo,
  787. SDVO_CMD_SET_TV_FORMAT,
  788. &format, sizeof(format));
  789. }
  790. static bool
  791. intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
  792. struct drm_display_mode *mode)
  793. {
  794. struct intel_sdvo_dtd output_dtd;
  795. if (!intel_sdvo_set_target_output(intel_sdvo,
  796. intel_sdvo->attached_output))
  797. return false;
  798. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  799. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  800. return false;
  801. return true;
  802. }
  803. static bool
  804. intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
  805. struct drm_display_mode *mode,
  806. struct drm_display_mode *adjusted_mode)
  807. {
  808. /* Reset the input timing to the screen. Assume always input 0. */
  809. if (!intel_sdvo_set_target_input(intel_sdvo))
  810. return false;
  811. if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
  812. mode->clock / 10,
  813. mode->hdisplay,
  814. mode->vdisplay))
  815. return false;
  816. if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
  817. &intel_sdvo->input_dtd))
  818. return false;
  819. intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
  820. return true;
  821. }
  822. static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
  823. struct drm_display_mode *mode,
  824. struct drm_display_mode *adjusted_mode)
  825. {
  826. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  827. int multiplier;
  828. /* We need to construct preferred input timings based on our
  829. * output timings. To do that, we have to set the output
  830. * timings, even though this isn't really the right place in
  831. * the sequence to do it. Oh well.
  832. */
  833. if (intel_sdvo->is_tv) {
  834. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
  835. return false;
  836. (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
  837. mode,
  838. adjusted_mode);
  839. } else if (intel_sdvo->is_lvds) {
  840. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
  841. intel_sdvo->sdvo_lvds_fixed_mode))
  842. return false;
  843. (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
  844. mode,
  845. adjusted_mode);
  846. }
  847. /* Make the CRTC code factor in the SDVO pixel multiplier. The
  848. * SDVO device will factor out the multiplier during mode_set.
  849. */
  850. multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
  851. intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
  852. return true;
  853. }
  854. static void intel_sdvo_mode_set(struct drm_encoder *encoder,
  855. struct drm_display_mode *mode,
  856. struct drm_display_mode *adjusted_mode)
  857. {
  858. struct drm_device *dev = encoder->dev;
  859. struct drm_i915_private *dev_priv = dev->dev_private;
  860. struct drm_crtc *crtc = encoder->crtc;
  861. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  862. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  863. u32 sdvox;
  864. struct intel_sdvo_in_out_map in_out;
  865. struct intel_sdvo_dtd input_dtd;
  866. int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
  867. int rate;
  868. if (!mode)
  869. return;
  870. /* First, set the input mapping for the first input to our controlled
  871. * output. This is only correct if we're a single-input device, in
  872. * which case the first input is the output from the appropriate SDVO
  873. * channel on the motherboard. In a two-input device, the first input
  874. * will be SDVOB and the second SDVOC.
  875. */
  876. in_out.in0 = intel_sdvo->attached_output;
  877. in_out.in1 = 0;
  878. intel_sdvo_set_value(intel_sdvo,
  879. SDVO_CMD_SET_IN_OUT_MAP,
  880. &in_out, sizeof(in_out));
  881. /* Set the output timings to the screen */
  882. if (!intel_sdvo_set_target_output(intel_sdvo,
  883. intel_sdvo->attached_output))
  884. return;
  885. /* We have tried to get input timing in mode_fixup, and filled into
  886. * adjusted_mode.
  887. */
  888. if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
  889. input_dtd = intel_sdvo->input_dtd;
  890. } else {
  891. /* Set the output timing to the screen */
  892. if (!intel_sdvo_set_target_output(intel_sdvo,
  893. intel_sdvo->attached_output))
  894. return;
  895. intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
  896. (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
  897. }
  898. /* Set the input timing to the screen. Assume always input 0. */
  899. if (!intel_sdvo_set_target_input(intel_sdvo))
  900. return;
  901. if (intel_sdvo->has_hdmi_monitor) {
  902. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
  903. intel_sdvo_set_colorimetry(intel_sdvo,
  904. SDVO_COLORIMETRY_RGB256);
  905. intel_sdvo_set_avi_infoframe(intel_sdvo);
  906. } else
  907. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
  908. if (intel_sdvo->is_tv &&
  909. !intel_sdvo_set_tv_format(intel_sdvo))
  910. return;
  911. (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
  912. switch (pixel_multiplier) {
  913. default:
  914. case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
  915. case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
  916. case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
  917. }
  918. if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
  919. return;
  920. /* Set the SDVO control regs. */
  921. if (INTEL_INFO(dev)->gen >= 4) {
  922. /* The real mode polarity is set by the SDVO commands, using
  923. * struct intel_sdvo_dtd. */
  924. sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
  925. if (intel_sdvo->is_hdmi)
  926. sdvox |= intel_sdvo->color_range;
  927. if (INTEL_INFO(dev)->gen < 5)
  928. sdvox |= SDVO_BORDER_ENABLE;
  929. } else {
  930. sdvox = I915_READ(intel_sdvo->sdvo_reg);
  931. switch (intel_sdvo->sdvo_reg) {
  932. case SDVOB:
  933. sdvox &= SDVOB_PRESERVE_MASK;
  934. break;
  935. case SDVOC:
  936. sdvox &= SDVOC_PRESERVE_MASK;
  937. break;
  938. }
  939. sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
  940. }
  941. if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
  942. sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
  943. else
  944. sdvox |= TRANSCODER(intel_crtc->pipe);
  945. if (intel_sdvo->has_hdmi_audio)
  946. sdvox |= SDVO_AUDIO_ENABLE;
  947. if (INTEL_INFO(dev)->gen >= 4) {
  948. /* done in crtc_mode_set as the dpll_md reg must be written early */
  949. } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
  950. /* done in crtc_mode_set as it lives inside the dpll register */
  951. } else {
  952. sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
  953. }
  954. if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
  955. INTEL_INFO(dev)->gen < 5)
  956. sdvox |= SDVO_STALL_SELECT;
  957. intel_sdvo_write_sdvox(intel_sdvo, sdvox);
  958. }
  959. static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
  960. {
  961. struct drm_device *dev = encoder->dev;
  962. struct drm_i915_private *dev_priv = dev->dev_private;
  963. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  964. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  965. u32 temp;
  966. if (mode != DRM_MODE_DPMS_ON) {
  967. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  968. if (0)
  969. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  970. if (mode == DRM_MODE_DPMS_OFF) {
  971. temp = I915_READ(intel_sdvo->sdvo_reg);
  972. if ((temp & SDVO_ENABLE) != 0) {
  973. intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
  974. }
  975. }
  976. } else {
  977. bool input1, input2;
  978. int i;
  979. u8 status;
  980. temp = I915_READ(intel_sdvo->sdvo_reg);
  981. if ((temp & SDVO_ENABLE) == 0)
  982. intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
  983. for (i = 0; i < 2; i++)
  984. intel_wait_for_vblank(dev, intel_crtc->pipe);
  985. status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
  986. /* Warn if the device reported failure to sync.
  987. * A lot of SDVO devices fail to notify of sync, but it's
  988. * a given it the status is a success, we succeeded.
  989. */
  990. if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
  991. DRM_DEBUG_KMS("First %s output reported failure to "
  992. "sync\n", SDVO_NAME(intel_sdvo));
  993. }
  994. if (0)
  995. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  996. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  997. }
  998. return;
  999. }
  1000. static int intel_sdvo_mode_valid(struct drm_connector *connector,
  1001. struct drm_display_mode *mode)
  1002. {
  1003. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1004. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  1005. return MODE_NO_DBLESCAN;
  1006. if (intel_sdvo->pixel_clock_min > mode->clock)
  1007. return MODE_CLOCK_LOW;
  1008. if (intel_sdvo->pixel_clock_max < mode->clock)
  1009. return MODE_CLOCK_HIGH;
  1010. if (intel_sdvo->is_lvds) {
  1011. if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
  1012. return MODE_PANEL;
  1013. if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
  1014. return MODE_PANEL;
  1015. }
  1016. return MODE_OK;
  1017. }
  1018. static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
  1019. {
  1020. BUILD_BUG_ON(sizeof(*caps) != 8);
  1021. if (!intel_sdvo_get_value(intel_sdvo,
  1022. SDVO_CMD_GET_DEVICE_CAPS,
  1023. caps, sizeof(*caps)))
  1024. return false;
  1025. DRM_DEBUG_KMS("SDVO capabilities:\n"
  1026. " vendor_id: %d\n"
  1027. " device_id: %d\n"
  1028. " device_rev_id: %d\n"
  1029. " sdvo_version_major: %d\n"
  1030. " sdvo_version_minor: %d\n"
  1031. " sdvo_inputs_mask: %d\n"
  1032. " smooth_scaling: %d\n"
  1033. " sharp_scaling: %d\n"
  1034. " up_scaling: %d\n"
  1035. " down_scaling: %d\n"
  1036. " stall_support: %d\n"
  1037. " output_flags: %d\n",
  1038. caps->vendor_id,
  1039. caps->device_id,
  1040. caps->device_rev_id,
  1041. caps->sdvo_version_major,
  1042. caps->sdvo_version_minor,
  1043. caps->sdvo_inputs_mask,
  1044. caps->smooth_scaling,
  1045. caps->sharp_scaling,
  1046. caps->up_scaling,
  1047. caps->down_scaling,
  1048. caps->stall_support,
  1049. caps->output_flags);
  1050. return true;
  1051. }
  1052. static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
  1053. {
  1054. u8 response[2];
  1055. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
  1056. &response, 2) && response[0];
  1057. }
  1058. static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
  1059. {
  1060. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1061. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
  1062. }
  1063. static bool
  1064. intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
  1065. {
  1066. /* Is there more than one type of output? */
  1067. return hweight16(intel_sdvo->caps.output_flags) > 1;
  1068. }
  1069. static struct edid *
  1070. intel_sdvo_get_edid(struct drm_connector *connector)
  1071. {
  1072. struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
  1073. return drm_get_edid(connector, &sdvo->ddc);
  1074. }
  1075. /* Mac mini hack -- use the same DDC as the analog connector */
  1076. static struct edid *
  1077. intel_sdvo_get_analog_edid(struct drm_connector *connector)
  1078. {
  1079. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1080. return drm_get_edid(connector,
  1081. intel_gmbus_get_adapter(dev_priv,
  1082. dev_priv->crt_ddc_pin));
  1083. }
  1084. enum drm_connector_status
  1085. intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
  1086. {
  1087. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1088. enum drm_connector_status status;
  1089. struct edid *edid;
  1090. edid = intel_sdvo_get_edid(connector);
  1091. if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
  1092. u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
  1093. /*
  1094. * Don't use the 1 as the argument of DDC bus switch to get
  1095. * the EDID. It is used for SDVO SPD ROM.
  1096. */
  1097. for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
  1098. intel_sdvo->ddc_bus = ddc;
  1099. edid = intel_sdvo_get_edid(connector);
  1100. if (edid)
  1101. break;
  1102. }
  1103. /*
  1104. * If we found the EDID on the other bus,
  1105. * assume that is the correct DDC bus.
  1106. */
  1107. if (edid == NULL)
  1108. intel_sdvo->ddc_bus = saved_ddc;
  1109. }
  1110. /*
  1111. * When there is no edid and no monitor is connected with VGA
  1112. * port, try to use the CRT ddc to read the EDID for DVI-connector.
  1113. */
  1114. if (edid == NULL)
  1115. edid = intel_sdvo_get_analog_edid(connector);
  1116. status = connector_status_unknown;
  1117. if (edid != NULL) {
  1118. /* DDC bus is shared, match EDID to connector type */
  1119. if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  1120. status = connector_status_connected;
  1121. if (intel_sdvo->is_hdmi) {
  1122. intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
  1123. intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
  1124. }
  1125. } else
  1126. status = connector_status_disconnected;
  1127. connector->display_info.raw_edid = NULL;
  1128. kfree(edid);
  1129. }
  1130. if (status == connector_status_connected) {
  1131. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1132. if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
  1133. intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
  1134. }
  1135. return status;
  1136. }
  1137. static bool
  1138. intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
  1139. struct edid *edid)
  1140. {
  1141. bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
  1142. bool connector_is_digital = !!IS_DIGITAL(sdvo);
  1143. DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
  1144. connector_is_digital, monitor_is_digital);
  1145. return connector_is_digital == monitor_is_digital;
  1146. }
  1147. static enum drm_connector_status
  1148. intel_sdvo_detect(struct drm_connector *connector, bool force)
  1149. {
  1150. uint16_t response;
  1151. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1152. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1153. enum drm_connector_status ret;
  1154. if (!intel_sdvo_write_cmd(intel_sdvo,
  1155. SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
  1156. return connector_status_unknown;
  1157. /* add 30ms delay when the output type might be TV */
  1158. if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
  1159. mdelay(30);
  1160. if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
  1161. return connector_status_unknown;
  1162. DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
  1163. response & 0xff, response >> 8,
  1164. intel_sdvo_connector->output_flag);
  1165. if (response == 0)
  1166. return connector_status_disconnected;
  1167. intel_sdvo->attached_output = response;
  1168. intel_sdvo->has_hdmi_monitor = false;
  1169. intel_sdvo->has_hdmi_audio = false;
  1170. if ((intel_sdvo_connector->output_flag & response) == 0)
  1171. ret = connector_status_disconnected;
  1172. else if (IS_TMDS(intel_sdvo_connector))
  1173. ret = intel_sdvo_tmds_sink_detect(connector);
  1174. else {
  1175. struct edid *edid;
  1176. /* if we have an edid check it matches the connection */
  1177. edid = intel_sdvo_get_edid(connector);
  1178. if (edid == NULL)
  1179. edid = intel_sdvo_get_analog_edid(connector);
  1180. if (edid != NULL) {
  1181. if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
  1182. edid))
  1183. ret = connector_status_connected;
  1184. else
  1185. ret = connector_status_disconnected;
  1186. connector->display_info.raw_edid = NULL;
  1187. kfree(edid);
  1188. } else
  1189. ret = connector_status_connected;
  1190. }
  1191. /* May update encoder flag for like clock for SDVO TV, etc.*/
  1192. if (ret == connector_status_connected) {
  1193. intel_sdvo->is_tv = false;
  1194. intel_sdvo->is_lvds = false;
  1195. intel_sdvo->base.needs_tv_clock = false;
  1196. if (response & SDVO_TV_MASK) {
  1197. intel_sdvo->is_tv = true;
  1198. intel_sdvo->base.needs_tv_clock = true;
  1199. }
  1200. if (response & SDVO_LVDS_MASK)
  1201. intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
  1202. }
  1203. return ret;
  1204. }
  1205. static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
  1206. {
  1207. struct edid *edid;
  1208. /* set the bus switch and get the modes */
  1209. edid = intel_sdvo_get_edid(connector);
  1210. /*
  1211. * Mac mini hack. On this device, the DVI-I connector shares one DDC
  1212. * link between analog and digital outputs. So, if the regular SDVO
  1213. * DDC fails, check to see if the analog output is disconnected, in
  1214. * which case we'll look there for the digital DDC data.
  1215. */
  1216. if (edid == NULL)
  1217. edid = intel_sdvo_get_analog_edid(connector);
  1218. if (edid != NULL) {
  1219. if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
  1220. edid)) {
  1221. drm_mode_connector_update_edid_property(connector, edid);
  1222. drm_add_edid_modes(connector, edid);
  1223. }
  1224. connector->display_info.raw_edid = NULL;
  1225. kfree(edid);
  1226. }
  1227. }
  1228. /*
  1229. * Set of SDVO TV modes.
  1230. * Note! This is in reply order (see loop in get_tv_modes).
  1231. * XXX: all 60Hz refresh?
  1232. */
  1233. static const struct drm_display_mode sdvo_tv_modes[] = {
  1234. { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
  1235. 416, 0, 200, 201, 232, 233, 0,
  1236. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1237. { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
  1238. 416, 0, 240, 241, 272, 273, 0,
  1239. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1240. { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
  1241. 496, 0, 300, 301, 332, 333, 0,
  1242. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1243. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
  1244. 736, 0, 350, 351, 382, 383, 0,
  1245. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1246. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
  1247. 736, 0, 400, 401, 432, 433, 0,
  1248. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1249. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
  1250. 736, 0, 480, 481, 512, 513, 0,
  1251. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1252. { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
  1253. 800, 0, 480, 481, 512, 513, 0,
  1254. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1255. { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
  1256. 800, 0, 576, 577, 608, 609, 0,
  1257. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1258. { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
  1259. 816, 0, 350, 351, 382, 383, 0,
  1260. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1261. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
  1262. 816, 0, 400, 401, 432, 433, 0,
  1263. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1264. { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
  1265. 816, 0, 480, 481, 512, 513, 0,
  1266. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1267. { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
  1268. 816, 0, 540, 541, 572, 573, 0,
  1269. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1270. { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
  1271. 816, 0, 576, 577, 608, 609, 0,
  1272. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1273. { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
  1274. 864, 0, 576, 577, 608, 609, 0,
  1275. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1276. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
  1277. 896, 0, 600, 601, 632, 633, 0,
  1278. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1279. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
  1280. 928, 0, 624, 625, 656, 657, 0,
  1281. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1282. { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
  1283. 1016, 0, 766, 767, 798, 799, 0,
  1284. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1285. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
  1286. 1120, 0, 768, 769, 800, 801, 0,
  1287. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1288. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
  1289. 1376, 0, 1024, 1025, 1056, 1057, 0,
  1290. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1291. };
  1292. static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
  1293. {
  1294. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1295. struct intel_sdvo_sdtv_resolution_request tv_res;
  1296. uint32_t reply = 0, format_map = 0;
  1297. int i;
  1298. /* Read the list of supported input resolutions for the selected TV
  1299. * format.
  1300. */
  1301. format_map = 1 << intel_sdvo->tv_format_index;
  1302. memcpy(&tv_res, &format_map,
  1303. min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
  1304. if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
  1305. return;
  1306. BUILD_BUG_ON(sizeof(tv_res) != 3);
  1307. if (!intel_sdvo_write_cmd(intel_sdvo,
  1308. SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
  1309. &tv_res, sizeof(tv_res)))
  1310. return;
  1311. if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
  1312. return;
  1313. for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
  1314. if (reply & (1 << i)) {
  1315. struct drm_display_mode *nmode;
  1316. nmode = drm_mode_duplicate(connector->dev,
  1317. &sdvo_tv_modes[i]);
  1318. if (nmode)
  1319. drm_mode_probed_add(connector, nmode);
  1320. }
  1321. }
  1322. static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
  1323. {
  1324. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1325. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1326. struct drm_display_mode *newmode;
  1327. /*
  1328. * Attempt to get the mode list from DDC.
  1329. * Assume that the preferred modes are
  1330. * arranged in priority order.
  1331. */
  1332. intel_ddc_get_modes(connector, intel_sdvo->i2c);
  1333. if (list_empty(&connector->probed_modes) == false)
  1334. goto end;
  1335. /* Fetch modes from VBT */
  1336. if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
  1337. newmode = drm_mode_duplicate(connector->dev,
  1338. dev_priv->sdvo_lvds_vbt_mode);
  1339. if (newmode != NULL) {
  1340. /* Guarantee the mode is preferred */
  1341. newmode->type = (DRM_MODE_TYPE_PREFERRED |
  1342. DRM_MODE_TYPE_DRIVER);
  1343. drm_mode_probed_add(connector, newmode);
  1344. }
  1345. }
  1346. end:
  1347. list_for_each_entry(newmode, &connector->probed_modes, head) {
  1348. if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
  1349. intel_sdvo->sdvo_lvds_fixed_mode =
  1350. drm_mode_duplicate(connector->dev, newmode);
  1351. drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
  1352. 0);
  1353. intel_sdvo->is_lvds = true;
  1354. break;
  1355. }
  1356. }
  1357. }
  1358. static int intel_sdvo_get_modes(struct drm_connector *connector)
  1359. {
  1360. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1361. if (IS_TV(intel_sdvo_connector))
  1362. intel_sdvo_get_tv_modes(connector);
  1363. else if (IS_LVDS(intel_sdvo_connector))
  1364. intel_sdvo_get_lvds_modes(connector);
  1365. else
  1366. intel_sdvo_get_ddc_modes(connector);
  1367. return !list_empty(&connector->probed_modes);
  1368. }
  1369. static void
  1370. intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
  1371. {
  1372. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1373. struct drm_device *dev = connector->dev;
  1374. if (intel_sdvo_connector->left)
  1375. drm_property_destroy(dev, intel_sdvo_connector->left);
  1376. if (intel_sdvo_connector->right)
  1377. drm_property_destroy(dev, intel_sdvo_connector->right);
  1378. if (intel_sdvo_connector->top)
  1379. drm_property_destroy(dev, intel_sdvo_connector->top);
  1380. if (intel_sdvo_connector->bottom)
  1381. drm_property_destroy(dev, intel_sdvo_connector->bottom);
  1382. if (intel_sdvo_connector->hpos)
  1383. drm_property_destroy(dev, intel_sdvo_connector->hpos);
  1384. if (intel_sdvo_connector->vpos)
  1385. drm_property_destroy(dev, intel_sdvo_connector->vpos);
  1386. if (intel_sdvo_connector->saturation)
  1387. drm_property_destroy(dev, intel_sdvo_connector->saturation);
  1388. if (intel_sdvo_connector->contrast)
  1389. drm_property_destroy(dev, intel_sdvo_connector->contrast);
  1390. if (intel_sdvo_connector->hue)
  1391. drm_property_destroy(dev, intel_sdvo_connector->hue);
  1392. if (intel_sdvo_connector->sharpness)
  1393. drm_property_destroy(dev, intel_sdvo_connector->sharpness);
  1394. if (intel_sdvo_connector->flicker_filter)
  1395. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
  1396. if (intel_sdvo_connector->flicker_filter_2d)
  1397. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
  1398. if (intel_sdvo_connector->flicker_filter_adaptive)
  1399. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
  1400. if (intel_sdvo_connector->tv_luma_filter)
  1401. drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
  1402. if (intel_sdvo_connector->tv_chroma_filter)
  1403. drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
  1404. if (intel_sdvo_connector->dot_crawl)
  1405. drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
  1406. if (intel_sdvo_connector->brightness)
  1407. drm_property_destroy(dev, intel_sdvo_connector->brightness);
  1408. }
  1409. static void intel_sdvo_destroy(struct drm_connector *connector)
  1410. {
  1411. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1412. if (intel_sdvo_connector->tv_format)
  1413. drm_property_destroy(connector->dev,
  1414. intel_sdvo_connector->tv_format);
  1415. intel_sdvo_destroy_enhance_property(connector);
  1416. drm_sysfs_connector_remove(connector);
  1417. drm_connector_cleanup(connector);
  1418. kfree(connector);
  1419. }
  1420. static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
  1421. {
  1422. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1423. struct edid *edid;
  1424. bool has_audio = false;
  1425. if (!intel_sdvo->is_hdmi)
  1426. return false;
  1427. edid = intel_sdvo_get_edid(connector);
  1428. if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
  1429. has_audio = drm_detect_monitor_audio(edid);
  1430. return has_audio;
  1431. }
  1432. static int
  1433. intel_sdvo_set_property(struct drm_connector *connector,
  1434. struct drm_property *property,
  1435. uint64_t val)
  1436. {
  1437. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1438. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1439. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1440. uint16_t temp_value;
  1441. uint8_t cmd;
  1442. int ret;
  1443. ret = drm_connector_property_set_value(connector, property, val);
  1444. if (ret)
  1445. return ret;
  1446. if (property == dev_priv->force_audio_property) {
  1447. int i = val;
  1448. bool has_audio;
  1449. if (i == intel_sdvo_connector->force_audio)
  1450. return 0;
  1451. intel_sdvo_connector->force_audio = i;
  1452. if (i == HDMI_AUDIO_AUTO)
  1453. has_audio = intel_sdvo_detect_hdmi_audio(connector);
  1454. else
  1455. has_audio = (i == HDMI_AUDIO_ON);
  1456. if (has_audio == intel_sdvo->has_hdmi_audio)
  1457. return 0;
  1458. intel_sdvo->has_hdmi_audio = has_audio;
  1459. goto done;
  1460. }
  1461. if (property == dev_priv->broadcast_rgb_property) {
  1462. if (val == !!intel_sdvo->color_range)
  1463. return 0;
  1464. intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
  1465. goto done;
  1466. }
  1467. #define CHECK_PROPERTY(name, NAME) \
  1468. if (intel_sdvo_connector->name == property) { \
  1469. if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
  1470. if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
  1471. cmd = SDVO_CMD_SET_##NAME; \
  1472. intel_sdvo_connector->cur_##name = temp_value; \
  1473. goto set_value; \
  1474. }
  1475. if (property == intel_sdvo_connector->tv_format) {
  1476. if (val >= TV_FORMAT_NUM)
  1477. return -EINVAL;
  1478. if (intel_sdvo->tv_format_index ==
  1479. intel_sdvo_connector->tv_format_supported[val])
  1480. return 0;
  1481. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
  1482. goto done;
  1483. } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
  1484. temp_value = val;
  1485. if (intel_sdvo_connector->left == property) {
  1486. drm_connector_property_set_value(connector,
  1487. intel_sdvo_connector->right, val);
  1488. if (intel_sdvo_connector->left_margin == temp_value)
  1489. return 0;
  1490. intel_sdvo_connector->left_margin = temp_value;
  1491. intel_sdvo_connector->right_margin = temp_value;
  1492. temp_value = intel_sdvo_connector->max_hscan -
  1493. intel_sdvo_connector->left_margin;
  1494. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1495. goto set_value;
  1496. } else if (intel_sdvo_connector->right == property) {
  1497. drm_connector_property_set_value(connector,
  1498. intel_sdvo_connector->left, val);
  1499. if (intel_sdvo_connector->right_margin == temp_value)
  1500. return 0;
  1501. intel_sdvo_connector->left_margin = temp_value;
  1502. intel_sdvo_connector->right_margin = temp_value;
  1503. temp_value = intel_sdvo_connector->max_hscan -
  1504. intel_sdvo_connector->left_margin;
  1505. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1506. goto set_value;
  1507. } else if (intel_sdvo_connector->top == property) {
  1508. drm_connector_property_set_value(connector,
  1509. intel_sdvo_connector->bottom, val);
  1510. if (intel_sdvo_connector->top_margin == temp_value)
  1511. return 0;
  1512. intel_sdvo_connector->top_margin = temp_value;
  1513. intel_sdvo_connector->bottom_margin = temp_value;
  1514. temp_value = intel_sdvo_connector->max_vscan -
  1515. intel_sdvo_connector->top_margin;
  1516. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1517. goto set_value;
  1518. } else if (intel_sdvo_connector->bottom == property) {
  1519. drm_connector_property_set_value(connector,
  1520. intel_sdvo_connector->top, val);
  1521. if (intel_sdvo_connector->bottom_margin == temp_value)
  1522. return 0;
  1523. intel_sdvo_connector->top_margin = temp_value;
  1524. intel_sdvo_connector->bottom_margin = temp_value;
  1525. temp_value = intel_sdvo_connector->max_vscan -
  1526. intel_sdvo_connector->top_margin;
  1527. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1528. goto set_value;
  1529. }
  1530. CHECK_PROPERTY(hpos, HPOS)
  1531. CHECK_PROPERTY(vpos, VPOS)
  1532. CHECK_PROPERTY(saturation, SATURATION)
  1533. CHECK_PROPERTY(contrast, CONTRAST)
  1534. CHECK_PROPERTY(hue, HUE)
  1535. CHECK_PROPERTY(brightness, BRIGHTNESS)
  1536. CHECK_PROPERTY(sharpness, SHARPNESS)
  1537. CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
  1538. CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
  1539. CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
  1540. CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
  1541. CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
  1542. CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
  1543. }
  1544. return -EINVAL; /* unknown property */
  1545. set_value:
  1546. if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
  1547. return -EIO;
  1548. done:
  1549. if (intel_sdvo->base.base.crtc) {
  1550. struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
  1551. drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
  1552. crtc->y, crtc->fb);
  1553. }
  1554. return 0;
  1555. #undef CHECK_PROPERTY
  1556. }
  1557. static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
  1558. .dpms = intel_sdvo_dpms,
  1559. .mode_fixup = intel_sdvo_mode_fixup,
  1560. .prepare = intel_encoder_prepare,
  1561. .mode_set = intel_sdvo_mode_set,
  1562. .commit = intel_encoder_commit,
  1563. };
  1564. static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
  1565. .dpms = drm_helper_connector_dpms,
  1566. .detect = intel_sdvo_detect,
  1567. .fill_modes = drm_helper_probe_single_connector_modes,
  1568. .set_property = intel_sdvo_set_property,
  1569. .destroy = intel_sdvo_destroy,
  1570. };
  1571. static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
  1572. .get_modes = intel_sdvo_get_modes,
  1573. .mode_valid = intel_sdvo_mode_valid,
  1574. .best_encoder = intel_best_encoder,
  1575. };
  1576. static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
  1577. {
  1578. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1579. if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
  1580. drm_mode_destroy(encoder->dev,
  1581. intel_sdvo->sdvo_lvds_fixed_mode);
  1582. i2c_del_adapter(&intel_sdvo->ddc);
  1583. intel_encoder_destroy(encoder);
  1584. }
  1585. static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
  1586. .destroy = intel_sdvo_enc_destroy,
  1587. };
  1588. static void
  1589. intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
  1590. {
  1591. uint16_t mask = 0;
  1592. unsigned int num_bits;
  1593. /* Make a mask of outputs less than or equal to our own priority in the
  1594. * list.
  1595. */
  1596. switch (sdvo->controlled_output) {
  1597. case SDVO_OUTPUT_LVDS1:
  1598. mask |= SDVO_OUTPUT_LVDS1;
  1599. case SDVO_OUTPUT_LVDS0:
  1600. mask |= SDVO_OUTPUT_LVDS0;
  1601. case SDVO_OUTPUT_TMDS1:
  1602. mask |= SDVO_OUTPUT_TMDS1;
  1603. case SDVO_OUTPUT_TMDS0:
  1604. mask |= SDVO_OUTPUT_TMDS0;
  1605. case SDVO_OUTPUT_RGB1:
  1606. mask |= SDVO_OUTPUT_RGB1;
  1607. case SDVO_OUTPUT_RGB0:
  1608. mask |= SDVO_OUTPUT_RGB0;
  1609. break;
  1610. }
  1611. /* Count bits to find what number we are in the priority list. */
  1612. mask &= sdvo->caps.output_flags;
  1613. num_bits = hweight16(mask);
  1614. /* If more than 3 outputs, default to DDC bus 3 for now. */
  1615. if (num_bits > 3)
  1616. num_bits = 3;
  1617. /* Corresponds to SDVO_CONTROL_BUS_DDCx */
  1618. sdvo->ddc_bus = 1 << num_bits;
  1619. }
  1620. /**
  1621. * Choose the appropriate DDC bus for control bus switch command for this
  1622. * SDVO output based on the controlled output.
  1623. *
  1624. * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
  1625. * outputs, then LVDS outputs.
  1626. */
  1627. static void
  1628. intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
  1629. struct intel_sdvo *sdvo, u32 reg)
  1630. {
  1631. struct sdvo_device_mapping *mapping;
  1632. if (sdvo->is_sdvob)
  1633. mapping = &(dev_priv->sdvo_mappings[0]);
  1634. else
  1635. mapping = &(dev_priv->sdvo_mappings[1]);
  1636. if (mapping->initialized)
  1637. sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
  1638. else
  1639. intel_sdvo_guess_ddc_bus(sdvo);
  1640. }
  1641. static void
  1642. intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
  1643. struct intel_sdvo *sdvo, u32 reg)
  1644. {
  1645. struct sdvo_device_mapping *mapping;
  1646. u8 pin;
  1647. if (sdvo->is_sdvob)
  1648. mapping = &dev_priv->sdvo_mappings[0];
  1649. else
  1650. mapping = &dev_priv->sdvo_mappings[1];
  1651. pin = GMBUS_PORT_DPB;
  1652. if (mapping->initialized)
  1653. pin = mapping->i2c_pin;
  1654. if (intel_gmbus_is_port_valid(pin)) {
  1655. sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
  1656. intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
  1657. intel_gmbus_force_bit(sdvo->i2c, true);
  1658. } else {
  1659. sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
  1660. }
  1661. }
  1662. static bool
  1663. intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
  1664. {
  1665. return intel_sdvo_check_supp_encode(intel_sdvo);
  1666. }
  1667. static u8
  1668. intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
  1669. {
  1670. struct drm_i915_private *dev_priv = dev->dev_private;
  1671. struct sdvo_device_mapping *my_mapping, *other_mapping;
  1672. if (sdvo->is_sdvob) {
  1673. my_mapping = &dev_priv->sdvo_mappings[0];
  1674. other_mapping = &dev_priv->sdvo_mappings[1];
  1675. } else {
  1676. my_mapping = &dev_priv->sdvo_mappings[1];
  1677. other_mapping = &dev_priv->sdvo_mappings[0];
  1678. }
  1679. /* If the BIOS described our SDVO device, take advantage of it. */
  1680. if (my_mapping->slave_addr)
  1681. return my_mapping->slave_addr;
  1682. /* If the BIOS only described a different SDVO device, use the
  1683. * address that it isn't using.
  1684. */
  1685. if (other_mapping->slave_addr) {
  1686. if (other_mapping->slave_addr == 0x70)
  1687. return 0x72;
  1688. else
  1689. return 0x70;
  1690. }
  1691. /* No SDVO device info is found for another DVO port,
  1692. * so use mapping assumption we had before BIOS parsing.
  1693. */
  1694. if (sdvo->is_sdvob)
  1695. return 0x70;
  1696. else
  1697. return 0x72;
  1698. }
  1699. static void
  1700. intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
  1701. struct intel_sdvo *encoder)
  1702. {
  1703. drm_connector_init(encoder->base.base.dev,
  1704. &connector->base.base,
  1705. &intel_sdvo_connector_funcs,
  1706. connector->base.base.connector_type);
  1707. drm_connector_helper_add(&connector->base.base,
  1708. &intel_sdvo_connector_helper_funcs);
  1709. connector->base.base.interlace_allowed = 1;
  1710. connector->base.base.doublescan_allowed = 0;
  1711. connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
  1712. intel_connector_attach_encoder(&connector->base, &encoder->base);
  1713. drm_sysfs_connector_add(&connector->base.base);
  1714. }
  1715. static void
  1716. intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
  1717. {
  1718. struct drm_device *dev = connector->base.base.dev;
  1719. intel_attach_force_audio_property(&connector->base.base);
  1720. if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
  1721. intel_attach_broadcast_rgb_property(&connector->base.base);
  1722. }
  1723. static bool
  1724. intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
  1725. {
  1726. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1727. struct drm_connector *connector;
  1728. struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
  1729. struct intel_connector *intel_connector;
  1730. struct intel_sdvo_connector *intel_sdvo_connector;
  1731. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1732. if (!intel_sdvo_connector)
  1733. return false;
  1734. if (device == 0) {
  1735. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
  1736. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
  1737. } else if (device == 1) {
  1738. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
  1739. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
  1740. }
  1741. intel_connector = &intel_sdvo_connector->base;
  1742. connector = &intel_connector->base;
  1743. if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
  1744. connector->polled = DRM_CONNECTOR_POLL_HPD;
  1745. intel_sdvo->hotplug_active[0] |= 1 << device;
  1746. /* Some SDVO devices have one-shot hotplug interrupts.
  1747. * Ensure that they get re-enabled when an interrupt happens.
  1748. */
  1749. intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
  1750. intel_sdvo_enable_hotplug(intel_encoder);
  1751. }
  1752. else
  1753. connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
  1754. encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
  1755. connector->connector_type = DRM_MODE_CONNECTOR_DVID;
  1756. if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
  1757. connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
  1758. intel_sdvo->is_hdmi = true;
  1759. }
  1760. intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
  1761. (1 << INTEL_ANALOG_CLONE_BIT));
  1762. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1763. if (intel_sdvo->is_hdmi)
  1764. intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
  1765. return true;
  1766. }
  1767. static bool
  1768. intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
  1769. {
  1770. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1771. struct drm_connector *connector;
  1772. struct intel_connector *intel_connector;
  1773. struct intel_sdvo_connector *intel_sdvo_connector;
  1774. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1775. if (!intel_sdvo_connector)
  1776. return false;
  1777. intel_connector = &intel_sdvo_connector->base;
  1778. connector = &intel_connector->base;
  1779. encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
  1780. connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
  1781. intel_sdvo->controlled_output |= type;
  1782. intel_sdvo_connector->output_flag = type;
  1783. intel_sdvo->is_tv = true;
  1784. intel_sdvo->base.needs_tv_clock = true;
  1785. intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
  1786. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1787. if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
  1788. goto err;
  1789. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1790. goto err;
  1791. return true;
  1792. err:
  1793. intel_sdvo_destroy(connector);
  1794. return false;
  1795. }
  1796. static bool
  1797. intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
  1798. {
  1799. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1800. struct drm_connector *connector;
  1801. struct intel_connector *intel_connector;
  1802. struct intel_sdvo_connector *intel_sdvo_connector;
  1803. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1804. if (!intel_sdvo_connector)
  1805. return false;
  1806. intel_connector = &intel_sdvo_connector->base;
  1807. connector = &intel_connector->base;
  1808. connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  1809. encoder->encoder_type = DRM_MODE_ENCODER_DAC;
  1810. connector->connector_type = DRM_MODE_CONNECTOR_VGA;
  1811. if (device == 0) {
  1812. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
  1813. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
  1814. } else if (device == 1) {
  1815. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
  1816. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
  1817. }
  1818. intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
  1819. (1 << INTEL_ANALOG_CLONE_BIT));
  1820. intel_sdvo_connector_init(intel_sdvo_connector,
  1821. intel_sdvo);
  1822. return true;
  1823. }
  1824. static bool
  1825. intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
  1826. {
  1827. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1828. struct drm_connector *connector;
  1829. struct intel_connector *intel_connector;
  1830. struct intel_sdvo_connector *intel_sdvo_connector;
  1831. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1832. if (!intel_sdvo_connector)
  1833. return false;
  1834. intel_connector = &intel_sdvo_connector->base;
  1835. connector = &intel_connector->base;
  1836. encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
  1837. connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
  1838. if (device == 0) {
  1839. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
  1840. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
  1841. } else if (device == 1) {
  1842. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
  1843. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
  1844. }
  1845. intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
  1846. (1 << INTEL_SDVO_LVDS_CLONE_BIT));
  1847. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1848. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1849. goto err;
  1850. return true;
  1851. err:
  1852. intel_sdvo_destroy(connector);
  1853. return false;
  1854. }
  1855. static bool
  1856. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
  1857. {
  1858. intel_sdvo->is_tv = false;
  1859. intel_sdvo->base.needs_tv_clock = false;
  1860. intel_sdvo->is_lvds = false;
  1861. /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
  1862. if (flags & SDVO_OUTPUT_TMDS0)
  1863. if (!intel_sdvo_dvi_init(intel_sdvo, 0))
  1864. return false;
  1865. if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
  1866. if (!intel_sdvo_dvi_init(intel_sdvo, 1))
  1867. return false;
  1868. /* TV has no XXX1 function block */
  1869. if (flags & SDVO_OUTPUT_SVID0)
  1870. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
  1871. return false;
  1872. if (flags & SDVO_OUTPUT_CVBS0)
  1873. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
  1874. return false;
  1875. if (flags & SDVO_OUTPUT_YPRPB0)
  1876. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
  1877. return false;
  1878. if (flags & SDVO_OUTPUT_RGB0)
  1879. if (!intel_sdvo_analog_init(intel_sdvo, 0))
  1880. return false;
  1881. if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
  1882. if (!intel_sdvo_analog_init(intel_sdvo, 1))
  1883. return false;
  1884. if (flags & SDVO_OUTPUT_LVDS0)
  1885. if (!intel_sdvo_lvds_init(intel_sdvo, 0))
  1886. return false;
  1887. if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
  1888. if (!intel_sdvo_lvds_init(intel_sdvo, 1))
  1889. return false;
  1890. if ((flags & SDVO_OUTPUT_MASK) == 0) {
  1891. unsigned char bytes[2];
  1892. intel_sdvo->controlled_output = 0;
  1893. memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
  1894. DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
  1895. SDVO_NAME(intel_sdvo),
  1896. bytes[0], bytes[1]);
  1897. return false;
  1898. }
  1899. intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  1900. return true;
  1901. }
  1902. static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  1903. struct intel_sdvo_connector *intel_sdvo_connector,
  1904. int type)
  1905. {
  1906. struct drm_device *dev = intel_sdvo->base.base.dev;
  1907. struct intel_sdvo_tv_format format;
  1908. uint32_t format_map, i;
  1909. if (!intel_sdvo_set_target_output(intel_sdvo, type))
  1910. return false;
  1911. BUILD_BUG_ON(sizeof(format) != 6);
  1912. if (!intel_sdvo_get_value(intel_sdvo,
  1913. SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
  1914. &format, sizeof(format)))
  1915. return false;
  1916. memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
  1917. if (format_map == 0)
  1918. return false;
  1919. intel_sdvo_connector->format_supported_num = 0;
  1920. for (i = 0 ; i < TV_FORMAT_NUM; i++)
  1921. if (format_map & (1 << i))
  1922. intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
  1923. intel_sdvo_connector->tv_format =
  1924. drm_property_create(dev, DRM_MODE_PROP_ENUM,
  1925. "mode", intel_sdvo_connector->format_supported_num);
  1926. if (!intel_sdvo_connector->tv_format)
  1927. return false;
  1928. for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
  1929. drm_property_add_enum(
  1930. intel_sdvo_connector->tv_format, i,
  1931. i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
  1932. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
  1933. drm_connector_attach_property(&intel_sdvo_connector->base.base,
  1934. intel_sdvo_connector->tv_format, 0);
  1935. return true;
  1936. }
  1937. #define ENHANCEMENT(name, NAME) do { \
  1938. if (enhancements.name) { \
  1939. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
  1940. !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
  1941. return false; \
  1942. intel_sdvo_connector->max_##name = data_value[0]; \
  1943. intel_sdvo_connector->cur_##name = response; \
  1944. intel_sdvo_connector->name = \
  1945. drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
  1946. if (!intel_sdvo_connector->name) return false; \
  1947. drm_connector_attach_property(connector, \
  1948. intel_sdvo_connector->name, \
  1949. intel_sdvo_connector->cur_##name); \
  1950. DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
  1951. data_value[0], data_value[1], response); \
  1952. } \
  1953. } while (0)
  1954. static bool
  1955. intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
  1956. struct intel_sdvo_connector *intel_sdvo_connector,
  1957. struct intel_sdvo_enhancements_reply enhancements)
  1958. {
  1959. struct drm_device *dev = intel_sdvo->base.base.dev;
  1960. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  1961. uint16_t response, data_value[2];
  1962. /* when horizontal overscan is supported, Add the left/right property */
  1963. if (enhancements.overscan_h) {
  1964. if (!intel_sdvo_get_value(intel_sdvo,
  1965. SDVO_CMD_GET_MAX_OVERSCAN_H,
  1966. &data_value, 4))
  1967. return false;
  1968. if (!intel_sdvo_get_value(intel_sdvo,
  1969. SDVO_CMD_GET_OVERSCAN_H,
  1970. &response, 2))
  1971. return false;
  1972. intel_sdvo_connector->max_hscan = data_value[0];
  1973. intel_sdvo_connector->left_margin = data_value[0] - response;
  1974. intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
  1975. intel_sdvo_connector->left =
  1976. drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
  1977. if (!intel_sdvo_connector->left)
  1978. return false;
  1979. drm_connector_attach_property(connector,
  1980. intel_sdvo_connector->left,
  1981. intel_sdvo_connector->left_margin);
  1982. intel_sdvo_connector->right =
  1983. drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
  1984. if (!intel_sdvo_connector->right)
  1985. return false;
  1986. drm_connector_attach_property(connector,
  1987. intel_sdvo_connector->right,
  1988. intel_sdvo_connector->right_margin);
  1989. DRM_DEBUG_KMS("h_overscan: max %d, "
  1990. "default %d, current %d\n",
  1991. data_value[0], data_value[1], response);
  1992. }
  1993. if (enhancements.overscan_v) {
  1994. if (!intel_sdvo_get_value(intel_sdvo,
  1995. SDVO_CMD_GET_MAX_OVERSCAN_V,
  1996. &data_value, 4))
  1997. return false;
  1998. if (!intel_sdvo_get_value(intel_sdvo,
  1999. SDVO_CMD_GET_OVERSCAN_V,
  2000. &response, 2))
  2001. return false;
  2002. intel_sdvo_connector->max_vscan = data_value[0];
  2003. intel_sdvo_connector->top_margin = data_value[0] - response;
  2004. intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
  2005. intel_sdvo_connector->top =
  2006. drm_property_create_range(dev, 0,
  2007. "top_margin", 0, data_value[0]);
  2008. if (!intel_sdvo_connector->top)
  2009. return false;
  2010. drm_connector_attach_property(connector,
  2011. intel_sdvo_connector->top,
  2012. intel_sdvo_connector->top_margin);
  2013. intel_sdvo_connector->bottom =
  2014. drm_property_create_range(dev, 0,
  2015. "bottom_margin", 0, data_value[0]);
  2016. if (!intel_sdvo_connector->bottom)
  2017. return false;
  2018. drm_connector_attach_property(connector,
  2019. intel_sdvo_connector->bottom,
  2020. intel_sdvo_connector->bottom_margin);
  2021. DRM_DEBUG_KMS("v_overscan: max %d, "
  2022. "default %d, current %d\n",
  2023. data_value[0], data_value[1], response);
  2024. }
  2025. ENHANCEMENT(hpos, HPOS);
  2026. ENHANCEMENT(vpos, VPOS);
  2027. ENHANCEMENT(saturation, SATURATION);
  2028. ENHANCEMENT(contrast, CONTRAST);
  2029. ENHANCEMENT(hue, HUE);
  2030. ENHANCEMENT(sharpness, SHARPNESS);
  2031. ENHANCEMENT(brightness, BRIGHTNESS);
  2032. ENHANCEMENT(flicker_filter, FLICKER_FILTER);
  2033. ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
  2034. ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
  2035. ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
  2036. ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
  2037. if (enhancements.dot_crawl) {
  2038. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
  2039. return false;
  2040. intel_sdvo_connector->max_dot_crawl = 1;
  2041. intel_sdvo_connector->cur_dot_crawl = response & 0x1;
  2042. intel_sdvo_connector->dot_crawl =
  2043. drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
  2044. if (!intel_sdvo_connector->dot_crawl)
  2045. return false;
  2046. drm_connector_attach_property(connector,
  2047. intel_sdvo_connector->dot_crawl,
  2048. intel_sdvo_connector->cur_dot_crawl);
  2049. DRM_DEBUG_KMS("dot crawl: current %d\n", response);
  2050. }
  2051. return true;
  2052. }
  2053. static bool
  2054. intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
  2055. struct intel_sdvo_connector *intel_sdvo_connector,
  2056. struct intel_sdvo_enhancements_reply enhancements)
  2057. {
  2058. struct drm_device *dev = intel_sdvo->base.base.dev;
  2059. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2060. uint16_t response, data_value[2];
  2061. ENHANCEMENT(brightness, BRIGHTNESS);
  2062. return true;
  2063. }
  2064. #undef ENHANCEMENT
  2065. static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  2066. struct intel_sdvo_connector *intel_sdvo_connector)
  2067. {
  2068. union {
  2069. struct intel_sdvo_enhancements_reply reply;
  2070. uint16_t response;
  2071. } enhancements;
  2072. BUILD_BUG_ON(sizeof(enhancements) != 2);
  2073. enhancements.response = 0;
  2074. intel_sdvo_get_value(intel_sdvo,
  2075. SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
  2076. &enhancements, sizeof(enhancements));
  2077. if (enhancements.response == 0) {
  2078. DRM_DEBUG_KMS("No enhancement is supported\n");
  2079. return true;
  2080. }
  2081. if (IS_TV(intel_sdvo_connector))
  2082. return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2083. else if (IS_LVDS(intel_sdvo_connector))
  2084. return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2085. else
  2086. return true;
  2087. }
  2088. static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
  2089. struct i2c_msg *msgs,
  2090. int num)
  2091. {
  2092. struct intel_sdvo *sdvo = adapter->algo_data;
  2093. if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
  2094. return -EIO;
  2095. return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
  2096. }
  2097. static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
  2098. {
  2099. struct intel_sdvo *sdvo = adapter->algo_data;
  2100. return sdvo->i2c->algo->functionality(sdvo->i2c);
  2101. }
  2102. static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
  2103. .master_xfer = intel_sdvo_ddc_proxy_xfer,
  2104. .functionality = intel_sdvo_ddc_proxy_func
  2105. };
  2106. static bool
  2107. intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
  2108. struct drm_device *dev)
  2109. {
  2110. sdvo->ddc.owner = THIS_MODULE;
  2111. sdvo->ddc.class = I2C_CLASS_DDC;
  2112. snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
  2113. sdvo->ddc.dev.parent = &dev->pdev->dev;
  2114. sdvo->ddc.algo_data = sdvo;
  2115. sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
  2116. return i2c_add_adapter(&sdvo->ddc) == 0;
  2117. }
  2118. bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
  2119. {
  2120. struct drm_i915_private *dev_priv = dev->dev_private;
  2121. struct intel_encoder *intel_encoder;
  2122. struct intel_sdvo *intel_sdvo;
  2123. int i;
  2124. intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
  2125. if (!intel_sdvo)
  2126. return false;
  2127. intel_sdvo->sdvo_reg = sdvo_reg;
  2128. intel_sdvo->is_sdvob = is_sdvob;
  2129. intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
  2130. intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
  2131. if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
  2132. kfree(intel_sdvo);
  2133. return false;
  2134. }
  2135. /* encoder type will be decided later */
  2136. intel_encoder = &intel_sdvo->base;
  2137. intel_encoder->type = INTEL_OUTPUT_SDVO;
  2138. drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
  2139. /* Read the regs to test if we can talk to the device */
  2140. for (i = 0; i < 0x40; i++) {
  2141. u8 byte;
  2142. if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
  2143. DRM_DEBUG_KMS("No SDVO device found on %s\n",
  2144. SDVO_NAME(intel_sdvo));
  2145. goto err;
  2146. }
  2147. }
  2148. if (intel_sdvo->is_sdvob)
  2149. dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
  2150. else
  2151. dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
  2152. drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
  2153. /* In default case sdvo lvds is false */
  2154. if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
  2155. goto err;
  2156. /* Set up hotplug command - note paranoia about contents of reply.
  2157. * We assume that the hardware is in a sane state, and only touch
  2158. * the bits we think we understand.
  2159. */
  2160. intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
  2161. &intel_sdvo->hotplug_active, 2);
  2162. intel_sdvo->hotplug_active[0] &= ~0x3;
  2163. if (intel_sdvo_output_setup(intel_sdvo,
  2164. intel_sdvo->caps.output_flags) != true) {
  2165. DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
  2166. SDVO_NAME(intel_sdvo));
  2167. goto err;
  2168. }
  2169. intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
  2170. /* Set the input timing to the screen. Assume always input 0. */
  2171. if (!intel_sdvo_set_target_input(intel_sdvo))
  2172. goto err;
  2173. if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
  2174. &intel_sdvo->pixel_clock_min,
  2175. &intel_sdvo->pixel_clock_max))
  2176. goto err;
  2177. DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
  2178. "clock range %dMHz - %dMHz, "
  2179. "input 1: %c, input 2: %c, "
  2180. "output 1: %c, output 2: %c\n",
  2181. SDVO_NAME(intel_sdvo),
  2182. intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
  2183. intel_sdvo->caps.device_rev_id,
  2184. intel_sdvo->pixel_clock_min / 1000,
  2185. intel_sdvo->pixel_clock_max / 1000,
  2186. (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
  2187. (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
  2188. /* check currently supported outputs */
  2189. intel_sdvo->caps.output_flags &
  2190. (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
  2191. intel_sdvo->caps.output_flags &
  2192. (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
  2193. return true;
  2194. err:
  2195. drm_encoder_cleanup(&intel_encoder->base);
  2196. i2c_del_adapter(&intel_sdvo->ddc);
  2197. kfree(intel_sdvo);
  2198. return false;
  2199. }