i2c-algo-pca.c 14 KB

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  1. /*
  2. * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
  3. * Copyright (C) 2004 Arcom Control Systems
  4. * Copyright (C) 2008 Pengutronix
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/delay.h>
  24. #include <linux/init.h>
  25. #include <linux/errno.h>
  26. #include <linux/i2c.h>
  27. #include <linux/i2c-algo-pca.h>
  28. #define DEB1(fmt, args...) do { if (i2c_debug >= 1) \
  29. printk(KERN_DEBUG fmt, ## args); } while (0)
  30. #define DEB2(fmt, args...) do { if (i2c_debug >= 2) \
  31. printk(KERN_DEBUG fmt, ## args); } while (0)
  32. #define DEB3(fmt, args...) do { if (i2c_debug >= 3) \
  33. printk(KERN_DEBUG fmt, ## args); } while (0)
  34. static int i2c_debug;
  35. #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
  36. #define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
  37. #define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
  38. #define pca_clock(adap) adap->i2c_clock
  39. #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
  40. #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
  41. #define pca_wait(adap) adap->wait_for_completion(adap->data)
  42. #define pca_reset(adap) adap->reset_chip(adap->data)
  43. static void pca9665_reset(void *pd)
  44. {
  45. struct i2c_algo_pca_data *adap = pd;
  46. pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
  47. pca_outw(adap, I2C_PCA_IND, 0xA5);
  48. pca_outw(adap, I2C_PCA_IND, 0x5A);
  49. }
  50. /*
  51. * Generate a start condition on the i2c bus.
  52. *
  53. * returns after the start condition has occurred
  54. */
  55. static void pca_start(struct i2c_algo_pca_data *adap)
  56. {
  57. int sta = pca_get_con(adap);
  58. DEB2("=== START\n");
  59. sta |= I2C_PCA_CON_STA;
  60. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
  61. pca_set_con(adap, sta);
  62. pca_wait(adap);
  63. }
  64. /*
  65. * Generate a repeated start condition on the i2c bus
  66. *
  67. * return after the repeated start condition has occurred
  68. */
  69. static void pca_repeated_start(struct i2c_algo_pca_data *adap)
  70. {
  71. int sta = pca_get_con(adap);
  72. DEB2("=== REPEATED START\n");
  73. sta |= I2C_PCA_CON_STA;
  74. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
  75. pca_set_con(adap, sta);
  76. pca_wait(adap);
  77. }
  78. /*
  79. * Generate a stop condition on the i2c bus
  80. *
  81. * returns after the stop condition has been generated
  82. *
  83. * STOPs do not generate an interrupt or set the SI flag, since the
  84. * part returns the idle state (0xf8). Hence we don't need to
  85. * pca_wait here.
  86. */
  87. static void pca_stop(struct i2c_algo_pca_data *adap)
  88. {
  89. int sta = pca_get_con(adap);
  90. DEB2("=== STOP\n");
  91. sta |= I2C_PCA_CON_STO;
  92. sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  93. pca_set_con(adap, sta);
  94. }
  95. /*
  96. * Send the slave address and R/W bit
  97. *
  98. * returns after the address has been sent
  99. */
  100. static void pca_address(struct i2c_algo_pca_data *adap,
  101. struct i2c_msg *msg)
  102. {
  103. int sta = pca_get_con(adap);
  104. int addr;
  105. addr = ( (0x7f & msg->addr) << 1 );
  106. if (msg->flags & I2C_M_RD )
  107. addr |= 1;
  108. DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
  109. msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
  110. pca_outw(adap, I2C_PCA_DAT, addr);
  111. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  112. pca_set_con(adap, sta);
  113. pca_wait(adap);
  114. }
  115. /*
  116. * Transmit a byte.
  117. *
  118. * Returns after the byte has been transmitted
  119. */
  120. static void pca_tx_byte(struct i2c_algo_pca_data *adap,
  121. __u8 b)
  122. {
  123. int sta = pca_get_con(adap);
  124. DEB2("=== WRITE %#04x\n", b);
  125. pca_outw(adap, I2C_PCA_DAT, b);
  126. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  127. pca_set_con(adap, sta);
  128. pca_wait(adap);
  129. }
  130. /*
  131. * Receive a byte
  132. *
  133. * returns immediately.
  134. */
  135. static void pca_rx_byte(struct i2c_algo_pca_data *adap,
  136. __u8 *b, int ack)
  137. {
  138. *b = pca_inw(adap, I2C_PCA_DAT);
  139. DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
  140. }
  141. /*
  142. * Setup ACK or NACK for next received byte and wait for it to arrive.
  143. *
  144. * Returns after next byte has arrived.
  145. */
  146. static void pca_rx_ack(struct i2c_algo_pca_data *adap,
  147. int ack)
  148. {
  149. int sta = pca_get_con(adap);
  150. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
  151. if ( ack )
  152. sta |= I2C_PCA_CON_AA;
  153. pca_set_con(adap, sta);
  154. pca_wait(adap);
  155. }
  156. static int pca_xfer(struct i2c_adapter *i2c_adap,
  157. struct i2c_msg *msgs,
  158. int num)
  159. {
  160. struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
  161. struct i2c_msg *msg = NULL;
  162. int curmsg;
  163. int numbytes = 0;
  164. int state;
  165. int ret;
  166. int timeout = i2c_adap->timeout;
  167. while ((state = pca_status(adap)) != 0xf8 && timeout--) {
  168. msleep(10);
  169. }
  170. if (state != 0xf8) {
  171. dev_dbg(&i2c_adap->dev, "bus is not idle. status is %#04x\n", state);
  172. return -EAGAIN;
  173. }
  174. DEB1("{{{ XFER %d messages\n", num);
  175. if (i2c_debug>=2) {
  176. for (curmsg = 0; curmsg < num; curmsg++) {
  177. int addr, i;
  178. msg = &msgs[curmsg];
  179. addr = (0x7f & msg->addr) ;
  180. if (msg->flags & I2C_M_RD )
  181. printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
  182. curmsg, msg->len, addr, (addr<<1) | 1);
  183. else {
  184. printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
  185. curmsg, msg->len, addr, addr<<1,
  186. msg->len == 0 ? "" : ", ");
  187. for(i=0; i < msg->len; i++)
  188. printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
  189. printk("]\n");
  190. }
  191. }
  192. }
  193. curmsg = 0;
  194. ret = -EREMOTEIO;
  195. while (curmsg < num) {
  196. state = pca_status(adap);
  197. DEB3("STATE is 0x%02x\n", state);
  198. msg = &msgs[curmsg];
  199. switch (state) {
  200. case 0xf8: /* On reset or stop the bus is idle */
  201. pca_start(adap);
  202. break;
  203. case 0x08: /* A START condition has been transmitted */
  204. case 0x10: /* A repeated start condition has been transmitted */
  205. pca_address(adap, msg);
  206. break;
  207. case 0x18: /* SLA+W has been transmitted; ACK has been received */
  208. case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
  209. if (numbytes < msg->len) {
  210. pca_tx_byte(adap, msg->buf[numbytes]);
  211. numbytes++;
  212. break;
  213. }
  214. curmsg++; numbytes = 0;
  215. if (curmsg == num)
  216. pca_stop(adap);
  217. else
  218. pca_repeated_start(adap);
  219. break;
  220. case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
  221. DEB2("NOT ACK received after SLA+W\n");
  222. pca_stop(adap);
  223. goto out;
  224. case 0x40: /* SLA+R has been transmitted; ACK has been received */
  225. pca_rx_ack(adap, msg->len > 1);
  226. break;
  227. case 0x50: /* Data bytes has been received; ACK has been returned */
  228. if (numbytes < msg->len) {
  229. pca_rx_byte(adap, &msg->buf[numbytes], 1);
  230. numbytes++;
  231. pca_rx_ack(adap, numbytes < msg->len - 1);
  232. break;
  233. }
  234. curmsg++; numbytes = 0;
  235. if (curmsg == num)
  236. pca_stop(adap);
  237. else
  238. pca_repeated_start(adap);
  239. break;
  240. case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
  241. DEB2("NOT ACK received after SLA+R\n");
  242. pca_stop(adap);
  243. goto out;
  244. case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
  245. DEB2("NOT ACK received after data byte\n");
  246. goto out;
  247. case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
  248. DEB2("Arbitration lost\n");
  249. goto out;
  250. case 0x58: /* Data byte has been received; NOT ACK has been returned */
  251. if ( numbytes == msg->len - 1 ) {
  252. pca_rx_byte(adap, &msg->buf[numbytes], 0);
  253. curmsg++; numbytes = 0;
  254. if (curmsg == num)
  255. pca_stop(adap);
  256. else
  257. pca_repeated_start(adap);
  258. } else {
  259. DEB2("NOT ACK sent after data byte received. "
  260. "Not final byte. numbytes %d. len %d\n",
  261. numbytes, msg->len);
  262. pca_stop(adap);
  263. goto out;
  264. }
  265. break;
  266. case 0x70: /* Bus error - SDA stuck low */
  267. DEB2("BUS ERROR - SDA Stuck low\n");
  268. pca_reset(adap);
  269. goto out;
  270. case 0x90: /* Bus error - SCL stuck low */
  271. DEB2("BUS ERROR - SCL Stuck low\n");
  272. pca_reset(adap);
  273. goto out;
  274. case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
  275. DEB2("BUS ERROR - Illegal START or STOP\n");
  276. pca_reset(adap);
  277. goto out;
  278. default:
  279. dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
  280. break;
  281. }
  282. }
  283. ret = curmsg;
  284. out:
  285. DEB1("}}} transfered %d/%d messages. "
  286. "status is %#04x. control is %#04x\n",
  287. curmsg, num, pca_status(adap),
  288. pca_get_con(adap));
  289. return ret;
  290. }
  291. static u32 pca_func(struct i2c_adapter *adap)
  292. {
  293. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
  294. }
  295. static const struct i2c_algorithm pca_algo = {
  296. .master_xfer = pca_xfer,
  297. .functionality = pca_func,
  298. };
  299. static unsigned int pca_probe_chip(struct i2c_adapter *adap)
  300. {
  301. struct i2c_algo_pca_data *pca_data = adap->algo_data;
  302. /* The trick here is to check if there is an indirect register
  303. * available. If there is one, we will read the value we first
  304. * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
  305. * we wrote on I2C_PCA_ADR
  306. */
  307. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
  308. pca_outw(pca_data, I2C_PCA_IND, 0xAA);
  309. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
  310. pca_outw(pca_data, I2C_PCA_IND, 0x00);
  311. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
  312. if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
  313. printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
  314. return I2C_PCA_CHIP_9665;
  315. } else {
  316. printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
  317. return I2C_PCA_CHIP_9564;
  318. }
  319. }
  320. static int pca_init(struct i2c_adapter *adap)
  321. {
  322. struct i2c_algo_pca_data *pca_data = adap->algo_data;
  323. adap->algo = &pca_algo;
  324. if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
  325. static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
  326. int clock;
  327. if (pca_data->i2c_clock > 7) {
  328. switch (pca_data->i2c_clock) {
  329. case 330000:
  330. pca_data->i2c_clock = I2C_PCA_CON_330kHz;
  331. break;
  332. case 288000:
  333. pca_data->i2c_clock = I2C_PCA_CON_288kHz;
  334. break;
  335. case 217000:
  336. pca_data->i2c_clock = I2C_PCA_CON_217kHz;
  337. break;
  338. case 146000:
  339. pca_data->i2c_clock = I2C_PCA_CON_146kHz;
  340. break;
  341. case 88000:
  342. pca_data->i2c_clock = I2C_PCA_CON_88kHz;
  343. break;
  344. case 59000:
  345. pca_data->i2c_clock = I2C_PCA_CON_59kHz;
  346. break;
  347. case 44000:
  348. pca_data->i2c_clock = I2C_PCA_CON_44kHz;
  349. break;
  350. case 36000:
  351. pca_data->i2c_clock = I2C_PCA_CON_36kHz;
  352. break;
  353. default:
  354. printk(KERN_WARNING
  355. "%s: Invalid I2C clock speed selected."
  356. " Using default 59kHz.\n", adap->name);
  357. pca_data->i2c_clock = I2C_PCA_CON_59kHz;
  358. }
  359. } else {
  360. printk(KERN_WARNING "%s: "
  361. "Choosing the clock frequency based on "
  362. "index is deprecated."
  363. " Use the nominal frequency.\n", adap->name);
  364. }
  365. pca_reset(pca_data);
  366. clock = pca_clock(pca_data);
  367. printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
  368. adap->name, freqs[clock]);
  369. pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock);
  370. } else {
  371. int clock;
  372. int mode;
  373. int tlow, thi;
  374. /* Values can be found on PCA9665 datasheet section 7.3.2.6 */
  375. int min_tlow, min_thi;
  376. /* These values are the maximum raise and fall values allowed
  377. * by the I2C operation mode (Standard, Fast or Fast+)
  378. * They are used (added) below to calculate the clock dividers
  379. * of PCA9665. Note that they are slightly different of the
  380. * real maximum, to allow the change on mode exactly on the
  381. * maximum clock rate for each mode
  382. */
  383. int raise_fall_time;
  384. struct i2c_algo_pca_data *pca_data = adap->algo_data;
  385. /* Ignore the reset function from the module,
  386. * we can use the parallel bus reset
  387. */
  388. pca_data->reset_chip = pca9665_reset;
  389. if (pca_data->i2c_clock > 1265800) {
  390. printk(KERN_WARNING "%s: I2C clock speed too high."
  391. " Using 1265.8kHz.\n", adap->name);
  392. pca_data->i2c_clock = 1265800;
  393. }
  394. if (pca_data->i2c_clock < 60300) {
  395. printk(KERN_WARNING "%s: I2C clock speed too low."
  396. " Using 60.3kHz.\n", adap->name);
  397. pca_data->i2c_clock = 60300;
  398. }
  399. /* To avoid integer overflow, use clock/100 for calculations */
  400. clock = pca_clock(pca_data) / 100;
  401. if (pca_data->i2c_clock > 10000) {
  402. mode = I2C_PCA_MODE_TURBO;
  403. min_tlow = 14;
  404. min_thi = 5;
  405. raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
  406. } else if (pca_data->i2c_clock > 4000) {
  407. mode = I2C_PCA_MODE_FASTP;
  408. min_tlow = 17;
  409. min_thi = 9;
  410. raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
  411. } else if (pca_data->i2c_clock > 1000) {
  412. mode = I2C_PCA_MODE_FAST;
  413. min_tlow = 44;
  414. min_thi = 20;
  415. raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
  416. } else {
  417. mode = I2C_PCA_MODE_STD;
  418. min_tlow = 157;
  419. min_thi = 134;
  420. raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
  421. }
  422. /* The minimum clock that respects the thi/tlow = 134/157 is
  423. * 64800 Hz. Below that, we have to fix the tlow to 255 and
  424. * calculate the thi factor.
  425. */
  426. if (clock < 648) {
  427. tlow = 255;
  428. thi = 1000000 - clock * raise_fall_time;
  429. thi /= (I2C_PCA_OSC_PER * clock) - tlow;
  430. } else {
  431. tlow = (1000000 - clock * raise_fall_time) * min_tlow;
  432. tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
  433. thi = tlow * min_thi / min_tlow;
  434. }
  435. pca_reset(pca_data);
  436. printk(KERN_INFO
  437. "%s: Clock frequency is %dHz\n", adap->name, clock * 100);
  438. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
  439. pca_outw(pca_data, I2C_PCA_IND, mode);
  440. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
  441. pca_outw(pca_data, I2C_PCA_IND, tlow);
  442. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
  443. pca_outw(pca_data, I2C_PCA_IND, thi);
  444. pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
  445. }
  446. udelay(500); /* 500 us for oscilator to stabilise */
  447. return 0;
  448. }
  449. /*
  450. * registering functions to load algorithms at runtime
  451. */
  452. int i2c_pca_add_bus(struct i2c_adapter *adap)
  453. {
  454. int rval;
  455. rval = pca_init(adap);
  456. if (rval)
  457. return rval;
  458. return i2c_add_adapter(adap);
  459. }
  460. EXPORT_SYMBOL(i2c_pca_add_bus);
  461. int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
  462. {
  463. int rval;
  464. rval = pca_init(adap);
  465. if (rval)
  466. return rval;
  467. return i2c_add_numbered_adapter(adap);
  468. }
  469. EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
  470. MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
  471. "Wolfram Sang <w.sang@pengutronix.de>");
  472. MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
  473. MODULE_LICENSE("GPL");
  474. module_param(i2c_debug, int, 0);