smartreflex.c 30 KB

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  1. /*
  2. * OMAP SmartReflex Voltage Control
  3. *
  4. * Author: Thara Gopinath <thara@ti.com>
  5. *
  6. * Copyright (C) 2012 Texas Instruments, Inc.
  7. * Thara Gopinath <thara@ti.com>
  8. *
  9. * Copyright (C) 2008 Nokia Corporation
  10. * Kalle Jokiniemi
  11. *
  12. * Copyright (C) 2007 Texas Instruments, Inc.
  13. * Lesly A M <x0080970@ti.com>
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/clk.h>
  22. #include <linux/io.h>
  23. #include <linux/debugfs.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/power/smartreflex.h>
  28. #define SMARTREFLEX_NAME_LEN 16
  29. #define NVALUE_NAME_LEN 40
  30. #define SR_DISABLE_TIMEOUT 200
  31. /* sr_list contains all the instances of smartreflex module */
  32. static LIST_HEAD(sr_list);
  33. static struct omap_sr_class_data *sr_class;
  34. static struct omap_sr_pmic_data *sr_pmic_data;
  35. static struct dentry *sr_dbg_dir;
  36. static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
  37. {
  38. __raw_writel(value, (sr->base + offset));
  39. }
  40. static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
  41. u32 value)
  42. {
  43. u32 reg_val;
  44. /*
  45. * Smartreflex error config register is special as it contains
  46. * certain status bits which if written a 1 into means a clear
  47. * of those bits. So in order to make sure no accidental write of
  48. * 1 happens to those status bits, do a clear of them in the read
  49. * value. This mean this API doesn't rewrite values in these bits
  50. * if they are currently set, but does allow the caller to write
  51. * those bits.
  52. */
  53. if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
  54. mask |= ERRCONFIG_STATUS_V1_MASK;
  55. else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
  56. mask |= ERRCONFIG_VPBOUNDINTST_V2;
  57. reg_val = __raw_readl(sr->base + offset);
  58. reg_val &= ~mask;
  59. value &= mask;
  60. reg_val |= value;
  61. __raw_writel(reg_val, (sr->base + offset));
  62. }
  63. static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
  64. {
  65. return __raw_readl(sr->base + offset);
  66. }
  67. static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
  68. {
  69. struct omap_sr *sr_info;
  70. if (!voltdm) {
  71. pr_err("%s: Null voltage domain passed!\n", __func__);
  72. return ERR_PTR(-EINVAL);
  73. }
  74. list_for_each_entry(sr_info, &sr_list, node) {
  75. if (voltdm == sr_info->voltdm)
  76. return sr_info;
  77. }
  78. return ERR_PTR(-ENODATA);
  79. }
  80. static irqreturn_t sr_interrupt(int irq, void *data)
  81. {
  82. struct omap_sr *sr_info = data;
  83. u32 status = 0;
  84. switch (sr_info->ip_type) {
  85. case SR_TYPE_V1:
  86. /* Read the status bits */
  87. status = sr_read_reg(sr_info, ERRCONFIG_V1);
  88. /* Clear them by writing back */
  89. sr_write_reg(sr_info, ERRCONFIG_V1, status);
  90. break;
  91. case SR_TYPE_V2:
  92. /* Read the status bits */
  93. status = sr_read_reg(sr_info, IRQSTATUS);
  94. /* Clear them by writing back */
  95. sr_write_reg(sr_info, IRQSTATUS, status);
  96. break;
  97. default:
  98. dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
  99. sr_info->ip_type);
  100. return IRQ_NONE;
  101. }
  102. if (sr_class->notify)
  103. sr_class->notify(sr_info, status);
  104. return IRQ_HANDLED;
  105. }
  106. static void sr_set_clk_length(struct omap_sr *sr)
  107. {
  108. struct clk *fck;
  109. u32 fclk_speed;
  110. fck = clk_get(&sr->pdev->dev, "fck");
  111. if (IS_ERR(fck)) {
  112. dev_err(&sr->pdev->dev, "%s: unable to get fck for device %s\n",
  113. __func__, dev_name(&sr->pdev->dev));
  114. return;
  115. }
  116. fclk_speed = clk_get_rate(fck);
  117. clk_put(fck);
  118. switch (fclk_speed) {
  119. case 12000000:
  120. sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
  121. break;
  122. case 13000000:
  123. sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
  124. break;
  125. case 19200000:
  126. sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
  127. break;
  128. case 26000000:
  129. sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
  130. break;
  131. case 38400000:
  132. sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
  133. break;
  134. default:
  135. dev_err(&sr->pdev->dev, "%s: Invalid fclk rate: %d\n",
  136. __func__, fclk_speed);
  137. break;
  138. }
  139. }
  140. static void sr_start_vddautocomp(struct omap_sr *sr)
  141. {
  142. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  143. dev_warn(&sr->pdev->dev,
  144. "%s: smartreflex class driver not registered\n",
  145. __func__);
  146. return;
  147. }
  148. if (!sr_class->enable(sr))
  149. sr->autocomp_active = true;
  150. }
  151. static void sr_stop_vddautocomp(struct omap_sr *sr)
  152. {
  153. if (!sr_class || !(sr_class->disable)) {
  154. dev_warn(&sr->pdev->dev,
  155. "%s: smartreflex class driver not registered\n",
  156. __func__);
  157. return;
  158. }
  159. if (sr->autocomp_active) {
  160. sr_class->disable(sr, 1);
  161. sr->autocomp_active = false;
  162. }
  163. }
  164. /*
  165. * This function handles the intializations which have to be done
  166. * only when both sr device and class driver regiter has
  167. * completed. This will be attempted to be called from both sr class
  168. * driver register and sr device intializtion API's. Only one call
  169. * will ultimately succeed.
  170. *
  171. * Currently this function registers interrupt handler for a particular SR
  172. * if smartreflex class driver is already registered and has
  173. * requested for interrupts and the SR interrupt line in present.
  174. */
  175. static int sr_late_init(struct omap_sr *sr_info)
  176. {
  177. struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
  178. struct resource *mem;
  179. int ret = 0;
  180. if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
  181. ret = request_irq(sr_info->irq, sr_interrupt,
  182. 0, sr_info->name, sr_info);
  183. if (ret)
  184. goto error;
  185. disable_irq(sr_info->irq);
  186. }
  187. if (pdata && pdata->enable_on_init)
  188. sr_start_vddautocomp(sr_info);
  189. return ret;
  190. error:
  191. iounmap(sr_info->base);
  192. mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
  193. release_mem_region(mem->start, resource_size(mem));
  194. list_del(&sr_info->node);
  195. dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
  196. "interrupt handler. Smartreflex will"
  197. "not function as desired\n", __func__);
  198. kfree(sr_info);
  199. return ret;
  200. }
  201. static void sr_v1_disable(struct omap_sr *sr)
  202. {
  203. int timeout = 0;
  204. int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
  205. ERRCONFIG_MCUBOUNDINTST;
  206. /* Enable MCUDisableAcknowledge interrupt */
  207. sr_modify_reg(sr, ERRCONFIG_V1,
  208. ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
  209. /* SRCONFIG - disable SR */
  210. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  211. /* Disable all other SR interrupts and clear the status as needed */
  212. if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
  213. errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
  214. sr_modify_reg(sr, ERRCONFIG_V1,
  215. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  216. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
  217. errconf_val);
  218. /*
  219. * Wait for SR to be disabled.
  220. * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
  221. */
  222. sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
  223. ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
  224. timeout);
  225. if (timeout >= SR_DISABLE_TIMEOUT)
  226. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  227. __func__);
  228. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  229. sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
  230. ERRCONFIG_MCUDISACKINTST);
  231. }
  232. static void sr_v2_disable(struct omap_sr *sr)
  233. {
  234. int timeout = 0;
  235. /* Enable MCUDisableAcknowledge interrupt */
  236. sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
  237. /* SRCONFIG - disable SR */
  238. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  239. /*
  240. * Disable all other SR interrupts and clear the status
  241. * write to status register ONLY on need basis - only if status
  242. * is set.
  243. */
  244. if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
  245. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  246. ERRCONFIG_VPBOUNDINTST_V2);
  247. else
  248. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  249. 0x0);
  250. sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
  251. IRQENABLE_MCUVALIDINT |
  252. IRQENABLE_MCUBOUNDSINT));
  253. sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
  254. IRQSTATUS_MCVALIDINT |
  255. IRQSTATUS_MCBOUNDSINT));
  256. /*
  257. * Wait for SR to be disabled.
  258. * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
  259. */
  260. sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) &
  261. IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
  262. timeout);
  263. if (timeout >= SR_DISABLE_TIMEOUT)
  264. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  265. __func__);
  266. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  267. sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
  268. sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
  269. }
  270. static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row(
  271. struct omap_sr *sr, u32 efuse_offs)
  272. {
  273. int i;
  274. if (!sr->nvalue_table) {
  275. dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
  276. __func__);
  277. return NULL;
  278. }
  279. for (i = 0; i < sr->nvalue_count; i++) {
  280. if (sr->nvalue_table[i].efuse_offs == efuse_offs)
  281. return &sr->nvalue_table[i];
  282. }
  283. return NULL;
  284. }
  285. /* Public Functions */
  286. /**
  287. * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the
  288. * error generator module.
  289. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  290. *
  291. * This API is to be called from the smartreflex class driver to
  292. * configure the error generator module inside the smartreflex module.
  293. * SR settings if using the ERROR module inside Smartreflex.
  294. * SR CLASS 3 by default uses only the ERROR module where as
  295. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  296. * module. Returns 0 on success and error value in case of failure.
  297. */
  298. int sr_configure_errgen(struct voltagedomain *voltdm)
  299. {
  300. u32 sr_config, sr_errconfig, errconfig_offs;
  301. u32 vpboundint_en, vpboundint_st;
  302. u32 senp_en = 0, senn_en = 0;
  303. u8 senp_shift, senn_shift;
  304. struct omap_sr *sr = _sr_lookup(voltdm);
  305. if (IS_ERR(sr)) {
  306. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  307. return PTR_ERR(sr);
  308. }
  309. if (!sr->clk_length)
  310. sr_set_clk_length(sr);
  311. senp_en = sr->senp_mod;
  312. senn_en = sr->senn_mod;
  313. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  314. SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
  315. switch (sr->ip_type) {
  316. case SR_TYPE_V1:
  317. sr_config |= SRCONFIG_DELAYCTRL;
  318. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  319. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  320. errconfig_offs = ERRCONFIG_V1;
  321. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  322. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  323. break;
  324. case SR_TYPE_V2:
  325. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  326. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  327. errconfig_offs = ERRCONFIG_V2;
  328. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  329. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  330. break;
  331. default:
  332. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  333. "module without specifying the ip\n", __func__);
  334. return -EINVAL;
  335. }
  336. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  337. sr_write_reg(sr, SRCONFIG, sr_config);
  338. sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
  339. (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
  340. (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
  341. sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
  342. SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
  343. sr_errconfig);
  344. /* Enabling the interrupts if the ERROR module is used */
  345. sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
  346. vpboundint_en);
  347. return 0;
  348. }
  349. /**
  350. * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
  351. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  352. *
  353. * This API is to be called from the smartreflex class driver to
  354. * disable the error generator module inside the smartreflex module.
  355. *
  356. * Returns 0 on success and error value in case of failure.
  357. */
  358. int sr_disable_errgen(struct voltagedomain *voltdm)
  359. {
  360. u32 errconfig_offs;
  361. u32 vpboundint_en, vpboundint_st;
  362. struct omap_sr *sr = _sr_lookup(voltdm);
  363. if (IS_ERR(sr)) {
  364. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  365. return PTR_ERR(sr);
  366. }
  367. switch (sr->ip_type) {
  368. case SR_TYPE_V1:
  369. errconfig_offs = ERRCONFIG_V1;
  370. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  371. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  372. break;
  373. case SR_TYPE_V2:
  374. errconfig_offs = ERRCONFIG_V2;
  375. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  376. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  377. break;
  378. default:
  379. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  380. "module without specifying the ip\n", __func__);
  381. return -EINVAL;
  382. }
  383. /* Disable the Sensor and errorgen */
  384. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
  385. /*
  386. * Disable the interrupts of ERROR module
  387. * NOTE: modify is a read, modify,write - an implicit OCP barrier
  388. * which is required is present here - sequencing is critical
  389. * at this point (after errgen is disabled, vpboundint disable)
  390. */
  391. sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
  392. return 0;
  393. }
  394. /**
  395. * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the
  396. * minmaxavg module.
  397. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  398. *
  399. * This API is to be called from the smartreflex class driver to
  400. * configure the minmaxavg module inside the smartreflex module.
  401. * SR settings if using the ERROR module inside Smartreflex.
  402. * SR CLASS 3 by default uses only the ERROR module where as
  403. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  404. * module. Returns 0 on success and error value in case of failure.
  405. */
  406. int sr_configure_minmax(struct voltagedomain *voltdm)
  407. {
  408. u32 sr_config, sr_avgwt;
  409. u32 senp_en = 0, senn_en = 0;
  410. u8 senp_shift, senn_shift;
  411. struct omap_sr *sr = _sr_lookup(voltdm);
  412. if (IS_ERR(sr)) {
  413. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  414. return PTR_ERR(sr);
  415. }
  416. if (!sr->clk_length)
  417. sr_set_clk_length(sr);
  418. senp_en = sr->senp_mod;
  419. senn_en = sr->senn_mod;
  420. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  421. SRCONFIG_SENENABLE |
  422. (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
  423. switch (sr->ip_type) {
  424. case SR_TYPE_V1:
  425. sr_config |= SRCONFIG_DELAYCTRL;
  426. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  427. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  428. break;
  429. case SR_TYPE_V2:
  430. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  431. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  432. break;
  433. default:
  434. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  435. "module without specifying the ip\n", __func__);
  436. return -EINVAL;
  437. }
  438. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  439. sr_write_reg(sr, SRCONFIG, sr_config);
  440. sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
  441. (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
  442. sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
  443. /*
  444. * Enabling the interrupts if MINMAXAVG module is used.
  445. * TODO: check if all the interrupts are mandatory
  446. */
  447. switch (sr->ip_type) {
  448. case SR_TYPE_V1:
  449. sr_modify_reg(sr, ERRCONFIG_V1,
  450. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  451. ERRCONFIG_MCUBOUNDINTEN),
  452. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
  453. ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
  454. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
  455. break;
  456. case SR_TYPE_V2:
  457. sr_write_reg(sr, IRQSTATUS,
  458. IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
  459. IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
  460. sr_write_reg(sr, IRQENABLE_SET,
  461. IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
  462. IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
  463. break;
  464. default:
  465. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  466. "module without specifying the ip\n", __func__);
  467. return -EINVAL;
  468. }
  469. return 0;
  470. }
  471. /**
  472. * sr_enable() - Enables the smartreflex module.
  473. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  474. * @volt: The voltage at which the Voltage domain associated with
  475. * the smartreflex module is operating at.
  476. * This is required only to program the correct Ntarget value.
  477. *
  478. * This API is to be called from the smartreflex class driver to
  479. * enable a smartreflex module. Returns 0 on success. Returns error
  480. * value if the voltage passed is wrong or if ntarget value is wrong.
  481. */
  482. int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
  483. {
  484. struct omap_volt_data *volt_data;
  485. struct omap_sr *sr = _sr_lookup(voltdm);
  486. struct omap_sr_nvalue_table *nvalue_row;
  487. int ret;
  488. if (IS_ERR(sr)) {
  489. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  490. return PTR_ERR(sr);
  491. }
  492. volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
  493. if (IS_ERR(volt_data)) {
  494. dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
  495. "for nominal voltage %ld\n", __func__, volt);
  496. return PTR_ERR(volt_data);
  497. }
  498. nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs);
  499. if (!nvalue_row) {
  500. dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n",
  501. __func__, volt);
  502. return -ENODATA;
  503. }
  504. /* errminlimit is opp dependent and hence linked to voltage */
  505. sr->err_minlimit = nvalue_row->errminlimit;
  506. pm_runtime_get_sync(&sr->pdev->dev);
  507. /* Check if SR is already enabled. If yes do nothing */
  508. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
  509. return 0;
  510. /* Configure SR */
  511. ret = sr_class->configure(sr);
  512. if (ret)
  513. return ret;
  514. sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
  515. /* SRCONFIG - enable SR */
  516. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
  517. return 0;
  518. }
  519. /**
  520. * sr_disable() - Disables the smartreflex module.
  521. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  522. *
  523. * This API is to be called from the smartreflex class driver to
  524. * disable a smartreflex module.
  525. */
  526. void sr_disable(struct voltagedomain *voltdm)
  527. {
  528. struct omap_sr *sr = _sr_lookup(voltdm);
  529. if (IS_ERR(sr)) {
  530. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  531. return;
  532. }
  533. /* Check if SR clocks are already disabled. If yes do nothing */
  534. if (pm_runtime_suspended(&sr->pdev->dev))
  535. return;
  536. /*
  537. * Disable SR if only it is indeed enabled. Else just
  538. * disable the clocks.
  539. */
  540. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
  541. switch (sr->ip_type) {
  542. case SR_TYPE_V1:
  543. sr_v1_disable(sr);
  544. break;
  545. case SR_TYPE_V2:
  546. sr_v2_disable(sr);
  547. break;
  548. default:
  549. dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
  550. sr->ip_type);
  551. }
  552. }
  553. pm_runtime_put_sync_suspend(&sr->pdev->dev);
  554. }
  555. /**
  556. * sr_register_class() - API to register a smartreflex class parameters.
  557. * @class_data: The structure containing various sr class specific data.
  558. *
  559. * This API is to be called by the smartreflex class driver to register itself
  560. * with the smartreflex driver during init. Returns 0 on success else the
  561. * error value.
  562. */
  563. int sr_register_class(struct omap_sr_class_data *class_data)
  564. {
  565. struct omap_sr *sr_info;
  566. if (!class_data) {
  567. pr_warning("%s:, Smartreflex class data passed is NULL\n",
  568. __func__);
  569. return -EINVAL;
  570. }
  571. if (sr_class) {
  572. pr_warning("%s: Smartreflex class driver already registered\n",
  573. __func__);
  574. return -EBUSY;
  575. }
  576. sr_class = class_data;
  577. /*
  578. * Call into late init to do intializations that require
  579. * both sr driver and sr class driver to be initiallized.
  580. */
  581. list_for_each_entry(sr_info, &sr_list, node)
  582. sr_late_init(sr_info);
  583. return 0;
  584. }
  585. /**
  586. * omap_sr_enable() - API to enable SR clocks and to call into the
  587. * registered smartreflex class enable API.
  588. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  589. *
  590. * This API is to be called from the kernel in order to enable
  591. * a particular smartreflex module. This API will do the initial
  592. * configurations to turn on the smartreflex module and in turn call
  593. * into the registered smartreflex class enable API.
  594. */
  595. void omap_sr_enable(struct voltagedomain *voltdm)
  596. {
  597. struct omap_sr *sr = _sr_lookup(voltdm);
  598. if (IS_ERR(sr)) {
  599. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  600. return;
  601. }
  602. if (!sr->autocomp_active)
  603. return;
  604. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  605. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  606. "registered\n", __func__);
  607. return;
  608. }
  609. sr_class->enable(sr);
  610. }
  611. /**
  612. * omap_sr_disable() - API to disable SR without resetting the voltage
  613. * processor voltage
  614. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  615. *
  616. * This API is to be called from the kernel in order to disable
  617. * a particular smartreflex module. This API will in turn call
  618. * into the registered smartreflex class disable API. This API will tell
  619. * the smartreflex class disable not to reset the VP voltage after
  620. * disabling smartreflex.
  621. */
  622. void omap_sr_disable(struct voltagedomain *voltdm)
  623. {
  624. struct omap_sr *sr = _sr_lookup(voltdm);
  625. if (IS_ERR(sr)) {
  626. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  627. return;
  628. }
  629. if (!sr->autocomp_active)
  630. return;
  631. if (!sr_class || !(sr_class->disable)) {
  632. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  633. "registered\n", __func__);
  634. return;
  635. }
  636. sr_class->disable(sr, 0);
  637. }
  638. /**
  639. * omap_sr_disable_reset_volt() - API to disable SR and reset the
  640. * voltage processor voltage
  641. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  642. *
  643. * This API is to be called from the kernel in order to disable
  644. * a particular smartreflex module. This API will in turn call
  645. * into the registered smartreflex class disable API. This API will tell
  646. * the smartreflex class disable to reset the VP voltage after
  647. * disabling smartreflex.
  648. */
  649. void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
  650. {
  651. struct omap_sr *sr = _sr_lookup(voltdm);
  652. if (IS_ERR(sr)) {
  653. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  654. return;
  655. }
  656. if (!sr->autocomp_active)
  657. return;
  658. if (!sr_class || !(sr_class->disable)) {
  659. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  660. "registered\n", __func__);
  661. return;
  662. }
  663. sr_class->disable(sr, 1);
  664. }
  665. /**
  666. * omap_sr_register_pmic() - API to register pmic specific info.
  667. * @pmic_data: The structure containing pmic specific data.
  668. *
  669. * This API is to be called from the PMIC specific code to register with
  670. * smartreflex driver pmic specific info. Currently the only info required
  671. * is the smartreflex init on the PMIC side.
  672. */
  673. void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
  674. {
  675. if (!pmic_data) {
  676. pr_warning("%s: Trying to register NULL PMIC data structure"
  677. "with smartreflex\n", __func__);
  678. return;
  679. }
  680. sr_pmic_data = pmic_data;
  681. }
  682. /* PM Debug FS entries to enable and disable smartreflex. */
  683. static int omap_sr_autocomp_show(void *data, u64 *val)
  684. {
  685. struct omap_sr *sr_info = data;
  686. if (!sr_info) {
  687. pr_warning("%s: omap_sr struct not found\n", __func__);
  688. return -EINVAL;
  689. }
  690. *val = sr_info->autocomp_active;
  691. return 0;
  692. }
  693. static int omap_sr_autocomp_store(void *data, u64 val)
  694. {
  695. struct omap_sr *sr_info = data;
  696. if (!sr_info) {
  697. pr_warning("%s: omap_sr struct not found\n", __func__);
  698. return -EINVAL;
  699. }
  700. /* Sanity check */
  701. if (val > 1) {
  702. pr_warning("%s: Invalid argument %lld\n", __func__, val);
  703. return -EINVAL;
  704. }
  705. /* control enable/disable only if there is a delta in value */
  706. if (sr_info->autocomp_active != val) {
  707. if (!val)
  708. sr_stop_vddautocomp(sr_info);
  709. else
  710. sr_start_vddautocomp(sr_info);
  711. }
  712. return 0;
  713. }
  714. DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
  715. omap_sr_autocomp_store, "%llu\n");
  716. static int __init omap_sr_probe(struct platform_device *pdev)
  717. {
  718. struct omap_sr *sr_info;
  719. struct omap_sr_data *pdata = pdev->dev.platform_data;
  720. struct resource *mem, *irq;
  721. struct dentry *nvalue_dir;
  722. int i, ret = 0;
  723. sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
  724. if (!sr_info) {
  725. dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
  726. __func__);
  727. return -ENOMEM;
  728. }
  729. platform_set_drvdata(pdev, sr_info);
  730. if (!pdata) {
  731. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  732. ret = -EINVAL;
  733. goto err_free_devinfo;
  734. }
  735. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  736. if (!mem) {
  737. dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
  738. ret = -ENODEV;
  739. goto err_free_devinfo;
  740. }
  741. mem = request_mem_region(mem->start, resource_size(mem),
  742. dev_name(&pdev->dev));
  743. if (!mem) {
  744. dev_err(&pdev->dev, "%s: no mem region\n", __func__);
  745. ret = -EBUSY;
  746. goto err_free_devinfo;
  747. }
  748. irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  749. pm_runtime_enable(&pdev->dev);
  750. pm_runtime_irq_safe(&pdev->dev);
  751. sr_info->name = kasprintf(GFP_KERNEL, "%s", pdata->name);
  752. if (!sr_info->name) {
  753. dev_err(&pdev->dev, "%s: Unable to alloc SR instance name\n",
  754. __func__);
  755. ret = -ENOMEM;
  756. goto err_release_region;
  757. }
  758. sr_info->pdev = pdev;
  759. sr_info->srid = pdev->id;
  760. sr_info->voltdm = pdata->voltdm;
  761. sr_info->nvalue_table = pdata->nvalue_table;
  762. sr_info->nvalue_count = pdata->nvalue_count;
  763. sr_info->senn_mod = pdata->senn_mod;
  764. sr_info->senp_mod = pdata->senp_mod;
  765. sr_info->err_weight = pdata->err_weight;
  766. sr_info->err_maxlimit = pdata->err_maxlimit;
  767. sr_info->accum_data = pdata->accum_data;
  768. sr_info->senn_avgweight = pdata->senn_avgweight;
  769. sr_info->senp_avgweight = pdata->senp_avgweight;
  770. sr_info->autocomp_active = false;
  771. sr_info->ip_type = pdata->ip_type;
  772. sr_info->base = ioremap(mem->start, resource_size(mem));
  773. if (!sr_info->base) {
  774. dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
  775. ret = -ENOMEM;
  776. goto err_free_name;
  777. }
  778. if (irq)
  779. sr_info->irq = irq->start;
  780. sr_set_clk_length(sr_info);
  781. list_add(&sr_info->node, &sr_list);
  782. /*
  783. * Call into late init to do intializations that require
  784. * both sr driver and sr class driver to be initiallized.
  785. */
  786. if (sr_class) {
  787. ret = sr_late_init(sr_info);
  788. if (ret) {
  789. pr_warning("%s: Error in SR late init\n", __func__);
  790. goto err_iounmap;
  791. }
  792. }
  793. dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
  794. if (!sr_dbg_dir) {
  795. sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
  796. if (IS_ERR_OR_NULL(sr_dbg_dir)) {
  797. ret = PTR_ERR(sr_dbg_dir);
  798. pr_err("%s:sr debugfs dir creation failed(%d)\n",
  799. __func__, ret);
  800. goto err_iounmap;
  801. }
  802. }
  803. sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir);
  804. if (IS_ERR_OR_NULL(sr_info->dbg_dir)) {
  805. dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
  806. __func__);
  807. ret = PTR_ERR(sr_info->dbg_dir);
  808. goto err_debugfs;
  809. }
  810. (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
  811. sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops);
  812. (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
  813. &sr_info->err_weight);
  814. (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
  815. &sr_info->err_maxlimit);
  816. nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
  817. if (IS_ERR_OR_NULL(nvalue_dir)) {
  818. dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
  819. "for n-values\n", __func__);
  820. ret = PTR_ERR(nvalue_dir);
  821. goto err_debugfs;
  822. }
  823. if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) {
  824. dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n",
  825. __func__, sr_info->name);
  826. ret = -ENODATA;
  827. goto err_debugfs;
  828. }
  829. for (i = 0; i < sr_info->nvalue_count; i++) {
  830. char name[NVALUE_NAME_LEN + 1];
  831. snprintf(name, sizeof(name), "volt_%lu",
  832. sr_info->nvalue_table[i].volt_nominal);
  833. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  834. &(sr_info->nvalue_table[i].nvalue));
  835. snprintf(name, sizeof(name), "errminlimit_%lu",
  836. sr_info->nvalue_table[i].volt_nominal);
  837. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  838. &(sr_info->nvalue_table[i].errminlimit));
  839. }
  840. return ret;
  841. err_debugfs:
  842. debugfs_remove_recursive(sr_info->dbg_dir);
  843. err_iounmap:
  844. list_del(&sr_info->node);
  845. iounmap(sr_info->base);
  846. err_free_name:
  847. kfree(sr_info->name);
  848. err_release_region:
  849. release_mem_region(mem->start, resource_size(mem));
  850. err_free_devinfo:
  851. kfree(sr_info);
  852. return ret;
  853. }
  854. static int omap_sr_remove(struct platform_device *pdev)
  855. {
  856. struct omap_sr_data *pdata = pdev->dev.platform_data;
  857. struct omap_sr *sr_info;
  858. struct resource *mem;
  859. if (!pdata) {
  860. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  861. return -EINVAL;
  862. }
  863. sr_info = _sr_lookup(pdata->voltdm);
  864. if (IS_ERR(sr_info)) {
  865. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  866. __func__);
  867. return PTR_ERR(sr_info);
  868. }
  869. if (sr_info->autocomp_active)
  870. sr_stop_vddautocomp(sr_info);
  871. if (sr_info->dbg_dir)
  872. debugfs_remove_recursive(sr_info->dbg_dir);
  873. list_del(&sr_info->node);
  874. iounmap(sr_info->base);
  875. kfree(sr_info->name);
  876. kfree(sr_info);
  877. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  878. release_mem_region(mem->start, resource_size(mem));
  879. return 0;
  880. }
  881. static void omap_sr_shutdown(struct platform_device *pdev)
  882. {
  883. struct omap_sr_data *pdata = pdev->dev.platform_data;
  884. struct omap_sr *sr_info;
  885. if (!pdata) {
  886. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  887. return;
  888. }
  889. sr_info = _sr_lookup(pdata->voltdm);
  890. if (IS_ERR(sr_info)) {
  891. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  892. __func__);
  893. return;
  894. }
  895. if (sr_info->autocomp_active)
  896. sr_stop_vddautocomp(sr_info);
  897. return;
  898. }
  899. static struct platform_driver smartreflex_driver = {
  900. .remove = omap_sr_remove,
  901. .shutdown = omap_sr_shutdown,
  902. .driver = {
  903. .name = "smartreflex",
  904. },
  905. };
  906. static int __init sr_init(void)
  907. {
  908. int ret = 0;
  909. /*
  910. * sr_init is a late init. If by then a pmic specific API is not
  911. * registered either there is no need for anything to be done on
  912. * the PMIC side or somebody has forgotten to register a PMIC
  913. * handler. Warn for the second condition.
  914. */
  915. if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
  916. sr_pmic_data->sr_pmic_init();
  917. else
  918. pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
  919. ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe);
  920. if (ret) {
  921. pr_err("%s: platform driver register failed for SR\n",
  922. __func__);
  923. return ret;
  924. }
  925. return 0;
  926. }
  927. late_initcall(sr_init);
  928. static void __exit sr_exit(void)
  929. {
  930. platform_driver_unregister(&smartreflex_driver);
  931. }
  932. module_exit(sr_exit);
  933. MODULE_DESCRIPTION("OMAP Smartreflex Driver");
  934. MODULE_LICENSE("GPL");
  935. MODULE_ALIAS("platform:" DRIVER_NAME);
  936. MODULE_AUTHOR("Texas Instruments Inc");