timbuart.c 13 KB

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  1. /*
  2. * timbuart.c timberdale FPGA UART driver
  3. * Copyright (c) 2009 Intel Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* Supports:
  19. * Timberdale FPGA UART
  20. */
  21. #include <linux/pci.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/serial_core.h>
  24. #include <linux/tty.h>
  25. #include <linux/tty_flip.h>
  26. #include <linux/kernel.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/ioport.h>
  29. #include <linux/slab.h>
  30. #include "timbuart.h"
  31. struct timbuart_port {
  32. struct uart_port port;
  33. struct tasklet_struct tasklet;
  34. int usedma;
  35. u32 last_ier;
  36. struct platform_device *dev;
  37. };
  38. static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
  39. 921600, 1843200, 3250000};
  40. static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier);
  41. static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);
  42. static void timbuart_stop_rx(struct uart_port *port)
  43. {
  44. /* spin lock held by upper layer, disable all RX interrupts */
  45. u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
  46. iowrite32(ier, port->membase + TIMBUART_IER);
  47. }
  48. static void timbuart_stop_tx(struct uart_port *port)
  49. {
  50. /* spinlock held by upper layer, disable TX interrupt */
  51. u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
  52. iowrite32(ier, port->membase + TIMBUART_IER);
  53. }
  54. static void timbuart_start_tx(struct uart_port *port)
  55. {
  56. struct timbuart_port *uart =
  57. container_of(port, struct timbuart_port, port);
  58. /* do not transfer anything here -> fire off the tasklet */
  59. tasklet_schedule(&uart->tasklet);
  60. }
  61. static unsigned int timbuart_tx_empty(struct uart_port *port)
  62. {
  63. u32 isr = ioread32(port->membase + TIMBUART_ISR);
  64. return (isr & TXBE) ? TIOCSER_TEMT : 0;
  65. }
  66. static void timbuart_flush_buffer(struct uart_port *port)
  67. {
  68. if (!timbuart_tx_empty(port)) {
  69. u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
  70. TIMBUART_CTRL_FLSHTX;
  71. iowrite8(ctl, port->membase + TIMBUART_CTRL);
  72. iowrite32(TXBF, port->membase + TIMBUART_ISR);
  73. }
  74. }
  75. static void timbuart_rx_chars(struct uart_port *port)
  76. {
  77. struct tty_struct *tty = port->state->port.tty;
  78. while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
  79. u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
  80. port->icount.rx++;
  81. tty_insert_flip_char(tty, ch, TTY_NORMAL);
  82. }
  83. spin_unlock(&port->lock);
  84. tty_flip_buffer_push(port->state->port.tty);
  85. spin_lock(&port->lock);
  86. dev_dbg(port->dev, "%s - total read %d bytes\n",
  87. __func__, port->icount.rx);
  88. }
  89. static void timbuart_tx_chars(struct uart_port *port)
  90. {
  91. struct circ_buf *xmit = &port->state->xmit;
  92. while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
  93. !uart_circ_empty(xmit)) {
  94. iowrite8(xmit->buf[xmit->tail],
  95. port->membase + TIMBUART_TXFIFO);
  96. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  97. port->icount.tx++;
  98. }
  99. dev_dbg(port->dev,
  100. "%s - total written %d bytes, CTL: %x, RTS: %x, baud: %x\n",
  101. __func__,
  102. port->icount.tx,
  103. ioread8(port->membase + TIMBUART_CTRL),
  104. port->mctrl & TIOCM_RTS,
  105. ioread8(port->membase + TIMBUART_BAUDRATE));
  106. }
  107. static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier)
  108. {
  109. struct timbuart_port *uart =
  110. container_of(port, struct timbuart_port, port);
  111. struct circ_buf *xmit = &port->state->xmit;
  112. if (uart_circ_empty(xmit) || uart_tx_stopped(port))
  113. return;
  114. if (port->x_char)
  115. return;
  116. if (isr & TXFLAGS) {
  117. timbuart_tx_chars(port);
  118. /* clear all TX interrupts */
  119. iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);
  120. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  121. uart_write_wakeup(port);
  122. } else
  123. /* Re-enable any tx interrupt */
  124. *ier |= uart->last_ier & TXFLAGS;
  125. /* enable interrupts if there are chars in the transmit buffer,
  126. * Or if we delivered some bytes and want the almost empty interrupt
  127. * we wake up the upper layer later when we got the interrupt
  128. * to give it some time to go out...
  129. */
  130. if (!uart_circ_empty(xmit))
  131. *ier |= TXBAE;
  132. dev_dbg(port->dev, "%s - leaving\n", __func__);
  133. }
  134. void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier)
  135. {
  136. if (isr & RXFLAGS) {
  137. /* Some RX status is set */
  138. if (isr & RXBF) {
  139. u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
  140. TIMBUART_CTRL_FLSHRX;
  141. iowrite8(ctl, port->membase + TIMBUART_CTRL);
  142. port->icount.overrun++;
  143. } else if (isr & (RXDP))
  144. timbuart_rx_chars(port);
  145. /* ack all RX interrupts */
  146. iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
  147. }
  148. /* always have the RX interrupts enabled */
  149. *ier |= RXBAF | RXBF | RXTT;
  150. dev_dbg(port->dev, "%s - leaving\n", __func__);
  151. }
  152. void timbuart_tasklet(unsigned long arg)
  153. {
  154. struct timbuart_port *uart = (struct timbuart_port *)arg;
  155. u32 isr, ier = 0;
  156. spin_lock(&uart->port.lock);
  157. isr = ioread32(uart->port.membase + TIMBUART_ISR);
  158. dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);
  159. if (!uart->usedma)
  160. timbuart_handle_tx_port(&uart->port, isr, &ier);
  161. timbuart_mctrl_check(&uart->port, isr, &ier);
  162. if (!uart->usedma)
  163. timbuart_handle_rx_port(&uart->port, isr, &ier);
  164. iowrite32(ier, uart->port.membase + TIMBUART_IER);
  165. spin_unlock(&uart->port.lock);
  166. dev_dbg(uart->port.dev, "%s leaving\n", __func__);
  167. }
  168. static unsigned int timbuart_get_mctrl(struct uart_port *port)
  169. {
  170. u8 cts = ioread8(port->membase + TIMBUART_CTRL);
  171. dev_dbg(port->dev, "%s - cts %x\n", __func__, cts);
  172. if (cts & TIMBUART_CTRL_CTS)
  173. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  174. else
  175. return TIOCM_DSR | TIOCM_CAR;
  176. }
  177. static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  178. {
  179. dev_dbg(port->dev, "%s - %x\n", __func__, mctrl);
  180. if (mctrl & TIOCM_RTS)
  181. iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
  182. else
  183. iowrite8(0, port->membase + TIMBUART_CTRL);
  184. }
  185. static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier)
  186. {
  187. unsigned int cts;
  188. if (isr & CTS_DELTA) {
  189. /* ack */
  190. iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
  191. cts = timbuart_get_mctrl(port);
  192. uart_handle_cts_change(port, cts & TIOCM_CTS);
  193. wake_up_interruptible(&port->state->port.delta_msr_wait);
  194. }
  195. *ier |= CTS_DELTA;
  196. }
  197. static void timbuart_enable_ms(struct uart_port *port)
  198. {
  199. /* N/A */
  200. }
  201. static void timbuart_break_ctl(struct uart_port *port, int ctl)
  202. {
  203. /* N/A */
  204. }
  205. static int timbuart_startup(struct uart_port *port)
  206. {
  207. struct timbuart_port *uart =
  208. container_of(port, struct timbuart_port, port);
  209. dev_dbg(port->dev, "%s\n", __func__);
  210. iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
  211. iowrite32(0x1ff, port->membase + TIMBUART_ISR);
  212. /* Enable all but TX interrupts */
  213. iowrite32(RXBAF | RXBF | RXTT | CTS_DELTA,
  214. port->membase + TIMBUART_IER);
  215. return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
  216. "timb-uart", uart);
  217. }
  218. static void timbuart_shutdown(struct uart_port *port)
  219. {
  220. struct timbuart_port *uart =
  221. container_of(port, struct timbuart_port, port);
  222. dev_dbg(port->dev, "%s\n", __func__);
  223. free_irq(port->irq, uart);
  224. iowrite32(0, port->membase + TIMBUART_IER);
  225. }
  226. static int get_bindex(int baud)
  227. {
  228. int i;
  229. for (i = 0; i < ARRAY_SIZE(baudrates); i++)
  230. if (baud <= baudrates[i])
  231. return i;
  232. return -1;
  233. }
  234. static void timbuart_set_termios(struct uart_port *port,
  235. struct ktermios *termios,
  236. struct ktermios *old)
  237. {
  238. unsigned int baud;
  239. short bindex;
  240. unsigned long flags;
  241. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
  242. bindex = get_bindex(baud);
  243. dev_dbg(port->dev, "%s - bindex %d\n", __func__, bindex);
  244. if (bindex < 0)
  245. bindex = 0;
  246. baud = baudrates[bindex];
  247. /* The serial layer calls into this once with old = NULL when setting
  248. up initially */
  249. if (old)
  250. tty_termios_copy_hw(termios, old);
  251. tty_termios_encode_baud_rate(termios, baud, baud);
  252. spin_lock_irqsave(&port->lock, flags);
  253. iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);
  254. uart_update_timeout(port, termios->c_cflag, baud);
  255. spin_unlock_irqrestore(&port->lock, flags);
  256. }
  257. static const char *timbuart_type(struct uart_port *port)
  258. {
  259. return port->type == PORT_UNKNOWN ? "timbuart" : NULL;
  260. }
  261. /* We do not request/release mappings of the registers here,
  262. * currently it's done in the proble function.
  263. */
  264. static void timbuart_release_port(struct uart_port *port)
  265. {
  266. struct platform_device *pdev = to_platform_device(port->dev);
  267. int size =
  268. resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
  269. if (port->flags & UPF_IOREMAP) {
  270. iounmap(port->membase);
  271. port->membase = NULL;
  272. }
  273. release_mem_region(port->mapbase, size);
  274. }
  275. static int timbuart_request_port(struct uart_port *port)
  276. {
  277. struct platform_device *pdev = to_platform_device(port->dev);
  278. int size =
  279. resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
  280. if (!request_mem_region(port->mapbase, size, "timb-uart"))
  281. return -EBUSY;
  282. if (port->flags & UPF_IOREMAP) {
  283. port->membase = ioremap(port->mapbase, size);
  284. if (port->membase == NULL) {
  285. release_mem_region(port->mapbase, size);
  286. return -ENOMEM;
  287. }
  288. }
  289. return 0;
  290. }
  291. static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
  292. {
  293. struct timbuart_port *uart = (struct timbuart_port *)devid;
  294. if (ioread8(uart->port.membase + TIMBUART_IPR)) {
  295. uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);
  296. /* disable interrupts, the tasklet enables them again */
  297. iowrite32(0, uart->port.membase + TIMBUART_IER);
  298. /* fire off bottom half */
  299. tasklet_schedule(&uart->tasklet);
  300. return IRQ_HANDLED;
  301. } else
  302. return IRQ_NONE;
  303. }
  304. /*
  305. * Configure/autoconfigure the port.
  306. */
  307. static void timbuart_config_port(struct uart_port *port, int flags)
  308. {
  309. if (flags & UART_CONFIG_TYPE) {
  310. port->type = PORT_TIMBUART;
  311. timbuart_request_port(port);
  312. }
  313. }
  314. static int timbuart_verify_port(struct uart_port *port,
  315. struct serial_struct *ser)
  316. {
  317. /* we don't want the core code to modify any port params */
  318. return -EINVAL;
  319. }
  320. static struct uart_ops timbuart_ops = {
  321. .tx_empty = timbuart_tx_empty,
  322. .set_mctrl = timbuart_set_mctrl,
  323. .get_mctrl = timbuart_get_mctrl,
  324. .stop_tx = timbuart_stop_tx,
  325. .start_tx = timbuart_start_tx,
  326. .flush_buffer = timbuart_flush_buffer,
  327. .stop_rx = timbuart_stop_rx,
  328. .enable_ms = timbuart_enable_ms,
  329. .break_ctl = timbuart_break_ctl,
  330. .startup = timbuart_startup,
  331. .shutdown = timbuart_shutdown,
  332. .set_termios = timbuart_set_termios,
  333. .type = timbuart_type,
  334. .release_port = timbuart_release_port,
  335. .request_port = timbuart_request_port,
  336. .config_port = timbuart_config_port,
  337. .verify_port = timbuart_verify_port
  338. };
  339. static struct uart_driver timbuart_driver = {
  340. .owner = THIS_MODULE,
  341. .driver_name = "timberdale_uart",
  342. .dev_name = "ttyTU",
  343. .major = TIMBUART_MAJOR,
  344. .minor = TIMBUART_MINOR,
  345. .nr = 1
  346. };
  347. static int __devinit timbuart_probe(struct platform_device *dev)
  348. {
  349. int err, irq;
  350. struct timbuart_port *uart;
  351. struct resource *iomem;
  352. dev_dbg(&dev->dev, "%s\n", __func__);
  353. uart = kzalloc(sizeof(*uart), GFP_KERNEL);
  354. if (!uart) {
  355. err = -EINVAL;
  356. goto err_mem;
  357. }
  358. uart->usedma = 0;
  359. uart->port.uartclk = 3250000 * 16;
  360. uart->port.fifosize = TIMBUART_FIFO_SIZE;
  361. uart->port.regshift = 2;
  362. uart->port.iotype = UPIO_MEM;
  363. uart->port.ops = &timbuart_ops;
  364. uart->port.irq = 0;
  365. uart->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
  366. uart->port.line = 0;
  367. uart->port.dev = &dev->dev;
  368. iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
  369. if (!iomem) {
  370. err = -ENOMEM;
  371. goto err_register;
  372. }
  373. uart->port.mapbase = iomem->start;
  374. uart->port.membase = NULL;
  375. irq = platform_get_irq(dev, 0);
  376. if (irq < 0) {
  377. err = -EINVAL;
  378. goto err_register;
  379. }
  380. uart->port.irq = irq;
  381. tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart);
  382. err = uart_register_driver(&timbuart_driver);
  383. if (err)
  384. goto err_register;
  385. err = uart_add_one_port(&timbuart_driver, &uart->port);
  386. if (err)
  387. goto err_add_port;
  388. platform_set_drvdata(dev, uart);
  389. return 0;
  390. err_add_port:
  391. uart_unregister_driver(&timbuart_driver);
  392. err_register:
  393. kfree(uart);
  394. err_mem:
  395. printk(KERN_ERR "timberdale: Failed to register Timberdale UART: %d\n",
  396. err);
  397. return err;
  398. }
  399. static int __devexit timbuart_remove(struct platform_device *dev)
  400. {
  401. struct timbuart_port *uart = platform_get_drvdata(dev);
  402. tasklet_kill(&uart->tasklet);
  403. uart_remove_one_port(&timbuart_driver, &uart->port);
  404. uart_unregister_driver(&timbuart_driver);
  405. kfree(uart);
  406. return 0;
  407. }
  408. static struct platform_driver timbuart_platform_driver = {
  409. .driver = {
  410. .name = "timb-uart",
  411. .owner = THIS_MODULE,
  412. },
  413. .probe = timbuart_probe,
  414. .remove = __devexit_p(timbuart_remove),
  415. };
  416. /*--------------------------------------------------------------------------*/
  417. static int __init timbuart_init(void)
  418. {
  419. return platform_driver_register(&timbuart_platform_driver);
  420. }
  421. static void __exit timbuart_exit(void)
  422. {
  423. platform_driver_unregister(&timbuart_platform_driver);
  424. }
  425. module_init(timbuart_init);
  426. module_exit(timbuart_exit);
  427. MODULE_DESCRIPTION("Timberdale UART driver");
  428. MODULE_LICENSE("GPL v2");
  429. MODULE_ALIAS("platform:timb-uart");