mthca_provider.c 30 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  5. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  6. * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
  7. *
  8. * This software is available to you under a choice of one of two
  9. * licenses. You may choose to be licensed under the terms of the GNU
  10. * General Public License (GPL) Version 2, available from the file
  11. * COPYING in the main directory of this source tree, or the
  12. * OpenIB.org BSD license below:
  13. *
  14. * Redistribution and use in source and binary forms, with or
  15. * without modification, are permitted provided that the following
  16. * conditions are met:
  17. *
  18. * - Redistributions of source code must retain the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer.
  21. *
  22. * - Redistributions in binary form must reproduce the above
  23. * copyright notice, this list of conditions and the following
  24. * disclaimer in the documentation and/or other materials
  25. * provided with the distribution.
  26. *
  27. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  29. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  31. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  32. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  33. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  34. * SOFTWARE.
  35. *
  36. * $Id: mthca_provider.c 1397 2004-12-28 05:09:00Z roland $
  37. */
  38. #include <rdma/ib_smi.h>
  39. #include <linux/mm.h>
  40. #include "mthca_dev.h"
  41. #include "mthca_cmd.h"
  42. #include "mthca_user.h"
  43. #include "mthca_memfree.h"
  44. static int mthca_query_device(struct ib_device *ibdev,
  45. struct ib_device_attr *props)
  46. {
  47. struct ib_smp *in_mad = NULL;
  48. struct ib_smp *out_mad = NULL;
  49. int err = -ENOMEM;
  50. struct mthca_dev* mdev = to_mdev(ibdev);
  51. u8 status;
  52. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  53. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  54. if (!in_mad || !out_mad)
  55. goto out;
  56. memset(props, 0, sizeof *props);
  57. props->fw_ver = mdev->fw_ver;
  58. memset(in_mad, 0, sizeof *in_mad);
  59. in_mad->base_version = 1;
  60. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  61. in_mad->class_version = 1;
  62. in_mad->method = IB_MGMT_METHOD_GET;
  63. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  64. err = mthca_MAD_IFC(mdev, 1, 1,
  65. 1, NULL, NULL, in_mad, out_mad,
  66. &status);
  67. if (err)
  68. goto out;
  69. if (status) {
  70. err = -EINVAL;
  71. goto out;
  72. }
  73. props->device_cap_flags = mdev->device_cap_flags;
  74. props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
  75. 0xffffff;
  76. props->vendor_part_id = be16_to_cpup((__be16 *) (out_mad->data + 30));
  77. props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
  78. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  79. memcpy(&props->node_guid, out_mad->data + 12, 8);
  80. props->max_mr_size = ~0ull;
  81. props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
  82. props->max_qp_wr = mdev->limits.max_wqes;
  83. props->max_sge = mdev->limits.max_sg;
  84. props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
  85. props->max_cqe = mdev->limits.max_cqes;
  86. props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
  87. props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
  88. props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
  89. props->max_qp_init_rd_atom = mdev->limits.max_qp_init_rdma;
  90. props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
  91. props->max_srq = mdev->limits.num_srqs - mdev->limits.reserved_srqs;
  92. props->max_srq_wr = mdev->limits.max_srq_wqes;
  93. props->max_srq_sge = mdev->limits.max_sg;
  94. props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
  95. props->atomic_cap = mdev->limits.flags & DEV_LIM_FLAG_ATOMIC ?
  96. IB_ATOMIC_HCA : IB_ATOMIC_NONE;
  97. props->max_pkeys = mdev->limits.pkey_table_len;
  98. props->max_mcast_grp = mdev->limits.num_mgms + mdev->limits.num_amgms;
  99. props->max_mcast_qp_attach = MTHCA_QP_PER_MGM;
  100. props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
  101. props->max_mcast_grp;
  102. err = 0;
  103. out:
  104. kfree(in_mad);
  105. kfree(out_mad);
  106. return err;
  107. }
  108. static int mthca_query_port(struct ib_device *ibdev,
  109. u8 port, struct ib_port_attr *props)
  110. {
  111. struct ib_smp *in_mad = NULL;
  112. struct ib_smp *out_mad = NULL;
  113. int err = -ENOMEM;
  114. u8 status;
  115. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  116. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  117. if (!in_mad || !out_mad)
  118. goto out;
  119. memset(props, 0, sizeof *props);
  120. memset(in_mad, 0, sizeof *in_mad);
  121. in_mad->base_version = 1;
  122. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  123. in_mad->class_version = 1;
  124. in_mad->method = IB_MGMT_METHOD_GET;
  125. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  126. in_mad->attr_mod = cpu_to_be32(port);
  127. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  128. port, NULL, NULL, in_mad, out_mad,
  129. &status);
  130. if (err)
  131. goto out;
  132. if (status) {
  133. err = -EINVAL;
  134. goto out;
  135. }
  136. props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
  137. props->lmc = out_mad->data[34] & 0x7;
  138. props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
  139. props->sm_sl = out_mad->data[36] & 0xf;
  140. props->state = out_mad->data[32] & 0xf;
  141. props->phys_state = out_mad->data[33] >> 4;
  142. props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
  143. props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
  144. props->max_msg_sz = 0x80000000;
  145. props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
  146. props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
  147. props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
  148. props->active_width = out_mad->data[31] & 0xf;
  149. props->active_speed = out_mad->data[35] >> 4;
  150. props->max_mtu = out_mad->data[41] & 0xf;
  151. props->active_mtu = out_mad->data[36] >> 4;
  152. props->subnet_timeout = out_mad->data[51] & 0x1f;
  153. out:
  154. kfree(in_mad);
  155. kfree(out_mad);
  156. return err;
  157. }
  158. static int mthca_modify_port(struct ib_device *ibdev,
  159. u8 port, int port_modify_mask,
  160. struct ib_port_modify *props)
  161. {
  162. struct mthca_set_ib_param set_ib;
  163. struct ib_port_attr attr;
  164. int err;
  165. u8 status;
  166. if (down_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  167. return -ERESTARTSYS;
  168. err = mthca_query_port(ibdev, port, &attr);
  169. if (err)
  170. goto out;
  171. set_ib.set_si_guid = 0;
  172. set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
  173. set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  174. ~props->clr_port_cap_mask;
  175. err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
  176. if (err)
  177. goto out;
  178. if (status) {
  179. err = -EINVAL;
  180. goto out;
  181. }
  182. out:
  183. up(&to_mdev(ibdev)->cap_mask_mutex);
  184. return err;
  185. }
  186. static int mthca_query_pkey(struct ib_device *ibdev,
  187. u8 port, u16 index, u16 *pkey)
  188. {
  189. struct ib_smp *in_mad = NULL;
  190. struct ib_smp *out_mad = NULL;
  191. int err = -ENOMEM;
  192. u8 status;
  193. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  194. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  195. if (!in_mad || !out_mad)
  196. goto out;
  197. memset(in_mad, 0, sizeof *in_mad);
  198. in_mad->base_version = 1;
  199. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  200. in_mad->class_version = 1;
  201. in_mad->method = IB_MGMT_METHOD_GET;
  202. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  203. in_mad->attr_mod = cpu_to_be32(index / 32);
  204. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  205. port, NULL, NULL, in_mad, out_mad,
  206. &status);
  207. if (err)
  208. goto out;
  209. if (status) {
  210. err = -EINVAL;
  211. goto out;
  212. }
  213. *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
  214. out:
  215. kfree(in_mad);
  216. kfree(out_mad);
  217. return err;
  218. }
  219. static int mthca_query_gid(struct ib_device *ibdev, u8 port,
  220. int index, union ib_gid *gid)
  221. {
  222. struct ib_smp *in_mad = NULL;
  223. struct ib_smp *out_mad = NULL;
  224. int err = -ENOMEM;
  225. u8 status;
  226. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  227. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  228. if (!in_mad || !out_mad)
  229. goto out;
  230. memset(in_mad, 0, sizeof *in_mad);
  231. in_mad->base_version = 1;
  232. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  233. in_mad->class_version = 1;
  234. in_mad->method = IB_MGMT_METHOD_GET;
  235. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  236. in_mad->attr_mod = cpu_to_be32(port);
  237. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  238. port, NULL, NULL, in_mad, out_mad,
  239. &status);
  240. if (err)
  241. goto out;
  242. if (status) {
  243. err = -EINVAL;
  244. goto out;
  245. }
  246. memcpy(gid->raw, out_mad->data + 8, 8);
  247. memset(in_mad, 0, sizeof *in_mad);
  248. in_mad->base_version = 1;
  249. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  250. in_mad->class_version = 1;
  251. in_mad->method = IB_MGMT_METHOD_GET;
  252. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  253. in_mad->attr_mod = cpu_to_be32(index / 8);
  254. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  255. port, NULL, NULL, in_mad, out_mad,
  256. &status);
  257. if (err)
  258. goto out;
  259. if (status) {
  260. err = -EINVAL;
  261. goto out;
  262. }
  263. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8);
  264. out:
  265. kfree(in_mad);
  266. kfree(out_mad);
  267. return err;
  268. }
  269. static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev,
  270. struct ib_udata *udata)
  271. {
  272. struct mthca_alloc_ucontext_resp uresp;
  273. struct mthca_ucontext *context;
  274. int err;
  275. memset(&uresp, 0, sizeof uresp);
  276. uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps;
  277. if (mthca_is_memfree(to_mdev(ibdev)))
  278. uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size;
  279. else
  280. uresp.uarc_size = 0;
  281. context = kmalloc(sizeof *context, GFP_KERNEL);
  282. if (!context)
  283. return ERR_PTR(-ENOMEM);
  284. err = mthca_uar_alloc(to_mdev(ibdev), &context->uar);
  285. if (err) {
  286. kfree(context);
  287. return ERR_PTR(err);
  288. }
  289. context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev));
  290. if (IS_ERR(context->db_tab)) {
  291. err = PTR_ERR(context->db_tab);
  292. mthca_uar_free(to_mdev(ibdev), &context->uar);
  293. kfree(context);
  294. return ERR_PTR(err);
  295. }
  296. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  297. mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab);
  298. mthca_uar_free(to_mdev(ibdev), &context->uar);
  299. kfree(context);
  300. return ERR_PTR(-EFAULT);
  301. }
  302. return &context->ibucontext;
  303. }
  304. static int mthca_dealloc_ucontext(struct ib_ucontext *context)
  305. {
  306. mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar,
  307. to_mucontext(context)->db_tab);
  308. mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar);
  309. kfree(to_mucontext(context));
  310. return 0;
  311. }
  312. static int mthca_mmap_uar(struct ib_ucontext *context,
  313. struct vm_area_struct *vma)
  314. {
  315. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  316. return -EINVAL;
  317. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  318. if (io_remap_pfn_range(vma, vma->vm_start,
  319. to_mucontext(context)->uar.pfn,
  320. PAGE_SIZE, vma->vm_page_prot))
  321. return -EAGAIN;
  322. return 0;
  323. }
  324. static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev,
  325. struct ib_ucontext *context,
  326. struct ib_udata *udata)
  327. {
  328. struct mthca_pd *pd;
  329. int err;
  330. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  331. if (!pd)
  332. return ERR_PTR(-ENOMEM);
  333. err = mthca_pd_alloc(to_mdev(ibdev), !context, pd);
  334. if (err) {
  335. kfree(pd);
  336. return ERR_PTR(err);
  337. }
  338. if (context) {
  339. if (ib_copy_to_udata(udata, &pd->pd_num, sizeof (__u32))) {
  340. mthca_pd_free(to_mdev(ibdev), pd);
  341. kfree(pd);
  342. return ERR_PTR(-EFAULT);
  343. }
  344. }
  345. return &pd->ibpd;
  346. }
  347. static int mthca_dealloc_pd(struct ib_pd *pd)
  348. {
  349. mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
  350. kfree(pd);
  351. return 0;
  352. }
  353. static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
  354. struct ib_ah_attr *ah_attr)
  355. {
  356. int err;
  357. struct mthca_ah *ah;
  358. ah = kmalloc(sizeof *ah, GFP_ATOMIC);
  359. if (!ah)
  360. return ERR_PTR(-ENOMEM);
  361. err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
  362. if (err) {
  363. kfree(ah);
  364. return ERR_PTR(err);
  365. }
  366. return &ah->ibah;
  367. }
  368. static int mthca_ah_destroy(struct ib_ah *ah)
  369. {
  370. mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
  371. kfree(ah);
  372. return 0;
  373. }
  374. static struct ib_srq *mthca_create_srq(struct ib_pd *pd,
  375. struct ib_srq_init_attr *init_attr,
  376. struct ib_udata *udata)
  377. {
  378. struct mthca_create_srq ucmd;
  379. struct mthca_ucontext *context = NULL;
  380. struct mthca_srq *srq;
  381. int err;
  382. srq = kmalloc(sizeof *srq, GFP_KERNEL);
  383. if (!srq)
  384. return ERR_PTR(-ENOMEM);
  385. if (pd->uobject) {
  386. context = to_mucontext(pd->uobject->context);
  387. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  388. return ERR_PTR(-EFAULT);
  389. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  390. context->db_tab, ucmd.db_index,
  391. ucmd.db_page);
  392. if (err)
  393. goto err_free;
  394. srq->mr.ibmr.lkey = ucmd.lkey;
  395. srq->db_index = ucmd.db_index;
  396. }
  397. err = mthca_alloc_srq(to_mdev(pd->device), to_mpd(pd),
  398. &init_attr->attr, srq);
  399. if (err && pd->uobject)
  400. mthca_unmap_user_db(to_mdev(pd->device), &context->uar,
  401. context->db_tab, ucmd.db_index);
  402. if (err)
  403. goto err_free;
  404. if (context && ib_copy_to_udata(udata, &srq->srqn, sizeof (__u32))) {
  405. mthca_free_srq(to_mdev(pd->device), srq);
  406. err = -EFAULT;
  407. goto err_free;
  408. }
  409. return &srq->ibsrq;
  410. err_free:
  411. kfree(srq);
  412. return ERR_PTR(err);
  413. }
  414. static int mthca_destroy_srq(struct ib_srq *srq)
  415. {
  416. struct mthca_ucontext *context;
  417. if (srq->uobject) {
  418. context = to_mucontext(srq->uobject->context);
  419. mthca_unmap_user_db(to_mdev(srq->device), &context->uar,
  420. context->db_tab, to_msrq(srq)->db_index);
  421. }
  422. mthca_free_srq(to_mdev(srq->device), to_msrq(srq));
  423. kfree(srq);
  424. return 0;
  425. }
  426. static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
  427. struct ib_qp_init_attr *init_attr,
  428. struct ib_udata *udata)
  429. {
  430. struct mthca_create_qp ucmd;
  431. struct mthca_qp *qp;
  432. int err;
  433. switch (init_attr->qp_type) {
  434. case IB_QPT_RC:
  435. case IB_QPT_UC:
  436. case IB_QPT_UD:
  437. {
  438. struct mthca_ucontext *context;
  439. qp = kmalloc(sizeof *qp, GFP_KERNEL);
  440. if (!qp)
  441. return ERR_PTR(-ENOMEM);
  442. if (pd->uobject) {
  443. context = to_mucontext(pd->uobject->context);
  444. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  445. return ERR_PTR(-EFAULT);
  446. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  447. context->db_tab,
  448. ucmd.sq_db_index, ucmd.sq_db_page);
  449. if (err) {
  450. kfree(qp);
  451. return ERR_PTR(err);
  452. }
  453. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  454. context->db_tab,
  455. ucmd.rq_db_index, ucmd.rq_db_page);
  456. if (err) {
  457. mthca_unmap_user_db(to_mdev(pd->device),
  458. &context->uar,
  459. context->db_tab,
  460. ucmd.sq_db_index);
  461. kfree(qp);
  462. return ERR_PTR(err);
  463. }
  464. qp->mr.ibmr.lkey = ucmd.lkey;
  465. qp->sq.db_index = ucmd.sq_db_index;
  466. qp->rq.db_index = ucmd.rq_db_index;
  467. }
  468. err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
  469. to_mcq(init_attr->send_cq),
  470. to_mcq(init_attr->recv_cq),
  471. init_attr->qp_type, init_attr->sq_sig_type,
  472. &init_attr->cap, qp);
  473. if (err && pd->uobject) {
  474. context = to_mucontext(pd->uobject->context);
  475. mthca_unmap_user_db(to_mdev(pd->device),
  476. &context->uar,
  477. context->db_tab,
  478. ucmd.sq_db_index);
  479. mthca_unmap_user_db(to_mdev(pd->device),
  480. &context->uar,
  481. context->db_tab,
  482. ucmd.rq_db_index);
  483. }
  484. qp->ibqp.qp_num = qp->qpn;
  485. break;
  486. }
  487. case IB_QPT_SMI:
  488. case IB_QPT_GSI:
  489. {
  490. /* Don't allow userspace to create special QPs */
  491. if (pd->uobject)
  492. return ERR_PTR(-EINVAL);
  493. qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
  494. if (!qp)
  495. return ERR_PTR(-ENOMEM);
  496. qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
  497. err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
  498. to_mcq(init_attr->send_cq),
  499. to_mcq(init_attr->recv_cq),
  500. init_attr->sq_sig_type, &init_attr->cap,
  501. qp->ibqp.qp_num, init_attr->port_num,
  502. to_msqp(qp));
  503. break;
  504. }
  505. default:
  506. /* Don't support raw QPs */
  507. return ERR_PTR(-ENOSYS);
  508. }
  509. if (err) {
  510. kfree(qp);
  511. return ERR_PTR(err);
  512. }
  513. init_attr->cap.max_inline_data = 0;
  514. init_attr->cap.max_send_wr = qp->sq.max;
  515. init_attr->cap.max_recv_wr = qp->rq.max;
  516. init_attr->cap.max_send_sge = qp->sq.max_gs;
  517. init_attr->cap.max_recv_sge = qp->rq.max_gs;
  518. return &qp->ibqp;
  519. }
  520. static int mthca_destroy_qp(struct ib_qp *qp)
  521. {
  522. if (qp->uobject) {
  523. mthca_unmap_user_db(to_mdev(qp->device),
  524. &to_mucontext(qp->uobject->context)->uar,
  525. to_mucontext(qp->uobject->context)->db_tab,
  526. to_mqp(qp)->sq.db_index);
  527. mthca_unmap_user_db(to_mdev(qp->device),
  528. &to_mucontext(qp->uobject->context)->uar,
  529. to_mucontext(qp->uobject->context)->db_tab,
  530. to_mqp(qp)->rq.db_index);
  531. }
  532. mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
  533. kfree(qp);
  534. return 0;
  535. }
  536. static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
  537. struct ib_ucontext *context,
  538. struct ib_udata *udata)
  539. {
  540. struct mthca_create_cq ucmd;
  541. struct mthca_cq *cq;
  542. int nent;
  543. int err;
  544. if (entries < 1 || entries > to_mdev(ibdev)->limits.max_cqes)
  545. return ERR_PTR(-EINVAL);
  546. if (context) {
  547. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  548. return ERR_PTR(-EFAULT);
  549. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  550. to_mucontext(context)->db_tab,
  551. ucmd.set_db_index, ucmd.set_db_page);
  552. if (err)
  553. return ERR_PTR(err);
  554. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  555. to_mucontext(context)->db_tab,
  556. ucmd.arm_db_index, ucmd.arm_db_page);
  557. if (err)
  558. goto err_unmap_set;
  559. }
  560. cq = kmalloc(sizeof *cq, GFP_KERNEL);
  561. if (!cq) {
  562. err = -ENOMEM;
  563. goto err_unmap_arm;
  564. }
  565. if (context) {
  566. cq->mr.ibmr.lkey = ucmd.lkey;
  567. cq->set_ci_db_index = ucmd.set_db_index;
  568. cq->arm_db_index = ucmd.arm_db_index;
  569. }
  570. for (nent = 1; nent <= entries; nent <<= 1)
  571. ; /* nothing */
  572. err = mthca_init_cq(to_mdev(ibdev), nent,
  573. context ? to_mucontext(context) : NULL,
  574. context ? ucmd.pdn : to_mdev(ibdev)->driver_pd.pd_num,
  575. cq);
  576. if (err)
  577. goto err_free;
  578. if (context && ib_copy_to_udata(udata, &cq->cqn, sizeof (__u32))) {
  579. mthca_free_cq(to_mdev(ibdev), cq);
  580. goto err_free;
  581. }
  582. return &cq->ibcq;
  583. err_free:
  584. kfree(cq);
  585. err_unmap_arm:
  586. if (context)
  587. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  588. to_mucontext(context)->db_tab, ucmd.arm_db_index);
  589. err_unmap_set:
  590. if (context)
  591. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  592. to_mucontext(context)->db_tab, ucmd.set_db_index);
  593. return ERR_PTR(err);
  594. }
  595. static int mthca_destroy_cq(struct ib_cq *cq)
  596. {
  597. if (cq->uobject) {
  598. mthca_unmap_user_db(to_mdev(cq->device),
  599. &to_mucontext(cq->uobject->context)->uar,
  600. to_mucontext(cq->uobject->context)->db_tab,
  601. to_mcq(cq)->arm_db_index);
  602. mthca_unmap_user_db(to_mdev(cq->device),
  603. &to_mucontext(cq->uobject->context)->uar,
  604. to_mucontext(cq->uobject->context)->db_tab,
  605. to_mcq(cq)->set_ci_db_index);
  606. }
  607. mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
  608. kfree(cq);
  609. return 0;
  610. }
  611. static inline u32 convert_access(int acc)
  612. {
  613. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
  614. (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
  615. (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
  616. (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
  617. MTHCA_MPT_FLAG_LOCAL_READ;
  618. }
  619. static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
  620. {
  621. struct mthca_mr *mr;
  622. int err;
  623. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  624. if (!mr)
  625. return ERR_PTR(-ENOMEM);
  626. err = mthca_mr_alloc_notrans(to_mdev(pd->device),
  627. to_mpd(pd)->pd_num,
  628. convert_access(acc), mr);
  629. if (err) {
  630. kfree(mr);
  631. return ERR_PTR(err);
  632. }
  633. return &mr->ibmr;
  634. }
  635. static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
  636. struct ib_phys_buf *buffer_list,
  637. int num_phys_buf,
  638. int acc,
  639. u64 *iova_start)
  640. {
  641. struct mthca_mr *mr;
  642. u64 *page_list;
  643. u64 total_size;
  644. u64 mask;
  645. int shift;
  646. int npages;
  647. int err;
  648. int i, j, n;
  649. /* First check that we have enough alignment */
  650. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
  651. return ERR_PTR(-EINVAL);
  652. if (num_phys_buf > 1 &&
  653. ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK))
  654. return ERR_PTR(-EINVAL);
  655. mask = 0;
  656. total_size = 0;
  657. for (i = 0; i < num_phys_buf; ++i) {
  658. if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
  659. return ERR_PTR(-EINVAL);
  660. if (i != 0 && i != num_phys_buf - 1 &&
  661. (buffer_list[i].size & ~PAGE_MASK))
  662. return ERR_PTR(-EINVAL);
  663. total_size += buffer_list[i].size;
  664. if (i > 0)
  665. mask |= buffer_list[i].addr;
  666. }
  667. /* Find largest page shift we can use to cover buffers */
  668. for (shift = PAGE_SHIFT; shift < 31; ++shift)
  669. if (num_phys_buf > 1) {
  670. if ((1ULL << shift) & mask)
  671. break;
  672. } else {
  673. if (1ULL << shift >=
  674. buffer_list[0].size +
  675. (buffer_list[0].addr & ((1ULL << shift) - 1)))
  676. break;
  677. }
  678. buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
  679. buffer_list[0].addr &= ~0ull << shift;
  680. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  681. if (!mr)
  682. return ERR_PTR(-ENOMEM);
  683. npages = 0;
  684. for (i = 0; i < num_phys_buf; ++i)
  685. npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  686. if (!npages)
  687. return &mr->ibmr;
  688. page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
  689. if (!page_list) {
  690. kfree(mr);
  691. return ERR_PTR(-ENOMEM);
  692. }
  693. n = 0;
  694. for (i = 0; i < num_phys_buf; ++i)
  695. for (j = 0;
  696. j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  697. ++j)
  698. page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
  699. mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
  700. "in PD %x; shift %d, npages %d.\n",
  701. (unsigned long long) buffer_list[0].addr,
  702. (unsigned long long) *iova_start,
  703. to_mpd(pd)->pd_num,
  704. shift, npages);
  705. err = mthca_mr_alloc_phys(to_mdev(pd->device),
  706. to_mpd(pd)->pd_num,
  707. page_list, shift, npages,
  708. *iova_start, total_size,
  709. convert_access(acc), mr);
  710. if (err) {
  711. kfree(page_list);
  712. kfree(mr);
  713. return ERR_PTR(err);
  714. }
  715. kfree(page_list);
  716. return &mr->ibmr;
  717. }
  718. static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, struct ib_umem *region,
  719. int acc, struct ib_udata *udata)
  720. {
  721. struct mthca_dev *dev = to_mdev(pd->device);
  722. struct ib_umem_chunk *chunk;
  723. struct mthca_mr *mr;
  724. u64 *pages;
  725. int shift, n, len;
  726. int i, j, k;
  727. int err = 0;
  728. shift = ffs(region->page_size) - 1;
  729. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  730. if (!mr)
  731. return ERR_PTR(-ENOMEM);
  732. n = 0;
  733. list_for_each_entry(chunk, &region->chunk_list, list)
  734. n += chunk->nents;
  735. mr->mtt = mthca_alloc_mtt(dev, n);
  736. if (IS_ERR(mr->mtt)) {
  737. err = PTR_ERR(mr->mtt);
  738. goto err;
  739. }
  740. pages = (u64 *) __get_free_page(GFP_KERNEL);
  741. if (!pages) {
  742. err = -ENOMEM;
  743. goto err_mtt;
  744. }
  745. i = n = 0;
  746. list_for_each_entry(chunk, &region->chunk_list, list)
  747. for (j = 0; j < chunk->nmap; ++j) {
  748. len = sg_dma_len(&chunk->page_list[j]) >> shift;
  749. for (k = 0; k < len; ++k) {
  750. pages[i++] = sg_dma_address(&chunk->page_list[j]) +
  751. region->page_size * k;
  752. /*
  753. * Be friendly to WRITE_MTT command
  754. * and leave two empty slots for the
  755. * index and reserved fields of the
  756. * mailbox.
  757. */
  758. if (i == PAGE_SIZE / sizeof (u64) - 2) {
  759. err = mthca_write_mtt(dev, mr->mtt,
  760. n, pages, i);
  761. if (err)
  762. goto mtt_done;
  763. n += i;
  764. i = 0;
  765. }
  766. }
  767. }
  768. if (i)
  769. err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
  770. mtt_done:
  771. free_page((unsigned long) pages);
  772. if (err)
  773. goto err_mtt;
  774. err = mthca_mr_alloc(dev, to_mpd(pd)->pd_num, shift, region->virt_base,
  775. region->length, convert_access(acc), mr);
  776. if (err)
  777. goto err_mtt;
  778. return &mr->ibmr;
  779. err_mtt:
  780. mthca_free_mtt(dev, mr->mtt);
  781. err:
  782. kfree(mr);
  783. return ERR_PTR(err);
  784. }
  785. static int mthca_dereg_mr(struct ib_mr *mr)
  786. {
  787. struct mthca_mr *mmr = to_mmr(mr);
  788. mthca_free_mr(to_mdev(mr->device), mmr);
  789. kfree(mmr);
  790. return 0;
  791. }
  792. static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
  793. struct ib_fmr_attr *fmr_attr)
  794. {
  795. struct mthca_fmr *fmr;
  796. int err;
  797. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  798. if (!fmr)
  799. return ERR_PTR(-ENOMEM);
  800. memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
  801. err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
  802. convert_access(mr_access_flags), fmr);
  803. if (err) {
  804. kfree(fmr);
  805. return ERR_PTR(err);
  806. }
  807. return &fmr->ibmr;
  808. }
  809. static int mthca_dealloc_fmr(struct ib_fmr *fmr)
  810. {
  811. struct mthca_fmr *mfmr = to_mfmr(fmr);
  812. int err;
  813. err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
  814. if (err)
  815. return err;
  816. kfree(mfmr);
  817. return 0;
  818. }
  819. static int mthca_unmap_fmr(struct list_head *fmr_list)
  820. {
  821. struct ib_fmr *fmr;
  822. int err;
  823. u8 status;
  824. struct mthca_dev *mdev = NULL;
  825. list_for_each_entry(fmr, fmr_list, list) {
  826. if (mdev && to_mdev(fmr->device) != mdev)
  827. return -EINVAL;
  828. mdev = to_mdev(fmr->device);
  829. }
  830. if (!mdev)
  831. return 0;
  832. if (mthca_is_memfree(mdev)) {
  833. list_for_each_entry(fmr, fmr_list, list)
  834. mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
  835. wmb();
  836. } else
  837. list_for_each_entry(fmr, fmr_list, list)
  838. mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
  839. err = mthca_SYNC_TPT(mdev, &status);
  840. if (err)
  841. return err;
  842. if (status)
  843. return -EINVAL;
  844. return 0;
  845. }
  846. static ssize_t show_rev(struct class_device *cdev, char *buf)
  847. {
  848. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  849. return sprintf(buf, "%x\n", dev->rev_id);
  850. }
  851. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  852. {
  853. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  854. return sprintf(buf, "%x.%x.%x\n", (int) (dev->fw_ver >> 32),
  855. (int) (dev->fw_ver >> 16) & 0xffff,
  856. (int) dev->fw_ver & 0xffff);
  857. }
  858. static ssize_t show_hca(struct class_device *cdev, char *buf)
  859. {
  860. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  861. switch (dev->pdev->device) {
  862. case PCI_DEVICE_ID_MELLANOX_TAVOR:
  863. return sprintf(buf, "MT23108\n");
  864. case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
  865. return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
  866. case PCI_DEVICE_ID_MELLANOX_ARBEL:
  867. return sprintf(buf, "MT25208\n");
  868. case PCI_DEVICE_ID_MELLANOX_SINAI:
  869. case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
  870. return sprintf(buf, "MT25204\n");
  871. default:
  872. return sprintf(buf, "unknown\n");
  873. }
  874. }
  875. static ssize_t show_board(struct class_device *cdev, char *buf)
  876. {
  877. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  878. return sprintf(buf, "%.*s\n", MTHCA_BOARD_ID_LEN, dev->board_id);
  879. }
  880. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  881. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  882. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  883. static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  884. static struct class_device_attribute *mthca_class_attributes[] = {
  885. &class_device_attr_hw_rev,
  886. &class_device_attr_fw_ver,
  887. &class_device_attr_hca_type,
  888. &class_device_attr_board_id
  889. };
  890. int mthca_register_device(struct mthca_dev *dev)
  891. {
  892. int ret;
  893. int i;
  894. strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
  895. dev->ib_dev.owner = THIS_MODULE;
  896. dev->ib_dev.uverbs_abi_ver = MTHCA_UVERBS_ABI_VERSION;
  897. dev->ib_dev.node_type = IB_NODE_CA;
  898. dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
  899. dev->ib_dev.dma_device = &dev->pdev->dev;
  900. dev->ib_dev.class_dev.dev = &dev->pdev->dev;
  901. dev->ib_dev.query_device = mthca_query_device;
  902. dev->ib_dev.query_port = mthca_query_port;
  903. dev->ib_dev.modify_port = mthca_modify_port;
  904. dev->ib_dev.query_pkey = mthca_query_pkey;
  905. dev->ib_dev.query_gid = mthca_query_gid;
  906. dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext;
  907. dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext;
  908. dev->ib_dev.mmap = mthca_mmap_uar;
  909. dev->ib_dev.alloc_pd = mthca_alloc_pd;
  910. dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
  911. dev->ib_dev.create_ah = mthca_ah_create;
  912. dev->ib_dev.destroy_ah = mthca_ah_destroy;
  913. if (dev->mthca_flags & MTHCA_FLAG_SRQ) {
  914. dev->ib_dev.create_srq = mthca_create_srq;
  915. dev->ib_dev.modify_srq = mthca_modify_srq;
  916. dev->ib_dev.destroy_srq = mthca_destroy_srq;
  917. if (mthca_is_memfree(dev))
  918. dev->ib_dev.post_srq_recv = mthca_arbel_post_srq_recv;
  919. else
  920. dev->ib_dev.post_srq_recv = mthca_tavor_post_srq_recv;
  921. }
  922. dev->ib_dev.create_qp = mthca_create_qp;
  923. dev->ib_dev.modify_qp = mthca_modify_qp;
  924. dev->ib_dev.destroy_qp = mthca_destroy_qp;
  925. dev->ib_dev.create_cq = mthca_create_cq;
  926. dev->ib_dev.destroy_cq = mthca_destroy_cq;
  927. dev->ib_dev.poll_cq = mthca_poll_cq;
  928. dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
  929. dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
  930. dev->ib_dev.reg_user_mr = mthca_reg_user_mr;
  931. dev->ib_dev.dereg_mr = mthca_dereg_mr;
  932. if (dev->mthca_flags & MTHCA_FLAG_FMR) {
  933. dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
  934. dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
  935. dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
  936. if (mthca_is_memfree(dev))
  937. dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
  938. else
  939. dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
  940. }
  941. dev->ib_dev.attach_mcast = mthca_multicast_attach;
  942. dev->ib_dev.detach_mcast = mthca_multicast_detach;
  943. dev->ib_dev.process_mad = mthca_process_mad;
  944. if (mthca_is_memfree(dev)) {
  945. dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
  946. dev->ib_dev.post_send = mthca_arbel_post_send;
  947. dev->ib_dev.post_recv = mthca_arbel_post_receive;
  948. } else {
  949. dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
  950. dev->ib_dev.post_send = mthca_tavor_post_send;
  951. dev->ib_dev.post_recv = mthca_tavor_post_receive;
  952. }
  953. init_MUTEX(&dev->cap_mask_mutex);
  954. ret = ib_register_device(&dev->ib_dev);
  955. if (ret)
  956. return ret;
  957. for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
  958. ret = class_device_create_file(&dev->ib_dev.class_dev,
  959. mthca_class_attributes[i]);
  960. if (ret) {
  961. ib_unregister_device(&dev->ib_dev);
  962. return ret;
  963. }
  964. }
  965. return 0;
  966. }
  967. void mthca_unregister_device(struct mthca_dev *dev)
  968. {
  969. ib_unregister_device(&dev->ib_dev);
  970. }