atl1c_main.c 75 KB

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  1. /*
  2. * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
  3. *
  4. * Derived from Intel e1000 driver
  5. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the Free
  9. * Software Foundation; either version 2 of the License, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc., 59
  19. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20. */
  21. #include "atl1c.h"
  22. #define ATL1C_DRV_VERSION "1.0.1.0-NAPI"
  23. char atl1c_driver_name[] = "atl1c";
  24. char atl1c_driver_version[] = ATL1C_DRV_VERSION;
  25. /*
  26. * atl1c_pci_tbl - PCI Device ID Table
  27. *
  28. * Wildcard entries (PCI_ANY_ID) should come last
  29. * Last entry must be all 0s
  30. *
  31. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  32. * Class, Class Mask, private data (not used) }
  33. */
  34. static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
  35. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
  36. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
  37. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
  38. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
  39. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
  40. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
  41. /* required last entry */
  42. { 0 }
  43. };
  44. MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
  45. MODULE_AUTHOR("Jie Yang");
  46. MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
  47. MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver");
  48. MODULE_LICENSE("GPL");
  49. MODULE_VERSION(ATL1C_DRV_VERSION);
  50. static int atl1c_stop_mac(struct atl1c_hw *hw);
  51. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
  52. static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed);
  53. static void atl1c_start_mac(struct atl1c_adapter *adapter);
  54. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
  55. int *work_done, int work_to_do);
  56. static int atl1c_up(struct atl1c_adapter *adapter);
  57. static void atl1c_down(struct atl1c_adapter *adapter);
  58. static int atl1c_reset_mac(struct atl1c_hw *hw);
  59. static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter);
  60. static int atl1c_configure(struct atl1c_adapter *adapter);
  61. static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter);
  62. static const u16 atl1c_pay_load_size[] = {
  63. 128, 256, 512, 1024, 2048, 4096,
  64. };
  65. static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
  66. NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
  67. static void atl1c_pcie_patch(struct atl1c_hw *hw)
  68. {
  69. u32 mst_data, data;
  70. /* pclk sel could switch to 25M */
  71. AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data);
  72. mst_data &= ~MASTER_CTRL_CLK_SEL_DIS;
  73. AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
  74. /* WoL/PCIE related settings */
  75. if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) {
  76. AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
  77. data |= PCIE_PHYMISC_FORCE_RCV_DET;
  78. AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
  79. } else { /* new dev set bit5 of MASTER */
  80. if (!(mst_data & MASTER_CTRL_WAKEN_25M))
  81. AT_WRITE_REG(hw, REG_MASTER_CTRL,
  82. mst_data | MASTER_CTRL_WAKEN_25M);
  83. }
  84. /* aspm/PCIE setting only for l2cb 1.0 */
  85. if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
  86. AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
  87. data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW,
  88. L2CB1_PCIE_PHYMISC2_CDR_BW);
  89. data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH,
  90. L2CB1_PCIE_PHYMISC2_L0S_TH);
  91. AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
  92. /* extend L1 sync timer */
  93. AT_READ_REG(hw, REG_LINK_CTRL, &data);
  94. data |= LINK_CTRL_EXT_SYNC;
  95. AT_WRITE_REG(hw, REG_LINK_CTRL, data);
  96. }
  97. /* l2cb 1.x & l1d 1.x */
  98. if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) {
  99. AT_READ_REG(hw, REG_PM_CTRL, &data);
  100. data |= PM_CTRL_L0S_BUFSRX_EN;
  101. AT_WRITE_REG(hw, REG_PM_CTRL, data);
  102. /* clear vendor msg */
  103. AT_READ_REG(hw, REG_DMA_DBG, &data);
  104. AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG);
  105. }
  106. }
  107. /* FIXME: no need any more ? */
  108. /*
  109. * atl1c_init_pcie - init PCIE module
  110. */
  111. static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
  112. {
  113. u32 data;
  114. u32 pci_cmd;
  115. struct pci_dev *pdev = hw->adapter->pdev;
  116. int pos;
  117. AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
  118. pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
  119. pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
  120. PCI_COMMAND_IO);
  121. AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
  122. /*
  123. * Clear any PowerSaveing Settings
  124. */
  125. pci_enable_wake(pdev, PCI_D3hot, 0);
  126. pci_enable_wake(pdev, PCI_D3cold, 0);
  127. /* wol sts read-clear */
  128. AT_READ_REG(hw, REG_WOL_CTRL, &data);
  129. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  130. /*
  131. * Mask some pcie error bits
  132. */
  133. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
  134. pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data);
  135. data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP);
  136. pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data);
  137. /* clear error status */
  138. pci_write_config_word(pdev, pci_pcie_cap(pdev) + PCI_EXP_DEVSTA,
  139. PCI_EXP_DEVSTA_NFED |
  140. PCI_EXP_DEVSTA_FED |
  141. PCI_EXP_DEVSTA_CED |
  142. PCI_EXP_DEVSTA_URD);
  143. AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
  144. data &= ~LTSSM_ID_EN_WRO;
  145. AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
  146. atl1c_pcie_patch(hw);
  147. if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
  148. atl1c_disable_l0s_l1(hw);
  149. msleep(5);
  150. }
  151. /*
  152. * atl1c_irq_enable - Enable default interrupt generation settings
  153. * @adapter: board private structure
  154. */
  155. static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
  156. {
  157. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  158. AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
  159. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  160. AT_WRITE_FLUSH(&adapter->hw);
  161. }
  162. }
  163. /*
  164. * atl1c_irq_disable - Mask off interrupt generation on the NIC
  165. * @adapter: board private structure
  166. */
  167. static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
  168. {
  169. atomic_inc(&adapter->irq_sem);
  170. AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
  171. AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
  172. AT_WRITE_FLUSH(&adapter->hw);
  173. synchronize_irq(adapter->pdev->irq);
  174. }
  175. /*
  176. * atl1c_irq_reset - reset interrupt confiure on the NIC
  177. * @adapter: board private structure
  178. */
  179. static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
  180. {
  181. atomic_set(&adapter->irq_sem, 1);
  182. atl1c_irq_enable(adapter);
  183. }
  184. /*
  185. * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
  186. * of the idle status register until the device is actually idle
  187. */
  188. static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)
  189. {
  190. int timeout;
  191. u32 data;
  192. for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
  193. AT_READ_REG(hw, REG_IDLE_STATUS, &data);
  194. if ((data & modu_ctrl) == 0)
  195. return 0;
  196. msleep(1);
  197. }
  198. return data;
  199. }
  200. /*
  201. * atl1c_phy_config - Timer Call-back
  202. * @data: pointer to netdev cast into an unsigned long
  203. */
  204. static void atl1c_phy_config(unsigned long data)
  205. {
  206. struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
  207. struct atl1c_hw *hw = &adapter->hw;
  208. unsigned long flags;
  209. spin_lock_irqsave(&adapter->mdio_lock, flags);
  210. atl1c_restart_autoneg(hw);
  211. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  212. }
  213. void atl1c_reinit_locked(struct atl1c_adapter *adapter)
  214. {
  215. WARN_ON(in_interrupt());
  216. atl1c_down(adapter);
  217. atl1c_up(adapter);
  218. clear_bit(__AT_RESETTING, &adapter->flags);
  219. }
  220. static void atl1c_check_link_status(struct atl1c_adapter *adapter)
  221. {
  222. struct atl1c_hw *hw = &adapter->hw;
  223. struct net_device *netdev = adapter->netdev;
  224. struct pci_dev *pdev = adapter->pdev;
  225. int err;
  226. unsigned long flags;
  227. u16 speed, duplex, phy_data;
  228. spin_lock_irqsave(&adapter->mdio_lock, flags);
  229. /* MII_BMSR must read twise */
  230. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  231. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  232. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  233. if ((phy_data & BMSR_LSTATUS) == 0) {
  234. /* link down */
  235. netif_carrier_off(netdev);
  236. hw->hibernate = true;
  237. if (atl1c_reset_mac(hw) != 0)
  238. if (netif_msg_hw(adapter))
  239. dev_warn(&pdev->dev, "reset mac failed\n");
  240. atl1c_set_aspm(hw, SPEED_0);
  241. atl1c_post_phy_linkchg(hw, SPEED_0);
  242. atl1c_reset_dma_ring(adapter);
  243. atl1c_configure(adapter);
  244. } else {
  245. /* Link Up */
  246. hw->hibernate = false;
  247. spin_lock_irqsave(&adapter->mdio_lock, flags);
  248. err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
  249. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  250. if (unlikely(err))
  251. return;
  252. /* link result is our setting */
  253. if (adapter->link_speed != speed ||
  254. adapter->link_duplex != duplex) {
  255. adapter->link_speed = speed;
  256. adapter->link_duplex = duplex;
  257. atl1c_set_aspm(hw, speed);
  258. atl1c_post_phy_linkchg(hw, speed);
  259. atl1c_start_mac(adapter);
  260. if (netif_msg_link(adapter))
  261. dev_info(&pdev->dev,
  262. "%s: %s NIC Link is Up<%d Mbps %s>\n",
  263. atl1c_driver_name, netdev->name,
  264. adapter->link_speed,
  265. adapter->link_duplex == FULL_DUPLEX ?
  266. "Full Duplex" : "Half Duplex");
  267. }
  268. if (!netif_carrier_ok(netdev))
  269. netif_carrier_on(netdev);
  270. }
  271. }
  272. static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
  273. {
  274. struct net_device *netdev = adapter->netdev;
  275. struct pci_dev *pdev = adapter->pdev;
  276. u16 phy_data;
  277. u16 link_up;
  278. spin_lock(&adapter->mdio_lock);
  279. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  280. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  281. spin_unlock(&adapter->mdio_lock);
  282. link_up = phy_data & BMSR_LSTATUS;
  283. /* notify upper layer link down ASAP */
  284. if (!link_up) {
  285. if (netif_carrier_ok(netdev)) {
  286. /* old link state: Up */
  287. netif_carrier_off(netdev);
  288. if (netif_msg_link(adapter))
  289. dev_info(&pdev->dev,
  290. "%s: %s NIC Link is Down\n",
  291. atl1c_driver_name, netdev->name);
  292. adapter->link_speed = SPEED_0;
  293. }
  294. }
  295. set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
  296. schedule_work(&adapter->common_task);
  297. }
  298. static void atl1c_common_task(struct work_struct *work)
  299. {
  300. struct atl1c_adapter *adapter;
  301. struct net_device *netdev;
  302. adapter = container_of(work, struct atl1c_adapter, common_task);
  303. netdev = adapter->netdev;
  304. if (test_bit(__AT_DOWN, &adapter->flags))
  305. return;
  306. if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
  307. netif_device_detach(netdev);
  308. atl1c_down(adapter);
  309. atl1c_up(adapter);
  310. netif_device_attach(netdev);
  311. }
  312. if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
  313. &adapter->work_event)) {
  314. atl1c_irq_disable(adapter);
  315. atl1c_check_link_status(adapter);
  316. atl1c_irq_enable(adapter);
  317. }
  318. }
  319. static void atl1c_del_timer(struct atl1c_adapter *adapter)
  320. {
  321. del_timer_sync(&adapter->phy_config_timer);
  322. }
  323. /*
  324. * atl1c_tx_timeout - Respond to a Tx Hang
  325. * @netdev: network interface device structure
  326. */
  327. static void atl1c_tx_timeout(struct net_device *netdev)
  328. {
  329. struct atl1c_adapter *adapter = netdev_priv(netdev);
  330. /* Do the reset outside of interrupt context */
  331. set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
  332. schedule_work(&adapter->common_task);
  333. }
  334. /*
  335. * atl1c_set_multi - Multicast and Promiscuous mode set
  336. * @netdev: network interface device structure
  337. *
  338. * The set_multi entry point is called whenever the multicast address
  339. * list or the network interface flags are updated. This routine is
  340. * responsible for configuring the hardware for proper multicast,
  341. * promiscuous mode, and all-multi behavior.
  342. */
  343. static void atl1c_set_multi(struct net_device *netdev)
  344. {
  345. struct atl1c_adapter *adapter = netdev_priv(netdev);
  346. struct atl1c_hw *hw = &adapter->hw;
  347. struct netdev_hw_addr *ha;
  348. u32 mac_ctrl_data;
  349. u32 hash_value;
  350. /* Check for Promiscuous and All Multicast modes */
  351. AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
  352. if (netdev->flags & IFF_PROMISC) {
  353. mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
  354. } else if (netdev->flags & IFF_ALLMULTI) {
  355. mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
  356. mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
  357. } else {
  358. mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
  359. }
  360. AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
  361. /* clear the old settings from the multicast hash table */
  362. AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
  363. AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
  364. /* comoute mc addresses' hash value ,and put it into hash table */
  365. netdev_for_each_mc_addr(ha, netdev) {
  366. hash_value = atl1c_hash_mc_addr(hw, ha->addr);
  367. atl1c_hash_set(hw, hash_value);
  368. }
  369. }
  370. static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
  371. {
  372. if (features & NETIF_F_HW_VLAN_RX) {
  373. /* enable VLAN tag insert/strip */
  374. *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
  375. } else {
  376. /* disable VLAN tag insert/strip */
  377. *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
  378. }
  379. }
  380. static void atl1c_vlan_mode(struct net_device *netdev,
  381. netdev_features_t features)
  382. {
  383. struct atl1c_adapter *adapter = netdev_priv(netdev);
  384. struct pci_dev *pdev = adapter->pdev;
  385. u32 mac_ctrl_data = 0;
  386. if (netif_msg_pktdata(adapter))
  387. dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
  388. atl1c_irq_disable(adapter);
  389. AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
  390. __atl1c_vlan_mode(features, &mac_ctrl_data);
  391. AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
  392. atl1c_irq_enable(adapter);
  393. }
  394. static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
  395. {
  396. struct pci_dev *pdev = adapter->pdev;
  397. if (netif_msg_pktdata(adapter))
  398. dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
  399. atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
  400. }
  401. /*
  402. * atl1c_set_mac - Change the Ethernet Address of the NIC
  403. * @netdev: network interface device structure
  404. * @p: pointer to an address structure
  405. *
  406. * Returns 0 on success, negative on failure
  407. */
  408. static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
  409. {
  410. struct atl1c_adapter *adapter = netdev_priv(netdev);
  411. struct sockaddr *addr = p;
  412. if (!is_valid_ether_addr(addr->sa_data))
  413. return -EADDRNOTAVAIL;
  414. if (netif_running(netdev))
  415. return -EBUSY;
  416. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  417. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  418. netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
  419. atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
  420. return 0;
  421. }
  422. static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
  423. struct net_device *dev)
  424. {
  425. int mtu = dev->mtu;
  426. adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
  427. roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
  428. }
  429. static netdev_features_t atl1c_fix_features(struct net_device *netdev,
  430. netdev_features_t features)
  431. {
  432. /*
  433. * Since there is no support for separate rx/tx vlan accel
  434. * enable/disable make sure tx flag is always in same state as rx.
  435. */
  436. if (features & NETIF_F_HW_VLAN_RX)
  437. features |= NETIF_F_HW_VLAN_TX;
  438. else
  439. features &= ~NETIF_F_HW_VLAN_TX;
  440. if (netdev->mtu > MAX_TSO_FRAME_SIZE)
  441. features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
  442. return features;
  443. }
  444. static int atl1c_set_features(struct net_device *netdev,
  445. netdev_features_t features)
  446. {
  447. netdev_features_t changed = netdev->features ^ features;
  448. if (changed & NETIF_F_HW_VLAN_RX)
  449. atl1c_vlan_mode(netdev, features);
  450. return 0;
  451. }
  452. /*
  453. * atl1c_change_mtu - Change the Maximum Transfer Unit
  454. * @netdev: network interface device structure
  455. * @new_mtu: new value for maximum frame size
  456. *
  457. * Returns 0 on success, negative on failure
  458. */
  459. static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
  460. {
  461. struct atl1c_adapter *adapter = netdev_priv(netdev);
  462. struct atl1c_hw *hw = &adapter->hw;
  463. int old_mtu = netdev->mtu;
  464. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
  465. /* Fast Ethernet controller doesn't support jumbo packet */
  466. if (((hw->nic_type == athr_l2c ||
  467. hw->nic_type == athr_l2c_b ||
  468. hw->nic_type == athr_l2c_b2) && new_mtu > ETH_DATA_LEN) ||
  469. max_frame < ETH_ZLEN + ETH_FCS_LEN ||
  470. max_frame > MAX_JUMBO_FRAME_SIZE) {
  471. if (netif_msg_link(adapter))
  472. dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
  473. return -EINVAL;
  474. }
  475. /* set MTU */
  476. if (old_mtu != new_mtu && netif_running(netdev)) {
  477. while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
  478. msleep(1);
  479. netdev->mtu = new_mtu;
  480. adapter->hw.max_frame_size = new_mtu;
  481. atl1c_set_rxbufsize(adapter, netdev);
  482. atl1c_down(adapter);
  483. netdev_update_features(netdev);
  484. atl1c_up(adapter);
  485. clear_bit(__AT_RESETTING, &adapter->flags);
  486. }
  487. return 0;
  488. }
  489. /*
  490. * caller should hold mdio_lock
  491. */
  492. static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
  493. {
  494. struct atl1c_adapter *adapter = netdev_priv(netdev);
  495. u16 result;
  496. atl1c_read_phy_reg(&adapter->hw, reg_num, &result);
  497. return result;
  498. }
  499. static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
  500. int reg_num, int val)
  501. {
  502. struct atl1c_adapter *adapter = netdev_priv(netdev);
  503. atl1c_write_phy_reg(&adapter->hw, reg_num, val);
  504. }
  505. /*
  506. * atl1c_mii_ioctl -
  507. * @netdev:
  508. * @ifreq:
  509. * @cmd:
  510. */
  511. static int atl1c_mii_ioctl(struct net_device *netdev,
  512. struct ifreq *ifr, int cmd)
  513. {
  514. struct atl1c_adapter *adapter = netdev_priv(netdev);
  515. struct pci_dev *pdev = adapter->pdev;
  516. struct mii_ioctl_data *data = if_mii(ifr);
  517. unsigned long flags;
  518. int retval = 0;
  519. if (!netif_running(netdev))
  520. return -EINVAL;
  521. spin_lock_irqsave(&adapter->mdio_lock, flags);
  522. switch (cmd) {
  523. case SIOCGMIIPHY:
  524. data->phy_id = 0;
  525. break;
  526. case SIOCGMIIREG:
  527. if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  528. &data->val_out)) {
  529. retval = -EIO;
  530. goto out;
  531. }
  532. break;
  533. case SIOCSMIIREG:
  534. if (data->reg_num & ~(0x1F)) {
  535. retval = -EFAULT;
  536. goto out;
  537. }
  538. dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
  539. data->reg_num, data->val_in);
  540. if (atl1c_write_phy_reg(&adapter->hw,
  541. data->reg_num, data->val_in)) {
  542. retval = -EIO;
  543. goto out;
  544. }
  545. break;
  546. default:
  547. retval = -EOPNOTSUPP;
  548. break;
  549. }
  550. out:
  551. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  552. return retval;
  553. }
  554. /*
  555. * atl1c_ioctl -
  556. * @netdev:
  557. * @ifreq:
  558. * @cmd:
  559. */
  560. static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  561. {
  562. switch (cmd) {
  563. case SIOCGMIIPHY:
  564. case SIOCGMIIREG:
  565. case SIOCSMIIREG:
  566. return atl1c_mii_ioctl(netdev, ifr, cmd);
  567. default:
  568. return -EOPNOTSUPP;
  569. }
  570. }
  571. /*
  572. * atl1c_alloc_queues - Allocate memory for all rings
  573. * @adapter: board private structure to initialize
  574. *
  575. */
  576. static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
  577. {
  578. return 0;
  579. }
  580. static void atl1c_set_mac_type(struct atl1c_hw *hw)
  581. {
  582. switch (hw->device_id) {
  583. case PCI_DEVICE_ID_ATTANSIC_L2C:
  584. hw->nic_type = athr_l2c;
  585. break;
  586. case PCI_DEVICE_ID_ATTANSIC_L1C:
  587. hw->nic_type = athr_l1c;
  588. break;
  589. case PCI_DEVICE_ID_ATHEROS_L2C_B:
  590. hw->nic_type = athr_l2c_b;
  591. break;
  592. case PCI_DEVICE_ID_ATHEROS_L2C_B2:
  593. hw->nic_type = athr_l2c_b2;
  594. break;
  595. case PCI_DEVICE_ID_ATHEROS_L1D:
  596. hw->nic_type = athr_l1d;
  597. break;
  598. case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
  599. hw->nic_type = athr_l1d_2;
  600. break;
  601. default:
  602. break;
  603. }
  604. }
  605. static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
  606. {
  607. u32 link_ctrl_data;
  608. atl1c_set_mac_type(hw);
  609. AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
  610. hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
  611. ATL1C_TXQ_MODE_ENHANCE;
  612. hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT |
  613. ATL1C_ASPM_L1_SUPPORT;
  614. hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
  615. if (hw->nic_type == athr_l1c ||
  616. hw->nic_type == athr_l1d ||
  617. hw->nic_type == athr_l1d_2)
  618. hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
  619. return 0;
  620. }
  621. struct atl1c_platform_patch {
  622. u16 pci_did;
  623. u8 pci_revid;
  624. u16 subsystem_vid;
  625. u16 subsystem_did;
  626. u32 patch_flag;
  627. #define ATL1C_LINK_PATCH 0x1
  628. };
  629. static const struct atl1c_platform_patch plats[] __devinitdata = {
  630. {0x2060, 0xC1, 0x1019, 0x8152, 0x1},
  631. {0x2060, 0xC1, 0x1019, 0x2060, 0x1},
  632. {0x2060, 0xC1, 0x1019, 0xE000, 0x1},
  633. {0x2062, 0xC0, 0x1019, 0x8152, 0x1},
  634. {0x2062, 0xC0, 0x1019, 0x2062, 0x1},
  635. {0x2062, 0xC0, 0x1458, 0xE000, 0x1},
  636. {0x2062, 0xC1, 0x1019, 0x8152, 0x1},
  637. {0x2062, 0xC1, 0x1019, 0x2062, 0x1},
  638. {0x2062, 0xC1, 0x1458, 0xE000, 0x1},
  639. {0x2062, 0xC1, 0x1565, 0x2802, 0x1},
  640. {0x2062, 0xC1, 0x1565, 0x2801, 0x1},
  641. {0x1073, 0xC0, 0x1019, 0x8151, 0x1},
  642. {0x1073, 0xC0, 0x1019, 0x1073, 0x1},
  643. {0x1073, 0xC0, 0x1458, 0xE000, 0x1},
  644. {0x1083, 0xC0, 0x1458, 0xE000, 0x1},
  645. {0x1083, 0xC0, 0x1019, 0x8151, 0x1},
  646. {0x1083, 0xC0, 0x1019, 0x1083, 0x1},
  647. {0x1083, 0xC0, 0x1462, 0x7680, 0x1},
  648. {0x1083, 0xC0, 0x1565, 0x2803, 0x1},
  649. {0},
  650. };
  651. static void __devinit atl1c_patch_assign(struct atl1c_hw *hw)
  652. {
  653. int i = 0;
  654. hw->msi_lnkpatch = false;
  655. while (plats[i].pci_did != 0) {
  656. if (plats[i].pci_did == hw->device_id &&
  657. plats[i].pci_revid == hw->revision_id &&
  658. plats[i].subsystem_vid == hw->subsystem_vendor_id &&
  659. plats[i].subsystem_did == hw->subsystem_id) {
  660. if (plats[i].patch_flag & ATL1C_LINK_PATCH)
  661. hw->msi_lnkpatch = true;
  662. }
  663. i++;
  664. }
  665. }
  666. /*
  667. * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
  668. * @adapter: board private structure to initialize
  669. *
  670. * atl1c_sw_init initializes the Adapter private data structure.
  671. * Fields are initialized based on PCI device information and
  672. * OS network device settings (MTU size).
  673. */
  674. static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
  675. {
  676. struct atl1c_hw *hw = &adapter->hw;
  677. struct pci_dev *pdev = adapter->pdev;
  678. u32 revision;
  679. adapter->wol = 0;
  680. device_set_wakeup_enable(&pdev->dev, false);
  681. adapter->link_speed = SPEED_0;
  682. adapter->link_duplex = FULL_DUPLEX;
  683. adapter->tpd_ring[0].count = 1024;
  684. adapter->rfd_ring.count = 512;
  685. hw->vendor_id = pdev->vendor;
  686. hw->device_id = pdev->device;
  687. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  688. hw->subsystem_id = pdev->subsystem_device;
  689. AT_READ_REG(hw, PCI_CLASS_REVISION, &revision);
  690. hw->revision_id = revision & 0xFF;
  691. /* before link up, we assume hibernate is true */
  692. hw->hibernate = true;
  693. hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
  694. if (atl1c_setup_mac_funcs(hw) != 0) {
  695. dev_err(&pdev->dev, "set mac function pointers failed\n");
  696. return -1;
  697. }
  698. atl1c_patch_assign(hw);
  699. hw->intr_mask = IMR_NORMAL_MASK;
  700. hw->phy_configured = false;
  701. hw->preamble_len = 7;
  702. hw->max_frame_size = adapter->netdev->mtu;
  703. hw->autoneg_advertised = ADVERTISED_Autoneg;
  704. hw->indirect_tab = 0xE4E4E4E4;
  705. hw->base_cpu = 0;
  706. hw->ict = 50000; /* 100ms */
  707. hw->smb_timer = 200000; /* 400ms */
  708. hw->rx_imt = 200;
  709. hw->tx_imt = 1000;
  710. hw->tpd_burst = 5;
  711. hw->rfd_burst = 8;
  712. hw->dma_order = atl1c_dma_ord_out;
  713. hw->dmar_block = atl1c_dma_req_1024;
  714. if (atl1c_alloc_queues(adapter)) {
  715. dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
  716. return -ENOMEM;
  717. }
  718. /* TODO */
  719. atl1c_set_rxbufsize(adapter, adapter->netdev);
  720. atomic_set(&adapter->irq_sem, 1);
  721. spin_lock_init(&adapter->mdio_lock);
  722. spin_lock_init(&adapter->tx_lock);
  723. set_bit(__AT_DOWN, &adapter->flags);
  724. return 0;
  725. }
  726. static inline void atl1c_clean_buffer(struct pci_dev *pdev,
  727. struct atl1c_buffer *buffer_info, int in_irq)
  728. {
  729. u16 pci_driection;
  730. if (buffer_info->flags & ATL1C_BUFFER_FREE)
  731. return;
  732. if (buffer_info->dma) {
  733. if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
  734. pci_driection = PCI_DMA_FROMDEVICE;
  735. else
  736. pci_driection = PCI_DMA_TODEVICE;
  737. if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
  738. pci_unmap_single(pdev, buffer_info->dma,
  739. buffer_info->length, pci_driection);
  740. else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
  741. pci_unmap_page(pdev, buffer_info->dma,
  742. buffer_info->length, pci_driection);
  743. }
  744. if (buffer_info->skb) {
  745. if (in_irq)
  746. dev_kfree_skb_irq(buffer_info->skb);
  747. else
  748. dev_kfree_skb(buffer_info->skb);
  749. }
  750. buffer_info->dma = 0;
  751. buffer_info->skb = NULL;
  752. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
  753. }
  754. /*
  755. * atl1c_clean_tx_ring - Free Tx-skb
  756. * @adapter: board private structure
  757. */
  758. static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
  759. enum atl1c_trans_queue type)
  760. {
  761. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  762. struct atl1c_buffer *buffer_info;
  763. struct pci_dev *pdev = adapter->pdev;
  764. u16 index, ring_count;
  765. ring_count = tpd_ring->count;
  766. for (index = 0; index < ring_count; index++) {
  767. buffer_info = &tpd_ring->buffer_info[index];
  768. atl1c_clean_buffer(pdev, buffer_info, 0);
  769. }
  770. /* Zero out Tx-buffers */
  771. memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
  772. ring_count);
  773. atomic_set(&tpd_ring->next_to_clean, 0);
  774. tpd_ring->next_to_use = 0;
  775. }
  776. /*
  777. * atl1c_clean_rx_ring - Free rx-reservation skbs
  778. * @adapter: board private structure
  779. */
  780. static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
  781. {
  782. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  783. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  784. struct atl1c_buffer *buffer_info;
  785. struct pci_dev *pdev = adapter->pdev;
  786. int j;
  787. for (j = 0; j < rfd_ring->count; j++) {
  788. buffer_info = &rfd_ring->buffer_info[j];
  789. atl1c_clean_buffer(pdev, buffer_info, 0);
  790. }
  791. /* zero out the descriptor ring */
  792. memset(rfd_ring->desc, 0, rfd_ring->size);
  793. rfd_ring->next_to_clean = 0;
  794. rfd_ring->next_to_use = 0;
  795. rrd_ring->next_to_use = 0;
  796. rrd_ring->next_to_clean = 0;
  797. }
  798. /*
  799. * Read / Write Ptr Initialize:
  800. */
  801. static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
  802. {
  803. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  804. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  805. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  806. struct atl1c_buffer *buffer_info;
  807. int i, j;
  808. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  809. tpd_ring[i].next_to_use = 0;
  810. atomic_set(&tpd_ring[i].next_to_clean, 0);
  811. buffer_info = tpd_ring[i].buffer_info;
  812. for (j = 0; j < tpd_ring->count; j++)
  813. ATL1C_SET_BUFFER_STATE(&buffer_info[i],
  814. ATL1C_BUFFER_FREE);
  815. }
  816. rfd_ring->next_to_use = 0;
  817. rfd_ring->next_to_clean = 0;
  818. rrd_ring->next_to_use = 0;
  819. rrd_ring->next_to_clean = 0;
  820. for (j = 0; j < rfd_ring->count; j++) {
  821. buffer_info = &rfd_ring->buffer_info[j];
  822. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
  823. }
  824. }
  825. /*
  826. * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
  827. * @adapter: board private structure
  828. *
  829. * Free all transmit software resources
  830. */
  831. static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
  832. {
  833. struct pci_dev *pdev = adapter->pdev;
  834. pci_free_consistent(pdev, adapter->ring_header.size,
  835. adapter->ring_header.desc,
  836. adapter->ring_header.dma);
  837. adapter->ring_header.desc = NULL;
  838. /* Note: just free tdp_ring.buffer_info,
  839. * it contain rfd_ring.buffer_info, do not double free */
  840. if (adapter->tpd_ring[0].buffer_info) {
  841. kfree(adapter->tpd_ring[0].buffer_info);
  842. adapter->tpd_ring[0].buffer_info = NULL;
  843. }
  844. }
  845. /*
  846. * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
  847. * @adapter: board private structure
  848. *
  849. * Return 0 on success, negative on failure
  850. */
  851. static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
  852. {
  853. struct pci_dev *pdev = adapter->pdev;
  854. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  855. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  856. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  857. struct atl1c_ring_header *ring_header = &adapter->ring_header;
  858. int size;
  859. int i;
  860. int count = 0;
  861. int rx_desc_count = 0;
  862. u32 offset = 0;
  863. rrd_ring->count = rfd_ring->count;
  864. for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
  865. tpd_ring[i].count = tpd_ring[0].count;
  866. /* 2 tpd queue, one high priority queue,
  867. * another normal priority queue */
  868. size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
  869. rfd_ring->count);
  870. tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
  871. if (unlikely(!tpd_ring->buffer_info)) {
  872. dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
  873. size);
  874. goto err_nomem;
  875. }
  876. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  877. tpd_ring[i].buffer_info =
  878. (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
  879. count += tpd_ring[i].count;
  880. }
  881. rfd_ring->buffer_info =
  882. (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
  883. count += rfd_ring->count;
  884. rx_desc_count += rfd_ring->count;
  885. /*
  886. * real ring DMA buffer
  887. * each ring/block may need up to 8 bytes for alignment, hence the
  888. * additional bytes tacked onto the end.
  889. */
  890. ring_header->size = size =
  891. sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
  892. sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
  893. sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
  894. 8 * 4;
  895. ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
  896. &ring_header->dma);
  897. if (unlikely(!ring_header->desc)) {
  898. dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
  899. goto err_nomem;
  900. }
  901. memset(ring_header->desc, 0, ring_header->size);
  902. /* init TPD ring */
  903. tpd_ring[0].dma = roundup(ring_header->dma, 8);
  904. offset = tpd_ring[0].dma - ring_header->dma;
  905. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  906. tpd_ring[i].dma = ring_header->dma + offset;
  907. tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
  908. tpd_ring[i].size =
  909. sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
  910. offset += roundup(tpd_ring[i].size, 8);
  911. }
  912. /* init RFD ring */
  913. rfd_ring->dma = ring_header->dma + offset;
  914. rfd_ring->desc = (u8 *) ring_header->desc + offset;
  915. rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count;
  916. offset += roundup(rfd_ring->size, 8);
  917. /* init RRD ring */
  918. rrd_ring->dma = ring_header->dma + offset;
  919. rrd_ring->desc = (u8 *) ring_header->desc + offset;
  920. rrd_ring->size = sizeof(struct atl1c_recv_ret_status) *
  921. rrd_ring->count;
  922. offset += roundup(rrd_ring->size, 8);
  923. return 0;
  924. err_nomem:
  925. kfree(tpd_ring->buffer_info);
  926. return -ENOMEM;
  927. }
  928. static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
  929. {
  930. struct atl1c_hw *hw = &adapter->hw;
  931. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  932. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  933. struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
  934. adapter->tpd_ring;
  935. /* TPD */
  936. AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
  937. (u32)((tpd_ring[atl1c_trans_normal].dma &
  938. AT_DMA_HI_ADDR_MASK) >> 32));
  939. /* just enable normal priority TX queue */
  940. AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO,
  941. (u32)(tpd_ring[atl1c_trans_normal].dma &
  942. AT_DMA_LO_ADDR_MASK));
  943. AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO,
  944. (u32)(tpd_ring[atl1c_trans_high].dma &
  945. AT_DMA_LO_ADDR_MASK));
  946. AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
  947. (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
  948. /* RFD */
  949. AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
  950. (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
  951. AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,
  952. (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK));
  953. AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
  954. rfd_ring->count & RFD_RING_SIZE_MASK);
  955. AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
  956. adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
  957. /* RRD */
  958. AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,
  959. (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK));
  960. AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
  961. (rrd_ring->count & RRD_RING_SIZE_MASK));
  962. if (hw->nic_type == athr_l2c_b) {
  963. AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
  964. AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
  965. AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
  966. AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
  967. AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
  968. AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
  969. AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
  970. AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
  971. }
  972. /* Load all of base address above */
  973. AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
  974. }
  975. static void atl1c_configure_tx(struct atl1c_adapter *adapter)
  976. {
  977. struct atl1c_hw *hw = &adapter->hw;
  978. int max_pay_load;
  979. u16 tx_offload_thresh;
  980. u32 txq_ctrl_data;
  981. tx_offload_thresh = MAX_TSO_FRAME_SIZE;
  982. AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
  983. (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
  984. max_pay_load = pcie_get_readrq(adapter->pdev) >> 8;
  985. hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
  986. /*
  987. * if BIOS had changed the dam-read-max-length to an invalid value,
  988. * restore it to default value
  989. */
  990. if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) {
  991. pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN);
  992. hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN;
  993. }
  994. txq_ctrl_data =
  995. hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ?
  996. L2CB_TXQ_CFGV : L1C_TXQ_CFGV;
  997. AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
  998. }
  999. static void atl1c_configure_rx(struct atl1c_adapter *adapter)
  1000. {
  1001. struct atl1c_hw *hw = &adapter->hw;
  1002. u32 rxq_ctrl_data;
  1003. rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
  1004. RXQ_RFD_BURST_NUM_SHIFT;
  1005. if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
  1006. rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
  1007. /* aspm for gigabit */
  1008. if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0)
  1009. rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT,
  1010. ASPM_THRUPUT_LIMIT_100M);
  1011. AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
  1012. }
  1013. static void atl1c_configure_dma(struct atl1c_adapter *adapter)
  1014. {
  1015. struct atl1c_hw *hw = &adapter->hw;
  1016. u32 dma_ctrl_data;
  1017. dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |
  1018. DMA_CTRL_RREQ_PRI_DATA |
  1019. FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) |
  1020. FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |
  1021. FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);
  1022. AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
  1023. }
  1024. /*
  1025. * Stop the mac, transmit and receive units
  1026. * hw - Struct containing variables accessed by shared code
  1027. * return : 0 or idle status (if error)
  1028. */
  1029. static int atl1c_stop_mac(struct atl1c_hw *hw)
  1030. {
  1031. u32 data;
  1032. AT_READ_REG(hw, REG_RXQ_CTRL, &data);
  1033. data &= ~RXQ_CTRL_EN;
  1034. AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
  1035. AT_READ_REG(hw, REG_TXQ_CTRL, &data);
  1036. data &= ~TXQ_CTRL_EN;
  1037. AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
  1038. atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY);
  1039. AT_READ_REG(hw, REG_MAC_CTRL, &data);
  1040. data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
  1041. AT_WRITE_REG(hw, REG_MAC_CTRL, data);
  1042. return (int)atl1c_wait_until_idle(hw,
  1043. IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY);
  1044. }
  1045. static void atl1c_start_mac(struct atl1c_adapter *adapter)
  1046. {
  1047. struct atl1c_hw *hw = &adapter->hw;
  1048. u32 mac, txq, rxq;
  1049. hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false;
  1050. hw->mac_speed = adapter->link_speed == SPEED_1000 ?
  1051. atl1c_mac_speed_1000 : atl1c_mac_speed_10_100;
  1052. AT_READ_REG(hw, REG_TXQ_CTRL, &txq);
  1053. AT_READ_REG(hw, REG_RXQ_CTRL, &rxq);
  1054. AT_READ_REG(hw, REG_MAC_CTRL, &mac);
  1055. txq |= TXQ_CTRL_EN;
  1056. rxq |= RXQ_CTRL_EN;
  1057. mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW |
  1058. MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW |
  1059. MAC_CTRL_ADD_CRC | MAC_CTRL_PAD |
  1060. MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN |
  1061. MAC_CTRL_HASH_ALG_CRC32;
  1062. if (hw->mac_duplex)
  1063. mac |= MAC_CTRL_DUPLX;
  1064. else
  1065. mac &= ~MAC_CTRL_DUPLX;
  1066. mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed);
  1067. mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len);
  1068. AT_WRITE_REG(hw, REG_TXQ_CTRL, txq);
  1069. AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq);
  1070. AT_WRITE_REG(hw, REG_MAC_CTRL, mac);
  1071. }
  1072. /*
  1073. * Reset the transmit and receive units; mask and clear all interrupts.
  1074. * hw - Struct containing variables accessed by shared code
  1075. * return : 0 or idle status (if error)
  1076. */
  1077. static int atl1c_reset_mac(struct atl1c_hw *hw)
  1078. {
  1079. struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
  1080. struct pci_dev *pdev = adapter->pdev;
  1081. u32 ctrl_data = 0;
  1082. atl1c_stop_mac(hw);
  1083. /*
  1084. * Issue Soft Reset to the MAC. This will reset the chip's
  1085. * transmit, receive, DMA. It will not effect
  1086. * the current PCI configuration. The global reset bit is self-
  1087. * clearing, and should clear within a microsecond.
  1088. */
  1089. AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data);
  1090. ctrl_data |= MASTER_CTRL_OOB_DIS;
  1091. AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST);
  1092. AT_WRITE_FLUSH(hw);
  1093. msleep(10);
  1094. /* Wait at least 10ms for All module to be Idle */
  1095. if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) {
  1096. dev_err(&pdev->dev,
  1097. "MAC state machine can't be idle since"
  1098. " disabled for 10ms second\n");
  1099. return -1;
  1100. }
  1101. AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data);
  1102. /* driver control speed/duplex */
  1103. AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data);
  1104. AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW);
  1105. /* clk switch setting */
  1106. AT_READ_REG(hw, REG_SERDES, &ctrl_data);
  1107. switch (hw->nic_type) {
  1108. case athr_l2c_b:
  1109. ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN |
  1110. SERDES_MAC_CLK_SLOWDOWN);
  1111. AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
  1112. break;
  1113. case athr_l2c_b2:
  1114. case athr_l1d_2:
  1115. ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN;
  1116. AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
  1117. break;
  1118. default:
  1119. break;
  1120. }
  1121. return 0;
  1122. }
  1123. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
  1124. {
  1125. u16 ctrl_flags = hw->ctrl_flags;
  1126. hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT);
  1127. atl1c_set_aspm(hw, SPEED_0);
  1128. hw->ctrl_flags = ctrl_flags;
  1129. }
  1130. /*
  1131. * Set ASPM state.
  1132. * Enable/disable L0s/L1 depend on link state.
  1133. */
  1134. static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed)
  1135. {
  1136. u32 pm_ctrl_data;
  1137. u32 link_l1_timer;
  1138. AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
  1139. pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN |
  1140. PM_CTRL_ASPM_L0S_EN |
  1141. PM_CTRL_MAC_ASPM_CHK);
  1142. /* L1 timer */
  1143. if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
  1144. pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S;
  1145. link_l1_timer =
  1146. link_speed == SPEED_1000 || link_speed == SPEED_100 ?
  1147. L1D_PMCTRL_L1_ENTRY_TM_16US : 1;
  1148. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1149. L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer);
  1150. } else {
  1151. link_l1_timer = hw->nic_type == athr_l2c_b ?
  1152. L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM;
  1153. if (link_speed != SPEED_1000 && link_speed != SPEED_100)
  1154. link_l1_timer = 1;
  1155. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1156. PM_CTRL_L1_ENTRY_TIMER, link_l1_timer);
  1157. }
  1158. /* L0S/L1 enable */
  1159. if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0)
  1160. pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK;
  1161. if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
  1162. pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK;
  1163. /* l2cb & l1d & l2cb2 & l1d2 */
  1164. if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
  1165. hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
  1166. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1167. PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF);
  1168. pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER |
  1169. PM_CTRL_SERDES_PD_EX_L1 |
  1170. PM_CTRL_CLK_SWH_L1;
  1171. pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
  1172. PM_CTRL_SERDES_PLL_L1_EN |
  1173. PM_CTRL_SERDES_BUFS_RX_L1_EN |
  1174. PM_CTRL_SA_DLY_EN |
  1175. PM_CTRL_HOTRST);
  1176. /* disable l0s if link down or l2cb */
  1177. if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b)
  1178. pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
  1179. } else { /* l1c */
  1180. pm_ctrl_data =
  1181. FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0);
  1182. if (link_speed != SPEED_0) {
  1183. pm_ctrl_data |= PM_CTRL_SERDES_L1_EN |
  1184. PM_CTRL_SERDES_PLL_L1_EN |
  1185. PM_CTRL_SERDES_BUFS_RX_L1_EN;
  1186. pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 |
  1187. PM_CTRL_CLK_SWH_L1 |
  1188. PM_CTRL_ASPM_L0S_EN |
  1189. PM_CTRL_ASPM_L1_EN);
  1190. } else { /* link down */
  1191. pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
  1192. pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
  1193. PM_CTRL_SERDES_PLL_L1_EN |
  1194. PM_CTRL_SERDES_BUFS_RX_L1_EN |
  1195. PM_CTRL_ASPM_L0S_EN);
  1196. }
  1197. }
  1198. AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
  1199. return;
  1200. }
  1201. /*
  1202. * atl1c_configure - Configure Transmit&Receive Unit after Reset
  1203. * @adapter: board private structure
  1204. *
  1205. * Configure the Tx /Rx unit of the MAC after a reset.
  1206. */
  1207. static int atl1c_configure_mac(struct atl1c_adapter *adapter)
  1208. {
  1209. struct atl1c_hw *hw = &adapter->hw;
  1210. u32 master_ctrl_data = 0;
  1211. u32 intr_modrt_data;
  1212. u32 data;
  1213. AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
  1214. master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN |
  1215. MASTER_CTRL_RX_ITIMER_EN |
  1216. MASTER_CTRL_INT_RDCLR);
  1217. /* clear interrupt status */
  1218. AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
  1219. /* Clear any WOL status */
  1220. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  1221. /* set Interrupt Clear Timer
  1222. * HW will enable self to assert interrupt event to system after
  1223. * waiting x-time for software to notify it accept interrupt.
  1224. */
  1225. data = CLK_GATING_EN_ALL;
  1226. if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
  1227. if (hw->nic_type == athr_l2c_b)
  1228. data &= ~CLK_GATING_RXMAC_EN;
  1229. } else
  1230. data = 0;
  1231. AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
  1232. AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
  1233. hw->ict & INT_RETRIG_TIMER_MASK);
  1234. atl1c_configure_des_ring(adapter);
  1235. if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
  1236. intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
  1237. IRQ_MODRT_TX_TIMER_SHIFT;
  1238. intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
  1239. IRQ_MODRT_RX_TIMER_SHIFT;
  1240. AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
  1241. master_ctrl_data |=
  1242. MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
  1243. }
  1244. if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
  1245. master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
  1246. master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
  1247. AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
  1248. AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
  1249. hw->smb_timer & SMB_STAT_TIMER_MASK);
  1250. /* set MTU */
  1251. AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
  1252. VLAN_HLEN + ETH_FCS_LEN);
  1253. atl1c_configure_tx(adapter);
  1254. atl1c_configure_rx(adapter);
  1255. atl1c_configure_dma(adapter);
  1256. return 0;
  1257. }
  1258. static int atl1c_configure(struct atl1c_adapter *adapter)
  1259. {
  1260. struct net_device *netdev = adapter->netdev;
  1261. int num;
  1262. atl1c_init_ring_ptrs(adapter);
  1263. atl1c_set_multi(netdev);
  1264. atl1c_restore_vlan(adapter);
  1265. num = atl1c_alloc_rx_buffer(adapter);
  1266. if (unlikely(num == 0))
  1267. return -ENOMEM;
  1268. if (atl1c_configure_mac(adapter))
  1269. return -EIO;
  1270. return 0;
  1271. }
  1272. static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
  1273. {
  1274. u16 hw_reg_addr = 0;
  1275. unsigned long *stats_item = NULL;
  1276. u32 data;
  1277. /* update rx status */
  1278. hw_reg_addr = REG_MAC_RX_STATUS_BIN;
  1279. stats_item = &adapter->hw_stats.rx_ok;
  1280. while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
  1281. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1282. *stats_item += data;
  1283. stats_item++;
  1284. hw_reg_addr += 4;
  1285. }
  1286. /* update tx status */
  1287. hw_reg_addr = REG_MAC_TX_STATUS_BIN;
  1288. stats_item = &adapter->hw_stats.tx_ok;
  1289. while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
  1290. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1291. *stats_item += data;
  1292. stats_item++;
  1293. hw_reg_addr += 4;
  1294. }
  1295. }
  1296. /*
  1297. * atl1c_get_stats - Get System Network Statistics
  1298. * @netdev: network interface device structure
  1299. *
  1300. * Returns the address of the device statistics structure.
  1301. * The statistics are actually updated from the timer callback.
  1302. */
  1303. static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
  1304. {
  1305. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1306. struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
  1307. struct net_device_stats *net_stats = &netdev->stats;
  1308. atl1c_update_hw_stats(adapter);
  1309. net_stats->rx_packets = hw_stats->rx_ok;
  1310. net_stats->tx_packets = hw_stats->tx_ok;
  1311. net_stats->rx_bytes = hw_stats->rx_byte_cnt;
  1312. net_stats->tx_bytes = hw_stats->tx_byte_cnt;
  1313. net_stats->multicast = hw_stats->rx_mcast;
  1314. net_stats->collisions = hw_stats->tx_1_col +
  1315. hw_stats->tx_2_col * 2 +
  1316. hw_stats->tx_late_col + hw_stats->tx_abort_col;
  1317. net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
  1318. hw_stats->rx_len_err + hw_stats->rx_sz_ov +
  1319. hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
  1320. net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
  1321. net_stats->rx_length_errors = hw_stats->rx_len_err;
  1322. net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
  1323. net_stats->rx_frame_errors = hw_stats->rx_align_err;
  1324. net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
  1325. net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
  1326. net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
  1327. hw_stats->tx_underrun + hw_stats->tx_trunc;
  1328. net_stats->tx_fifo_errors = hw_stats->tx_underrun;
  1329. net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
  1330. net_stats->tx_window_errors = hw_stats->tx_late_col;
  1331. return net_stats;
  1332. }
  1333. static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
  1334. {
  1335. u16 phy_data;
  1336. spin_lock(&adapter->mdio_lock);
  1337. atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
  1338. spin_unlock(&adapter->mdio_lock);
  1339. }
  1340. static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
  1341. enum atl1c_trans_queue type)
  1342. {
  1343. struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
  1344. &adapter->tpd_ring[type];
  1345. struct atl1c_buffer *buffer_info;
  1346. struct pci_dev *pdev = adapter->pdev;
  1347. u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1348. u16 hw_next_to_clean;
  1349. u16 reg;
  1350. reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX;
  1351. AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean);
  1352. while (next_to_clean != hw_next_to_clean) {
  1353. buffer_info = &tpd_ring->buffer_info[next_to_clean];
  1354. atl1c_clean_buffer(pdev, buffer_info, 1);
  1355. if (++next_to_clean == tpd_ring->count)
  1356. next_to_clean = 0;
  1357. atomic_set(&tpd_ring->next_to_clean, next_to_clean);
  1358. }
  1359. if (netif_queue_stopped(adapter->netdev) &&
  1360. netif_carrier_ok(adapter->netdev)) {
  1361. netif_wake_queue(adapter->netdev);
  1362. }
  1363. return true;
  1364. }
  1365. /*
  1366. * atl1c_intr - Interrupt Handler
  1367. * @irq: interrupt number
  1368. * @data: pointer to a network interface device structure
  1369. * @pt_regs: CPU registers structure
  1370. */
  1371. static irqreturn_t atl1c_intr(int irq, void *data)
  1372. {
  1373. struct net_device *netdev = data;
  1374. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1375. struct pci_dev *pdev = adapter->pdev;
  1376. struct atl1c_hw *hw = &adapter->hw;
  1377. int max_ints = AT_MAX_INT_WORK;
  1378. int handled = IRQ_NONE;
  1379. u32 status;
  1380. u32 reg_data;
  1381. do {
  1382. AT_READ_REG(hw, REG_ISR, &reg_data);
  1383. status = reg_data & hw->intr_mask;
  1384. if (status == 0 || (status & ISR_DIS_INT) != 0) {
  1385. if (max_ints != AT_MAX_INT_WORK)
  1386. handled = IRQ_HANDLED;
  1387. break;
  1388. }
  1389. /* link event */
  1390. if (status & ISR_GPHY)
  1391. atl1c_clear_phy_int(adapter);
  1392. /* Ack ISR */
  1393. AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
  1394. if (status & ISR_RX_PKT) {
  1395. if (likely(napi_schedule_prep(&adapter->napi))) {
  1396. hw->intr_mask &= ~ISR_RX_PKT;
  1397. AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
  1398. __napi_schedule(&adapter->napi);
  1399. }
  1400. }
  1401. if (status & ISR_TX_PKT)
  1402. atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
  1403. handled = IRQ_HANDLED;
  1404. /* check if PCIE PHY Link down */
  1405. if (status & ISR_ERROR) {
  1406. if (netif_msg_hw(adapter))
  1407. dev_err(&pdev->dev,
  1408. "atl1c hardware error (status = 0x%x)\n",
  1409. status & ISR_ERROR);
  1410. /* reset MAC */
  1411. set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
  1412. schedule_work(&adapter->common_task);
  1413. return IRQ_HANDLED;
  1414. }
  1415. if (status & ISR_OVER)
  1416. if (netif_msg_intr(adapter))
  1417. dev_warn(&pdev->dev,
  1418. "TX/RX overflow (status = 0x%x)\n",
  1419. status & ISR_OVER);
  1420. /* link event */
  1421. if (status & (ISR_GPHY | ISR_MANUAL)) {
  1422. netdev->stats.tx_carrier_errors++;
  1423. atl1c_link_chg_event(adapter);
  1424. break;
  1425. }
  1426. } while (--max_ints > 0);
  1427. /* re-enable Interrupt*/
  1428. AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
  1429. return handled;
  1430. }
  1431. static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
  1432. struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
  1433. {
  1434. /*
  1435. * The pid field in RRS in not correct sometimes, so we
  1436. * cannot figure out if the packet is fragmented or not,
  1437. * so we tell the KERNEL CHECKSUM_NONE
  1438. */
  1439. skb_checksum_none_assert(skb);
  1440. }
  1441. static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter)
  1442. {
  1443. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1444. struct pci_dev *pdev = adapter->pdev;
  1445. struct atl1c_buffer *buffer_info, *next_info;
  1446. struct sk_buff *skb;
  1447. void *vir_addr = NULL;
  1448. u16 num_alloc = 0;
  1449. u16 rfd_next_to_use, next_next;
  1450. struct atl1c_rx_free_desc *rfd_desc;
  1451. next_next = rfd_next_to_use = rfd_ring->next_to_use;
  1452. if (++next_next == rfd_ring->count)
  1453. next_next = 0;
  1454. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1455. next_info = &rfd_ring->buffer_info[next_next];
  1456. while (next_info->flags & ATL1C_BUFFER_FREE) {
  1457. rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
  1458. skb = netdev_alloc_skb(adapter->netdev, adapter->rx_buffer_len);
  1459. if (unlikely(!skb)) {
  1460. if (netif_msg_rx_err(adapter))
  1461. dev_warn(&pdev->dev, "alloc rx buffer failed\n");
  1462. break;
  1463. }
  1464. /*
  1465. * Make buffer alignment 2 beyond a 16 byte boundary
  1466. * this will result in a 16 byte aligned IP header after
  1467. * the 14 byte MAC header is removed
  1468. */
  1469. vir_addr = skb->data;
  1470. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1471. buffer_info->skb = skb;
  1472. buffer_info->length = adapter->rx_buffer_len;
  1473. buffer_info->dma = pci_map_single(pdev, vir_addr,
  1474. buffer_info->length,
  1475. PCI_DMA_FROMDEVICE);
  1476. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1477. ATL1C_PCIMAP_FROMDEVICE);
  1478. rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  1479. rfd_next_to_use = next_next;
  1480. if (++next_next == rfd_ring->count)
  1481. next_next = 0;
  1482. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1483. next_info = &rfd_ring->buffer_info[next_next];
  1484. num_alloc++;
  1485. }
  1486. if (num_alloc) {
  1487. /* TODO: update mailbox here */
  1488. wmb();
  1489. rfd_ring->next_to_use = rfd_next_to_use;
  1490. AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX,
  1491. rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
  1492. }
  1493. return num_alloc;
  1494. }
  1495. static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
  1496. struct atl1c_recv_ret_status *rrs, u16 num)
  1497. {
  1498. u16 i;
  1499. /* the relationship between rrd and rfd is one map one */
  1500. for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
  1501. rrd_ring->next_to_clean)) {
  1502. rrs->word3 &= ~RRS_RXD_UPDATED;
  1503. if (++rrd_ring->next_to_clean == rrd_ring->count)
  1504. rrd_ring->next_to_clean = 0;
  1505. }
  1506. }
  1507. static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
  1508. struct atl1c_recv_ret_status *rrs, u16 num)
  1509. {
  1510. u16 i;
  1511. u16 rfd_index;
  1512. struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
  1513. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1514. RRS_RX_RFD_INDEX_MASK;
  1515. for (i = 0; i < num; i++) {
  1516. buffer_info[rfd_index].skb = NULL;
  1517. ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
  1518. ATL1C_BUFFER_FREE);
  1519. if (++rfd_index == rfd_ring->count)
  1520. rfd_index = 0;
  1521. }
  1522. rfd_ring->next_to_clean = rfd_index;
  1523. }
  1524. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
  1525. int *work_done, int work_to_do)
  1526. {
  1527. u16 rfd_num, rfd_index;
  1528. u16 count = 0;
  1529. u16 length;
  1530. struct pci_dev *pdev = adapter->pdev;
  1531. struct net_device *netdev = adapter->netdev;
  1532. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1533. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1534. struct sk_buff *skb;
  1535. struct atl1c_recv_ret_status *rrs;
  1536. struct atl1c_buffer *buffer_info;
  1537. while (1) {
  1538. if (*work_done >= work_to_do)
  1539. break;
  1540. rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
  1541. if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
  1542. rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
  1543. RRS_RX_RFD_CNT_MASK;
  1544. if (unlikely(rfd_num != 1))
  1545. /* TODO support mul rfd*/
  1546. if (netif_msg_rx_err(adapter))
  1547. dev_warn(&pdev->dev,
  1548. "Multi rfd not support yet!\n");
  1549. goto rrs_checked;
  1550. } else {
  1551. break;
  1552. }
  1553. rrs_checked:
  1554. atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
  1555. if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
  1556. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1557. if (netif_msg_rx_err(adapter))
  1558. dev_warn(&pdev->dev,
  1559. "wrong packet! rrs word3 is %x\n",
  1560. rrs->word3);
  1561. continue;
  1562. }
  1563. length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
  1564. RRS_PKT_SIZE_MASK);
  1565. /* Good Receive */
  1566. if (likely(rfd_num == 1)) {
  1567. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1568. RRS_RX_RFD_INDEX_MASK;
  1569. buffer_info = &rfd_ring->buffer_info[rfd_index];
  1570. pci_unmap_single(pdev, buffer_info->dma,
  1571. buffer_info->length, PCI_DMA_FROMDEVICE);
  1572. skb = buffer_info->skb;
  1573. } else {
  1574. /* TODO */
  1575. if (netif_msg_rx_err(adapter))
  1576. dev_warn(&pdev->dev,
  1577. "Multi rfd not support yet!\n");
  1578. break;
  1579. }
  1580. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1581. skb_put(skb, length - ETH_FCS_LEN);
  1582. skb->protocol = eth_type_trans(skb, netdev);
  1583. atl1c_rx_checksum(adapter, skb, rrs);
  1584. if (rrs->word3 & RRS_VLAN_INS) {
  1585. u16 vlan;
  1586. AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
  1587. vlan = le16_to_cpu(vlan);
  1588. __vlan_hwaccel_put_tag(skb, vlan);
  1589. }
  1590. netif_receive_skb(skb);
  1591. (*work_done)++;
  1592. count++;
  1593. }
  1594. if (count)
  1595. atl1c_alloc_rx_buffer(adapter);
  1596. }
  1597. /*
  1598. * atl1c_clean - NAPI Rx polling callback
  1599. * @adapter: board private structure
  1600. */
  1601. static int atl1c_clean(struct napi_struct *napi, int budget)
  1602. {
  1603. struct atl1c_adapter *adapter =
  1604. container_of(napi, struct atl1c_adapter, napi);
  1605. int work_done = 0;
  1606. /* Keep link state information with original netdev */
  1607. if (!netif_carrier_ok(adapter->netdev))
  1608. goto quit_polling;
  1609. /* just enable one RXQ */
  1610. atl1c_clean_rx_irq(adapter, &work_done, budget);
  1611. if (work_done < budget) {
  1612. quit_polling:
  1613. napi_complete(napi);
  1614. adapter->hw.intr_mask |= ISR_RX_PKT;
  1615. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  1616. }
  1617. return work_done;
  1618. }
  1619. #ifdef CONFIG_NET_POLL_CONTROLLER
  1620. /*
  1621. * Polling 'interrupt' - used by things like netconsole to send skbs
  1622. * without having to re-enable interrupts. It's not called while
  1623. * the interrupt routine is executing.
  1624. */
  1625. static void atl1c_netpoll(struct net_device *netdev)
  1626. {
  1627. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1628. disable_irq(adapter->pdev->irq);
  1629. atl1c_intr(adapter->pdev->irq, netdev);
  1630. enable_irq(adapter->pdev->irq);
  1631. }
  1632. #endif
  1633. static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
  1634. {
  1635. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1636. u16 next_to_use = 0;
  1637. u16 next_to_clean = 0;
  1638. next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1639. next_to_use = tpd_ring->next_to_use;
  1640. return (u16)(next_to_clean > next_to_use) ?
  1641. (next_to_clean - next_to_use - 1) :
  1642. (tpd_ring->count + next_to_clean - next_to_use - 1);
  1643. }
  1644. /*
  1645. * get next usable tpd
  1646. * Note: should call atl1c_tdp_avail to make sure
  1647. * there is enough tpd to use
  1648. */
  1649. static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
  1650. enum atl1c_trans_queue type)
  1651. {
  1652. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1653. struct atl1c_tpd_desc *tpd_desc;
  1654. u16 next_to_use = 0;
  1655. next_to_use = tpd_ring->next_to_use;
  1656. if (++tpd_ring->next_to_use == tpd_ring->count)
  1657. tpd_ring->next_to_use = 0;
  1658. tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
  1659. memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
  1660. return tpd_desc;
  1661. }
  1662. static struct atl1c_buffer *
  1663. atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
  1664. {
  1665. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  1666. return &tpd_ring->buffer_info[tpd -
  1667. (struct atl1c_tpd_desc *)tpd_ring->desc];
  1668. }
  1669. /* Calculate the transmit packet descript needed*/
  1670. static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
  1671. {
  1672. u16 tpd_req;
  1673. u16 proto_hdr_len = 0;
  1674. tpd_req = skb_shinfo(skb)->nr_frags + 1;
  1675. if (skb_is_gso(skb)) {
  1676. proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1677. if (proto_hdr_len < skb_headlen(skb))
  1678. tpd_req++;
  1679. if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
  1680. tpd_req++;
  1681. }
  1682. return tpd_req;
  1683. }
  1684. static int atl1c_tso_csum(struct atl1c_adapter *adapter,
  1685. struct sk_buff *skb,
  1686. struct atl1c_tpd_desc **tpd,
  1687. enum atl1c_trans_queue type)
  1688. {
  1689. struct pci_dev *pdev = adapter->pdev;
  1690. u8 hdr_len;
  1691. u32 real_len;
  1692. unsigned short offload_type;
  1693. int err;
  1694. if (skb_is_gso(skb)) {
  1695. if (skb_header_cloned(skb)) {
  1696. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1697. if (unlikely(err))
  1698. return -1;
  1699. }
  1700. offload_type = skb_shinfo(skb)->gso_type;
  1701. if (offload_type & SKB_GSO_TCPV4) {
  1702. real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
  1703. + ntohs(ip_hdr(skb)->tot_len));
  1704. if (real_len < skb->len)
  1705. pskb_trim(skb, real_len);
  1706. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1707. if (unlikely(skb->len == hdr_len)) {
  1708. /* only xsum need */
  1709. if (netif_msg_tx_queued(adapter))
  1710. dev_warn(&pdev->dev,
  1711. "IPV4 tso with zero data??\n");
  1712. goto check_sum;
  1713. } else {
  1714. ip_hdr(skb)->check = 0;
  1715. tcp_hdr(skb)->check = ~csum_tcpudp_magic(
  1716. ip_hdr(skb)->saddr,
  1717. ip_hdr(skb)->daddr,
  1718. 0, IPPROTO_TCP, 0);
  1719. (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
  1720. }
  1721. }
  1722. if (offload_type & SKB_GSO_TCPV6) {
  1723. struct atl1c_tpd_ext_desc *etpd =
  1724. *(struct atl1c_tpd_ext_desc **)(tpd);
  1725. memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
  1726. *tpd = atl1c_get_tpd(adapter, type);
  1727. ipv6_hdr(skb)->payload_len = 0;
  1728. /* check payload == 0 byte ? */
  1729. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1730. if (unlikely(skb->len == hdr_len)) {
  1731. /* only xsum need */
  1732. if (netif_msg_tx_queued(adapter))
  1733. dev_warn(&pdev->dev,
  1734. "IPV6 tso with zero data??\n");
  1735. goto check_sum;
  1736. } else
  1737. tcp_hdr(skb)->check = ~csum_ipv6_magic(
  1738. &ipv6_hdr(skb)->saddr,
  1739. &ipv6_hdr(skb)->daddr,
  1740. 0, IPPROTO_TCP, 0);
  1741. etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1742. etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1743. etpd->pkt_len = cpu_to_le32(skb->len);
  1744. (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1745. }
  1746. (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1747. (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
  1748. TPD_TCPHDR_OFFSET_SHIFT;
  1749. (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
  1750. TPD_MSS_SHIFT;
  1751. return 0;
  1752. }
  1753. check_sum:
  1754. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1755. u8 css, cso;
  1756. cso = skb_checksum_start_offset(skb);
  1757. if (unlikely(cso & 0x1)) {
  1758. if (netif_msg_tx_err(adapter))
  1759. dev_err(&adapter->pdev->dev,
  1760. "payload offset should not an event number\n");
  1761. return -1;
  1762. } else {
  1763. css = cso + skb->csum_offset;
  1764. (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
  1765. TPD_PLOADOFFSET_SHIFT;
  1766. (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
  1767. TPD_CCSUM_OFFSET_SHIFT;
  1768. (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
  1769. }
  1770. }
  1771. return 0;
  1772. }
  1773. static void atl1c_tx_map(struct atl1c_adapter *adapter,
  1774. struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
  1775. enum atl1c_trans_queue type)
  1776. {
  1777. struct atl1c_tpd_desc *use_tpd = NULL;
  1778. struct atl1c_buffer *buffer_info = NULL;
  1779. u16 buf_len = skb_headlen(skb);
  1780. u16 map_len = 0;
  1781. u16 mapped_len = 0;
  1782. u16 hdr_len = 0;
  1783. u16 nr_frags;
  1784. u16 f;
  1785. int tso;
  1786. nr_frags = skb_shinfo(skb)->nr_frags;
  1787. tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
  1788. if (tso) {
  1789. /* TSO */
  1790. map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1791. use_tpd = tpd;
  1792. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1793. buffer_info->length = map_len;
  1794. buffer_info->dma = pci_map_single(adapter->pdev,
  1795. skb->data, hdr_len, PCI_DMA_TODEVICE);
  1796. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1797. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1798. ATL1C_PCIMAP_TODEVICE);
  1799. mapped_len += map_len;
  1800. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1801. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1802. }
  1803. if (mapped_len < buf_len) {
  1804. /* mapped_len == 0, means we should use the first tpd,
  1805. which is given by caller */
  1806. if (mapped_len == 0)
  1807. use_tpd = tpd;
  1808. else {
  1809. use_tpd = atl1c_get_tpd(adapter, type);
  1810. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1811. }
  1812. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1813. buffer_info->length = buf_len - mapped_len;
  1814. buffer_info->dma =
  1815. pci_map_single(adapter->pdev, skb->data + mapped_len,
  1816. buffer_info->length, PCI_DMA_TODEVICE);
  1817. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1818. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1819. ATL1C_PCIMAP_TODEVICE);
  1820. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1821. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1822. }
  1823. for (f = 0; f < nr_frags; f++) {
  1824. struct skb_frag_struct *frag;
  1825. frag = &skb_shinfo(skb)->frags[f];
  1826. use_tpd = atl1c_get_tpd(adapter, type);
  1827. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1828. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1829. buffer_info->length = skb_frag_size(frag);
  1830. buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
  1831. frag, 0,
  1832. buffer_info->length,
  1833. DMA_TO_DEVICE);
  1834. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1835. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
  1836. ATL1C_PCIMAP_TODEVICE);
  1837. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1838. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1839. }
  1840. /* The last tpd */
  1841. use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
  1842. /* The last buffer info contain the skb address,
  1843. so it will be free after unmap */
  1844. buffer_info->skb = skb;
  1845. }
  1846. static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
  1847. struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
  1848. {
  1849. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1850. u16 reg;
  1851. reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX;
  1852. AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use);
  1853. }
  1854. static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
  1855. struct net_device *netdev)
  1856. {
  1857. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1858. unsigned long flags;
  1859. u16 tpd_req = 1;
  1860. struct atl1c_tpd_desc *tpd;
  1861. enum atl1c_trans_queue type = atl1c_trans_normal;
  1862. if (test_bit(__AT_DOWN, &adapter->flags)) {
  1863. dev_kfree_skb_any(skb);
  1864. return NETDEV_TX_OK;
  1865. }
  1866. tpd_req = atl1c_cal_tpd_req(skb);
  1867. if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
  1868. if (netif_msg_pktdata(adapter))
  1869. dev_info(&adapter->pdev->dev, "tx locked\n");
  1870. return NETDEV_TX_LOCKED;
  1871. }
  1872. if (atl1c_tpd_avail(adapter, type) < tpd_req) {
  1873. /* no enough descriptor, just stop queue */
  1874. netif_stop_queue(netdev);
  1875. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1876. return NETDEV_TX_BUSY;
  1877. }
  1878. tpd = atl1c_get_tpd(adapter, type);
  1879. /* do TSO and check sum */
  1880. if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
  1881. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1882. dev_kfree_skb_any(skb);
  1883. return NETDEV_TX_OK;
  1884. }
  1885. if (unlikely(vlan_tx_tag_present(skb))) {
  1886. u16 vlan = vlan_tx_tag_get(skb);
  1887. __le16 tag;
  1888. vlan = cpu_to_le16(vlan);
  1889. AT_VLAN_TO_TAG(vlan, tag);
  1890. tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
  1891. tpd->vlan_tag = tag;
  1892. }
  1893. if (skb_network_offset(skb) != ETH_HLEN)
  1894. tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
  1895. atl1c_tx_map(adapter, skb, tpd, type);
  1896. atl1c_tx_queue(adapter, skb, tpd, type);
  1897. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1898. return NETDEV_TX_OK;
  1899. }
  1900. static void atl1c_free_irq(struct atl1c_adapter *adapter)
  1901. {
  1902. struct net_device *netdev = adapter->netdev;
  1903. free_irq(adapter->pdev->irq, netdev);
  1904. if (adapter->have_msi)
  1905. pci_disable_msi(adapter->pdev);
  1906. }
  1907. static int atl1c_request_irq(struct atl1c_adapter *adapter)
  1908. {
  1909. struct pci_dev *pdev = adapter->pdev;
  1910. struct net_device *netdev = adapter->netdev;
  1911. int flags = 0;
  1912. int err = 0;
  1913. adapter->have_msi = true;
  1914. err = pci_enable_msi(adapter->pdev);
  1915. if (err) {
  1916. if (netif_msg_ifup(adapter))
  1917. dev_err(&pdev->dev,
  1918. "Unable to allocate MSI interrupt Error: %d\n",
  1919. err);
  1920. adapter->have_msi = false;
  1921. }
  1922. if (!adapter->have_msi)
  1923. flags |= IRQF_SHARED;
  1924. err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
  1925. netdev->name, netdev);
  1926. if (err) {
  1927. if (netif_msg_ifup(adapter))
  1928. dev_err(&pdev->dev,
  1929. "Unable to allocate interrupt Error: %d\n",
  1930. err);
  1931. if (adapter->have_msi)
  1932. pci_disable_msi(adapter->pdev);
  1933. return err;
  1934. }
  1935. if (netif_msg_ifup(adapter))
  1936. dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
  1937. return err;
  1938. }
  1939. static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter)
  1940. {
  1941. /* release tx-pending skbs and reset tx/rx ring index */
  1942. atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
  1943. atl1c_clean_tx_ring(adapter, atl1c_trans_high);
  1944. atl1c_clean_rx_ring(adapter);
  1945. }
  1946. static int atl1c_up(struct atl1c_adapter *adapter)
  1947. {
  1948. struct net_device *netdev = adapter->netdev;
  1949. int err;
  1950. netif_carrier_off(netdev);
  1951. err = atl1c_configure(adapter);
  1952. if (unlikely(err))
  1953. goto err_up;
  1954. err = atl1c_request_irq(adapter);
  1955. if (unlikely(err))
  1956. goto err_up;
  1957. atl1c_check_link_status(adapter);
  1958. clear_bit(__AT_DOWN, &adapter->flags);
  1959. napi_enable(&adapter->napi);
  1960. atl1c_irq_enable(adapter);
  1961. netif_start_queue(netdev);
  1962. return err;
  1963. err_up:
  1964. atl1c_clean_rx_ring(adapter);
  1965. return err;
  1966. }
  1967. static void atl1c_down(struct atl1c_adapter *adapter)
  1968. {
  1969. struct net_device *netdev = adapter->netdev;
  1970. atl1c_del_timer(adapter);
  1971. adapter->work_event = 0; /* clear all event */
  1972. /* signal that we're down so the interrupt handler does not
  1973. * reschedule our watchdog timer */
  1974. set_bit(__AT_DOWN, &adapter->flags);
  1975. netif_carrier_off(netdev);
  1976. napi_disable(&adapter->napi);
  1977. atl1c_irq_disable(adapter);
  1978. atl1c_free_irq(adapter);
  1979. /* disable ASPM if device inactive */
  1980. atl1c_disable_l0s_l1(&adapter->hw);
  1981. /* reset MAC to disable all RX/TX */
  1982. atl1c_reset_mac(&adapter->hw);
  1983. msleep(1);
  1984. adapter->link_speed = SPEED_0;
  1985. adapter->link_duplex = -1;
  1986. atl1c_reset_dma_ring(adapter);
  1987. }
  1988. /*
  1989. * atl1c_open - Called when a network interface is made active
  1990. * @netdev: network interface device structure
  1991. *
  1992. * Returns 0 on success, negative value on failure
  1993. *
  1994. * The open entry point is called when a network interface is made
  1995. * active by the system (IFF_UP). At this point all resources needed
  1996. * for transmit and receive operations are allocated, the interrupt
  1997. * handler is registered with the OS, the watchdog timer is started,
  1998. * and the stack is notified that the interface is ready.
  1999. */
  2000. static int atl1c_open(struct net_device *netdev)
  2001. {
  2002. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2003. int err;
  2004. /* disallow open during test */
  2005. if (test_bit(__AT_TESTING, &adapter->flags))
  2006. return -EBUSY;
  2007. /* allocate rx/tx dma buffer & descriptors */
  2008. err = atl1c_setup_ring_resources(adapter);
  2009. if (unlikely(err))
  2010. return err;
  2011. err = atl1c_up(adapter);
  2012. if (unlikely(err))
  2013. goto err_up;
  2014. return 0;
  2015. err_up:
  2016. atl1c_free_irq(adapter);
  2017. atl1c_free_ring_resources(adapter);
  2018. atl1c_reset_mac(&adapter->hw);
  2019. return err;
  2020. }
  2021. /*
  2022. * atl1c_close - Disables a network interface
  2023. * @netdev: network interface device structure
  2024. *
  2025. * Returns 0, this is not allowed to fail
  2026. *
  2027. * The close entry point is called when an interface is de-activated
  2028. * by the OS. The hardware is still under the drivers control, but
  2029. * needs to be disabled. A global MAC reset is issued to stop the
  2030. * hardware, and all transmit and receive resources are freed.
  2031. */
  2032. static int atl1c_close(struct net_device *netdev)
  2033. {
  2034. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2035. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  2036. set_bit(__AT_DOWN, &adapter->flags);
  2037. cancel_work_sync(&adapter->common_task);
  2038. atl1c_down(adapter);
  2039. atl1c_free_ring_resources(adapter);
  2040. return 0;
  2041. }
  2042. static int atl1c_suspend(struct device *dev)
  2043. {
  2044. struct pci_dev *pdev = to_pci_dev(dev);
  2045. struct net_device *netdev = pci_get_drvdata(pdev);
  2046. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2047. struct atl1c_hw *hw = &adapter->hw;
  2048. u32 wufc = adapter->wol;
  2049. atl1c_disable_l0s_l1(hw);
  2050. if (netif_running(netdev)) {
  2051. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  2052. atl1c_down(adapter);
  2053. }
  2054. netif_device_detach(netdev);
  2055. if (wufc)
  2056. if (atl1c_phy_to_ps_link(hw) != 0)
  2057. dev_dbg(&pdev->dev, "phy power saving failed");
  2058. atl1c_power_saving(hw, wufc);
  2059. return 0;
  2060. }
  2061. #ifdef CONFIG_PM_SLEEP
  2062. static int atl1c_resume(struct device *dev)
  2063. {
  2064. struct pci_dev *pdev = to_pci_dev(dev);
  2065. struct net_device *netdev = pci_get_drvdata(pdev);
  2066. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2067. AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
  2068. atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
  2069. atl1c_phy_reset(&adapter->hw);
  2070. atl1c_reset_mac(&adapter->hw);
  2071. atl1c_phy_init(&adapter->hw);
  2072. #if 0
  2073. AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
  2074. pm_data &= ~PM_CTRLSTAT_PME_EN;
  2075. AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
  2076. #endif
  2077. netif_device_attach(netdev);
  2078. if (netif_running(netdev))
  2079. atl1c_up(adapter);
  2080. return 0;
  2081. }
  2082. #endif
  2083. static void atl1c_shutdown(struct pci_dev *pdev)
  2084. {
  2085. struct net_device *netdev = pci_get_drvdata(pdev);
  2086. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2087. atl1c_suspend(&pdev->dev);
  2088. pci_wake_from_d3(pdev, adapter->wol);
  2089. pci_set_power_state(pdev, PCI_D3hot);
  2090. }
  2091. static const struct net_device_ops atl1c_netdev_ops = {
  2092. .ndo_open = atl1c_open,
  2093. .ndo_stop = atl1c_close,
  2094. .ndo_validate_addr = eth_validate_addr,
  2095. .ndo_start_xmit = atl1c_xmit_frame,
  2096. .ndo_set_mac_address = atl1c_set_mac_addr,
  2097. .ndo_set_rx_mode = atl1c_set_multi,
  2098. .ndo_change_mtu = atl1c_change_mtu,
  2099. .ndo_fix_features = atl1c_fix_features,
  2100. .ndo_set_features = atl1c_set_features,
  2101. .ndo_do_ioctl = atl1c_ioctl,
  2102. .ndo_tx_timeout = atl1c_tx_timeout,
  2103. .ndo_get_stats = atl1c_get_stats,
  2104. #ifdef CONFIG_NET_POLL_CONTROLLER
  2105. .ndo_poll_controller = atl1c_netpoll,
  2106. #endif
  2107. };
  2108. static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
  2109. {
  2110. SET_NETDEV_DEV(netdev, &pdev->dev);
  2111. pci_set_drvdata(pdev, netdev);
  2112. netdev->netdev_ops = &atl1c_netdev_ops;
  2113. netdev->watchdog_timeo = AT_TX_WATCHDOG;
  2114. atl1c_set_ethtool_ops(netdev);
  2115. /* TODO: add when ready */
  2116. netdev->hw_features = NETIF_F_SG |
  2117. NETIF_F_HW_CSUM |
  2118. NETIF_F_HW_VLAN_RX |
  2119. NETIF_F_TSO |
  2120. NETIF_F_TSO6;
  2121. netdev->features = netdev->hw_features |
  2122. NETIF_F_HW_VLAN_TX;
  2123. return 0;
  2124. }
  2125. /*
  2126. * atl1c_probe - Device Initialization Routine
  2127. * @pdev: PCI device information struct
  2128. * @ent: entry in atl1c_pci_tbl
  2129. *
  2130. * Returns 0 on success, negative on failure
  2131. *
  2132. * atl1c_probe initializes an adapter identified by a pci_dev structure.
  2133. * The OS initialization, configuring of the adapter private structure,
  2134. * and a hardware reset occur.
  2135. */
  2136. static int __devinit atl1c_probe(struct pci_dev *pdev,
  2137. const struct pci_device_id *ent)
  2138. {
  2139. struct net_device *netdev;
  2140. struct atl1c_adapter *adapter;
  2141. static int cards_found;
  2142. int err = 0;
  2143. /* enable device (incl. PCI PM wakeup and hotplug setup) */
  2144. err = pci_enable_device_mem(pdev);
  2145. if (err) {
  2146. dev_err(&pdev->dev, "cannot enable PCI device\n");
  2147. return err;
  2148. }
  2149. /*
  2150. * The atl1c chip can DMA to 64-bit addresses, but it uses a single
  2151. * shared register for the high 32 bits, so only a single, aligned,
  2152. * 4 GB physical address range can be used at a time.
  2153. *
  2154. * Supporting 64-bit DMA on this hardware is more trouble than it's
  2155. * worth. It is far easier to limit to 32-bit DMA than update
  2156. * various kernel subsystems to support the mechanics required by a
  2157. * fixed-high-32-bit system.
  2158. */
  2159. if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
  2160. (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
  2161. dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
  2162. goto err_dma;
  2163. }
  2164. err = pci_request_regions(pdev, atl1c_driver_name);
  2165. if (err) {
  2166. dev_err(&pdev->dev, "cannot obtain PCI resources\n");
  2167. goto err_pci_reg;
  2168. }
  2169. pci_set_master(pdev);
  2170. netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
  2171. if (netdev == NULL) {
  2172. err = -ENOMEM;
  2173. goto err_alloc_etherdev;
  2174. }
  2175. err = atl1c_init_netdev(netdev, pdev);
  2176. if (err) {
  2177. dev_err(&pdev->dev, "init netdevice failed\n");
  2178. goto err_init_netdev;
  2179. }
  2180. adapter = netdev_priv(netdev);
  2181. adapter->bd_number = cards_found;
  2182. adapter->netdev = netdev;
  2183. adapter->pdev = pdev;
  2184. adapter->hw.adapter = adapter;
  2185. adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
  2186. adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  2187. if (!adapter->hw.hw_addr) {
  2188. err = -EIO;
  2189. dev_err(&pdev->dev, "cannot map device registers\n");
  2190. goto err_ioremap;
  2191. }
  2192. /* init mii data */
  2193. adapter->mii.dev = netdev;
  2194. adapter->mii.mdio_read = atl1c_mdio_read;
  2195. adapter->mii.mdio_write = atl1c_mdio_write;
  2196. adapter->mii.phy_id_mask = 0x1f;
  2197. adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK;
  2198. netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
  2199. setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
  2200. (unsigned long)adapter);
  2201. /* setup the private structure */
  2202. err = atl1c_sw_init(adapter);
  2203. if (err) {
  2204. dev_err(&pdev->dev, "net device private data init failed\n");
  2205. goto err_sw_init;
  2206. }
  2207. atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
  2208. /* Init GPHY as early as possible due to power saving issue */
  2209. atl1c_phy_reset(&adapter->hw);
  2210. err = atl1c_reset_mac(&adapter->hw);
  2211. if (err) {
  2212. err = -EIO;
  2213. goto err_reset;
  2214. }
  2215. /* reset the controller to
  2216. * put the device in a known good starting state */
  2217. err = atl1c_phy_init(&adapter->hw);
  2218. if (err) {
  2219. err = -EIO;
  2220. goto err_reset;
  2221. }
  2222. if (atl1c_read_mac_addr(&adapter->hw)) {
  2223. /* got a random MAC address, set NET_ADDR_RANDOM to netdev */
  2224. netdev->addr_assign_type |= NET_ADDR_RANDOM;
  2225. }
  2226. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  2227. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  2228. if (netif_msg_probe(adapter))
  2229. dev_dbg(&pdev->dev, "mac address : %pM\n",
  2230. adapter->hw.mac_addr);
  2231. atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
  2232. INIT_WORK(&adapter->common_task, atl1c_common_task);
  2233. adapter->work_event = 0;
  2234. err = register_netdev(netdev);
  2235. if (err) {
  2236. dev_err(&pdev->dev, "register netdevice failed\n");
  2237. goto err_register;
  2238. }
  2239. if (netif_msg_probe(adapter))
  2240. dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
  2241. cards_found++;
  2242. return 0;
  2243. err_reset:
  2244. err_register:
  2245. err_sw_init:
  2246. iounmap(adapter->hw.hw_addr);
  2247. err_init_netdev:
  2248. err_ioremap:
  2249. free_netdev(netdev);
  2250. err_alloc_etherdev:
  2251. pci_release_regions(pdev);
  2252. err_pci_reg:
  2253. err_dma:
  2254. pci_disable_device(pdev);
  2255. return err;
  2256. }
  2257. /*
  2258. * atl1c_remove - Device Removal Routine
  2259. * @pdev: PCI device information struct
  2260. *
  2261. * atl1c_remove is called by the PCI subsystem to alert the driver
  2262. * that it should release a PCI device. The could be caused by a
  2263. * Hot-Plug event, or because the driver is going to be removed from
  2264. * memory.
  2265. */
  2266. static void __devexit atl1c_remove(struct pci_dev *pdev)
  2267. {
  2268. struct net_device *netdev = pci_get_drvdata(pdev);
  2269. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2270. unregister_netdev(netdev);
  2271. /* restore permanent address */
  2272. atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr);
  2273. atl1c_phy_disable(&adapter->hw);
  2274. iounmap(adapter->hw.hw_addr);
  2275. pci_release_regions(pdev);
  2276. pci_disable_device(pdev);
  2277. free_netdev(netdev);
  2278. }
  2279. /*
  2280. * atl1c_io_error_detected - called when PCI error is detected
  2281. * @pdev: Pointer to PCI device
  2282. * @state: The current pci connection state
  2283. *
  2284. * This function is called after a PCI bus error affecting
  2285. * this device has been detected.
  2286. */
  2287. static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
  2288. pci_channel_state_t state)
  2289. {
  2290. struct net_device *netdev = pci_get_drvdata(pdev);
  2291. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2292. netif_device_detach(netdev);
  2293. if (state == pci_channel_io_perm_failure)
  2294. return PCI_ERS_RESULT_DISCONNECT;
  2295. if (netif_running(netdev))
  2296. atl1c_down(adapter);
  2297. pci_disable_device(pdev);
  2298. /* Request a slot slot reset. */
  2299. return PCI_ERS_RESULT_NEED_RESET;
  2300. }
  2301. /*
  2302. * atl1c_io_slot_reset - called after the pci bus has been reset.
  2303. * @pdev: Pointer to PCI device
  2304. *
  2305. * Restart the card from scratch, as if from a cold-boot. Implementation
  2306. * resembles the first-half of the e1000_resume routine.
  2307. */
  2308. static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
  2309. {
  2310. struct net_device *netdev = pci_get_drvdata(pdev);
  2311. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2312. if (pci_enable_device(pdev)) {
  2313. if (netif_msg_hw(adapter))
  2314. dev_err(&pdev->dev,
  2315. "Cannot re-enable PCI device after reset\n");
  2316. return PCI_ERS_RESULT_DISCONNECT;
  2317. }
  2318. pci_set_master(pdev);
  2319. pci_enable_wake(pdev, PCI_D3hot, 0);
  2320. pci_enable_wake(pdev, PCI_D3cold, 0);
  2321. atl1c_reset_mac(&adapter->hw);
  2322. return PCI_ERS_RESULT_RECOVERED;
  2323. }
  2324. /*
  2325. * atl1c_io_resume - called when traffic can start flowing again.
  2326. * @pdev: Pointer to PCI device
  2327. *
  2328. * This callback is called when the error recovery driver tells us that
  2329. * its OK to resume normal operation. Implementation resembles the
  2330. * second-half of the atl1c_resume routine.
  2331. */
  2332. static void atl1c_io_resume(struct pci_dev *pdev)
  2333. {
  2334. struct net_device *netdev = pci_get_drvdata(pdev);
  2335. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2336. if (netif_running(netdev)) {
  2337. if (atl1c_up(adapter)) {
  2338. if (netif_msg_hw(adapter))
  2339. dev_err(&pdev->dev,
  2340. "Cannot bring device back up after reset\n");
  2341. return;
  2342. }
  2343. }
  2344. netif_device_attach(netdev);
  2345. }
  2346. static struct pci_error_handlers atl1c_err_handler = {
  2347. .error_detected = atl1c_io_error_detected,
  2348. .slot_reset = atl1c_io_slot_reset,
  2349. .resume = atl1c_io_resume,
  2350. };
  2351. static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
  2352. static struct pci_driver atl1c_driver = {
  2353. .name = atl1c_driver_name,
  2354. .id_table = atl1c_pci_tbl,
  2355. .probe = atl1c_probe,
  2356. .remove = __devexit_p(atl1c_remove),
  2357. .shutdown = atl1c_shutdown,
  2358. .err_handler = &atl1c_err_handler,
  2359. .driver.pm = &atl1c_pm_ops,
  2360. };
  2361. /*
  2362. * atl1c_init_module - Driver Registration Routine
  2363. *
  2364. * atl1c_init_module is the first routine called when the driver is
  2365. * loaded. All it does is register with the PCI subsystem.
  2366. */
  2367. static int __init atl1c_init_module(void)
  2368. {
  2369. return pci_register_driver(&atl1c_driver);
  2370. }
  2371. /*
  2372. * atl1c_exit_module - Driver Exit Cleanup Routine
  2373. *
  2374. * atl1c_exit_module is called just before the driver is removed
  2375. * from memory.
  2376. */
  2377. static void __exit atl1c_exit_module(void)
  2378. {
  2379. pci_unregister_driver(&atl1c_driver);
  2380. }
  2381. module_init(atl1c_init_module);
  2382. module_exit(atl1c_exit_module);