e1000_main.c 106 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.0.58 4/20/05
  23. * o Accepted ethtool cleanup patch from Stephen Hemminger
  24. * 6.0.44+ 2/15/05
  25. * o applied Anton's patch to resolve tx hang in hardware
  26. * o Applied Andrew Mortons patch - e1000 stops working after resume
  27. */
  28. char e1000_driver_name[] = "e1000";
  29. char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  30. #ifndef CONFIG_E1000_NAPI
  31. #define DRIVERNAPI
  32. #else
  33. #define DRIVERNAPI "-NAPI"
  34. #endif
  35. #define DRV_VERSION "6.0.60-k2"DRIVERNAPI
  36. char e1000_driver_version[] = DRV_VERSION;
  37. char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  38. /* e1000_pci_tbl - PCI Device ID Table
  39. *
  40. * Last entry must be all 0s
  41. *
  42. * Macro expands to...
  43. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  44. */
  45. static struct pci_device_id e1000_pci_tbl[] = {
  46. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  47. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  48. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  51. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  52. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  53. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  54. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  59. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  60. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  61. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  65. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  66. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  67. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  71. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  72. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  76. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  77. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  78. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  79. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  80. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  81. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  82. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  83. /* required last entry */
  84. {0,}
  85. };
  86. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  87. int e1000_up(struct e1000_adapter *adapter);
  88. void e1000_down(struct e1000_adapter *adapter);
  89. void e1000_reset(struct e1000_adapter *adapter);
  90. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  91. int e1000_setup_tx_resources(struct e1000_adapter *adapter);
  92. int e1000_setup_rx_resources(struct e1000_adapter *adapter);
  93. void e1000_free_tx_resources(struct e1000_adapter *adapter);
  94. void e1000_free_rx_resources(struct e1000_adapter *adapter);
  95. void e1000_update_stats(struct e1000_adapter *adapter);
  96. /* Local Function Prototypes */
  97. static int e1000_init_module(void);
  98. static void e1000_exit_module(void);
  99. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  100. static void __devexit e1000_remove(struct pci_dev *pdev);
  101. static int e1000_sw_init(struct e1000_adapter *adapter);
  102. static int e1000_open(struct net_device *netdev);
  103. static int e1000_close(struct net_device *netdev);
  104. static void e1000_configure_tx(struct e1000_adapter *adapter);
  105. static void e1000_configure_rx(struct e1000_adapter *adapter);
  106. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  107. static void e1000_clean_tx_ring(struct e1000_adapter *adapter);
  108. static void e1000_clean_rx_ring(struct e1000_adapter *adapter);
  109. static void e1000_set_multi(struct net_device *netdev);
  110. static void e1000_update_phy_info(unsigned long data);
  111. static void e1000_watchdog(unsigned long data);
  112. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  113. static void e1000_82547_tx_fifo_stall(unsigned long data);
  114. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  115. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  116. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  117. static int e1000_set_mac(struct net_device *netdev, void *p);
  118. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  119. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter);
  120. #ifdef CONFIG_E1000_NAPI
  121. static int e1000_clean(struct net_device *netdev, int *budget);
  122. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  123. int *work_done, int work_to_do);
  124. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  125. int *work_done, int work_to_do);
  126. #else
  127. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter);
  128. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter);
  129. #endif
  130. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter);
  131. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter);
  132. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  133. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  134. int cmd);
  135. void e1000_set_ethtool_ops(struct net_device *netdev);
  136. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  137. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  138. static void e1000_tx_timeout(struct net_device *dev);
  139. static void e1000_tx_timeout_task(struct net_device *dev);
  140. static void e1000_smartspeed(struct e1000_adapter *adapter);
  141. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  142. struct sk_buff *skb);
  143. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  144. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  145. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  146. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  147. static int e1000_notify_reboot(struct notifier_block *, unsigned long event, void *ptr);
  148. static int e1000_suspend(struct pci_dev *pdev, uint32_t state);
  149. #ifdef CONFIG_PM
  150. static int e1000_resume(struct pci_dev *pdev);
  151. #endif
  152. #ifdef CONFIG_NET_POLL_CONTROLLER
  153. /* for netdump / net console */
  154. static void e1000_netpoll (struct net_device *netdev);
  155. #endif
  156. struct notifier_block e1000_notifier_reboot = {
  157. .notifier_call = e1000_notify_reboot,
  158. .next = NULL,
  159. .priority = 0
  160. };
  161. /* Exported from other modules */
  162. extern void e1000_check_options(struct e1000_adapter *adapter);
  163. static struct pci_driver e1000_driver = {
  164. .name = e1000_driver_name,
  165. .id_table = e1000_pci_tbl,
  166. .probe = e1000_probe,
  167. .remove = __devexit_p(e1000_remove),
  168. /* Power Managment Hooks */
  169. #ifdef CONFIG_PM
  170. .suspend = e1000_suspend,
  171. .resume = e1000_resume
  172. #endif
  173. };
  174. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  175. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  176. MODULE_LICENSE("GPL");
  177. MODULE_VERSION(DRV_VERSION);
  178. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  179. module_param(debug, int, 0);
  180. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  181. /**
  182. * e1000_init_module - Driver Registration Routine
  183. *
  184. * e1000_init_module is the first routine called when the driver is
  185. * loaded. All it does is register with the PCI subsystem.
  186. **/
  187. static int __init
  188. e1000_init_module(void)
  189. {
  190. int ret;
  191. printk(KERN_INFO "%s - version %s\n",
  192. e1000_driver_string, e1000_driver_version);
  193. printk(KERN_INFO "%s\n", e1000_copyright);
  194. ret = pci_module_init(&e1000_driver);
  195. if(ret >= 0) {
  196. register_reboot_notifier(&e1000_notifier_reboot);
  197. }
  198. return ret;
  199. }
  200. module_init(e1000_init_module);
  201. /**
  202. * e1000_exit_module - Driver Exit Cleanup Routine
  203. *
  204. * e1000_exit_module is called just before the driver is removed
  205. * from memory.
  206. **/
  207. static void __exit
  208. e1000_exit_module(void)
  209. {
  210. unregister_reboot_notifier(&e1000_notifier_reboot);
  211. pci_unregister_driver(&e1000_driver);
  212. }
  213. module_exit(e1000_exit_module);
  214. /**
  215. * e1000_irq_disable - Mask off interrupt generation on the NIC
  216. * @adapter: board private structure
  217. **/
  218. static inline void
  219. e1000_irq_disable(struct e1000_adapter *adapter)
  220. {
  221. atomic_inc(&adapter->irq_sem);
  222. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  223. E1000_WRITE_FLUSH(&adapter->hw);
  224. synchronize_irq(adapter->pdev->irq);
  225. }
  226. /**
  227. * e1000_irq_enable - Enable default interrupt generation settings
  228. * @adapter: board private structure
  229. **/
  230. static inline void
  231. e1000_irq_enable(struct e1000_adapter *adapter)
  232. {
  233. if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
  234. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  235. E1000_WRITE_FLUSH(&adapter->hw);
  236. }
  237. }
  238. void
  239. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  240. {
  241. struct net_device *netdev = adapter->netdev;
  242. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  243. uint16_t old_vid = adapter->mng_vlan_id;
  244. if(adapter->vlgrp) {
  245. if(!adapter->vlgrp->vlan_devices[vid]) {
  246. if(adapter->hw.mng_cookie.status &
  247. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  248. e1000_vlan_rx_add_vid(netdev, vid);
  249. adapter->mng_vlan_id = vid;
  250. } else
  251. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  252. if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  253. (vid != old_vid) &&
  254. !adapter->vlgrp->vlan_devices[old_vid])
  255. e1000_vlan_rx_kill_vid(netdev, old_vid);
  256. }
  257. }
  258. }
  259. int
  260. e1000_up(struct e1000_adapter *adapter)
  261. {
  262. struct net_device *netdev = adapter->netdev;
  263. int err;
  264. /* hardware has been reset, we need to reload some things */
  265. /* Reset the PHY if it was previously powered down */
  266. if(adapter->hw.media_type == e1000_media_type_copper) {
  267. uint16_t mii_reg;
  268. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  269. if(mii_reg & MII_CR_POWER_DOWN)
  270. e1000_phy_reset(&adapter->hw);
  271. }
  272. e1000_set_multi(netdev);
  273. e1000_restore_vlan(adapter);
  274. e1000_configure_tx(adapter);
  275. e1000_setup_rctl(adapter);
  276. e1000_configure_rx(adapter);
  277. adapter->alloc_rx_buf(adapter);
  278. #ifdef CONFIG_PCI_MSI
  279. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  280. adapter->have_msi = TRUE;
  281. if((err = pci_enable_msi(adapter->pdev))) {
  282. DPRINTK(PROBE, ERR,
  283. "Unable to allocate MSI interrupt Error: %d\n", err);
  284. adapter->have_msi = FALSE;
  285. }
  286. }
  287. #endif
  288. if((err = request_irq(adapter->pdev->irq, &e1000_intr,
  289. SA_SHIRQ | SA_SAMPLE_RANDOM,
  290. netdev->name, netdev))) {
  291. DPRINTK(PROBE, ERR,
  292. "Unable to allocate interrupt Error: %d\n", err);
  293. return err;
  294. }
  295. mod_timer(&adapter->watchdog_timer, jiffies);
  296. #ifdef CONFIG_E1000_NAPI
  297. netif_poll_enable(netdev);
  298. #endif
  299. e1000_irq_enable(adapter);
  300. return 0;
  301. }
  302. void
  303. e1000_down(struct e1000_adapter *adapter)
  304. {
  305. struct net_device *netdev = adapter->netdev;
  306. e1000_irq_disable(adapter);
  307. free_irq(adapter->pdev->irq, netdev);
  308. #ifdef CONFIG_PCI_MSI
  309. if(adapter->hw.mac_type > e1000_82547_rev_2 &&
  310. adapter->have_msi == TRUE)
  311. pci_disable_msi(adapter->pdev);
  312. #endif
  313. del_timer_sync(&adapter->tx_fifo_stall_timer);
  314. del_timer_sync(&adapter->watchdog_timer);
  315. del_timer_sync(&adapter->phy_info_timer);
  316. #ifdef CONFIG_E1000_NAPI
  317. netif_poll_disable(netdev);
  318. #endif
  319. adapter->link_speed = 0;
  320. adapter->link_duplex = 0;
  321. netif_carrier_off(netdev);
  322. netif_stop_queue(netdev);
  323. e1000_reset(adapter);
  324. e1000_clean_tx_ring(adapter);
  325. e1000_clean_rx_ring(adapter);
  326. /* If WoL is not enabled
  327. * and management mode is not IAMT
  328. * Power down the PHY so no link is implied when interface is down */
  329. if(!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  330. adapter->hw.media_type == e1000_media_type_copper &&
  331. !e1000_check_mng_mode(&adapter->hw) &&
  332. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN)) {
  333. uint16_t mii_reg;
  334. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  335. mii_reg |= MII_CR_POWER_DOWN;
  336. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  337. mdelay(1);
  338. }
  339. }
  340. void
  341. e1000_reset(struct e1000_adapter *adapter)
  342. {
  343. struct net_device *netdev = adapter->netdev;
  344. uint32_t pba, manc;
  345. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  346. uint16_t fc_low_water_mark = E1000_FC_LOW_DIFF;
  347. /* Repartition Pba for greater than 9k mtu
  348. * To take effect CTRL.RST is required.
  349. */
  350. switch (adapter->hw.mac_type) {
  351. case e1000_82547:
  352. case e1000_82547_rev_2:
  353. pba = E1000_PBA_30K;
  354. break;
  355. case e1000_82573:
  356. pba = E1000_PBA_12K;
  357. break;
  358. default:
  359. pba = E1000_PBA_48K;
  360. break;
  361. }
  362. if((adapter->hw.mac_type != e1000_82573) &&
  363. (adapter->rx_buffer_len > E1000_RXBUFFER_8192)) {
  364. pba -= 8; /* allocate more FIFO for Tx */
  365. /* send an XOFF when there is enough space in the
  366. * Rx FIFO to hold one extra full size Rx packet
  367. */
  368. fc_high_water_mark = netdev->mtu + ENET_HEADER_SIZE +
  369. ETHERNET_FCS_SIZE + 1;
  370. fc_low_water_mark = fc_high_water_mark + 8;
  371. }
  372. if(adapter->hw.mac_type == e1000_82547) {
  373. adapter->tx_fifo_head = 0;
  374. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  375. adapter->tx_fifo_size =
  376. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  377. atomic_set(&adapter->tx_fifo_stall, 0);
  378. }
  379. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  380. /* flow control settings */
  381. adapter->hw.fc_high_water = (pba << E1000_PBA_BYTES_SHIFT) -
  382. fc_high_water_mark;
  383. adapter->hw.fc_low_water = (pba << E1000_PBA_BYTES_SHIFT) -
  384. fc_low_water_mark;
  385. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  386. adapter->hw.fc_send_xon = 1;
  387. adapter->hw.fc = adapter->hw.original_fc;
  388. /* Allow time for pending master requests to run */
  389. e1000_reset_hw(&adapter->hw);
  390. if(adapter->hw.mac_type >= e1000_82544)
  391. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  392. if(e1000_init_hw(&adapter->hw))
  393. DPRINTK(PROBE, ERR, "Hardware Error\n");
  394. e1000_update_mng_vlan(adapter);
  395. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  396. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  397. e1000_reset_adaptive(&adapter->hw);
  398. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  399. if (adapter->en_mng_pt) {
  400. manc = E1000_READ_REG(&adapter->hw, MANC);
  401. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  402. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  403. }
  404. }
  405. /**
  406. * e1000_probe - Device Initialization Routine
  407. * @pdev: PCI device information struct
  408. * @ent: entry in e1000_pci_tbl
  409. *
  410. * Returns 0 on success, negative on failure
  411. *
  412. * e1000_probe initializes an adapter identified by a pci_dev structure.
  413. * The OS initialization, configuring of the adapter private structure,
  414. * and a hardware reset occur.
  415. **/
  416. static int __devinit
  417. e1000_probe(struct pci_dev *pdev,
  418. const struct pci_device_id *ent)
  419. {
  420. struct net_device *netdev;
  421. struct e1000_adapter *adapter;
  422. unsigned long mmio_start, mmio_len;
  423. uint32_t swsm;
  424. static int cards_found = 0;
  425. int i, err, pci_using_dac;
  426. uint16_t eeprom_data;
  427. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  428. if((err = pci_enable_device(pdev)))
  429. return err;
  430. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  431. pci_using_dac = 1;
  432. } else {
  433. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  434. E1000_ERR("No usable DMA configuration, aborting\n");
  435. return err;
  436. }
  437. pci_using_dac = 0;
  438. }
  439. if((err = pci_request_regions(pdev, e1000_driver_name)))
  440. return err;
  441. pci_set_master(pdev);
  442. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  443. if(!netdev) {
  444. err = -ENOMEM;
  445. goto err_alloc_etherdev;
  446. }
  447. SET_MODULE_OWNER(netdev);
  448. SET_NETDEV_DEV(netdev, &pdev->dev);
  449. pci_set_drvdata(pdev, netdev);
  450. adapter = netdev_priv(netdev);
  451. adapter->netdev = netdev;
  452. adapter->pdev = pdev;
  453. adapter->hw.back = adapter;
  454. adapter->msg_enable = (1 << debug) - 1;
  455. mmio_start = pci_resource_start(pdev, BAR_0);
  456. mmio_len = pci_resource_len(pdev, BAR_0);
  457. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  458. if(!adapter->hw.hw_addr) {
  459. err = -EIO;
  460. goto err_ioremap;
  461. }
  462. for(i = BAR_1; i <= BAR_5; i++) {
  463. if(pci_resource_len(pdev, i) == 0)
  464. continue;
  465. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  466. adapter->hw.io_base = pci_resource_start(pdev, i);
  467. break;
  468. }
  469. }
  470. netdev->open = &e1000_open;
  471. netdev->stop = &e1000_close;
  472. netdev->hard_start_xmit = &e1000_xmit_frame;
  473. netdev->get_stats = &e1000_get_stats;
  474. netdev->set_multicast_list = &e1000_set_multi;
  475. netdev->set_mac_address = &e1000_set_mac;
  476. netdev->change_mtu = &e1000_change_mtu;
  477. netdev->do_ioctl = &e1000_ioctl;
  478. e1000_set_ethtool_ops(netdev);
  479. netdev->tx_timeout = &e1000_tx_timeout;
  480. netdev->watchdog_timeo = 5 * HZ;
  481. #ifdef CONFIG_E1000_NAPI
  482. netdev->poll = &e1000_clean;
  483. netdev->weight = 64;
  484. #endif
  485. netdev->vlan_rx_register = e1000_vlan_rx_register;
  486. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  487. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  488. #ifdef CONFIG_NET_POLL_CONTROLLER
  489. netdev->poll_controller = e1000_netpoll;
  490. #endif
  491. strcpy(netdev->name, pci_name(pdev));
  492. netdev->mem_start = mmio_start;
  493. netdev->mem_end = mmio_start + mmio_len;
  494. netdev->base_addr = adapter->hw.io_base;
  495. adapter->bd_number = cards_found;
  496. /* setup the private structure */
  497. if((err = e1000_sw_init(adapter)))
  498. goto err_sw_init;
  499. if((err = e1000_check_phy_reset_block(&adapter->hw)))
  500. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  501. if(adapter->hw.mac_type >= e1000_82543) {
  502. netdev->features = NETIF_F_SG |
  503. NETIF_F_HW_CSUM |
  504. NETIF_F_HW_VLAN_TX |
  505. NETIF_F_HW_VLAN_RX |
  506. NETIF_F_HW_VLAN_FILTER;
  507. }
  508. #ifdef NETIF_F_TSO
  509. if((adapter->hw.mac_type >= e1000_82544) &&
  510. (adapter->hw.mac_type != e1000_82547))
  511. netdev->features |= NETIF_F_TSO;
  512. #ifdef NETIF_F_TSO_IPV6
  513. if(adapter->hw.mac_type > e1000_82547_rev_2)
  514. netdev->features |= NETIF_F_TSO_IPV6;
  515. #endif
  516. #endif
  517. if(pci_using_dac)
  518. netdev->features |= NETIF_F_HIGHDMA;
  519. /* hard_start_xmit is safe against parallel locking */
  520. netdev->features |= NETIF_F_LLTX;
  521. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  522. /* before reading the EEPROM, reset the controller to
  523. * put the device in a known good starting state */
  524. e1000_reset_hw(&adapter->hw);
  525. /* make sure the EEPROM is good */
  526. if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  527. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  528. err = -EIO;
  529. goto err_eeprom;
  530. }
  531. /* copy the MAC address out of the EEPROM */
  532. if(e1000_read_mac_addr(&adapter->hw))
  533. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  534. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  535. if(!is_valid_ether_addr(netdev->dev_addr)) {
  536. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  537. err = -EIO;
  538. goto err_eeprom;
  539. }
  540. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  541. e1000_get_bus_info(&adapter->hw);
  542. init_timer(&adapter->tx_fifo_stall_timer);
  543. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  544. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  545. init_timer(&adapter->watchdog_timer);
  546. adapter->watchdog_timer.function = &e1000_watchdog;
  547. adapter->watchdog_timer.data = (unsigned long) adapter;
  548. INIT_WORK(&adapter->watchdog_task,
  549. (void (*)(void *))e1000_watchdog_task, adapter);
  550. init_timer(&adapter->phy_info_timer);
  551. adapter->phy_info_timer.function = &e1000_update_phy_info;
  552. adapter->phy_info_timer.data = (unsigned long) adapter;
  553. INIT_WORK(&adapter->tx_timeout_task,
  554. (void (*)(void *))e1000_tx_timeout_task, netdev);
  555. /* we're going to reset, so assume we have no link for now */
  556. netif_carrier_off(netdev);
  557. netif_stop_queue(netdev);
  558. e1000_check_options(adapter);
  559. /* Initial Wake on LAN setting
  560. * If APM wake is enabled in the EEPROM,
  561. * enable the ACPI Magic Packet filter
  562. */
  563. switch(adapter->hw.mac_type) {
  564. case e1000_82542_rev2_0:
  565. case e1000_82542_rev2_1:
  566. case e1000_82543:
  567. break;
  568. case e1000_82544:
  569. e1000_read_eeprom(&adapter->hw,
  570. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  571. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  572. break;
  573. case e1000_82546:
  574. case e1000_82546_rev_3:
  575. if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
  576. && (adapter->hw.media_type == e1000_media_type_copper)) {
  577. e1000_read_eeprom(&adapter->hw,
  578. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  579. break;
  580. }
  581. /* Fall Through */
  582. default:
  583. e1000_read_eeprom(&adapter->hw,
  584. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  585. break;
  586. }
  587. if(eeprom_data & eeprom_apme_mask)
  588. adapter->wol |= E1000_WUFC_MAG;
  589. /* reset the hardware with the new settings */
  590. e1000_reset(adapter);
  591. /* Let firmware know the driver has taken over */
  592. switch(adapter->hw.mac_type) {
  593. case e1000_82573:
  594. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  595. E1000_WRITE_REG(&adapter->hw, SWSM,
  596. swsm | E1000_SWSM_DRV_LOAD);
  597. break;
  598. default:
  599. break;
  600. }
  601. strcpy(netdev->name, "eth%d");
  602. if((err = register_netdev(netdev)))
  603. goto err_register;
  604. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  605. cards_found++;
  606. return 0;
  607. err_register:
  608. err_sw_init:
  609. err_eeprom:
  610. iounmap(adapter->hw.hw_addr);
  611. err_ioremap:
  612. free_netdev(netdev);
  613. err_alloc_etherdev:
  614. pci_release_regions(pdev);
  615. return err;
  616. }
  617. /**
  618. * e1000_remove - Device Removal Routine
  619. * @pdev: PCI device information struct
  620. *
  621. * e1000_remove is called by the PCI subsystem to alert the driver
  622. * that it should release a PCI device. The could be caused by a
  623. * Hot-Plug event, or because the driver is going to be removed from
  624. * memory.
  625. **/
  626. static void __devexit
  627. e1000_remove(struct pci_dev *pdev)
  628. {
  629. struct net_device *netdev = pci_get_drvdata(pdev);
  630. struct e1000_adapter *adapter = netdev_priv(netdev);
  631. uint32_t manc, swsm;
  632. flush_scheduled_work();
  633. if(adapter->hw.mac_type >= e1000_82540 &&
  634. adapter->hw.media_type == e1000_media_type_copper) {
  635. manc = E1000_READ_REG(&adapter->hw, MANC);
  636. if(manc & E1000_MANC_SMBUS_EN) {
  637. manc |= E1000_MANC_ARP_EN;
  638. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  639. }
  640. }
  641. switch(adapter->hw.mac_type) {
  642. case e1000_82573:
  643. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  644. E1000_WRITE_REG(&adapter->hw, SWSM,
  645. swsm & ~E1000_SWSM_DRV_LOAD);
  646. break;
  647. default:
  648. break;
  649. }
  650. unregister_netdev(netdev);
  651. if(!e1000_check_phy_reset_block(&adapter->hw))
  652. e1000_phy_hw_reset(&adapter->hw);
  653. iounmap(adapter->hw.hw_addr);
  654. pci_release_regions(pdev);
  655. free_netdev(netdev);
  656. pci_disable_device(pdev);
  657. }
  658. /**
  659. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  660. * @adapter: board private structure to initialize
  661. *
  662. * e1000_sw_init initializes the Adapter private data structure.
  663. * Fields are initialized based on PCI device information and
  664. * OS network device settings (MTU size).
  665. **/
  666. static int __devinit
  667. e1000_sw_init(struct e1000_adapter *adapter)
  668. {
  669. struct e1000_hw *hw = &adapter->hw;
  670. struct net_device *netdev = adapter->netdev;
  671. struct pci_dev *pdev = adapter->pdev;
  672. /* PCI config space info */
  673. hw->vendor_id = pdev->vendor;
  674. hw->device_id = pdev->device;
  675. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  676. hw->subsystem_id = pdev->subsystem_device;
  677. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  678. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  679. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  680. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  681. hw->max_frame_size = netdev->mtu +
  682. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  683. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  684. /* identify the MAC */
  685. if(e1000_set_mac_type(hw)) {
  686. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  687. return -EIO;
  688. }
  689. /* initialize eeprom parameters */
  690. if(e1000_init_eeprom_params(hw)) {
  691. E1000_ERR("EEPROM initialization failed\n");
  692. return -EIO;
  693. }
  694. switch(hw->mac_type) {
  695. default:
  696. break;
  697. case e1000_82541:
  698. case e1000_82547:
  699. case e1000_82541_rev_2:
  700. case e1000_82547_rev_2:
  701. hw->phy_init_script = 1;
  702. break;
  703. }
  704. e1000_set_media_type(hw);
  705. hw->wait_autoneg_complete = FALSE;
  706. hw->tbi_compatibility_en = TRUE;
  707. hw->adaptive_ifs = TRUE;
  708. /* Copper options */
  709. if(hw->media_type == e1000_media_type_copper) {
  710. hw->mdix = AUTO_ALL_MODES;
  711. hw->disable_polarity_correction = FALSE;
  712. hw->master_slave = E1000_MASTER_SLAVE;
  713. }
  714. atomic_set(&adapter->irq_sem, 1);
  715. spin_lock_init(&adapter->stats_lock);
  716. spin_lock_init(&adapter->tx_lock);
  717. return 0;
  718. }
  719. /**
  720. * e1000_open - Called when a network interface is made active
  721. * @netdev: network interface device structure
  722. *
  723. * Returns 0 on success, negative value on failure
  724. *
  725. * The open entry point is called when a network interface is made
  726. * active by the system (IFF_UP). At this point all resources needed
  727. * for transmit and receive operations are allocated, the interrupt
  728. * handler is registered with the OS, the watchdog timer is started,
  729. * and the stack is notified that the interface is ready.
  730. **/
  731. static int
  732. e1000_open(struct net_device *netdev)
  733. {
  734. struct e1000_adapter *adapter = netdev_priv(netdev);
  735. int err;
  736. /* allocate transmit descriptors */
  737. if((err = e1000_setup_tx_resources(adapter)))
  738. goto err_setup_tx;
  739. /* allocate receive descriptors */
  740. if((err = e1000_setup_rx_resources(adapter)))
  741. goto err_setup_rx;
  742. if((err = e1000_up(adapter)))
  743. goto err_up;
  744. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  745. if((adapter->hw.mng_cookie.status &
  746. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  747. e1000_update_mng_vlan(adapter);
  748. }
  749. return E1000_SUCCESS;
  750. err_up:
  751. e1000_free_rx_resources(adapter);
  752. err_setup_rx:
  753. e1000_free_tx_resources(adapter);
  754. err_setup_tx:
  755. e1000_reset(adapter);
  756. return err;
  757. }
  758. /**
  759. * e1000_close - Disables a network interface
  760. * @netdev: network interface device structure
  761. *
  762. * Returns 0, this is not allowed to fail
  763. *
  764. * The close entry point is called when an interface is de-activated
  765. * by the OS. The hardware is still under the drivers control, but
  766. * needs to be disabled. A global MAC reset is issued to stop the
  767. * hardware, and all transmit and receive resources are freed.
  768. **/
  769. static int
  770. e1000_close(struct net_device *netdev)
  771. {
  772. struct e1000_adapter *adapter = netdev_priv(netdev);
  773. e1000_down(adapter);
  774. e1000_free_tx_resources(adapter);
  775. e1000_free_rx_resources(adapter);
  776. if((adapter->hw.mng_cookie.status &
  777. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  778. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  779. }
  780. return 0;
  781. }
  782. /**
  783. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  784. * @adapter: address of board private structure
  785. * @start: address of beginning of memory
  786. * @len: length of memory
  787. **/
  788. static inline boolean_t
  789. e1000_check_64k_bound(struct e1000_adapter *adapter,
  790. void *start, unsigned long len)
  791. {
  792. unsigned long begin = (unsigned long) start;
  793. unsigned long end = begin + len;
  794. /* First rev 82545 and 82546 need to not allow any memory
  795. * write location to cross 64k boundary due to errata 23 */
  796. if (adapter->hw.mac_type == e1000_82545 ||
  797. adapter->hw.mac_type == e1000_82546) {
  798. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  799. }
  800. return TRUE;
  801. }
  802. /**
  803. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  804. * @adapter: board private structure
  805. *
  806. * Return 0 on success, negative on failure
  807. **/
  808. int
  809. e1000_setup_tx_resources(struct e1000_adapter *adapter)
  810. {
  811. struct e1000_desc_ring *txdr = &adapter->tx_ring;
  812. struct pci_dev *pdev = adapter->pdev;
  813. int size;
  814. size = sizeof(struct e1000_buffer) * txdr->count;
  815. txdr->buffer_info = vmalloc(size);
  816. if(!txdr->buffer_info) {
  817. DPRINTK(PROBE, ERR,
  818. "Unable to allocate memory for the transmit descriptor ring\n");
  819. return -ENOMEM;
  820. }
  821. memset(txdr->buffer_info, 0, size);
  822. /* round up to nearest 4K */
  823. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  824. E1000_ROUNDUP(txdr->size, 4096);
  825. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  826. if(!txdr->desc) {
  827. setup_tx_desc_die:
  828. vfree(txdr->buffer_info);
  829. DPRINTK(PROBE, ERR,
  830. "Unable to allocate memory for the transmit descriptor ring\n");
  831. return -ENOMEM;
  832. }
  833. /* Fix for errata 23, can't cross 64kB boundary */
  834. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  835. void *olddesc = txdr->desc;
  836. dma_addr_t olddma = txdr->dma;
  837. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  838. "at %p\n", txdr->size, txdr->desc);
  839. /* Try again, without freeing the previous */
  840. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  841. if(!txdr->desc) {
  842. /* Failed allocation, critical failure */
  843. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  844. goto setup_tx_desc_die;
  845. }
  846. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  847. /* give up */
  848. pci_free_consistent(pdev, txdr->size, txdr->desc,
  849. txdr->dma);
  850. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  851. DPRINTK(PROBE, ERR,
  852. "Unable to allocate aligned memory "
  853. "for the transmit descriptor ring\n");
  854. vfree(txdr->buffer_info);
  855. return -ENOMEM;
  856. } else {
  857. /* Free old allocation, new allocation was successful */
  858. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  859. }
  860. }
  861. memset(txdr->desc, 0, txdr->size);
  862. txdr->next_to_use = 0;
  863. txdr->next_to_clean = 0;
  864. return 0;
  865. }
  866. /**
  867. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  868. * @adapter: board private structure
  869. *
  870. * Configure the Tx unit of the MAC after a reset.
  871. **/
  872. static void
  873. e1000_configure_tx(struct e1000_adapter *adapter)
  874. {
  875. uint64_t tdba = adapter->tx_ring.dma;
  876. uint32_t tdlen = adapter->tx_ring.count * sizeof(struct e1000_tx_desc);
  877. uint32_t tctl, tipg;
  878. E1000_WRITE_REG(&adapter->hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  879. E1000_WRITE_REG(&adapter->hw, TDBAH, (tdba >> 32));
  880. E1000_WRITE_REG(&adapter->hw, TDLEN, tdlen);
  881. /* Setup the HW Tx Head and Tail descriptor pointers */
  882. E1000_WRITE_REG(&adapter->hw, TDH, 0);
  883. E1000_WRITE_REG(&adapter->hw, TDT, 0);
  884. /* Set the default values for the Tx Inter Packet Gap timer */
  885. switch (adapter->hw.mac_type) {
  886. case e1000_82542_rev2_0:
  887. case e1000_82542_rev2_1:
  888. tipg = DEFAULT_82542_TIPG_IPGT;
  889. tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
  890. tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
  891. break;
  892. default:
  893. if(adapter->hw.media_type == e1000_media_type_fiber ||
  894. adapter->hw.media_type == e1000_media_type_internal_serdes)
  895. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  896. else
  897. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  898. tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
  899. tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
  900. }
  901. E1000_WRITE_REG(&adapter->hw, TIPG, tipg);
  902. /* Set the Tx Interrupt Delay register */
  903. E1000_WRITE_REG(&adapter->hw, TIDV, adapter->tx_int_delay);
  904. if(adapter->hw.mac_type >= e1000_82540)
  905. E1000_WRITE_REG(&adapter->hw, TADV, adapter->tx_abs_int_delay);
  906. /* Program the Transmit Control Register */
  907. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  908. tctl &= ~E1000_TCTL_CT;
  909. tctl |= E1000_TCTL_EN | E1000_TCTL_PSP |
  910. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  911. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  912. e1000_config_collision_dist(&adapter->hw);
  913. /* Setup Transmit Descriptor Settings for eop descriptor */
  914. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  915. E1000_TXD_CMD_IFCS;
  916. if(adapter->hw.mac_type < e1000_82543)
  917. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  918. else
  919. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  920. /* Cache if we're 82544 running in PCI-X because we'll
  921. * need this to apply a workaround later in the send path. */
  922. if(adapter->hw.mac_type == e1000_82544 &&
  923. adapter->hw.bus_type == e1000_bus_type_pcix)
  924. adapter->pcix_82544 = 1;
  925. }
  926. /**
  927. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  928. * @adapter: board private structure
  929. *
  930. * Returns 0 on success, negative on failure
  931. **/
  932. int
  933. e1000_setup_rx_resources(struct e1000_adapter *adapter)
  934. {
  935. struct e1000_desc_ring *rxdr = &adapter->rx_ring;
  936. struct pci_dev *pdev = adapter->pdev;
  937. int size, desc_len;
  938. size = sizeof(struct e1000_buffer) * rxdr->count;
  939. rxdr->buffer_info = vmalloc(size);
  940. if(!rxdr->buffer_info) {
  941. DPRINTK(PROBE, ERR,
  942. "Unable to allocate memory for the receive descriptor ring\n");
  943. return -ENOMEM;
  944. }
  945. memset(rxdr->buffer_info, 0, size);
  946. size = sizeof(struct e1000_ps_page) * rxdr->count;
  947. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  948. if(!rxdr->ps_page) {
  949. vfree(rxdr->buffer_info);
  950. DPRINTK(PROBE, ERR,
  951. "Unable to allocate memory for the receive descriptor ring\n");
  952. return -ENOMEM;
  953. }
  954. memset(rxdr->ps_page, 0, size);
  955. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  956. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  957. if(!rxdr->ps_page_dma) {
  958. vfree(rxdr->buffer_info);
  959. kfree(rxdr->ps_page);
  960. DPRINTK(PROBE, ERR,
  961. "Unable to allocate memory for the receive descriptor ring\n");
  962. return -ENOMEM;
  963. }
  964. memset(rxdr->ps_page_dma, 0, size);
  965. if(adapter->hw.mac_type <= e1000_82547_rev_2)
  966. desc_len = sizeof(struct e1000_rx_desc);
  967. else
  968. desc_len = sizeof(union e1000_rx_desc_packet_split);
  969. /* Round up to nearest 4K */
  970. rxdr->size = rxdr->count * desc_len;
  971. E1000_ROUNDUP(rxdr->size, 4096);
  972. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  973. if(!rxdr->desc) {
  974. setup_rx_desc_die:
  975. vfree(rxdr->buffer_info);
  976. kfree(rxdr->ps_page);
  977. kfree(rxdr->ps_page_dma);
  978. DPRINTK(PROBE, ERR,
  979. "Unable to allocate memory for the receive descriptor ring\n");
  980. return -ENOMEM;
  981. }
  982. /* Fix for errata 23, can't cross 64kB boundary */
  983. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  984. void *olddesc = rxdr->desc;
  985. dma_addr_t olddma = rxdr->dma;
  986. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  987. "at %p\n", rxdr->size, rxdr->desc);
  988. /* Try again, without freeing the previous */
  989. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  990. if(!rxdr->desc) {
  991. /* Failed allocation, critical failure */
  992. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  993. goto setup_rx_desc_die;
  994. }
  995. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  996. /* give up */
  997. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  998. rxdr->dma);
  999. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1000. DPRINTK(PROBE, ERR,
  1001. "Unable to allocate aligned memory "
  1002. "for the receive descriptor ring\n");
  1003. vfree(rxdr->buffer_info);
  1004. kfree(rxdr->ps_page);
  1005. kfree(rxdr->ps_page_dma);
  1006. return -ENOMEM;
  1007. } else {
  1008. /* Free old allocation, new allocation was successful */
  1009. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1010. }
  1011. }
  1012. memset(rxdr->desc, 0, rxdr->size);
  1013. rxdr->next_to_clean = 0;
  1014. rxdr->next_to_use = 0;
  1015. return 0;
  1016. }
  1017. /**
  1018. * e1000_setup_rctl - configure the receive control registers
  1019. * @adapter: Board private structure
  1020. **/
  1021. static void
  1022. e1000_setup_rctl(struct e1000_adapter *adapter)
  1023. {
  1024. uint32_t rctl, rfctl;
  1025. uint32_t psrctl = 0;
  1026. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1027. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1028. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1029. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1030. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1031. if(adapter->hw.tbi_compatibility_on == 1)
  1032. rctl |= E1000_RCTL_SBP;
  1033. else
  1034. rctl &= ~E1000_RCTL_SBP;
  1035. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1036. rctl &= ~E1000_RCTL_LPE;
  1037. else
  1038. rctl |= E1000_RCTL_LPE;
  1039. /* Setup buffer sizes */
  1040. if(adapter->hw.mac_type == e1000_82573) {
  1041. /* We can now specify buffers in 1K increments.
  1042. * BSIZE and BSEX are ignored in this case. */
  1043. rctl |= adapter->rx_buffer_len << 0x11;
  1044. } else {
  1045. rctl &= ~E1000_RCTL_SZ_4096;
  1046. rctl |= E1000_RCTL_BSEX;
  1047. switch (adapter->rx_buffer_len) {
  1048. case E1000_RXBUFFER_2048:
  1049. default:
  1050. rctl |= E1000_RCTL_SZ_2048;
  1051. rctl &= ~E1000_RCTL_BSEX;
  1052. break;
  1053. case E1000_RXBUFFER_4096:
  1054. rctl |= E1000_RCTL_SZ_4096;
  1055. break;
  1056. case E1000_RXBUFFER_8192:
  1057. rctl |= E1000_RCTL_SZ_8192;
  1058. break;
  1059. case E1000_RXBUFFER_16384:
  1060. rctl |= E1000_RCTL_SZ_16384;
  1061. break;
  1062. }
  1063. }
  1064. #ifdef CONFIG_E1000_PACKET_SPLIT
  1065. /* 82571 and greater support packet-split where the protocol
  1066. * header is placed in skb->data and the packet data is
  1067. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1068. * In the case of a non-split, skb->data is linearly filled,
  1069. * followed by the page buffers. Therefore, skb->data is
  1070. * sized to hold the largest protocol header.
  1071. */
  1072. adapter->rx_ps = (adapter->hw.mac_type > e1000_82547_rev_2)
  1073. && (adapter->netdev->mtu
  1074. < ((3 * PAGE_SIZE) + adapter->rx_ps_bsize0));
  1075. #endif
  1076. if(adapter->rx_ps) {
  1077. /* Configure extra packet-split registers */
  1078. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1079. rfctl |= E1000_RFCTL_EXTEN;
  1080. /* disable IPv6 packet split support */
  1081. rfctl |= E1000_RFCTL_IPV6_DIS;
  1082. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1083. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1084. psrctl |= adapter->rx_ps_bsize0 >>
  1085. E1000_PSRCTL_BSIZE0_SHIFT;
  1086. psrctl |= PAGE_SIZE >>
  1087. E1000_PSRCTL_BSIZE1_SHIFT;
  1088. psrctl |= PAGE_SIZE <<
  1089. E1000_PSRCTL_BSIZE2_SHIFT;
  1090. psrctl |= PAGE_SIZE <<
  1091. E1000_PSRCTL_BSIZE3_SHIFT;
  1092. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1093. }
  1094. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1095. }
  1096. /**
  1097. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1098. * @adapter: board private structure
  1099. *
  1100. * Configure the Rx unit of the MAC after a reset.
  1101. **/
  1102. static void
  1103. e1000_configure_rx(struct e1000_adapter *adapter)
  1104. {
  1105. uint64_t rdba = adapter->rx_ring.dma;
  1106. uint32_t rdlen, rctl, rxcsum;
  1107. if(adapter->rx_ps) {
  1108. rdlen = adapter->rx_ring.count *
  1109. sizeof(union e1000_rx_desc_packet_split);
  1110. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1111. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1112. } else {
  1113. rdlen = adapter->rx_ring.count * sizeof(struct e1000_rx_desc);
  1114. adapter->clean_rx = e1000_clean_rx_irq;
  1115. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1116. }
  1117. /* disable receives while setting up the descriptors */
  1118. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1119. E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
  1120. /* set the Receive Delay Timer Register */
  1121. E1000_WRITE_REG(&adapter->hw, RDTR, adapter->rx_int_delay);
  1122. if(adapter->hw.mac_type >= e1000_82540) {
  1123. E1000_WRITE_REG(&adapter->hw, RADV, adapter->rx_abs_int_delay);
  1124. if(adapter->itr > 1)
  1125. E1000_WRITE_REG(&adapter->hw, ITR,
  1126. 1000000000 / (adapter->itr * 256));
  1127. }
  1128. /* Setup the Base and Length of the Rx Descriptor Ring */
  1129. E1000_WRITE_REG(&adapter->hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1130. E1000_WRITE_REG(&adapter->hw, RDBAH, (rdba >> 32));
  1131. E1000_WRITE_REG(&adapter->hw, RDLEN, rdlen);
  1132. /* Setup the HW Rx Head and Tail Descriptor Pointers */
  1133. E1000_WRITE_REG(&adapter->hw, RDH, 0);
  1134. E1000_WRITE_REG(&adapter->hw, RDT, 0);
  1135. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1136. if(adapter->hw.mac_type >= e1000_82543) {
  1137. rxcsum = E1000_READ_REG(&adapter->hw, RXCSUM);
  1138. if(adapter->rx_csum == TRUE) {
  1139. rxcsum |= E1000_RXCSUM_TUOFL;
  1140. /* Enable 82573 IPv4 payload checksum for UDP fragments
  1141. * Must be used in conjunction with packet-split. */
  1142. if((adapter->hw.mac_type > e1000_82547_rev_2) &&
  1143. (adapter->rx_ps)) {
  1144. rxcsum |= E1000_RXCSUM_IPPCSE;
  1145. }
  1146. } else {
  1147. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1148. /* don't need to clear IPPCSE as it defaults to 0 */
  1149. }
  1150. E1000_WRITE_REG(&adapter->hw, RXCSUM, rxcsum);
  1151. }
  1152. if (adapter->hw.mac_type == e1000_82573)
  1153. E1000_WRITE_REG(&adapter->hw, ERT, 0x0100);
  1154. /* Enable Receives */
  1155. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1156. }
  1157. /**
  1158. * e1000_free_tx_resources - Free Tx Resources
  1159. * @adapter: board private structure
  1160. *
  1161. * Free all transmit software resources
  1162. **/
  1163. void
  1164. e1000_free_tx_resources(struct e1000_adapter *adapter)
  1165. {
  1166. struct pci_dev *pdev = adapter->pdev;
  1167. e1000_clean_tx_ring(adapter);
  1168. vfree(adapter->tx_ring.buffer_info);
  1169. adapter->tx_ring.buffer_info = NULL;
  1170. pci_free_consistent(pdev, adapter->tx_ring.size,
  1171. adapter->tx_ring.desc, adapter->tx_ring.dma);
  1172. adapter->tx_ring.desc = NULL;
  1173. }
  1174. static inline void
  1175. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1176. struct e1000_buffer *buffer_info)
  1177. {
  1178. if(buffer_info->dma) {
  1179. pci_unmap_page(adapter->pdev,
  1180. buffer_info->dma,
  1181. buffer_info->length,
  1182. PCI_DMA_TODEVICE);
  1183. buffer_info->dma = 0;
  1184. }
  1185. if(buffer_info->skb) {
  1186. dev_kfree_skb_any(buffer_info->skb);
  1187. buffer_info->skb = NULL;
  1188. }
  1189. }
  1190. /**
  1191. * e1000_clean_tx_ring - Free Tx Buffers
  1192. * @adapter: board private structure
  1193. **/
  1194. static void
  1195. e1000_clean_tx_ring(struct e1000_adapter *adapter)
  1196. {
  1197. struct e1000_desc_ring *tx_ring = &adapter->tx_ring;
  1198. struct e1000_buffer *buffer_info;
  1199. unsigned long size;
  1200. unsigned int i;
  1201. /* Free all the Tx ring sk_buffs */
  1202. if (likely(adapter->previous_buffer_info.skb != NULL)) {
  1203. e1000_unmap_and_free_tx_resource(adapter,
  1204. &adapter->previous_buffer_info);
  1205. }
  1206. for(i = 0; i < tx_ring->count; i++) {
  1207. buffer_info = &tx_ring->buffer_info[i];
  1208. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1209. }
  1210. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1211. memset(tx_ring->buffer_info, 0, size);
  1212. /* Zero out the descriptor ring */
  1213. memset(tx_ring->desc, 0, tx_ring->size);
  1214. tx_ring->next_to_use = 0;
  1215. tx_ring->next_to_clean = 0;
  1216. E1000_WRITE_REG(&adapter->hw, TDH, 0);
  1217. E1000_WRITE_REG(&adapter->hw, TDT, 0);
  1218. }
  1219. /**
  1220. * e1000_free_rx_resources - Free Rx Resources
  1221. * @adapter: board private structure
  1222. *
  1223. * Free all receive software resources
  1224. **/
  1225. void
  1226. e1000_free_rx_resources(struct e1000_adapter *adapter)
  1227. {
  1228. struct e1000_desc_ring *rx_ring = &adapter->rx_ring;
  1229. struct pci_dev *pdev = adapter->pdev;
  1230. e1000_clean_rx_ring(adapter);
  1231. vfree(rx_ring->buffer_info);
  1232. rx_ring->buffer_info = NULL;
  1233. kfree(rx_ring->ps_page);
  1234. rx_ring->ps_page = NULL;
  1235. kfree(rx_ring->ps_page_dma);
  1236. rx_ring->ps_page_dma = NULL;
  1237. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1238. rx_ring->desc = NULL;
  1239. }
  1240. /**
  1241. * e1000_clean_rx_ring - Free Rx Buffers
  1242. * @adapter: board private structure
  1243. **/
  1244. static void
  1245. e1000_clean_rx_ring(struct e1000_adapter *adapter)
  1246. {
  1247. struct e1000_desc_ring *rx_ring = &adapter->rx_ring;
  1248. struct e1000_buffer *buffer_info;
  1249. struct e1000_ps_page *ps_page;
  1250. struct e1000_ps_page_dma *ps_page_dma;
  1251. struct pci_dev *pdev = adapter->pdev;
  1252. unsigned long size;
  1253. unsigned int i, j;
  1254. /* Free all the Rx ring sk_buffs */
  1255. for(i = 0; i < rx_ring->count; i++) {
  1256. buffer_info = &rx_ring->buffer_info[i];
  1257. if(buffer_info->skb) {
  1258. ps_page = &rx_ring->ps_page[i];
  1259. ps_page_dma = &rx_ring->ps_page_dma[i];
  1260. pci_unmap_single(pdev,
  1261. buffer_info->dma,
  1262. buffer_info->length,
  1263. PCI_DMA_FROMDEVICE);
  1264. dev_kfree_skb(buffer_info->skb);
  1265. buffer_info->skb = NULL;
  1266. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  1267. if(!ps_page->ps_page[j]) break;
  1268. pci_unmap_single(pdev,
  1269. ps_page_dma->ps_page_dma[j],
  1270. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1271. ps_page_dma->ps_page_dma[j] = 0;
  1272. put_page(ps_page->ps_page[j]);
  1273. ps_page->ps_page[j] = NULL;
  1274. }
  1275. }
  1276. }
  1277. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1278. memset(rx_ring->buffer_info, 0, size);
  1279. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1280. memset(rx_ring->ps_page, 0, size);
  1281. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1282. memset(rx_ring->ps_page_dma, 0, size);
  1283. /* Zero out the descriptor ring */
  1284. memset(rx_ring->desc, 0, rx_ring->size);
  1285. rx_ring->next_to_clean = 0;
  1286. rx_ring->next_to_use = 0;
  1287. E1000_WRITE_REG(&adapter->hw, RDH, 0);
  1288. E1000_WRITE_REG(&adapter->hw, RDT, 0);
  1289. }
  1290. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1291. * and memory write and invalidate disabled for certain operations
  1292. */
  1293. static void
  1294. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1295. {
  1296. struct net_device *netdev = adapter->netdev;
  1297. uint32_t rctl;
  1298. e1000_pci_clear_mwi(&adapter->hw);
  1299. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1300. rctl |= E1000_RCTL_RST;
  1301. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1302. E1000_WRITE_FLUSH(&adapter->hw);
  1303. mdelay(5);
  1304. if(netif_running(netdev))
  1305. e1000_clean_rx_ring(adapter);
  1306. }
  1307. static void
  1308. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1309. {
  1310. struct net_device *netdev = adapter->netdev;
  1311. uint32_t rctl;
  1312. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1313. rctl &= ~E1000_RCTL_RST;
  1314. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1315. E1000_WRITE_FLUSH(&adapter->hw);
  1316. mdelay(5);
  1317. if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1318. e1000_pci_set_mwi(&adapter->hw);
  1319. if(netif_running(netdev)) {
  1320. e1000_configure_rx(adapter);
  1321. e1000_alloc_rx_buffers(adapter);
  1322. }
  1323. }
  1324. /**
  1325. * e1000_set_mac - Change the Ethernet Address of the NIC
  1326. * @netdev: network interface device structure
  1327. * @p: pointer to an address structure
  1328. *
  1329. * Returns 0 on success, negative on failure
  1330. **/
  1331. static int
  1332. e1000_set_mac(struct net_device *netdev, void *p)
  1333. {
  1334. struct e1000_adapter *adapter = netdev_priv(netdev);
  1335. struct sockaddr *addr = p;
  1336. if(!is_valid_ether_addr(addr->sa_data))
  1337. return -EADDRNOTAVAIL;
  1338. /* 82542 2.0 needs to be in reset to write receive address registers */
  1339. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1340. e1000_enter_82542_rst(adapter);
  1341. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1342. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1343. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1344. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1345. e1000_leave_82542_rst(adapter);
  1346. return 0;
  1347. }
  1348. /**
  1349. * e1000_set_multi - Multicast and Promiscuous mode set
  1350. * @netdev: network interface device structure
  1351. *
  1352. * The set_multi entry point is called whenever the multicast address
  1353. * list or the network interface flags are updated. This routine is
  1354. * responsible for configuring the hardware for proper multicast,
  1355. * promiscuous mode, and all-multi behavior.
  1356. **/
  1357. static void
  1358. e1000_set_multi(struct net_device *netdev)
  1359. {
  1360. struct e1000_adapter *adapter = netdev_priv(netdev);
  1361. struct e1000_hw *hw = &adapter->hw;
  1362. struct dev_mc_list *mc_ptr;
  1363. unsigned long flags;
  1364. uint32_t rctl;
  1365. uint32_t hash_value;
  1366. int i;
  1367. spin_lock_irqsave(&adapter->tx_lock, flags);
  1368. /* Check for Promiscuous and All Multicast modes */
  1369. rctl = E1000_READ_REG(hw, RCTL);
  1370. if(netdev->flags & IFF_PROMISC) {
  1371. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1372. } else if(netdev->flags & IFF_ALLMULTI) {
  1373. rctl |= E1000_RCTL_MPE;
  1374. rctl &= ~E1000_RCTL_UPE;
  1375. } else {
  1376. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1377. }
  1378. E1000_WRITE_REG(hw, RCTL, rctl);
  1379. /* 82542 2.0 needs to be in reset to write receive address registers */
  1380. if(hw->mac_type == e1000_82542_rev2_0)
  1381. e1000_enter_82542_rst(adapter);
  1382. /* load the first 14 multicast address into the exact filters 1-14
  1383. * RAR 0 is used for the station MAC adddress
  1384. * if there are not 14 addresses, go ahead and clear the filters
  1385. */
  1386. mc_ptr = netdev->mc_list;
  1387. for(i = 1; i < E1000_RAR_ENTRIES; i++) {
  1388. if(mc_ptr) {
  1389. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1390. mc_ptr = mc_ptr->next;
  1391. } else {
  1392. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1393. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1394. }
  1395. }
  1396. /* clear the old settings from the multicast hash table */
  1397. for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1398. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1399. /* load any remaining addresses into the hash table */
  1400. for(; mc_ptr; mc_ptr = mc_ptr->next) {
  1401. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1402. e1000_mta_set(hw, hash_value);
  1403. }
  1404. if(hw->mac_type == e1000_82542_rev2_0)
  1405. e1000_leave_82542_rst(adapter);
  1406. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1407. }
  1408. /* Need to wait a few seconds after link up to get diagnostic information from
  1409. * the phy */
  1410. static void
  1411. e1000_update_phy_info(unsigned long data)
  1412. {
  1413. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1414. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1415. }
  1416. /**
  1417. * e1000_82547_tx_fifo_stall - Timer Call-back
  1418. * @data: pointer to adapter cast into an unsigned long
  1419. **/
  1420. static void
  1421. e1000_82547_tx_fifo_stall(unsigned long data)
  1422. {
  1423. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1424. struct net_device *netdev = adapter->netdev;
  1425. uint32_t tctl;
  1426. if(atomic_read(&adapter->tx_fifo_stall)) {
  1427. if((E1000_READ_REG(&adapter->hw, TDT) ==
  1428. E1000_READ_REG(&adapter->hw, TDH)) &&
  1429. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1430. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1431. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1432. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1433. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1434. E1000_WRITE_REG(&adapter->hw, TCTL,
  1435. tctl & ~E1000_TCTL_EN);
  1436. E1000_WRITE_REG(&adapter->hw, TDFT,
  1437. adapter->tx_head_addr);
  1438. E1000_WRITE_REG(&adapter->hw, TDFH,
  1439. adapter->tx_head_addr);
  1440. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1441. adapter->tx_head_addr);
  1442. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1443. adapter->tx_head_addr);
  1444. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1445. E1000_WRITE_FLUSH(&adapter->hw);
  1446. adapter->tx_fifo_head = 0;
  1447. atomic_set(&adapter->tx_fifo_stall, 0);
  1448. netif_wake_queue(netdev);
  1449. } else {
  1450. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1451. }
  1452. }
  1453. }
  1454. /**
  1455. * e1000_watchdog - Timer Call-back
  1456. * @data: pointer to adapter cast into an unsigned long
  1457. **/
  1458. static void
  1459. e1000_watchdog(unsigned long data)
  1460. {
  1461. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1462. /* Do the rest outside of interrupt context */
  1463. schedule_work(&adapter->watchdog_task);
  1464. }
  1465. static void
  1466. e1000_watchdog_task(struct e1000_adapter *adapter)
  1467. {
  1468. struct net_device *netdev = adapter->netdev;
  1469. struct e1000_desc_ring *txdr = &adapter->tx_ring;
  1470. uint32_t link;
  1471. e1000_check_for_link(&adapter->hw);
  1472. if (adapter->hw.mac_type == e1000_82573) {
  1473. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1474. if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1475. e1000_update_mng_vlan(adapter);
  1476. }
  1477. if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1478. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1479. link = !adapter->hw.serdes_link_down;
  1480. else
  1481. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1482. if(link) {
  1483. if(!netif_carrier_ok(netdev)) {
  1484. e1000_get_speed_and_duplex(&adapter->hw,
  1485. &adapter->link_speed,
  1486. &adapter->link_duplex);
  1487. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1488. adapter->link_speed,
  1489. adapter->link_duplex == FULL_DUPLEX ?
  1490. "Full Duplex" : "Half Duplex");
  1491. netif_carrier_on(netdev);
  1492. netif_wake_queue(netdev);
  1493. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1494. adapter->smartspeed = 0;
  1495. }
  1496. } else {
  1497. if(netif_carrier_ok(netdev)) {
  1498. adapter->link_speed = 0;
  1499. adapter->link_duplex = 0;
  1500. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1501. netif_carrier_off(netdev);
  1502. netif_stop_queue(netdev);
  1503. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1504. }
  1505. e1000_smartspeed(adapter);
  1506. }
  1507. e1000_update_stats(adapter);
  1508. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  1509. adapter->tpt_old = adapter->stats.tpt;
  1510. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  1511. adapter->colc_old = adapter->stats.colc;
  1512. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  1513. adapter->gorcl_old = adapter->stats.gorcl;
  1514. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  1515. adapter->gotcl_old = adapter->stats.gotcl;
  1516. e1000_update_adaptive(&adapter->hw);
  1517. if(!netif_carrier_ok(netdev)) {
  1518. if(E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  1519. /* We've lost link, so the controller stops DMA,
  1520. * but we've got queued Tx work that's never going
  1521. * to get done, so reset controller to flush Tx.
  1522. * (Do the reset outside of interrupt context). */
  1523. schedule_work(&adapter->tx_timeout_task);
  1524. }
  1525. }
  1526. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  1527. if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  1528. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  1529. * asymmetrical Tx or Rx gets ITR=8000; everyone
  1530. * else is between 2000-8000. */
  1531. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  1532. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  1533. adapter->gotcl - adapter->gorcl :
  1534. adapter->gorcl - adapter->gotcl) / 10000;
  1535. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  1536. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  1537. }
  1538. /* Cause software interrupt to ensure rx ring is cleaned */
  1539. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  1540. /* Force detection of hung controller every watchdog period */
  1541. adapter->detect_tx_hung = TRUE;
  1542. /* Reset the timer */
  1543. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  1544. }
  1545. #define E1000_TX_FLAGS_CSUM 0x00000001
  1546. #define E1000_TX_FLAGS_VLAN 0x00000002
  1547. #define E1000_TX_FLAGS_TSO 0x00000004
  1548. #define E1000_TX_FLAGS_IPV4 0x00000008
  1549. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  1550. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  1551. static inline int
  1552. e1000_tso(struct e1000_adapter *adapter, struct sk_buff *skb)
  1553. {
  1554. #ifdef NETIF_F_TSO
  1555. struct e1000_context_desc *context_desc;
  1556. unsigned int i;
  1557. uint32_t cmd_length = 0;
  1558. uint16_t ipcse = 0, tucse, mss;
  1559. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  1560. int err;
  1561. if(skb_shinfo(skb)->tso_size) {
  1562. if (skb_header_cloned(skb)) {
  1563. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1564. if (err)
  1565. return err;
  1566. }
  1567. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  1568. mss = skb_shinfo(skb)->tso_size;
  1569. if(skb->protocol == ntohs(ETH_P_IP)) {
  1570. skb->nh.iph->tot_len = 0;
  1571. skb->nh.iph->check = 0;
  1572. skb->h.th->check =
  1573. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  1574. skb->nh.iph->daddr,
  1575. 0,
  1576. IPPROTO_TCP,
  1577. 0);
  1578. cmd_length = E1000_TXD_CMD_IP;
  1579. ipcse = skb->h.raw - skb->data - 1;
  1580. #ifdef NETIF_F_TSO_IPV6
  1581. } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
  1582. skb->nh.ipv6h->payload_len = 0;
  1583. skb->h.th->check =
  1584. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  1585. &skb->nh.ipv6h->daddr,
  1586. 0,
  1587. IPPROTO_TCP,
  1588. 0);
  1589. ipcse = 0;
  1590. #endif
  1591. }
  1592. ipcss = skb->nh.raw - skb->data;
  1593. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  1594. tucss = skb->h.raw - skb->data;
  1595. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  1596. tucse = 0;
  1597. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  1598. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  1599. i = adapter->tx_ring.next_to_use;
  1600. context_desc = E1000_CONTEXT_DESC(adapter->tx_ring, i);
  1601. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  1602. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  1603. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  1604. context_desc->upper_setup.tcp_fields.tucss = tucss;
  1605. context_desc->upper_setup.tcp_fields.tucso = tucso;
  1606. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  1607. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  1608. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  1609. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  1610. if(++i == adapter->tx_ring.count) i = 0;
  1611. adapter->tx_ring.next_to_use = i;
  1612. return 1;
  1613. }
  1614. #endif
  1615. return 0;
  1616. }
  1617. static inline boolean_t
  1618. e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
  1619. {
  1620. struct e1000_context_desc *context_desc;
  1621. unsigned int i;
  1622. uint8_t css;
  1623. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  1624. css = skb->h.raw - skb->data;
  1625. i = adapter->tx_ring.next_to_use;
  1626. context_desc = E1000_CONTEXT_DESC(adapter->tx_ring, i);
  1627. context_desc->upper_setup.tcp_fields.tucss = css;
  1628. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  1629. context_desc->upper_setup.tcp_fields.tucse = 0;
  1630. context_desc->tcp_seg_setup.data = 0;
  1631. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  1632. if(unlikely(++i == adapter->tx_ring.count)) i = 0;
  1633. adapter->tx_ring.next_to_use = i;
  1634. return TRUE;
  1635. }
  1636. return FALSE;
  1637. }
  1638. #define E1000_MAX_TXD_PWR 12
  1639. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  1640. static inline int
  1641. e1000_tx_map(struct e1000_adapter *adapter, struct sk_buff *skb,
  1642. unsigned int first, unsigned int max_per_txd,
  1643. unsigned int nr_frags, unsigned int mss)
  1644. {
  1645. struct e1000_desc_ring *tx_ring = &adapter->tx_ring;
  1646. struct e1000_buffer *buffer_info;
  1647. unsigned int len = skb->len;
  1648. unsigned int offset = 0, size, count = 0, i;
  1649. unsigned int f;
  1650. len -= skb->data_len;
  1651. i = tx_ring->next_to_use;
  1652. while(len) {
  1653. buffer_info = &tx_ring->buffer_info[i];
  1654. size = min(len, max_per_txd);
  1655. #ifdef NETIF_F_TSO
  1656. /* Workaround for premature desc write-backs
  1657. * in TSO mode. Append 4-byte sentinel desc */
  1658. if(unlikely(mss && !nr_frags && size == len && size > 8))
  1659. size -= 4;
  1660. #endif
  1661. /* work-around for errata 10 and it applies
  1662. * to all controllers in PCI-X mode
  1663. * The fix is to make sure that the first descriptor of a
  1664. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  1665. */
  1666. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  1667. (size > 2015) && count == 0))
  1668. size = 2015;
  1669. /* Workaround for potential 82544 hang in PCI-X. Avoid
  1670. * terminating buffers within evenly-aligned dwords. */
  1671. if(unlikely(adapter->pcix_82544 &&
  1672. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  1673. size > 4))
  1674. size -= 4;
  1675. buffer_info->length = size;
  1676. buffer_info->dma =
  1677. pci_map_single(adapter->pdev,
  1678. skb->data + offset,
  1679. size,
  1680. PCI_DMA_TODEVICE);
  1681. buffer_info->time_stamp = jiffies;
  1682. len -= size;
  1683. offset += size;
  1684. count++;
  1685. if(unlikely(++i == tx_ring->count)) i = 0;
  1686. }
  1687. for(f = 0; f < nr_frags; f++) {
  1688. struct skb_frag_struct *frag;
  1689. frag = &skb_shinfo(skb)->frags[f];
  1690. len = frag->size;
  1691. offset = frag->page_offset;
  1692. while(len) {
  1693. buffer_info = &tx_ring->buffer_info[i];
  1694. size = min(len, max_per_txd);
  1695. #ifdef NETIF_F_TSO
  1696. /* Workaround for premature desc write-backs
  1697. * in TSO mode. Append 4-byte sentinel desc */
  1698. if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  1699. size -= 4;
  1700. #endif
  1701. /* Workaround for potential 82544 hang in PCI-X.
  1702. * Avoid terminating buffers within evenly-aligned
  1703. * dwords. */
  1704. if(unlikely(adapter->pcix_82544 &&
  1705. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  1706. size > 4))
  1707. size -= 4;
  1708. buffer_info->length = size;
  1709. buffer_info->dma =
  1710. pci_map_page(adapter->pdev,
  1711. frag->page,
  1712. offset,
  1713. size,
  1714. PCI_DMA_TODEVICE);
  1715. buffer_info->time_stamp = jiffies;
  1716. len -= size;
  1717. offset += size;
  1718. count++;
  1719. if(unlikely(++i == tx_ring->count)) i = 0;
  1720. }
  1721. }
  1722. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  1723. tx_ring->buffer_info[i].skb = skb;
  1724. tx_ring->buffer_info[first].next_to_watch = i;
  1725. return count;
  1726. }
  1727. static inline void
  1728. e1000_tx_queue(struct e1000_adapter *adapter, int count, int tx_flags)
  1729. {
  1730. struct e1000_desc_ring *tx_ring = &adapter->tx_ring;
  1731. struct e1000_tx_desc *tx_desc = NULL;
  1732. struct e1000_buffer *buffer_info;
  1733. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  1734. unsigned int i;
  1735. if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  1736. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  1737. E1000_TXD_CMD_TSE;
  1738. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  1739. if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
  1740. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  1741. }
  1742. if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  1743. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  1744. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  1745. }
  1746. if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  1747. txd_lower |= E1000_TXD_CMD_VLE;
  1748. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  1749. }
  1750. i = tx_ring->next_to_use;
  1751. while(count--) {
  1752. buffer_info = &tx_ring->buffer_info[i];
  1753. tx_desc = E1000_TX_DESC(*tx_ring, i);
  1754. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  1755. tx_desc->lower.data =
  1756. cpu_to_le32(txd_lower | buffer_info->length);
  1757. tx_desc->upper.data = cpu_to_le32(txd_upper);
  1758. if(unlikely(++i == tx_ring->count)) i = 0;
  1759. }
  1760. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  1761. /* Force memory writes to complete before letting h/w
  1762. * know there are new descriptors to fetch. (Only
  1763. * applicable for weak-ordered memory model archs,
  1764. * such as IA-64). */
  1765. wmb();
  1766. tx_ring->next_to_use = i;
  1767. E1000_WRITE_REG(&adapter->hw, TDT, i);
  1768. }
  1769. /**
  1770. * 82547 workaround to avoid controller hang in half-duplex environment.
  1771. * The workaround is to avoid queuing a large packet that would span
  1772. * the internal Tx FIFO ring boundary by notifying the stack to resend
  1773. * the packet at a later time. This gives the Tx FIFO an opportunity to
  1774. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  1775. * to the beginning of the Tx FIFO.
  1776. **/
  1777. #define E1000_FIFO_HDR 0x10
  1778. #define E1000_82547_PAD_LEN 0x3E0
  1779. static inline int
  1780. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  1781. {
  1782. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  1783. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  1784. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  1785. if(adapter->link_duplex != HALF_DUPLEX)
  1786. goto no_fifo_stall_required;
  1787. if(atomic_read(&adapter->tx_fifo_stall))
  1788. return 1;
  1789. if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  1790. atomic_set(&adapter->tx_fifo_stall, 1);
  1791. return 1;
  1792. }
  1793. no_fifo_stall_required:
  1794. adapter->tx_fifo_head += skb_fifo_len;
  1795. if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
  1796. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  1797. return 0;
  1798. }
  1799. #define MINIMUM_DHCP_PACKET_SIZE 282
  1800. static inline int
  1801. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  1802. {
  1803. struct e1000_hw *hw = &adapter->hw;
  1804. uint16_t length, offset;
  1805. if(vlan_tx_tag_present(skb)) {
  1806. if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  1807. ( adapter->hw.mng_cookie.status &
  1808. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  1809. return 0;
  1810. }
  1811. if(htons(ETH_P_IP) == skb->protocol) {
  1812. const struct iphdr *ip = skb->nh.iph;
  1813. if(IPPROTO_UDP == ip->protocol) {
  1814. struct udphdr *udp = (struct udphdr *)(skb->h.uh);
  1815. if(ntohs(udp->dest) == 67) {
  1816. offset = (uint8_t *)udp + 8 - skb->data;
  1817. length = skb->len - offset;
  1818. return e1000_mng_write_dhcp_info(hw,
  1819. (uint8_t *)udp + 8, length);
  1820. }
  1821. }
  1822. } else if((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
  1823. struct ethhdr *eth = (struct ethhdr *) skb->data;
  1824. if((htons(ETH_P_IP) == eth->h_proto)) {
  1825. const struct iphdr *ip =
  1826. (struct iphdr *)((uint8_t *)skb->data+14);
  1827. if(IPPROTO_UDP == ip->protocol) {
  1828. struct udphdr *udp =
  1829. (struct udphdr *)((uint8_t *)ip +
  1830. (ip->ihl << 2));
  1831. if(ntohs(udp->dest) == 67) {
  1832. offset = (uint8_t *)udp + 8 - skb->data;
  1833. length = skb->len - offset;
  1834. return e1000_mng_write_dhcp_info(hw,
  1835. (uint8_t *)udp + 8,
  1836. length);
  1837. }
  1838. }
  1839. }
  1840. }
  1841. return 0;
  1842. }
  1843. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  1844. static int
  1845. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1846. {
  1847. struct e1000_adapter *adapter = netdev_priv(netdev);
  1848. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  1849. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  1850. unsigned int tx_flags = 0;
  1851. unsigned int len = skb->len;
  1852. unsigned long flags;
  1853. unsigned int nr_frags = 0;
  1854. unsigned int mss = 0;
  1855. int count = 0;
  1856. int tso;
  1857. unsigned int f;
  1858. len -= skb->data_len;
  1859. if(unlikely(skb->len <= 0)) {
  1860. dev_kfree_skb_any(skb);
  1861. return NETDEV_TX_OK;
  1862. }
  1863. #ifdef NETIF_F_TSO
  1864. mss = skb_shinfo(skb)->tso_size;
  1865. /* The controller does a simple calculation to
  1866. * make sure there is enough room in the FIFO before
  1867. * initiating the DMA for each buffer. The calc is:
  1868. * 4 = ceil(buffer len/mss). To make sure we don't
  1869. * overrun the FIFO, adjust the max buffer len if mss
  1870. * drops. */
  1871. if(mss) {
  1872. max_per_txd = min(mss << 2, max_per_txd);
  1873. max_txd_pwr = fls(max_per_txd) - 1;
  1874. }
  1875. if((mss) || (skb->ip_summed == CHECKSUM_HW))
  1876. count++;
  1877. count++;
  1878. #else
  1879. if(skb->ip_summed == CHECKSUM_HW)
  1880. count++;
  1881. #endif
  1882. count += TXD_USE_COUNT(len, max_txd_pwr);
  1883. if(adapter->pcix_82544)
  1884. count++;
  1885. /* work-around for errata 10 and it applies to all controllers
  1886. * in PCI-X mode, so add one more descriptor to the count
  1887. */
  1888. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  1889. (len > 2015)))
  1890. count++;
  1891. nr_frags = skb_shinfo(skb)->nr_frags;
  1892. for(f = 0; f < nr_frags; f++)
  1893. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  1894. max_txd_pwr);
  1895. if(adapter->pcix_82544)
  1896. count += nr_frags;
  1897. local_irq_save(flags);
  1898. if (!spin_trylock(&adapter->tx_lock)) {
  1899. /* Collision - tell upper layer to requeue */
  1900. local_irq_restore(flags);
  1901. return NETDEV_TX_LOCKED;
  1902. }
  1903. if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  1904. e1000_transfer_dhcp_info(adapter, skb);
  1905. /* need: count + 2 desc gap to keep tail from touching
  1906. * head, otherwise try next time */
  1907. if(unlikely(E1000_DESC_UNUSED(&adapter->tx_ring) < count + 2)) {
  1908. netif_stop_queue(netdev);
  1909. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1910. return NETDEV_TX_BUSY;
  1911. }
  1912. if(unlikely(adapter->hw.mac_type == e1000_82547)) {
  1913. if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  1914. netif_stop_queue(netdev);
  1915. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  1916. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1917. return NETDEV_TX_BUSY;
  1918. }
  1919. }
  1920. if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  1921. tx_flags |= E1000_TX_FLAGS_VLAN;
  1922. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  1923. }
  1924. first = adapter->tx_ring.next_to_use;
  1925. tso = e1000_tso(adapter, skb);
  1926. if (tso < 0) {
  1927. dev_kfree_skb_any(skb);
  1928. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1929. return NETDEV_TX_OK;
  1930. }
  1931. if (likely(tso))
  1932. tx_flags |= E1000_TX_FLAGS_TSO;
  1933. else if(likely(e1000_tx_csum(adapter, skb)))
  1934. tx_flags |= E1000_TX_FLAGS_CSUM;
  1935. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  1936. * 82573 hardware supports TSO capabilities for IPv6 as well...
  1937. * no longer assume, we must. */
  1938. if(likely(skb->protocol == ntohs(ETH_P_IP)))
  1939. tx_flags |= E1000_TX_FLAGS_IPV4;
  1940. e1000_tx_queue(adapter,
  1941. e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss),
  1942. tx_flags);
  1943. netdev->trans_start = jiffies;
  1944. /* Make sure there is space in the ring for the next send. */
  1945. if(unlikely(E1000_DESC_UNUSED(&adapter->tx_ring) < MAX_SKB_FRAGS + 2))
  1946. netif_stop_queue(netdev);
  1947. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1948. return NETDEV_TX_OK;
  1949. }
  1950. /**
  1951. * e1000_tx_timeout - Respond to a Tx Hang
  1952. * @netdev: network interface device structure
  1953. **/
  1954. static void
  1955. e1000_tx_timeout(struct net_device *netdev)
  1956. {
  1957. struct e1000_adapter *adapter = netdev_priv(netdev);
  1958. /* Do the reset outside of interrupt context */
  1959. schedule_work(&adapter->tx_timeout_task);
  1960. }
  1961. static void
  1962. e1000_tx_timeout_task(struct net_device *netdev)
  1963. {
  1964. struct e1000_adapter *adapter = netdev_priv(netdev);
  1965. e1000_down(adapter);
  1966. e1000_up(adapter);
  1967. }
  1968. /**
  1969. * e1000_get_stats - Get System Network Statistics
  1970. * @netdev: network interface device structure
  1971. *
  1972. * Returns the address of the device statistics structure.
  1973. * The statistics are actually updated from the timer callback.
  1974. **/
  1975. static struct net_device_stats *
  1976. e1000_get_stats(struct net_device *netdev)
  1977. {
  1978. struct e1000_adapter *adapter = netdev_priv(netdev);
  1979. e1000_update_stats(adapter);
  1980. return &adapter->net_stats;
  1981. }
  1982. /**
  1983. * e1000_change_mtu - Change the Maximum Transfer Unit
  1984. * @netdev: network interface device structure
  1985. * @new_mtu: new value for maximum frame size
  1986. *
  1987. * Returns 0 on success, negative on failure
  1988. **/
  1989. static int
  1990. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  1991. {
  1992. struct e1000_adapter *adapter = netdev_priv(netdev);
  1993. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  1994. if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  1995. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  1996. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  1997. return -EINVAL;
  1998. }
  1999. #define MAX_STD_JUMBO_FRAME_SIZE 9216
  2000. /* might want this to be bigger enum check... */
  2001. if (adapter->hw.mac_type == e1000_82573 &&
  2002. max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2003. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2004. "on 82573\n");
  2005. return -EINVAL;
  2006. }
  2007. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  2008. adapter->rx_buffer_len = max_frame;
  2009. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2010. } else {
  2011. if(unlikely((adapter->hw.mac_type < e1000_82543) &&
  2012. (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
  2013. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2014. "on 82542\n");
  2015. return -EINVAL;
  2016. } else {
  2017. if(max_frame <= E1000_RXBUFFER_2048) {
  2018. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2019. } else if(max_frame <= E1000_RXBUFFER_4096) {
  2020. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2021. } else if(max_frame <= E1000_RXBUFFER_8192) {
  2022. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2023. } else if(max_frame <= E1000_RXBUFFER_16384) {
  2024. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2025. }
  2026. }
  2027. }
  2028. netdev->mtu = new_mtu;
  2029. if(netif_running(netdev)) {
  2030. e1000_down(adapter);
  2031. e1000_up(adapter);
  2032. }
  2033. adapter->hw.max_frame_size = max_frame;
  2034. return 0;
  2035. }
  2036. /**
  2037. * e1000_update_stats - Update the board statistics counters
  2038. * @adapter: board private structure
  2039. **/
  2040. void
  2041. e1000_update_stats(struct e1000_adapter *adapter)
  2042. {
  2043. struct e1000_hw *hw = &adapter->hw;
  2044. unsigned long flags;
  2045. uint16_t phy_tmp;
  2046. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2047. spin_lock_irqsave(&adapter->stats_lock, flags);
  2048. /* these counters are modified from e1000_adjust_tbi_stats,
  2049. * called from the interrupt context, so they must only
  2050. * be written while holding adapter->stats_lock
  2051. */
  2052. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2053. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2054. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2055. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2056. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2057. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2058. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2059. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2060. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2061. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2062. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2063. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2064. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2065. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2066. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2067. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2068. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2069. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2070. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2071. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2072. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2073. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2074. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2075. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2076. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2077. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2078. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2079. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2080. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2081. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2082. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2083. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2084. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2085. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2086. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2087. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2088. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2089. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2090. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2091. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2092. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2093. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2094. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2095. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2096. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2097. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2098. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2099. /* used for adaptive IFS */
  2100. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2101. adapter->stats.tpt += hw->tx_packet_delta;
  2102. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2103. adapter->stats.colc += hw->collision_delta;
  2104. if(hw->mac_type >= e1000_82543) {
  2105. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2106. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2107. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2108. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2109. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2110. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2111. }
  2112. if(hw->mac_type > e1000_82547_rev_2) {
  2113. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2114. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2115. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2116. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2117. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2118. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2119. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2120. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2121. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2122. }
  2123. /* Fill out the OS statistics structure */
  2124. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2125. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2126. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2127. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2128. adapter->net_stats.multicast = adapter->stats.mprc;
  2129. adapter->net_stats.collisions = adapter->stats.colc;
  2130. /* Rx Errors */
  2131. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2132. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2133. adapter->stats.rlec + adapter->stats.mpc +
  2134. adapter->stats.cexterr;
  2135. adapter->net_stats.rx_dropped = adapter->stats.mpc;
  2136. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2137. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2138. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2139. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  2140. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2141. /* Tx Errors */
  2142. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2143. adapter->stats.latecol;
  2144. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2145. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2146. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2147. /* Tx Dropped needs to be maintained elsewhere */
  2148. /* Phy Stats */
  2149. if(hw->media_type == e1000_media_type_copper) {
  2150. if((adapter->link_speed == SPEED_1000) &&
  2151. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2152. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2153. adapter->phy_stats.idle_errors += phy_tmp;
  2154. }
  2155. if((hw->mac_type <= e1000_82546) &&
  2156. (hw->phy_type == e1000_phy_m88) &&
  2157. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2158. adapter->phy_stats.receive_errors += phy_tmp;
  2159. }
  2160. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2161. }
  2162. /**
  2163. * e1000_intr - Interrupt Handler
  2164. * @irq: interrupt number
  2165. * @data: pointer to a network interface device structure
  2166. * @pt_regs: CPU registers structure
  2167. **/
  2168. static irqreturn_t
  2169. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2170. {
  2171. struct net_device *netdev = data;
  2172. struct e1000_adapter *adapter = netdev_priv(netdev);
  2173. struct e1000_hw *hw = &adapter->hw;
  2174. uint32_t icr = E1000_READ_REG(hw, ICR);
  2175. #ifndef CONFIG_E1000_NAPI
  2176. unsigned int i;
  2177. #endif
  2178. if(unlikely(!icr))
  2179. return IRQ_NONE; /* Not our interrupt */
  2180. if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2181. hw->get_link_status = 1;
  2182. mod_timer(&adapter->watchdog_timer, jiffies);
  2183. }
  2184. #ifdef CONFIG_E1000_NAPI
  2185. if(likely(netif_rx_schedule_prep(netdev))) {
  2186. /* Disable interrupts and register for poll. The flush
  2187. of the posted write is intentionally left out.
  2188. */
  2189. atomic_inc(&adapter->irq_sem);
  2190. E1000_WRITE_REG(hw, IMC, ~0);
  2191. __netif_rx_schedule(netdev);
  2192. }
  2193. #else
  2194. /* Writing IMC and IMS is needed for 82547.
  2195. Due to Hub Link bus being occupied, an interrupt
  2196. de-assertion message is not able to be sent.
  2197. When an interrupt assertion message is generated later,
  2198. two messages are re-ordered and sent out.
  2199. That causes APIC to think 82547 is in de-assertion
  2200. state, while 82547 is in assertion state, resulting
  2201. in dead lock. Writing IMC forces 82547 into
  2202. de-assertion state.
  2203. */
  2204. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
  2205. atomic_inc(&adapter->irq_sem);
  2206. E1000_WRITE_REG(hw, IMC, ~0);
  2207. }
  2208. for(i = 0; i < E1000_MAX_INTR; i++)
  2209. if(unlikely(!adapter->clean_rx(adapter) &
  2210. !e1000_clean_tx_irq(adapter)))
  2211. break;
  2212. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2213. e1000_irq_enable(adapter);
  2214. #endif
  2215. return IRQ_HANDLED;
  2216. }
  2217. #ifdef CONFIG_E1000_NAPI
  2218. /**
  2219. * e1000_clean - NAPI Rx polling callback
  2220. * @adapter: board private structure
  2221. **/
  2222. static int
  2223. e1000_clean(struct net_device *netdev, int *budget)
  2224. {
  2225. struct e1000_adapter *adapter = netdev_priv(netdev);
  2226. int work_to_do = min(*budget, netdev->quota);
  2227. int tx_cleaned;
  2228. int work_done = 0;
  2229. tx_cleaned = e1000_clean_tx_irq(adapter);
  2230. adapter->clean_rx(adapter, &work_done, work_to_do);
  2231. *budget -= work_done;
  2232. netdev->quota -= work_done;
  2233. if ((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
  2234. /* If no Tx and not enough Rx work done, exit the polling mode */
  2235. netif_rx_complete(netdev);
  2236. e1000_irq_enable(adapter);
  2237. return 0;
  2238. }
  2239. return 1;
  2240. }
  2241. #endif
  2242. /**
  2243. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2244. * @adapter: board private structure
  2245. **/
  2246. static boolean_t
  2247. e1000_clean_tx_irq(struct e1000_adapter *adapter)
  2248. {
  2249. struct e1000_desc_ring *tx_ring = &adapter->tx_ring;
  2250. struct net_device *netdev = adapter->netdev;
  2251. struct e1000_tx_desc *tx_desc, *eop_desc;
  2252. struct e1000_buffer *buffer_info;
  2253. unsigned int i, eop;
  2254. boolean_t cleaned = FALSE;
  2255. i = tx_ring->next_to_clean;
  2256. eop = tx_ring->buffer_info[i].next_to_watch;
  2257. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2258. while(eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2259. /* Premature writeback of Tx descriptors clear (free buffers
  2260. * and unmap pci_mapping) previous_buffer_info */
  2261. if (likely(adapter->previous_buffer_info.skb != NULL)) {
  2262. e1000_unmap_and_free_tx_resource(adapter,
  2263. &adapter->previous_buffer_info);
  2264. }
  2265. for(cleaned = FALSE; !cleaned; ) {
  2266. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2267. buffer_info = &tx_ring->buffer_info[i];
  2268. cleaned = (i == eop);
  2269. #ifdef NETIF_F_TSO
  2270. if (!(netdev->features & NETIF_F_TSO)) {
  2271. #endif
  2272. e1000_unmap_and_free_tx_resource(adapter,
  2273. buffer_info);
  2274. #ifdef NETIF_F_TSO
  2275. } else {
  2276. if (cleaned) {
  2277. memcpy(&adapter->previous_buffer_info,
  2278. buffer_info,
  2279. sizeof(struct e1000_buffer));
  2280. memset(buffer_info, 0,
  2281. sizeof(struct e1000_buffer));
  2282. } else {
  2283. e1000_unmap_and_free_tx_resource(
  2284. adapter, buffer_info);
  2285. }
  2286. }
  2287. #endif
  2288. tx_desc->buffer_addr = 0;
  2289. tx_desc->lower.data = 0;
  2290. tx_desc->upper.data = 0;
  2291. if(unlikely(++i == tx_ring->count)) i = 0;
  2292. }
  2293. eop = tx_ring->buffer_info[i].next_to_watch;
  2294. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2295. }
  2296. tx_ring->next_to_clean = i;
  2297. spin_lock(&adapter->tx_lock);
  2298. if(unlikely(cleaned && netif_queue_stopped(netdev) &&
  2299. netif_carrier_ok(netdev)))
  2300. netif_wake_queue(netdev);
  2301. spin_unlock(&adapter->tx_lock);
  2302. if(adapter->detect_tx_hung) {
  2303. /* Detect a transmit hang in hardware, this serializes the
  2304. * check with the clearing of time_stamp and movement of i */
  2305. adapter->detect_tx_hung = FALSE;
  2306. if (tx_ring->buffer_info[i].dma &&
  2307. time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
  2308. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2309. E1000_STATUS_TXOFF)) {
  2310. /* detected Tx unit hang */
  2311. i = tx_ring->next_to_clean;
  2312. eop = tx_ring->buffer_info[i].next_to_watch;
  2313. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2314. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2315. " TDH <%x>\n"
  2316. " TDT <%x>\n"
  2317. " next_to_use <%x>\n"
  2318. " next_to_clean <%x>\n"
  2319. "buffer_info[next_to_clean]\n"
  2320. " dma <%zx>\n"
  2321. " time_stamp <%lx>\n"
  2322. " next_to_watch <%x>\n"
  2323. " jiffies <%lx>\n"
  2324. " next_to_watch.status <%x>\n",
  2325. E1000_READ_REG(&adapter->hw, TDH),
  2326. E1000_READ_REG(&adapter->hw, TDT),
  2327. tx_ring->next_to_use,
  2328. i,
  2329. tx_ring->buffer_info[i].dma,
  2330. tx_ring->buffer_info[i].time_stamp,
  2331. eop,
  2332. jiffies,
  2333. eop_desc->upper.fields.status);
  2334. netif_stop_queue(netdev);
  2335. }
  2336. }
  2337. #ifdef NETIF_F_TSO
  2338. if( unlikely(!(eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
  2339. time_after(jiffies, adapter->previous_buffer_info.time_stamp + HZ)))
  2340. e1000_unmap_and_free_tx_resource(
  2341. adapter, &adapter->previous_buffer_info);
  2342. #endif
  2343. return cleaned;
  2344. }
  2345. /**
  2346. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2347. * @adapter: board private structure
  2348. * @status_err: receive descriptor status and error fields
  2349. * @csum: receive descriptor csum field
  2350. * @sk_buff: socket buffer with received data
  2351. **/
  2352. static inline void
  2353. e1000_rx_checksum(struct e1000_adapter *adapter,
  2354. uint32_t status_err, uint32_t csum,
  2355. struct sk_buff *skb)
  2356. {
  2357. uint16_t status = (uint16_t)status_err;
  2358. uint8_t errors = (uint8_t)(status_err >> 24);
  2359. skb->ip_summed = CHECKSUM_NONE;
  2360. /* 82543 or newer only */
  2361. if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2362. /* Ignore Checksum bit is set */
  2363. if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2364. /* TCP/UDP checksum error bit is set */
  2365. if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2366. /* let the stack verify checksum errors */
  2367. adapter->hw_csum_err++;
  2368. return;
  2369. }
  2370. /* TCP/UDP Checksum has not been calculated */
  2371. if(adapter->hw.mac_type <= e1000_82547_rev_2) {
  2372. if(!(status & E1000_RXD_STAT_TCPCS))
  2373. return;
  2374. } else {
  2375. if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2376. return;
  2377. }
  2378. /* It must be a TCP or UDP packet with a valid checksum */
  2379. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2380. /* TCP checksum is good */
  2381. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2382. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2383. /* IP fragment with UDP payload */
  2384. /* Hardware complements the payload checksum, so we undo it
  2385. * and then put the value in host order for further stack use.
  2386. */
  2387. csum = ntohl(csum ^ 0xFFFF);
  2388. skb->csum = csum;
  2389. skb->ip_summed = CHECKSUM_HW;
  2390. }
  2391. adapter->hw_csum_good++;
  2392. }
  2393. /**
  2394. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2395. * @adapter: board private structure
  2396. **/
  2397. static boolean_t
  2398. #ifdef CONFIG_E1000_NAPI
  2399. e1000_clean_rx_irq(struct e1000_adapter *adapter, int *work_done,
  2400. int work_to_do)
  2401. #else
  2402. e1000_clean_rx_irq(struct e1000_adapter *adapter)
  2403. #endif
  2404. {
  2405. struct e1000_desc_ring *rx_ring = &adapter->rx_ring;
  2406. struct net_device *netdev = adapter->netdev;
  2407. struct pci_dev *pdev = adapter->pdev;
  2408. struct e1000_rx_desc *rx_desc;
  2409. struct e1000_buffer *buffer_info;
  2410. struct sk_buff *skb;
  2411. unsigned long flags;
  2412. uint32_t length;
  2413. uint8_t last_byte;
  2414. unsigned int i;
  2415. boolean_t cleaned = FALSE;
  2416. i = rx_ring->next_to_clean;
  2417. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2418. while(rx_desc->status & E1000_RXD_STAT_DD) {
  2419. buffer_info = &rx_ring->buffer_info[i];
  2420. #ifdef CONFIG_E1000_NAPI
  2421. if(*work_done >= work_to_do)
  2422. break;
  2423. (*work_done)++;
  2424. #endif
  2425. cleaned = TRUE;
  2426. pci_unmap_single(pdev,
  2427. buffer_info->dma,
  2428. buffer_info->length,
  2429. PCI_DMA_FROMDEVICE);
  2430. skb = buffer_info->skb;
  2431. length = le16_to_cpu(rx_desc->length);
  2432. if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
  2433. /* All receives must fit into a single buffer */
  2434. E1000_DBG("%s: Receive packet consumed multiple"
  2435. " buffers\n", netdev->name);
  2436. dev_kfree_skb_irq(skb);
  2437. goto next_desc;
  2438. }
  2439. if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  2440. last_byte = *(skb->data + length - 1);
  2441. if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
  2442. rx_desc->errors, length, last_byte)) {
  2443. spin_lock_irqsave(&adapter->stats_lock, flags);
  2444. e1000_tbi_adjust_stats(&adapter->hw,
  2445. &adapter->stats,
  2446. length, skb->data);
  2447. spin_unlock_irqrestore(&adapter->stats_lock,
  2448. flags);
  2449. length--;
  2450. } else {
  2451. dev_kfree_skb_irq(skb);
  2452. goto next_desc;
  2453. }
  2454. }
  2455. /* Good Receive */
  2456. skb_put(skb, length - ETHERNET_FCS_SIZE);
  2457. /* Receive Checksum Offload */
  2458. e1000_rx_checksum(adapter,
  2459. (uint32_t)(rx_desc->status) |
  2460. ((uint32_t)(rx_desc->errors) << 24),
  2461. rx_desc->csum, skb);
  2462. skb->protocol = eth_type_trans(skb, netdev);
  2463. #ifdef CONFIG_E1000_NAPI
  2464. if(unlikely(adapter->vlgrp &&
  2465. (rx_desc->status & E1000_RXD_STAT_VP))) {
  2466. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  2467. le16_to_cpu(rx_desc->special) &
  2468. E1000_RXD_SPC_VLAN_MASK);
  2469. } else {
  2470. netif_receive_skb(skb);
  2471. }
  2472. #else /* CONFIG_E1000_NAPI */
  2473. if(unlikely(adapter->vlgrp &&
  2474. (rx_desc->status & E1000_RXD_STAT_VP))) {
  2475. vlan_hwaccel_rx(skb, adapter->vlgrp,
  2476. le16_to_cpu(rx_desc->special) &
  2477. E1000_RXD_SPC_VLAN_MASK);
  2478. } else {
  2479. netif_rx(skb);
  2480. }
  2481. #endif /* CONFIG_E1000_NAPI */
  2482. netdev->last_rx = jiffies;
  2483. next_desc:
  2484. rx_desc->status = 0;
  2485. buffer_info->skb = NULL;
  2486. if(unlikely(++i == rx_ring->count)) i = 0;
  2487. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2488. }
  2489. rx_ring->next_to_clean = i;
  2490. adapter->alloc_rx_buf(adapter);
  2491. return cleaned;
  2492. }
  2493. /**
  2494. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  2495. * @adapter: board private structure
  2496. **/
  2497. static boolean_t
  2498. #ifdef CONFIG_E1000_NAPI
  2499. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, int *work_done,
  2500. int work_to_do)
  2501. #else
  2502. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter)
  2503. #endif
  2504. {
  2505. struct e1000_desc_ring *rx_ring = &adapter->rx_ring;
  2506. union e1000_rx_desc_packet_split *rx_desc;
  2507. struct net_device *netdev = adapter->netdev;
  2508. struct pci_dev *pdev = adapter->pdev;
  2509. struct e1000_buffer *buffer_info;
  2510. struct e1000_ps_page *ps_page;
  2511. struct e1000_ps_page_dma *ps_page_dma;
  2512. struct sk_buff *skb;
  2513. unsigned int i, j;
  2514. uint32_t length, staterr;
  2515. boolean_t cleaned = FALSE;
  2516. i = rx_ring->next_to_clean;
  2517. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  2518. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  2519. while(staterr & E1000_RXD_STAT_DD) {
  2520. buffer_info = &rx_ring->buffer_info[i];
  2521. ps_page = &rx_ring->ps_page[i];
  2522. ps_page_dma = &rx_ring->ps_page_dma[i];
  2523. #ifdef CONFIG_E1000_NAPI
  2524. if(unlikely(*work_done >= work_to_do))
  2525. break;
  2526. (*work_done)++;
  2527. #endif
  2528. cleaned = TRUE;
  2529. pci_unmap_single(pdev, buffer_info->dma,
  2530. buffer_info->length,
  2531. PCI_DMA_FROMDEVICE);
  2532. skb = buffer_info->skb;
  2533. if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  2534. E1000_DBG("%s: Packet Split buffers didn't pick up"
  2535. " the full packet\n", netdev->name);
  2536. dev_kfree_skb_irq(skb);
  2537. goto next_desc;
  2538. }
  2539. if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  2540. dev_kfree_skb_irq(skb);
  2541. goto next_desc;
  2542. }
  2543. length = le16_to_cpu(rx_desc->wb.middle.length0);
  2544. if(unlikely(!length)) {
  2545. E1000_DBG("%s: Last part of the packet spanning"
  2546. " multiple descriptors\n", netdev->name);
  2547. dev_kfree_skb_irq(skb);
  2548. goto next_desc;
  2549. }
  2550. /* Good Receive */
  2551. skb_put(skb, length);
  2552. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  2553. if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  2554. break;
  2555. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  2556. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  2557. ps_page_dma->ps_page_dma[j] = 0;
  2558. skb_shinfo(skb)->frags[j].page =
  2559. ps_page->ps_page[j];
  2560. ps_page->ps_page[j] = NULL;
  2561. skb_shinfo(skb)->frags[j].page_offset = 0;
  2562. skb_shinfo(skb)->frags[j].size = length;
  2563. skb_shinfo(skb)->nr_frags++;
  2564. skb->len += length;
  2565. skb->data_len += length;
  2566. }
  2567. e1000_rx_checksum(adapter, staterr,
  2568. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  2569. skb->protocol = eth_type_trans(skb, netdev);
  2570. #ifdef HAVE_RX_ZERO_COPY
  2571. if(likely(rx_desc->wb.upper.header_status &
  2572. E1000_RXDPS_HDRSTAT_HDRSP))
  2573. skb_shinfo(skb)->zero_copy = TRUE;
  2574. #endif
  2575. #ifdef CONFIG_E1000_NAPI
  2576. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  2577. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  2578. le16_to_cpu(rx_desc->wb.middle.vlan) &
  2579. E1000_RXD_SPC_VLAN_MASK);
  2580. } else {
  2581. netif_receive_skb(skb);
  2582. }
  2583. #else /* CONFIG_E1000_NAPI */
  2584. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  2585. vlan_hwaccel_rx(skb, adapter->vlgrp,
  2586. le16_to_cpu(rx_desc->wb.middle.vlan) &
  2587. E1000_RXD_SPC_VLAN_MASK);
  2588. } else {
  2589. netif_rx(skb);
  2590. }
  2591. #endif /* CONFIG_E1000_NAPI */
  2592. netdev->last_rx = jiffies;
  2593. next_desc:
  2594. rx_desc->wb.middle.status_error &= ~0xFF;
  2595. buffer_info->skb = NULL;
  2596. if(unlikely(++i == rx_ring->count)) i = 0;
  2597. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  2598. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  2599. }
  2600. rx_ring->next_to_clean = i;
  2601. adapter->alloc_rx_buf(adapter);
  2602. return cleaned;
  2603. }
  2604. /**
  2605. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  2606. * @adapter: address of board private structure
  2607. **/
  2608. static void
  2609. e1000_alloc_rx_buffers(struct e1000_adapter *adapter)
  2610. {
  2611. struct e1000_desc_ring *rx_ring = &adapter->rx_ring;
  2612. struct net_device *netdev = adapter->netdev;
  2613. struct pci_dev *pdev = adapter->pdev;
  2614. struct e1000_rx_desc *rx_desc;
  2615. struct e1000_buffer *buffer_info;
  2616. struct sk_buff *skb;
  2617. unsigned int i;
  2618. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  2619. i = rx_ring->next_to_use;
  2620. buffer_info = &rx_ring->buffer_info[i];
  2621. while(!buffer_info->skb) {
  2622. skb = dev_alloc_skb(bufsz);
  2623. if(unlikely(!skb)) {
  2624. /* Better luck next round */
  2625. break;
  2626. }
  2627. /* Fix for errata 23, can't cross 64kB boundary */
  2628. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  2629. struct sk_buff *oldskb = skb;
  2630. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  2631. "at %p\n", bufsz, skb->data);
  2632. /* Try again, without freeing the previous */
  2633. skb = dev_alloc_skb(bufsz);
  2634. /* Failed allocation, critical failure */
  2635. if (!skb) {
  2636. dev_kfree_skb(oldskb);
  2637. break;
  2638. }
  2639. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  2640. /* give up */
  2641. dev_kfree_skb(skb);
  2642. dev_kfree_skb(oldskb);
  2643. break; /* while !buffer_info->skb */
  2644. } else {
  2645. /* Use new allocation */
  2646. dev_kfree_skb(oldskb);
  2647. }
  2648. }
  2649. /* Make buffer alignment 2 beyond a 16 byte boundary
  2650. * this will result in a 16 byte aligned IP header after
  2651. * the 14 byte MAC header is removed
  2652. */
  2653. skb_reserve(skb, NET_IP_ALIGN);
  2654. skb->dev = netdev;
  2655. buffer_info->skb = skb;
  2656. buffer_info->length = adapter->rx_buffer_len;
  2657. buffer_info->dma = pci_map_single(pdev,
  2658. skb->data,
  2659. adapter->rx_buffer_len,
  2660. PCI_DMA_FROMDEVICE);
  2661. /* Fix for errata 23, can't cross 64kB boundary */
  2662. if (!e1000_check_64k_bound(adapter,
  2663. (void *)(unsigned long)buffer_info->dma,
  2664. adapter->rx_buffer_len)) {
  2665. DPRINTK(RX_ERR, ERR,
  2666. "dma align check failed: %u bytes at %p\n",
  2667. adapter->rx_buffer_len,
  2668. (void *)(unsigned long)buffer_info->dma);
  2669. dev_kfree_skb(skb);
  2670. buffer_info->skb = NULL;
  2671. pci_unmap_single(pdev, buffer_info->dma,
  2672. adapter->rx_buffer_len,
  2673. PCI_DMA_FROMDEVICE);
  2674. break; /* while !buffer_info->skb */
  2675. }
  2676. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2677. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2678. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  2679. /* Force memory writes to complete before letting h/w
  2680. * know there are new descriptors to fetch. (Only
  2681. * applicable for weak-ordered memory model archs,
  2682. * such as IA-64). */
  2683. wmb();
  2684. E1000_WRITE_REG(&adapter->hw, RDT, i);
  2685. }
  2686. if(unlikely(++i == rx_ring->count)) i = 0;
  2687. buffer_info = &rx_ring->buffer_info[i];
  2688. }
  2689. rx_ring->next_to_use = i;
  2690. }
  2691. /**
  2692. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  2693. * @adapter: address of board private structure
  2694. **/
  2695. static void
  2696. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter)
  2697. {
  2698. struct e1000_desc_ring *rx_ring = &adapter->rx_ring;
  2699. struct net_device *netdev = adapter->netdev;
  2700. struct pci_dev *pdev = adapter->pdev;
  2701. union e1000_rx_desc_packet_split *rx_desc;
  2702. struct e1000_buffer *buffer_info;
  2703. struct e1000_ps_page *ps_page;
  2704. struct e1000_ps_page_dma *ps_page_dma;
  2705. struct sk_buff *skb;
  2706. unsigned int i, j;
  2707. i = rx_ring->next_to_use;
  2708. buffer_info = &rx_ring->buffer_info[i];
  2709. ps_page = &rx_ring->ps_page[i];
  2710. ps_page_dma = &rx_ring->ps_page_dma[i];
  2711. while(!buffer_info->skb) {
  2712. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  2713. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  2714. if(unlikely(!ps_page->ps_page[j])) {
  2715. ps_page->ps_page[j] =
  2716. alloc_page(GFP_ATOMIC);
  2717. if(unlikely(!ps_page->ps_page[j]))
  2718. goto no_buffers;
  2719. ps_page_dma->ps_page_dma[j] =
  2720. pci_map_page(pdev,
  2721. ps_page->ps_page[j],
  2722. 0, PAGE_SIZE,
  2723. PCI_DMA_FROMDEVICE);
  2724. }
  2725. /* Refresh the desc even if buffer_addrs didn't
  2726. * change because each write-back erases this info.
  2727. */
  2728. rx_desc->read.buffer_addr[j+1] =
  2729. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  2730. }
  2731. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  2732. if(unlikely(!skb))
  2733. break;
  2734. /* Make buffer alignment 2 beyond a 16 byte boundary
  2735. * this will result in a 16 byte aligned IP header after
  2736. * the 14 byte MAC header is removed
  2737. */
  2738. skb_reserve(skb, NET_IP_ALIGN);
  2739. skb->dev = netdev;
  2740. buffer_info->skb = skb;
  2741. buffer_info->length = adapter->rx_ps_bsize0;
  2742. buffer_info->dma = pci_map_single(pdev, skb->data,
  2743. adapter->rx_ps_bsize0,
  2744. PCI_DMA_FROMDEVICE);
  2745. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  2746. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  2747. /* Force memory writes to complete before letting h/w
  2748. * know there are new descriptors to fetch. (Only
  2749. * applicable for weak-ordered memory model archs,
  2750. * such as IA-64). */
  2751. wmb();
  2752. /* Hardware increments by 16 bytes, but packet split
  2753. * descriptors are 32 bytes...so we increment tail
  2754. * twice as much.
  2755. */
  2756. E1000_WRITE_REG(&adapter->hw, RDT, i<<1);
  2757. }
  2758. if(unlikely(++i == rx_ring->count)) i = 0;
  2759. buffer_info = &rx_ring->buffer_info[i];
  2760. ps_page = &rx_ring->ps_page[i];
  2761. ps_page_dma = &rx_ring->ps_page_dma[i];
  2762. }
  2763. no_buffers:
  2764. rx_ring->next_to_use = i;
  2765. }
  2766. /**
  2767. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  2768. * @adapter:
  2769. **/
  2770. static void
  2771. e1000_smartspeed(struct e1000_adapter *adapter)
  2772. {
  2773. uint16_t phy_status;
  2774. uint16_t phy_ctrl;
  2775. if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  2776. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  2777. return;
  2778. if(adapter->smartspeed == 0) {
  2779. /* If Master/Slave config fault is asserted twice,
  2780. * we assume back-to-back */
  2781. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  2782. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  2783. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  2784. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  2785. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  2786. if(phy_ctrl & CR_1000T_MS_ENABLE) {
  2787. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  2788. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  2789. phy_ctrl);
  2790. adapter->smartspeed++;
  2791. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  2792. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  2793. &phy_ctrl)) {
  2794. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  2795. MII_CR_RESTART_AUTO_NEG);
  2796. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  2797. phy_ctrl);
  2798. }
  2799. }
  2800. return;
  2801. } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  2802. /* If still no link, perhaps using 2/3 pair cable */
  2803. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  2804. phy_ctrl |= CR_1000T_MS_ENABLE;
  2805. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  2806. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  2807. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  2808. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  2809. MII_CR_RESTART_AUTO_NEG);
  2810. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  2811. }
  2812. }
  2813. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  2814. if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  2815. adapter->smartspeed = 0;
  2816. }
  2817. /**
  2818. * e1000_ioctl -
  2819. * @netdev:
  2820. * @ifreq:
  2821. * @cmd:
  2822. **/
  2823. static int
  2824. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  2825. {
  2826. switch (cmd) {
  2827. case SIOCGMIIPHY:
  2828. case SIOCGMIIREG:
  2829. case SIOCSMIIREG:
  2830. return e1000_mii_ioctl(netdev, ifr, cmd);
  2831. default:
  2832. return -EOPNOTSUPP;
  2833. }
  2834. }
  2835. /**
  2836. * e1000_mii_ioctl -
  2837. * @netdev:
  2838. * @ifreq:
  2839. * @cmd:
  2840. **/
  2841. static int
  2842. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  2843. {
  2844. struct e1000_adapter *adapter = netdev_priv(netdev);
  2845. struct mii_ioctl_data *data = if_mii(ifr);
  2846. int retval;
  2847. uint16_t mii_reg;
  2848. uint16_t spddplx;
  2849. unsigned long flags;
  2850. if(adapter->hw.media_type != e1000_media_type_copper)
  2851. return -EOPNOTSUPP;
  2852. switch (cmd) {
  2853. case SIOCGMIIPHY:
  2854. data->phy_id = adapter->hw.phy_addr;
  2855. break;
  2856. case SIOCGMIIREG:
  2857. if(!capable(CAP_NET_ADMIN))
  2858. return -EPERM;
  2859. spin_lock_irqsave(&adapter->stats_lock, flags);
  2860. if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  2861. &data->val_out)) {
  2862. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2863. return -EIO;
  2864. }
  2865. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2866. break;
  2867. case SIOCSMIIREG:
  2868. if(!capable(CAP_NET_ADMIN))
  2869. return -EPERM;
  2870. if(data->reg_num & ~(0x1F))
  2871. return -EFAULT;
  2872. mii_reg = data->val_in;
  2873. spin_lock_irqsave(&adapter->stats_lock, flags);
  2874. if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
  2875. mii_reg)) {
  2876. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2877. return -EIO;
  2878. }
  2879. if(adapter->hw.phy_type == e1000_phy_m88) {
  2880. switch (data->reg_num) {
  2881. case PHY_CTRL:
  2882. if(mii_reg & MII_CR_POWER_DOWN)
  2883. break;
  2884. if(mii_reg & MII_CR_AUTO_NEG_EN) {
  2885. adapter->hw.autoneg = 1;
  2886. adapter->hw.autoneg_advertised = 0x2F;
  2887. } else {
  2888. if (mii_reg & 0x40)
  2889. spddplx = SPEED_1000;
  2890. else if (mii_reg & 0x2000)
  2891. spddplx = SPEED_100;
  2892. else
  2893. spddplx = SPEED_10;
  2894. spddplx += (mii_reg & 0x100)
  2895. ? FULL_DUPLEX :
  2896. HALF_DUPLEX;
  2897. retval = e1000_set_spd_dplx(adapter,
  2898. spddplx);
  2899. if(retval) {
  2900. spin_unlock_irqrestore(
  2901. &adapter->stats_lock,
  2902. flags);
  2903. return retval;
  2904. }
  2905. }
  2906. if(netif_running(adapter->netdev)) {
  2907. e1000_down(adapter);
  2908. e1000_up(adapter);
  2909. } else
  2910. e1000_reset(adapter);
  2911. break;
  2912. case M88E1000_PHY_SPEC_CTRL:
  2913. case M88E1000_EXT_PHY_SPEC_CTRL:
  2914. if(e1000_phy_reset(&adapter->hw)) {
  2915. spin_unlock_irqrestore(
  2916. &adapter->stats_lock, flags);
  2917. return -EIO;
  2918. }
  2919. break;
  2920. }
  2921. } else {
  2922. switch (data->reg_num) {
  2923. case PHY_CTRL:
  2924. if(mii_reg & MII_CR_POWER_DOWN)
  2925. break;
  2926. if(netif_running(adapter->netdev)) {
  2927. e1000_down(adapter);
  2928. e1000_up(adapter);
  2929. } else
  2930. e1000_reset(adapter);
  2931. break;
  2932. }
  2933. }
  2934. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2935. break;
  2936. default:
  2937. return -EOPNOTSUPP;
  2938. }
  2939. return E1000_SUCCESS;
  2940. }
  2941. void
  2942. e1000_pci_set_mwi(struct e1000_hw *hw)
  2943. {
  2944. struct e1000_adapter *adapter = hw->back;
  2945. int ret_val = pci_set_mwi(adapter->pdev);
  2946. if(ret_val)
  2947. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  2948. }
  2949. void
  2950. e1000_pci_clear_mwi(struct e1000_hw *hw)
  2951. {
  2952. struct e1000_adapter *adapter = hw->back;
  2953. pci_clear_mwi(adapter->pdev);
  2954. }
  2955. void
  2956. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  2957. {
  2958. struct e1000_adapter *adapter = hw->back;
  2959. pci_read_config_word(adapter->pdev, reg, value);
  2960. }
  2961. void
  2962. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  2963. {
  2964. struct e1000_adapter *adapter = hw->back;
  2965. pci_write_config_word(adapter->pdev, reg, *value);
  2966. }
  2967. uint32_t
  2968. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  2969. {
  2970. return inl(port);
  2971. }
  2972. void
  2973. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  2974. {
  2975. outl(value, port);
  2976. }
  2977. static void
  2978. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  2979. {
  2980. struct e1000_adapter *adapter = netdev_priv(netdev);
  2981. uint32_t ctrl, rctl;
  2982. e1000_irq_disable(adapter);
  2983. adapter->vlgrp = grp;
  2984. if(grp) {
  2985. /* enable VLAN tag insert/strip */
  2986. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  2987. ctrl |= E1000_CTRL_VME;
  2988. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  2989. /* enable VLAN receive filtering */
  2990. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  2991. rctl |= E1000_RCTL_VFE;
  2992. rctl &= ~E1000_RCTL_CFIEN;
  2993. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  2994. e1000_update_mng_vlan(adapter);
  2995. } else {
  2996. /* disable VLAN tag insert/strip */
  2997. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  2998. ctrl &= ~E1000_CTRL_VME;
  2999. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3000. /* disable VLAN filtering */
  3001. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3002. rctl &= ~E1000_RCTL_VFE;
  3003. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3004. if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3005. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3006. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3007. }
  3008. }
  3009. e1000_irq_enable(adapter);
  3010. }
  3011. static void
  3012. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3013. {
  3014. struct e1000_adapter *adapter = netdev_priv(netdev);
  3015. uint32_t vfta, index;
  3016. if((adapter->hw.mng_cookie.status &
  3017. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3018. (vid == adapter->mng_vlan_id))
  3019. return;
  3020. /* add VID to filter table */
  3021. index = (vid >> 5) & 0x7F;
  3022. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3023. vfta |= (1 << (vid & 0x1F));
  3024. e1000_write_vfta(&adapter->hw, index, vfta);
  3025. }
  3026. static void
  3027. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3028. {
  3029. struct e1000_adapter *adapter = netdev_priv(netdev);
  3030. uint32_t vfta, index;
  3031. e1000_irq_disable(adapter);
  3032. if(adapter->vlgrp)
  3033. adapter->vlgrp->vlan_devices[vid] = NULL;
  3034. e1000_irq_enable(adapter);
  3035. if((adapter->hw.mng_cookie.status &
  3036. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3037. (vid == adapter->mng_vlan_id))
  3038. return;
  3039. /* remove VID from filter table */
  3040. index = (vid >> 5) & 0x7F;
  3041. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3042. vfta &= ~(1 << (vid & 0x1F));
  3043. e1000_write_vfta(&adapter->hw, index, vfta);
  3044. }
  3045. static void
  3046. e1000_restore_vlan(struct e1000_adapter *adapter)
  3047. {
  3048. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3049. if(adapter->vlgrp) {
  3050. uint16_t vid;
  3051. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3052. if(!adapter->vlgrp->vlan_devices[vid])
  3053. continue;
  3054. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3055. }
  3056. }
  3057. }
  3058. int
  3059. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3060. {
  3061. adapter->hw.autoneg = 0;
  3062. /* Fiber NICs only allow 1000 gbps Full duplex */
  3063. if((adapter->hw.media_type == e1000_media_type_fiber) &&
  3064. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3065. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3066. return -EINVAL;
  3067. }
  3068. switch(spddplx) {
  3069. case SPEED_10 + DUPLEX_HALF:
  3070. adapter->hw.forced_speed_duplex = e1000_10_half;
  3071. break;
  3072. case SPEED_10 + DUPLEX_FULL:
  3073. adapter->hw.forced_speed_duplex = e1000_10_full;
  3074. break;
  3075. case SPEED_100 + DUPLEX_HALF:
  3076. adapter->hw.forced_speed_duplex = e1000_100_half;
  3077. break;
  3078. case SPEED_100 + DUPLEX_FULL:
  3079. adapter->hw.forced_speed_duplex = e1000_100_full;
  3080. break;
  3081. case SPEED_1000 + DUPLEX_FULL:
  3082. adapter->hw.autoneg = 1;
  3083. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3084. break;
  3085. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3086. default:
  3087. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3088. return -EINVAL;
  3089. }
  3090. return 0;
  3091. }
  3092. static int
  3093. e1000_notify_reboot(struct notifier_block *nb, unsigned long event, void *p)
  3094. {
  3095. struct pci_dev *pdev = NULL;
  3096. switch(event) {
  3097. case SYS_DOWN:
  3098. case SYS_HALT:
  3099. case SYS_POWER_OFF:
  3100. while((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
  3101. if(pci_dev_driver(pdev) == &e1000_driver)
  3102. e1000_suspend(pdev, 3);
  3103. }
  3104. }
  3105. return NOTIFY_DONE;
  3106. }
  3107. static int
  3108. e1000_suspend(struct pci_dev *pdev, uint32_t state)
  3109. {
  3110. struct net_device *netdev = pci_get_drvdata(pdev);
  3111. struct e1000_adapter *adapter = netdev_priv(netdev);
  3112. uint32_t ctrl, ctrl_ext, rctl, manc, status, swsm;
  3113. uint32_t wufc = adapter->wol;
  3114. netif_device_detach(netdev);
  3115. if(netif_running(netdev))
  3116. e1000_down(adapter);
  3117. status = E1000_READ_REG(&adapter->hw, STATUS);
  3118. if(status & E1000_STATUS_LU)
  3119. wufc &= ~E1000_WUFC_LNKC;
  3120. if(wufc) {
  3121. e1000_setup_rctl(adapter);
  3122. e1000_set_multi(netdev);
  3123. /* turn on all-multi mode if wake on multicast is enabled */
  3124. if(adapter->wol & E1000_WUFC_MC) {
  3125. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3126. rctl |= E1000_RCTL_MPE;
  3127. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3128. }
  3129. if(adapter->hw.mac_type >= e1000_82540) {
  3130. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3131. /* advertise wake from D3Cold */
  3132. #define E1000_CTRL_ADVD3WUC 0x00100000
  3133. /* phy power management enable */
  3134. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3135. ctrl |= E1000_CTRL_ADVD3WUC |
  3136. E1000_CTRL_EN_PHY_PWR_MGMT;
  3137. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3138. }
  3139. if(adapter->hw.media_type == e1000_media_type_fiber ||
  3140. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3141. /* keep the laser running in D3 */
  3142. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3143. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3144. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3145. }
  3146. /* Allow time for pending master requests to run */
  3147. e1000_disable_pciex_master(&adapter->hw);
  3148. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3149. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3150. pci_enable_wake(pdev, 3, 1);
  3151. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3152. } else {
  3153. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3154. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3155. pci_enable_wake(pdev, 3, 0);
  3156. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  3157. }
  3158. pci_save_state(pdev);
  3159. if(adapter->hw.mac_type >= e1000_82540 &&
  3160. adapter->hw.media_type == e1000_media_type_copper) {
  3161. manc = E1000_READ_REG(&adapter->hw, MANC);
  3162. if(manc & E1000_MANC_SMBUS_EN) {
  3163. manc |= E1000_MANC_ARP_EN;
  3164. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3165. pci_enable_wake(pdev, 3, 1);
  3166. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3167. }
  3168. }
  3169. switch(adapter->hw.mac_type) {
  3170. case e1000_82573:
  3171. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  3172. E1000_WRITE_REG(&adapter->hw, SWSM,
  3173. swsm & ~E1000_SWSM_DRV_LOAD);
  3174. break;
  3175. default:
  3176. break;
  3177. }
  3178. pci_disable_device(pdev);
  3179. state = (state > 0) ? 3 : 0;
  3180. pci_set_power_state(pdev, state);
  3181. return 0;
  3182. }
  3183. #ifdef CONFIG_PM
  3184. static int
  3185. e1000_resume(struct pci_dev *pdev)
  3186. {
  3187. struct net_device *netdev = pci_get_drvdata(pdev);
  3188. struct e1000_adapter *adapter = netdev_priv(netdev);
  3189. uint32_t manc, ret_val, swsm;
  3190. pci_set_power_state(pdev, 0);
  3191. pci_restore_state(pdev);
  3192. ret_val = pci_enable_device(pdev);
  3193. pci_set_master(pdev);
  3194. pci_enable_wake(pdev, 3, 0);
  3195. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  3196. e1000_reset(adapter);
  3197. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3198. if(netif_running(netdev))
  3199. e1000_up(adapter);
  3200. netif_device_attach(netdev);
  3201. if(adapter->hw.mac_type >= e1000_82540 &&
  3202. adapter->hw.media_type == e1000_media_type_copper) {
  3203. manc = E1000_READ_REG(&adapter->hw, MANC);
  3204. manc &= ~(E1000_MANC_ARP_EN);
  3205. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3206. }
  3207. switch(adapter->hw.mac_type) {
  3208. case e1000_82573:
  3209. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  3210. E1000_WRITE_REG(&adapter->hw, SWSM,
  3211. swsm | E1000_SWSM_DRV_LOAD);
  3212. break;
  3213. default:
  3214. break;
  3215. }
  3216. return 0;
  3217. }
  3218. #endif
  3219. #ifdef CONFIG_NET_POLL_CONTROLLER
  3220. /*
  3221. * Polling 'interrupt' - used by things like netconsole to send skbs
  3222. * without having to re-enable interrupts. It's not called while
  3223. * the interrupt routine is executing.
  3224. */
  3225. static void
  3226. e1000_netpoll(struct net_device *netdev)
  3227. {
  3228. struct e1000_adapter *adapter = netdev_priv(netdev);
  3229. disable_irq(adapter->pdev->irq);
  3230. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3231. enable_irq(adapter->pdev->irq);
  3232. }
  3233. #endif
  3234. /* e1000_main.c */