mpt2sas_base.c 109 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/version.h>
  43. #include <linux/kernel.h>
  44. #include <linux/module.h>
  45. #include <linux/errno.h>
  46. #include <linux/init.h>
  47. #include <linux/slab.h>
  48. #include <linux/types.h>
  49. #include <linux/pci.h>
  50. #include <linux/kdev_t.h>
  51. #include <linux/blkdev.h>
  52. #include <linux/delay.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/sort.h>
  56. #include <linux/io.h>
  57. #include <linux/time.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. #define MPT2SAS_MAX_REQUEST_QUEUE 600 /* maximum controller queue depth */
  63. static int max_queue_depth = -1;
  64. module_param(max_queue_depth, int, 0);
  65. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  66. static int max_sgl_entries = -1;
  67. module_param(max_sgl_entries, int, 0);
  68. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  69. static int msix_disable = -1;
  70. module_param(msix_disable, int, 0);
  71. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  72. /* diag_buffer_enable is bitwise
  73. * bit 0 set = TRACE
  74. * bit 1 set = SNAPSHOT
  75. * bit 2 set = EXTENDED
  76. *
  77. * Either bit can be set, or both
  78. */
  79. static int diag_buffer_enable;
  80. module_param(diag_buffer_enable, int, 0);
  81. MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
  82. "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
  83. int mpt2sas_fwfault_debug;
  84. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  85. "and halt firmware - (default=0)");
  86. /**
  87. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  88. *
  89. */
  90. static int
  91. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  92. {
  93. int ret = param_set_int(val, kp);
  94. struct MPT2SAS_ADAPTER *ioc;
  95. if (ret)
  96. return ret;
  97. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  98. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  99. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  100. return 0;
  101. }
  102. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  103. param_get_int, &mpt2sas_fwfault_debug, 0644);
  104. /**
  105. * _base_fault_reset_work - workq handling ioc fault conditions
  106. * @work: input argument, used to derive ioc
  107. * Context: sleep.
  108. *
  109. * Return nothing.
  110. */
  111. static void
  112. _base_fault_reset_work(struct work_struct *work)
  113. {
  114. struct MPT2SAS_ADAPTER *ioc =
  115. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  116. unsigned long flags;
  117. u32 doorbell;
  118. int rc;
  119. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  120. if (ioc->shost_recovery)
  121. goto rearm_timer;
  122. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  123. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  124. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  125. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  126. FORCE_BIG_HAMMER);
  127. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  128. __func__, (rc == 0) ? "success" : "failed");
  129. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  130. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  131. mpt2sas_base_fault_info(ioc, doorbell &
  132. MPI2_DOORBELL_DATA_MASK);
  133. }
  134. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  135. rearm_timer:
  136. if (ioc->fault_reset_work_q)
  137. queue_delayed_work(ioc->fault_reset_work_q,
  138. &ioc->fault_reset_work,
  139. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  140. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  141. }
  142. /**
  143. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  144. * @ioc: per adapter object
  145. * Context: sleep.
  146. *
  147. * Return nothing.
  148. */
  149. void
  150. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  151. {
  152. unsigned long flags;
  153. if (ioc->fault_reset_work_q)
  154. return;
  155. /* initialize fault polling */
  156. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  157. snprintf(ioc->fault_reset_work_q_name,
  158. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  159. ioc->fault_reset_work_q =
  160. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  161. if (!ioc->fault_reset_work_q) {
  162. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  163. ioc->name, __func__, __LINE__);
  164. return;
  165. }
  166. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  167. if (ioc->fault_reset_work_q)
  168. queue_delayed_work(ioc->fault_reset_work_q,
  169. &ioc->fault_reset_work,
  170. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  171. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  172. }
  173. /**
  174. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  175. * @ioc: per adapter object
  176. * Context: sleep.
  177. *
  178. * Return nothing.
  179. */
  180. void
  181. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  182. {
  183. unsigned long flags;
  184. struct workqueue_struct *wq;
  185. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  186. wq = ioc->fault_reset_work_q;
  187. ioc->fault_reset_work_q = NULL;
  188. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  189. if (wq) {
  190. if (!cancel_delayed_work(&ioc->fault_reset_work))
  191. flush_workqueue(wq);
  192. destroy_workqueue(wq);
  193. }
  194. }
  195. /**
  196. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  197. * @ioc: per adapter object
  198. * @fault_code: fault code
  199. *
  200. * Return nothing.
  201. */
  202. void
  203. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  204. {
  205. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  206. ioc->name, fault_code);
  207. }
  208. /**
  209. * mpt2sas_halt_firmware - halt's mpt controller firmware
  210. * @ioc: per adapter object
  211. *
  212. * For debugging timeout related issues. Writing 0xCOFFEE00
  213. * to the doorbell register will halt controller firmware. With
  214. * the purpose to stop both driver and firmware, the enduser can
  215. * obtain a ring buffer from controller UART.
  216. */
  217. void
  218. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  219. {
  220. u32 doorbell;
  221. if (!ioc->fwfault_debug)
  222. return;
  223. dump_stack();
  224. doorbell = readl(&ioc->chip->Doorbell);
  225. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  226. mpt2sas_base_fault_info(ioc , doorbell);
  227. else {
  228. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  229. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  230. "timeout\n", ioc->name);
  231. }
  232. panic("panic in %s\n", __func__);
  233. }
  234. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  235. /**
  236. * _base_sas_ioc_info - verbose translation of the ioc status
  237. * @ioc: per adapter object
  238. * @mpi_reply: reply mf payload returned from firmware
  239. * @request_hdr: request mf
  240. *
  241. * Return nothing.
  242. */
  243. static void
  244. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  245. MPI2RequestHeader_t *request_hdr)
  246. {
  247. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  248. MPI2_IOCSTATUS_MASK;
  249. char *desc = NULL;
  250. u16 frame_sz;
  251. char *func_str = NULL;
  252. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  253. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  254. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  255. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  256. return;
  257. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  258. return;
  259. switch (ioc_status) {
  260. /****************************************************************************
  261. * Common IOCStatus values for all replies
  262. ****************************************************************************/
  263. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  264. desc = "invalid function";
  265. break;
  266. case MPI2_IOCSTATUS_BUSY:
  267. desc = "busy";
  268. break;
  269. case MPI2_IOCSTATUS_INVALID_SGL:
  270. desc = "invalid sgl";
  271. break;
  272. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  273. desc = "internal error";
  274. break;
  275. case MPI2_IOCSTATUS_INVALID_VPID:
  276. desc = "invalid vpid";
  277. break;
  278. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  279. desc = "insufficient resources";
  280. break;
  281. case MPI2_IOCSTATUS_INVALID_FIELD:
  282. desc = "invalid field";
  283. break;
  284. case MPI2_IOCSTATUS_INVALID_STATE:
  285. desc = "invalid state";
  286. break;
  287. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  288. desc = "op state not supported";
  289. break;
  290. /****************************************************************************
  291. * Config IOCStatus values
  292. ****************************************************************************/
  293. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  294. desc = "config invalid action";
  295. break;
  296. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  297. desc = "config invalid type";
  298. break;
  299. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  300. desc = "config invalid page";
  301. break;
  302. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  303. desc = "config invalid data";
  304. break;
  305. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  306. desc = "config no defaults";
  307. break;
  308. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  309. desc = "config cant commit";
  310. break;
  311. /****************************************************************************
  312. * SCSI IO Reply
  313. ****************************************************************************/
  314. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  315. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  316. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  317. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  318. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  319. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  320. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  321. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  322. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  323. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  324. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  325. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  326. break;
  327. /****************************************************************************
  328. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  329. ****************************************************************************/
  330. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  331. desc = "eedp guard error";
  332. break;
  333. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  334. desc = "eedp ref tag error";
  335. break;
  336. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  337. desc = "eedp app tag error";
  338. break;
  339. /****************************************************************************
  340. * SCSI Target values
  341. ****************************************************************************/
  342. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  343. desc = "target invalid io index";
  344. break;
  345. case MPI2_IOCSTATUS_TARGET_ABORTED:
  346. desc = "target aborted";
  347. break;
  348. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  349. desc = "target no conn retryable";
  350. break;
  351. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  352. desc = "target no connection";
  353. break;
  354. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  355. desc = "target xfer count mismatch";
  356. break;
  357. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  358. desc = "target data offset error";
  359. break;
  360. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  361. desc = "target too much write data";
  362. break;
  363. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  364. desc = "target iu too short";
  365. break;
  366. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  367. desc = "target ack nak timeout";
  368. break;
  369. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  370. desc = "target nak received";
  371. break;
  372. /****************************************************************************
  373. * Serial Attached SCSI values
  374. ****************************************************************************/
  375. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  376. desc = "smp request failed";
  377. break;
  378. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  379. desc = "smp data overrun";
  380. break;
  381. /****************************************************************************
  382. * Diagnostic Buffer Post / Diagnostic Release values
  383. ****************************************************************************/
  384. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  385. desc = "diagnostic released";
  386. break;
  387. default:
  388. break;
  389. }
  390. if (!desc)
  391. return;
  392. switch (request_hdr->Function) {
  393. case MPI2_FUNCTION_CONFIG:
  394. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  395. func_str = "config_page";
  396. break;
  397. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  398. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  399. func_str = "task_mgmt";
  400. break;
  401. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  402. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  403. func_str = "sas_iounit_ctl";
  404. break;
  405. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  406. frame_sz = sizeof(Mpi2SepRequest_t);
  407. func_str = "enclosure";
  408. break;
  409. case MPI2_FUNCTION_IOC_INIT:
  410. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  411. func_str = "ioc_init";
  412. break;
  413. case MPI2_FUNCTION_PORT_ENABLE:
  414. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  415. func_str = "port_enable";
  416. break;
  417. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  418. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  419. func_str = "smp_passthru";
  420. break;
  421. default:
  422. frame_sz = 32;
  423. func_str = "unknown";
  424. break;
  425. }
  426. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  427. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  428. _debug_dump_mf(request_hdr, frame_sz/4);
  429. }
  430. /**
  431. * _base_display_event_data - verbose translation of firmware asyn events
  432. * @ioc: per adapter object
  433. * @mpi_reply: reply mf payload returned from firmware
  434. *
  435. * Return nothing.
  436. */
  437. static void
  438. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  439. Mpi2EventNotificationReply_t *mpi_reply)
  440. {
  441. char *desc = NULL;
  442. u16 event;
  443. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  444. return;
  445. event = le16_to_cpu(mpi_reply->Event);
  446. switch (event) {
  447. case MPI2_EVENT_LOG_DATA:
  448. desc = "Log Data";
  449. break;
  450. case MPI2_EVENT_STATE_CHANGE:
  451. desc = "Status Change";
  452. break;
  453. case MPI2_EVENT_HARD_RESET_RECEIVED:
  454. desc = "Hard Reset Received";
  455. break;
  456. case MPI2_EVENT_EVENT_CHANGE:
  457. desc = "Event Change";
  458. break;
  459. case MPI2_EVENT_TASK_SET_FULL:
  460. desc = "Task Set Full";
  461. break;
  462. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  463. desc = "Device Status Change";
  464. break;
  465. case MPI2_EVENT_IR_OPERATION_STATUS:
  466. desc = "IR Operation Status";
  467. break;
  468. case MPI2_EVENT_SAS_DISCOVERY:
  469. {
  470. Mpi2EventDataSasDiscovery_t *event_data =
  471. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  472. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  473. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  474. "start" : "stop");
  475. if (event_data->DiscoveryStatus)
  476. printk("discovery_status(0x%08x)",
  477. le32_to_cpu(event_data->DiscoveryStatus));
  478. printk("\n");
  479. return;
  480. }
  481. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  482. desc = "SAS Broadcast Primitive";
  483. break;
  484. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  485. desc = "SAS Init Device Status Change";
  486. break;
  487. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  488. desc = "SAS Init Table Overflow";
  489. break;
  490. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  491. desc = "SAS Topology Change List";
  492. break;
  493. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  494. desc = "SAS Enclosure Device Status Change";
  495. break;
  496. case MPI2_EVENT_IR_VOLUME:
  497. desc = "IR Volume";
  498. break;
  499. case MPI2_EVENT_IR_PHYSICAL_DISK:
  500. desc = "IR Physical Disk";
  501. break;
  502. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  503. desc = "IR Configuration Change List";
  504. break;
  505. case MPI2_EVENT_LOG_ENTRY_ADDED:
  506. desc = "Log Entry Added";
  507. break;
  508. }
  509. if (!desc)
  510. return;
  511. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  512. }
  513. #endif
  514. /**
  515. * _base_sas_log_info - verbose translation of firmware log info
  516. * @ioc: per adapter object
  517. * @log_info: log info
  518. *
  519. * Return nothing.
  520. */
  521. static void
  522. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  523. {
  524. union loginfo_type {
  525. u32 loginfo;
  526. struct {
  527. u32 subcode:16;
  528. u32 code:8;
  529. u32 originator:4;
  530. u32 bus_type:4;
  531. } dw;
  532. };
  533. union loginfo_type sas_loginfo;
  534. char *originator_str = NULL;
  535. sas_loginfo.loginfo = log_info;
  536. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  537. return;
  538. /* each nexus loss loginfo */
  539. if (log_info == 0x31170000)
  540. return;
  541. /* eat the loginfos associated with task aborts */
  542. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  543. 0x31140000 || log_info == 0x31130000))
  544. return;
  545. switch (sas_loginfo.dw.originator) {
  546. case 0:
  547. originator_str = "IOP";
  548. break;
  549. case 1:
  550. originator_str = "PL";
  551. break;
  552. case 2:
  553. originator_str = "IR";
  554. break;
  555. }
  556. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  557. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  558. originator_str, sas_loginfo.dw.code,
  559. sas_loginfo.dw.subcode);
  560. }
  561. /**
  562. * _base_display_reply_info -
  563. * @ioc: per adapter object
  564. * @smid: system request message index
  565. * @msix_index: MSIX table index supplied by the OS
  566. * @reply: reply message frame(lower 32bit addr)
  567. *
  568. * Return nothing.
  569. */
  570. static void
  571. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  572. u32 reply)
  573. {
  574. MPI2DefaultReply_t *mpi_reply;
  575. u16 ioc_status;
  576. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  577. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  578. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  579. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  580. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  581. _base_sas_ioc_info(ioc , mpi_reply,
  582. mpt2sas_base_get_msg_frame(ioc, smid));
  583. }
  584. #endif
  585. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  586. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  587. }
  588. /**
  589. * mpt2sas_base_done - base internal command completion routine
  590. * @ioc: per adapter object
  591. * @smid: system request message index
  592. * @msix_index: MSIX table index supplied by the OS
  593. * @reply: reply message frame(lower 32bit addr)
  594. *
  595. * Return 1 meaning mf should be freed from _base_interrupt
  596. * 0 means the mf is freed from this function.
  597. */
  598. u8
  599. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  600. u32 reply)
  601. {
  602. MPI2DefaultReply_t *mpi_reply;
  603. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  604. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  605. return 1;
  606. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  607. return 1;
  608. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  609. if (mpi_reply) {
  610. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  611. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  612. }
  613. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  614. complete(&ioc->base_cmds.done);
  615. return 1;
  616. }
  617. /**
  618. * _base_async_event - main callback handler for firmware asyn events
  619. * @ioc: per adapter object
  620. * @msix_index: MSIX table index supplied by the OS
  621. * @reply: reply message frame(lower 32bit addr)
  622. *
  623. * Return 1 meaning mf should be freed from _base_interrupt
  624. * 0 means the mf is freed from this function.
  625. */
  626. static u8
  627. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  628. {
  629. Mpi2EventNotificationReply_t *mpi_reply;
  630. Mpi2EventAckRequest_t *ack_request;
  631. u16 smid;
  632. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  633. if (!mpi_reply)
  634. return 1;
  635. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  636. return 1;
  637. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  638. _base_display_event_data(ioc, mpi_reply);
  639. #endif
  640. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  641. goto out;
  642. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  643. if (!smid) {
  644. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  645. ioc->name, __func__);
  646. goto out;
  647. }
  648. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  649. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  650. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  651. ack_request->Event = mpi_reply->Event;
  652. ack_request->EventContext = mpi_reply->EventContext;
  653. ack_request->VF_ID = 0; /* TODO */
  654. ack_request->VP_ID = 0;
  655. mpt2sas_base_put_smid_default(ioc, smid);
  656. out:
  657. /* scsih callback handler */
  658. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  659. /* ctl callback handler */
  660. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  661. return 1;
  662. }
  663. /**
  664. * _base_get_cb_idx - obtain the callback index
  665. * @ioc: per adapter object
  666. * @smid: system request message index
  667. *
  668. * Return callback index.
  669. */
  670. static u8
  671. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  672. {
  673. int i;
  674. u8 cb_idx = 0xFF;
  675. if (smid >= ioc->hi_priority_smid) {
  676. if (smid < ioc->internal_smid) {
  677. i = smid - ioc->hi_priority_smid;
  678. cb_idx = ioc->hpr_lookup[i].cb_idx;
  679. } else {
  680. i = smid - ioc->internal_smid;
  681. cb_idx = ioc->internal_lookup[i].cb_idx;
  682. }
  683. } else {
  684. i = smid - 1;
  685. cb_idx = ioc->scsi_lookup[i].cb_idx;
  686. }
  687. return cb_idx;
  688. }
  689. /**
  690. * _base_mask_interrupts - disable interrupts
  691. * @ioc: per adapter object
  692. *
  693. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  694. *
  695. * Return nothing.
  696. */
  697. static void
  698. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  699. {
  700. u32 him_register;
  701. ioc->mask_interrupts = 1;
  702. him_register = readl(&ioc->chip->HostInterruptMask);
  703. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  704. writel(him_register, &ioc->chip->HostInterruptMask);
  705. readl(&ioc->chip->HostInterruptMask);
  706. }
  707. /**
  708. * _base_unmask_interrupts - enable interrupts
  709. * @ioc: per adapter object
  710. *
  711. * Enabling only Reply Interrupts
  712. *
  713. * Return nothing.
  714. */
  715. static void
  716. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  717. {
  718. u32 him_register;
  719. him_register = readl(&ioc->chip->HostInterruptMask);
  720. him_register &= ~MPI2_HIM_RIM;
  721. writel(him_register, &ioc->chip->HostInterruptMask);
  722. ioc->mask_interrupts = 0;
  723. }
  724. union reply_descriptor {
  725. u64 word;
  726. struct {
  727. u32 low;
  728. u32 high;
  729. } u;
  730. };
  731. /**
  732. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  733. * @irq: irq number (not used)
  734. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  735. * @r: pt_regs pointer (not used)
  736. *
  737. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  738. */
  739. static irqreturn_t
  740. _base_interrupt(int irq, void *bus_id)
  741. {
  742. union reply_descriptor rd;
  743. u32 completed_cmds;
  744. u8 request_desript_type;
  745. u16 smid;
  746. u8 cb_idx;
  747. u32 reply;
  748. u8 msix_index;
  749. struct MPT2SAS_ADAPTER *ioc = bus_id;
  750. Mpi2ReplyDescriptorsUnion_t *rpf;
  751. u8 rc;
  752. if (ioc->mask_interrupts)
  753. return IRQ_NONE;
  754. rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
  755. request_desript_type = rpf->Default.ReplyFlags
  756. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  757. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  758. return IRQ_NONE;
  759. completed_cmds = 0;
  760. do {
  761. rd.word = rpf->Words;
  762. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  763. goto out;
  764. reply = 0;
  765. cb_idx = 0xFF;
  766. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  767. msix_index = rpf->Default.MSIxIndex;
  768. if (request_desript_type ==
  769. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  770. reply = le32_to_cpu
  771. (rpf->AddressReply.ReplyFrameAddress);
  772. } else if (request_desript_type ==
  773. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  774. goto next;
  775. else if (request_desript_type ==
  776. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  777. goto next;
  778. if (smid)
  779. cb_idx = _base_get_cb_idx(ioc, smid);
  780. if (smid && cb_idx != 0xFF) {
  781. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  782. reply);
  783. if (reply)
  784. _base_display_reply_info(ioc, smid, msix_index,
  785. reply);
  786. if (rc)
  787. mpt2sas_base_free_smid(ioc, smid);
  788. }
  789. if (!smid)
  790. _base_async_event(ioc, msix_index, reply);
  791. /* reply free queue handling */
  792. if (reply) {
  793. ioc->reply_free_host_index =
  794. (ioc->reply_free_host_index ==
  795. (ioc->reply_free_queue_depth - 1)) ?
  796. 0 : ioc->reply_free_host_index + 1;
  797. ioc->reply_free[ioc->reply_free_host_index] =
  798. cpu_to_le32(reply);
  799. wmb();
  800. writel(ioc->reply_free_host_index,
  801. &ioc->chip->ReplyFreeHostIndex);
  802. }
  803. next:
  804. rpf->Words = ULLONG_MAX;
  805. ioc->reply_post_host_index = (ioc->reply_post_host_index ==
  806. (ioc->reply_post_queue_depth - 1)) ? 0 :
  807. ioc->reply_post_host_index + 1;
  808. request_desript_type =
  809. ioc->reply_post_free[ioc->reply_post_host_index].Default.
  810. ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  811. completed_cmds++;
  812. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  813. goto out;
  814. if (!ioc->reply_post_host_index)
  815. rpf = ioc->reply_post_free;
  816. else
  817. rpf++;
  818. } while (1);
  819. out:
  820. if (!completed_cmds)
  821. return IRQ_NONE;
  822. wmb();
  823. writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
  824. return IRQ_HANDLED;
  825. }
  826. /**
  827. * mpt2sas_base_release_callback_handler - clear interupt callback handler
  828. * @cb_idx: callback index
  829. *
  830. * Return nothing.
  831. */
  832. void
  833. mpt2sas_base_release_callback_handler(u8 cb_idx)
  834. {
  835. mpt_callbacks[cb_idx] = NULL;
  836. }
  837. /**
  838. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  839. * @cb_func: callback function
  840. *
  841. * Returns cb_func.
  842. */
  843. u8
  844. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  845. {
  846. u8 cb_idx;
  847. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  848. if (mpt_callbacks[cb_idx] == NULL)
  849. break;
  850. mpt_callbacks[cb_idx] = cb_func;
  851. return cb_idx;
  852. }
  853. /**
  854. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  855. *
  856. * Return nothing.
  857. */
  858. void
  859. mpt2sas_base_initialize_callback_handler(void)
  860. {
  861. u8 cb_idx;
  862. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  863. mpt2sas_base_release_callback_handler(cb_idx);
  864. }
  865. /**
  866. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  867. * @ioc: per adapter object
  868. * @paddr: virtual address for SGE
  869. *
  870. * Create a zero length scatter gather entry to insure the IOCs hardware has
  871. * something to use if the target device goes brain dead and tries
  872. * to send data even when none is asked for.
  873. *
  874. * Return nothing.
  875. */
  876. void
  877. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  878. {
  879. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  880. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  881. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  882. MPI2_SGE_FLAGS_SHIFT);
  883. ioc->base_add_sg_single(paddr, flags_length, -1);
  884. }
  885. /**
  886. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  887. * @paddr: virtual address for SGE
  888. * @flags_length: SGE flags and data transfer length
  889. * @dma_addr: Physical address
  890. *
  891. * Return nothing.
  892. */
  893. static void
  894. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  895. {
  896. Mpi2SGESimple32_t *sgel = paddr;
  897. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  898. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  899. sgel->FlagsLength = cpu_to_le32(flags_length);
  900. sgel->Address = cpu_to_le32(dma_addr);
  901. }
  902. /**
  903. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  904. * @paddr: virtual address for SGE
  905. * @flags_length: SGE flags and data transfer length
  906. * @dma_addr: Physical address
  907. *
  908. * Return nothing.
  909. */
  910. static void
  911. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  912. {
  913. Mpi2SGESimple64_t *sgel = paddr;
  914. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  915. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  916. sgel->FlagsLength = cpu_to_le32(flags_length);
  917. sgel->Address = cpu_to_le64(dma_addr);
  918. }
  919. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  920. /**
  921. * _base_config_dma_addressing - set dma addressing
  922. * @ioc: per adapter object
  923. * @pdev: PCI device struct
  924. *
  925. * Returns 0 for success, non-zero for failure.
  926. */
  927. static int
  928. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  929. {
  930. struct sysinfo s;
  931. char *desc = NULL;
  932. if (sizeof(dma_addr_t) > 4) {
  933. const uint64_t required_mask =
  934. dma_get_required_mask(&pdev->dev);
  935. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  936. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  937. DMA_BIT_MASK(64))) {
  938. ioc->base_add_sg_single = &_base_add_sg_single_64;
  939. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  940. desc = "64";
  941. goto out;
  942. }
  943. }
  944. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  945. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  946. ioc->base_add_sg_single = &_base_add_sg_single_32;
  947. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  948. desc = "32";
  949. } else
  950. return -ENODEV;
  951. out:
  952. si_meminfo(&s);
  953. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  954. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  955. return 0;
  956. }
  957. /**
  958. * _base_save_msix_table - backup msix vector table
  959. * @ioc: per adapter object
  960. *
  961. * This address an errata where diag reset clears out the table
  962. */
  963. static void
  964. _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
  965. {
  966. int i;
  967. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  968. return;
  969. for (i = 0; i < ioc->msix_vector_count; i++)
  970. ioc->msix_table_backup[i] = ioc->msix_table[i];
  971. }
  972. /**
  973. * _base_restore_msix_table - this restores the msix vector table
  974. * @ioc: per adapter object
  975. *
  976. */
  977. static void
  978. _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
  979. {
  980. int i;
  981. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  982. return;
  983. for (i = 0; i < ioc->msix_vector_count; i++)
  984. ioc->msix_table[i] = ioc->msix_table_backup[i];
  985. }
  986. /**
  987. * _base_check_enable_msix - checks MSIX capabable.
  988. * @ioc: per adapter object
  989. *
  990. * Check to see if card is capable of MSIX, and set number
  991. * of avaliable msix vectors
  992. */
  993. static int
  994. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  995. {
  996. int base;
  997. u16 message_control;
  998. u32 msix_table_offset;
  999. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1000. if (!base) {
  1001. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1002. "supported\n", ioc->name));
  1003. return -EINVAL;
  1004. }
  1005. /* get msix vector count */
  1006. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1007. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1008. /* get msix table */
  1009. pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
  1010. msix_table_offset &= 0xFFFFFFF8;
  1011. ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
  1012. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1013. "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
  1014. ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
  1015. return 0;
  1016. }
  1017. /**
  1018. * _base_disable_msix - disables msix
  1019. * @ioc: per adapter object
  1020. *
  1021. */
  1022. static void
  1023. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1024. {
  1025. if (ioc->msix_enable) {
  1026. pci_disable_msix(ioc->pdev);
  1027. kfree(ioc->msix_table_backup);
  1028. ioc->msix_table_backup = NULL;
  1029. ioc->msix_enable = 0;
  1030. }
  1031. }
  1032. /**
  1033. * _base_enable_msix - enables msix, failback to io_apic
  1034. * @ioc: per adapter object
  1035. *
  1036. */
  1037. static int
  1038. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1039. {
  1040. struct msix_entry entries;
  1041. int r;
  1042. u8 try_msix = 0;
  1043. if (msix_disable == -1 || msix_disable == 0)
  1044. try_msix = 1;
  1045. if (!try_msix)
  1046. goto try_ioapic;
  1047. if (_base_check_enable_msix(ioc) != 0)
  1048. goto try_ioapic;
  1049. ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
  1050. sizeof(u32), GFP_KERNEL);
  1051. if (!ioc->msix_table_backup) {
  1052. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  1053. "msix_table_backup failed!!!\n", ioc->name));
  1054. goto try_ioapic;
  1055. }
  1056. memset(&entries, 0, sizeof(struct msix_entry));
  1057. r = pci_enable_msix(ioc->pdev, &entries, 1);
  1058. if (r) {
  1059. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1060. "failed (r=%d) !!!\n", ioc->name, r));
  1061. goto try_ioapic;
  1062. }
  1063. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  1064. ioc->name, ioc);
  1065. if (r) {
  1066. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  1067. "interrupt %d !!!\n", ioc->name, entries.vector));
  1068. pci_disable_msix(ioc->pdev);
  1069. goto try_ioapic;
  1070. }
  1071. ioc->pci_irq = entries.vector;
  1072. ioc->msix_enable = 1;
  1073. return 0;
  1074. /* failback to io_apic interrupt routing */
  1075. try_ioapic:
  1076. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  1077. ioc->name, ioc);
  1078. if (r) {
  1079. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1080. ioc->name, ioc->pdev->irq);
  1081. r = -EBUSY;
  1082. goto out_fail;
  1083. }
  1084. ioc->pci_irq = ioc->pdev->irq;
  1085. return 0;
  1086. out_fail:
  1087. return r;
  1088. }
  1089. /**
  1090. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1091. * @ioc: per adapter object
  1092. *
  1093. * Returns 0 for success, non-zero for failure.
  1094. */
  1095. int
  1096. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1097. {
  1098. struct pci_dev *pdev = ioc->pdev;
  1099. u32 memap_sz;
  1100. u32 pio_sz;
  1101. int i, r = 0;
  1102. u64 pio_chip = 0;
  1103. u64 chip_phys = 0;
  1104. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
  1105. ioc->name, __func__));
  1106. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1107. if (pci_enable_device_mem(pdev)) {
  1108. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1109. "failed\n", ioc->name);
  1110. return -ENODEV;
  1111. }
  1112. if (pci_request_selected_regions(pdev, ioc->bars,
  1113. MPT2SAS_DRIVER_NAME)) {
  1114. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1115. "failed\n", ioc->name);
  1116. r = -ENODEV;
  1117. goto out_fail;
  1118. }
  1119. /* AER (Advanced Error Reporting) hooks */
  1120. pci_enable_pcie_error_reporting(pdev);
  1121. pci_set_master(pdev);
  1122. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1123. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1124. ioc->name, pci_name(pdev));
  1125. r = -ENODEV;
  1126. goto out_fail;
  1127. }
  1128. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1129. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1130. if (pio_sz)
  1131. continue;
  1132. pio_chip = (u64)pci_resource_start(pdev, i);
  1133. pio_sz = pci_resource_len(pdev, i);
  1134. } else {
  1135. if (memap_sz)
  1136. continue;
  1137. /* verify memory resource is valid before using */
  1138. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1139. ioc->chip_phys = pci_resource_start(pdev, i);
  1140. chip_phys = (u64)ioc->chip_phys;
  1141. memap_sz = pci_resource_len(pdev, i);
  1142. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1143. if (ioc->chip == NULL) {
  1144. printk(MPT2SAS_ERR_FMT "unable to map "
  1145. "adapter memory!\n", ioc->name);
  1146. r = -EINVAL;
  1147. goto out_fail;
  1148. }
  1149. }
  1150. }
  1151. }
  1152. _base_mask_interrupts(ioc);
  1153. r = _base_enable_msix(ioc);
  1154. if (r)
  1155. goto out_fail;
  1156. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1157. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1158. "IO-APIC enabled"), ioc->pci_irq);
  1159. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1160. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1161. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1162. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1163. return 0;
  1164. out_fail:
  1165. if (ioc->chip_phys)
  1166. iounmap(ioc->chip);
  1167. ioc->chip_phys = 0;
  1168. ioc->pci_irq = -1;
  1169. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1170. pci_disable_pcie_error_reporting(pdev);
  1171. pci_disable_device(pdev);
  1172. return r;
  1173. }
  1174. /**
  1175. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1176. * @ioc: per adapter object
  1177. * @smid: system request message index(smid zero is invalid)
  1178. *
  1179. * Returns virt pointer to message frame.
  1180. */
  1181. void *
  1182. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1183. {
  1184. return (void *)(ioc->request + (smid * ioc->request_sz));
  1185. }
  1186. /**
  1187. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1188. * @ioc: per adapter object
  1189. * @smid: system request message index
  1190. *
  1191. * Returns virt pointer to sense buffer.
  1192. */
  1193. void *
  1194. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1195. {
  1196. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1197. }
  1198. /**
  1199. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1200. * @ioc: per adapter object
  1201. * @smid: system request message index
  1202. *
  1203. * Returns phys pointer to the low 32bit address of the sense buffer.
  1204. */
  1205. __le32
  1206. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1207. {
  1208. return cpu_to_le32(ioc->sense_dma +
  1209. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1210. }
  1211. /**
  1212. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1213. * @ioc: per adapter object
  1214. * @phys_addr: lower 32 physical addr of the reply
  1215. *
  1216. * Converts 32bit lower physical addr into a virt address.
  1217. */
  1218. void *
  1219. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1220. {
  1221. if (!phys_addr)
  1222. return NULL;
  1223. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1224. }
  1225. /**
  1226. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1227. * @ioc: per adapter object
  1228. * @cb_idx: callback index
  1229. *
  1230. * Returns smid (zero is invalid)
  1231. */
  1232. u16
  1233. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1234. {
  1235. unsigned long flags;
  1236. struct request_tracker *request;
  1237. u16 smid;
  1238. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1239. if (list_empty(&ioc->internal_free_list)) {
  1240. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1241. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1242. ioc->name, __func__);
  1243. return 0;
  1244. }
  1245. request = list_entry(ioc->internal_free_list.next,
  1246. struct request_tracker, tracker_list);
  1247. request->cb_idx = cb_idx;
  1248. smid = request->smid;
  1249. list_del(&request->tracker_list);
  1250. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1251. return smid;
  1252. }
  1253. /**
  1254. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1255. * @ioc: per adapter object
  1256. * @cb_idx: callback index
  1257. * @scmd: pointer to scsi command object
  1258. *
  1259. * Returns smid (zero is invalid)
  1260. */
  1261. u16
  1262. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1263. struct scsi_cmnd *scmd)
  1264. {
  1265. unsigned long flags;
  1266. struct request_tracker *request;
  1267. u16 smid;
  1268. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1269. if (list_empty(&ioc->free_list)) {
  1270. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1271. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1272. ioc->name, __func__);
  1273. return 0;
  1274. }
  1275. request = list_entry(ioc->free_list.next,
  1276. struct request_tracker, tracker_list);
  1277. request->scmd = scmd;
  1278. request->cb_idx = cb_idx;
  1279. smid = request->smid;
  1280. list_del(&request->tracker_list);
  1281. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1282. return smid;
  1283. }
  1284. /**
  1285. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1286. * @ioc: per adapter object
  1287. * @cb_idx: callback index
  1288. *
  1289. * Returns smid (zero is invalid)
  1290. */
  1291. u16
  1292. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1293. {
  1294. unsigned long flags;
  1295. struct request_tracker *request;
  1296. u16 smid;
  1297. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1298. if (list_empty(&ioc->hpr_free_list)) {
  1299. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1300. return 0;
  1301. }
  1302. request = list_entry(ioc->hpr_free_list.next,
  1303. struct request_tracker, tracker_list);
  1304. request->cb_idx = cb_idx;
  1305. smid = request->smid;
  1306. list_del(&request->tracker_list);
  1307. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1308. return smid;
  1309. }
  1310. /**
  1311. * mpt2sas_base_free_smid - put smid back on free_list
  1312. * @ioc: per adapter object
  1313. * @smid: system request message index
  1314. *
  1315. * Return nothing.
  1316. */
  1317. void
  1318. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1319. {
  1320. unsigned long flags;
  1321. int i;
  1322. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1323. if (smid >= ioc->hi_priority_smid) {
  1324. if (smid < ioc->internal_smid) {
  1325. /* hi-priority */
  1326. i = smid - ioc->hi_priority_smid;
  1327. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1328. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1329. &ioc->hpr_free_list);
  1330. } else {
  1331. /* internal queue */
  1332. i = smid - ioc->internal_smid;
  1333. ioc->internal_lookup[i].cb_idx = 0xFF;
  1334. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1335. &ioc->internal_free_list);
  1336. }
  1337. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1338. return;
  1339. }
  1340. /* scsiio queue */
  1341. i = smid - 1;
  1342. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1343. ioc->scsi_lookup[i].scmd = NULL;
  1344. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1345. &ioc->free_list);
  1346. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1347. /*
  1348. * See _wait_for_commands_to_complete() call with regards to this code.
  1349. */
  1350. if (ioc->shost_recovery && ioc->pending_io_count) {
  1351. if (ioc->pending_io_count == 1)
  1352. wake_up(&ioc->reset_wq);
  1353. ioc->pending_io_count--;
  1354. }
  1355. }
  1356. /**
  1357. * _base_writeq - 64 bit write to MMIO
  1358. * @ioc: per adapter object
  1359. * @b: data payload
  1360. * @addr: address in MMIO space
  1361. * @writeq_lock: spin lock
  1362. *
  1363. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1364. * care of 32 bit environment where its not quarenteed to send the entire word
  1365. * in one transfer.
  1366. */
  1367. #ifndef writeq
  1368. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1369. spinlock_t *writeq_lock)
  1370. {
  1371. unsigned long flags;
  1372. __u64 data_out = cpu_to_le64(b);
  1373. spin_lock_irqsave(writeq_lock, flags);
  1374. writel((u32)(data_out), addr);
  1375. writel((u32)(data_out >> 32), (addr + 4));
  1376. spin_unlock_irqrestore(writeq_lock, flags);
  1377. }
  1378. #else
  1379. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1380. spinlock_t *writeq_lock)
  1381. {
  1382. writeq(cpu_to_le64(b), addr);
  1383. }
  1384. #endif
  1385. /**
  1386. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1387. * @ioc: per adapter object
  1388. * @smid: system request message index
  1389. * @handle: device handle
  1390. *
  1391. * Return nothing.
  1392. */
  1393. void
  1394. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1395. {
  1396. Mpi2RequestDescriptorUnion_t descriptor;
  1397. u64 *request = (u64 *)&descriptor;
  1398. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1399. descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
  1400. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1401. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1402. descriptor.SCSIIO.LMID = 0;
  1403. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1404. &ioc->scsi_lookup_lock);
  1405. }
  1406. /**
  1407. * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
  1408. * @ioc: per adapter object
  1409. * @smid: system request message index
  1410. *
  1411. * Return nothing.
  1412. */
  1413. void
  1414. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1415. {
  1416. Mpi2RequestDescriptorUnion_t descriptor;
  1417. u64 *request = (u64 *)&descriptor;
  1418. descriptor.HighPriority.RequestFlags =
  1419. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1420. descriptor.HighPriority.MSIxIndex = 0; /* TODO */
  1421. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1422. descriptor.HighPriority.LMID = 0;
  1423. descriptor.HighPriority.Reserved1 = 0;
  1424. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1425. &ioc->scsi_lookup_lock);
  1426. }
  1427. /**
  1428. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1429. * @ioc: per adapter object
  1430. * @smid: system request message index
  1431. *
  1432. * Return nothing.
  1433. */
  1434. void
  1435. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1436. {
  1437. Mpi2RequestDescriptorUnion_t descriptor;
  1438. u64 *request = (u64 *)&descriptor;
  1439. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1440. descriptor.Default.MSIxIndex = 0; /* TODO */
  1441. descriptor.Default.SMID = cpu_to_le16(smid);
  1442. descriptor.Default.LMID = 0;
  1443. descriptor.Default.DescriptorTypeDependent = 0;
  1444. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1445. &ioc->scsi_lookup_lock);
  1446. }
  1447. /**
  1448. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1449. * @ioc: per adapter object
  1450. * @smid: system request message index
  1451. * @io_index: value used to track the IO
  1452. *
  1453. * Return nothing.
  1454. */
  1455. void
  1456. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1457. u16 io_index)
  1458. {
  1459. Mpi2RequestDescriptorUnion_t descriptor;
  1460. u64 *request = (u64 *)&descriptor;
  1461. descriptor.SCSITarget.RequestFlags =
  1462. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1463. descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
  1464. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1465. descriptor.SCSITarget.LMID = 0;
  1466. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1467. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1468. &ioc->scsi_lookup_lock);
  1469. }
  1470. /**
  1471. * _base_display_dell_branding - Disply branding string
  1472. * @ioc: per adapter object
  1473. *
  1474. * Return nothing.
  1475. */
  1476. static void
  1477. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1478. {
  1479. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1480. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1481. return;
  1482. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1483. switch (ioc->pdev->subsystem_device) {
  1484. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1485. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1486. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1487. break;
  1488. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1489. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1490. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1491. break;
  1492. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1493. strncpy(dell_branding,
  1494. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1495. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1496. break;
  1497. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1498. strncpy(dell_branding,
  1499. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1500. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1501. break;
  1502. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1503. strncpy(dell_branding,
  1504. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1505. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1506. break;
  1507. case MPT2SAS_DELL_PERC_H200_SSDID:
  1508. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1509. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1510. break;
  1511. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1512. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1513. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1514. break;
  1515. default:
  1516. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1517. break;
  1518. }
  1519. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1520. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1521. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1522. ioc->pdev->subsystem_device);
  1523. }
  1524. /**
  1525. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1526. * @ioc: per adapter object
  1527. *
  1528. * Return nothing.
  1529. */
  1530. static void
  1531. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1532. {
  1533. int i = 0;
  1534. char desc[16];
  1535. u8 revision;
  1536. u32 iounit_pg1_flags;
  1537. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1538. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1539. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1540. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1541. ioc->name, desc,
  1542. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1543. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1544. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1545. ioc->facts.FWVersion.Word & 0x000000FF,
  1546. revision,
  1547. (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
  1548. (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
  1549. (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
  1550. ioc->bios_pg3.BiosVersion & 0x000000FF);
  1551. _base_display_dell_branding(ioc);
  1552. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1553. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1554. printk("Initiator");
  1555. i++;
  1556. }
  1557. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1558. printk("%sTarget", i ? "," : "");
  1559. i++;
  1560. }
  1561. i = 0;
  1562. printk("), ");
  1563. printk("Capabilities=(");
  1564. if (ioc->facts.IOCCapabilities &
  1565. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1566. printk("Raid");
  1567. i++;
  1568. }
  1569. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1570. printk("%sTLR", i ? "," : "");
  1571. i++;
  1572. }
  1573. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1574. printk("%sMulticast", i ? "," : "");
  1575. i++;
  1576. }
  1577. if (ioc->facts.IOCCapabilities &
  1578. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1579. printk("%sBIDI Target", i ? "," : "");
  1580. i++;
  1581. }
  1582. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1583. printk("%sEEDP", i ? "," : "");
  1584. i++;
  1585. }
  1586. if (ioc->facts.IOCCapabilities &
  1587. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1588. printk("%sSnapshot Buffer", i ? "," : "");
  1589. i++;
  1590. }
  1591. if (ioc->facts.IOCCapabilities &
  1592. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1593. printk("%sDiag Trace Buffer", i ? "," : "");
  1594. i++;
  1595. }
  1596. if (ioc->facts.IOCCapabilities &
  1597. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1598. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1599. i++;
  1600. }
  1601. if (ioc->facts.IOCCapabilities &
  1602. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1603. printk("%sTask Set Full", i ? "," : "");
  1604. i++;
  1605. }
  1606. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1607. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1608. printk("%sNCQ", i ? "," : "");
  1609. i++;
  1610. }
  1611. printk(")\n");
  1612. }
  1613. /**
  1614. * _base_static_config_pages - static start of day config pages
  1615. * @ioc: per adapter object
  1616. *
  1617. * Return nothing.
  1618. */
  1619. static void
  1620. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1621. {
  1622. Mpi2ConfigReply_t mpi_reply;
  1623. u32 iounit_pg1_flags;
  1624. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1625. if (ioc->ir_firmware)
  1626. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  1627. &ioc->manu_pg10);
  1628. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1629. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1630. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1631. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1632. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1633. _base_display_ioc_capabilities(ioc);
  1634. /*
  1635. * Enable task_set_full handling in iounit_pg1 when the
  1636. * facts capabilities indicate that its supported.
  1637. */
  1638. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1639. if ((ioc->facts.IOCCapabilities &
  1640. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1641. iounit_pg1_flags &=
  1642. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1643. else
  1644. iounit_pg1_flags |=
  1645. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1646. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1647. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1648. }
  1649. /**
  1650. * _base_release_memory_pools - release memory
  1651. * @ioc: per adapter object
  1652. *
  1653. * Free memory allocated from _base_allocate_memory_pools.
  1654. *
  1655. * Return nothing.
  1656. */
  1657. static void
  1658. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1659. {
  1660. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1661. __func__));
  1662. if (ioc->request) {
  1663. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1664. ioc->request, ioc->request_dma);
  1665. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1666. ": free\n", ioc->name, ioc->request));
  1667. ioc->request = NULL;
  1668. }
  1669. if (ioc->sense) {
  1670. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1671. if (ioc->sense_dma_pool)
  1672. pci_pool_destroy(ioc->sense_dma_pool);
  1673. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1674. ": free\n", ioc->name, ioc->sense));
  1675. ioc->sense = NULL;
  1676. }
  1677. if (ioc->reply) {
  1678. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1679. if (ioc->reply_dma_pool)
  1680. pci_pool_destroy(ioc->reply_dma_pool);
  1681. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1682. ": free\n", ioc->name, ioc->reply));
  1683. ioc->reply = NULL;
  1684. }
  1685. if (ioc->reply_free) {
  1686. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1687. ioc->reply_free_dma);
  1688. if (ioc->reply_free_dma_pool)
  1689. pci_pool_destroy(ioc->reply_free_dma_pool);
  1690. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1691. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1692. ioc->reply_free = NULL;
  1693. }
  1694. if (ioc->reply_post_free) {
  1695. pci_pool_free(ioc->reply_post_free_dma_pool,
  1696. ioc->reply_post_free, ioc->reply_post_free_dma);
  1697. if (ioc->reply_post_free_dma_pool)
  1698. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1699. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1700. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1701. ioc->reply_post_free));
  1702. ioc->reply_post_free = NULL;
  1703. }
  1704. if (ioc->config_page) {
  1705. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1706. "config_page(0x%p): free\n", ioc->name,
  1707. ioc->config_page));
  1708. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1709. ioc->config_page, ioc->config_page_dma);
  1710. }
  1711. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  1712. kfree(ioc->hpr_lookup);
  1713. kfree(ioc->internal_lookup);
  1714. }
  1715. /**
  1716. * _base_allocate_memory_pools - allocate start of day memory pools
  1717. * @ioc: per adapter object
  1718. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1719. *
  1720. * Returns 0 success, anything else error
  1721. */
  1722. static int
  1723. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1724. {
  1725. Mpi2IOCFactsReply_t *facts;
  1726. u32 queue_size, queue_diff;
  1727. u16 max_sge_elements;
  1728. u16 num_of_reply_frames;
  1729. u16 chains_needed_per_io;
  1730. u32 sz, total_sz;
  1731. u32 retry_sz;
  1732. u16 max_request_credit;
  1733. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1734. __func__));
  1735. retry_sz = 0;
  1736. facts = &ioc->facts;
  1737. /* command line tunables for max sgl entries */
  1738. if (max_sgl_entries != -1) {
  1739. ioc->shost->sg_tablesize = (max_sgl_entries <
  1740. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1741. MPT2SAS_SG_DEPTH;
  1742. } else {
  1743. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1744. }
  1745. /* command line tunables for max controller queue depth */
  1746. if (max_queue_depth != -1) {
  1747. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1748. ? max_queue_depth : facts->RequestCredit;
  1749. } else {
  1750. max_request_credit = (facts->RequestCredit >
  1751. MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
  1752. facts->RequestCredit;
  1753. }
  1754. ioc->hba_queue_depth = max_request_credit;
  1755. ioc->hi_priority_depth = facts->HighPriorityCredit;
  1756. ioc->internal_depth = ioc->hi_priority_depth + 5;
  1757. /* request frame size */
  1758. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1759. /* reply frame size */
  1760. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1761. retry_allocation:
  1762. total_sz = 0;
  1763. /* calculate number of sg elements left over in the 1st frame */
  1764. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1765. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1766. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1767. /* now do the same for a chain buffer */
  1768. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1769. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1770. ioc->chain_offset_value_for_main_message =
  1771. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1772. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1773. /*
  1774. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1775. */
  1776. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1777. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1778. + 1;
  1779. if (chains_needed_per_io > facts->MaxChainDepth) {
  1780. chains_needed_per_io = facts->MaxChainDepth;
  1781. ioc->shost->sg_tablesize = min_t(u16,
  1782. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1783. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1784. }
  1785. ioc->chains_needed_per_io = chains_needed_per_io;
  1786. /* reply free queue sizing - taking into account for events */
  1787. num_of_reply_frames = ioc->hba_queue_depth + 32;
  1788. /* number of replies frames can't be a multiple of 16 */
  1789. /* decrease number of reply frames by 1 */
  1790. if (!(num_of_reply_frames % 16))
  1791. num_of_reply_frames--;
  1792. /* calculate number of reply free queue entries
  1793. * (must be multiple of 16)
  1794. */
  1795. /* (we know reply_free_queue_depth is not a multiple of 16) */
  1796. queue_size = num_of_reply_frames;
  1797. queue_size += 16 - (queue_size % 16);
  1798. ioc->reply_free_queue_depth = queue_size;
  1799. /* reply descriptor post queue sizing */
  1800. /* this size should be the number of request frames + number of reply
  1801. * frames
  1802. */
  1803. queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
  1804. /* round up to 16 byte boundary */
  1805. if (queue_size % 16)
  1806. queue_size += 16 - (queue_size % 16);
  1807. /* check against IOC maximum reply post queue depth */
  1808. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  1809. queue_diff = queue_size -
  1810. facts->MaxReplyDescriptorPostQueueDepth;
  1811. /* round queue_diff up to multiple of 16 */
  1812. if (queue_diff % 16)
  1813. queue_diff += 16 - (queue_diff % 16);
  1814. /* adjust hba_queue_depth, reply_free_queue_depth,
  1815. * and queue_size
  1816. */
  1817. ioc->hba_queue_depth -= queue_diff;
  1818. ioc->reply_free_queue_depth -= queue_diff;
  1819. queue_size -= queue_diff;
  1820. }
  1821. ioc->reply_post_queue_depth = queue_size;
  1822. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  1823. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  1824. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  1825. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  1826. ioc->chains_needed_per_io));
  1827. ioc->scsiio_depth = ioc->hba_queue_depth -
  1828. ioc->hi_priority_depth - ioc->internal_depth;
  1829. /* set the scsi host can_queue depth
  1830. * with some internal commands that could be outstanding
  1831. */
  1832. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  1833. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  1834. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  1835. /* contiguous pool for request and chains, 16 byte align, one extra "
  1836. * "frame for smid=0
  1837. */
  1838. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  1839. sz = ((ioc->scsiio_depth + 1 + ioc->chain_depth) * ioc->request_sz);
  1840. /* hi-priority queue */
  1841. sz += (ioc->hi_priority_depth * ioc->request_sz);
  1842. /* internal queue */
  1843. sz += (ioc->internal_depth * ioc->request_sz);
  1844. ioc->request_dma_sz = sz;
  1845. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  1846. if (!ioc->request) {
  1847. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1848. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1849. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  1850. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1851. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  1852. goto out;
  1853. retry_sz += 64;
  1854. ioc->hba_queue_depth = max_request_credit - retry_sz;
  1855. goto retry_allocation;
  1856. }
  1857. if (retry_sz)
  1858. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1859. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1860. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  1861. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1862. /* hi-priority queue */
  1863. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  1864. ioc->request_sz);
  1865. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  1866. ioc->request_sz);
  1867. /* internal queue */
  1868. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  1869. ioc->request_sz);
  1870. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  1871. ioc->request_sz);
  1872. ioc->chain = ioc->internal + (ioc->internal_depth *
  1873. ioc->request_sz);
  1874. ioc->chain_dma = ioc->internal_dma + (ioc->internal_depth *
  1875. ioc->request_sz);
  1876. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  1877. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  1878. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  1879. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  1880. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
  1881. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
  1882. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  1883. ioc->request_sz))/1024));
  1884. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  1885. ioc->name, (unsigned long long) ioc->request_dma));
  1886. total_sz += sz;
  1887. sz = ioc->scsiio_depth * sizeof(struct request_tracker);
  1888. ioc->scsi_lookup_pages = get_order(sz);
  1889. ioc->scsi_lookup = (struct request_tracker *)__get_free_pages(
  1890. GFP_KERNEL, ioc->scsi_lookup_pages);
  1891. if (!ioc->scsi_lookup) {
  1892. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  1893. "sz(%d)\n", ioc->name, (int)sz);
  1894. goto out;
  1895. }
  1896. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  1897. "depth(%d)\n", ioc->name, ioc->request,
  1898. ioc->scsiio_depth));
  1899. /* initialize hi-priority queue smid's */
  1900. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  1901. sizeof(struct request_tracker), GFP_KERNEL);
  1902. if (!ioc->hpr_lookup) {
  1903. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  1904. ioc->name);
  1905. goto out;
  1906. }
  1907. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  1908. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  1909. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  1910. ioc->hi_priority_depth, ioc->hi_priority_smid));
  1911. /* initialize internal queue smid's */
  1912. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  1913. sizeof(struct request_tracker), GFP_KERNEL);
  1914. if (!ioc->internal_lookup) {
  1915. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  1916. ioc->name);
  1917. goto out;
  1918. }
  1919. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  1920. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  1921. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  1922. ioc->internal_depth, ioc->internal_smid));
  1923. /* sense buffers, 4 byte align */
  1924. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  1925. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  1926. 0);
  1927. if (!ioc->sense_dma_pool) {
  1928. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  1929. ioc->name);
  1930. goto out;
  1931. }
  1932. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  1933. &ioc->sense_dma);
  1934. if (!ioc->sense) {
  1935. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  1936. ioc->name);
  1937. goto out;
  1938. }
  1939. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1940. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  1941. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  1942. SCSI_SENSE_BUFFERSIZE, sz/1024));
  1943. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  1944. ioc->name, (unsigned long long)ioc->sense_dma));
  1945. total_sz += sz;
  1946. /* reply pool, 4 byte align */
  1947. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  1948. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  1949. 0);
  1950. if (!ioc->reply_dma_pool) {
  1951. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  1952. ioc->name);
  1953. goto out;
  1954. }
  1955. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  1956. &ioc->reply_dma);
  1957. if (!ioc->reply) {
  1958. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  1959. ioc->name);
  1960. goto out;
  1961. }
  1962. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  1963. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  1964. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  1965. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  1966. ioc->name, (unsigned long long)ioc->reply_dma));
  1967. total_sz += sz;
  1968. /* reply free queue, 16 byte align */
  1969. sz = ioc->reply_free_queue_depth * 4;
  1970. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  1971. ioc->pdev, sz, 16, 0);
  1972. if (!ioc->reply_free_dma_pool) {
  1973. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  1974. "failed\n", ioc->name);
  1975. goto out;
  1976. }
  1977. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  1978. &ioc->reply_free_dma);
  1979. if (!ioc->reply_free) {
  1980. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  1981. "failed\n", ioc->name);
  1982. goto out;
  1983. }
  1984. memset(ioc->reply_free, 0, sz);
  1985. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  1986. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  1987. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  1988. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  1989. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  1990. total_sz += sz;
  1991. /* reply post queue, 16 byte align */
  1992. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  1993. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  1994. ioc->pdev, sz, 16, 0);
  1995. if (!ioc->reply_post_free_dma_pool) {
  1996. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  1997. "failed\n", ioc->name);
  1998. goto out;
  1999. }
  2000. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2001. GFP_KERNEL, &ioc->reply_post_free_dma);
  2002. if (!ioc->reply_post_free) {
  2003. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2004. "failed\n", ioc->name);
  2005. goto out;
  2006. }
  2007. memset(ioc->reply_post_free, 0, sz);
  2008. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2009. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2010. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2011. sz/1024));
  2012. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2013. "(0x%llx)\n", ioc->name, (unsigned long long)
  2014. ioc->reply_post_free_dma));
  2015. total_sz += sz;
  2016. ioc->config_page_sz = 512;
  2017. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2018. ioc->config_page_sz, &ioc->config_page_dma);
  2019. if (!ioc->config_page) {
  2020. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2021. "failed\n", ioc->name);
  2022. goto out;
  2023. }
  2024. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2025. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2026. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2027. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2028. total_sz += ioc->config_page_sz;
  2029. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2030. ioc->name, total_sz/1024);
  2031. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2032. "Max Controller Queue Depth(%d)\n",
  2033. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2034. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2035. ioc->name, ioc->shost->sg_tablesize);
  2036. return 0;
  2037. out:
  2038. _base_release_memory_pools(ioc);
  2039. return -ENOMEM;
  2040. }
  2041. /**
  2042. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2043. * @ioc: Pointer to MPT_ADAPTER structure
  2044. * @cooked: Request raw or cooked IOC state
  2045. *
  2046. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2047. * Doorbell bits in MPI_IOC_STATE_MASK.
  2048. */
  2049. u32
  2050. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2051. {
  2052. u32 s, sc;
  2053. s = readl(&ioc->chip->Doorbell);
  2054. sc = s & MPI2_IOC_STATE_MASK;
  2055. return cooked ? sc : s;
  2056. }
  2057. /**
  2058. * _base_wait_on_iocstate - waiting on a particular ioc state
  2059. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2060. * @timeout: timeout in second
  2061. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2062. *
  2063. * Returns 0 for success, non-zero for failure.
  2064. */
  2065. static int
  2066. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2067. int sleep_flag)
  2068. {
  2069. u32 count, cntdn;
  2070. u32 current_state;
  2071. count = 0;
  2072. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2073. do {
  2074. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2075. if (current_state == ioc_state)
  2076. return 0;
  2077. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2078. break;
  2079. if (sleep_flag == CAN_SLEEP)
  2080. msleep(1);
  2081. else
  2082. udelay(500);
  2083. count++;
  2084. } while (--cntdn);
  2085. return current_state;
  2086. }
  2087. /**
  2088. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2089. * a write to the doorbell)
  2090. * @ioc: per adapter object
  2091. * @timeout: timeout in second
  2092. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2093. *
  2094. * Returns 0 for success, non-zero for failure.
  2095. *
  2096. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2097. */
  2098. static int
  2099. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2100. int sleep_flag)
  2101. {
  2102. u32 cntdn, count;
  2103. u32 int_status;
  2104. count = 0;
  2105. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2106. do {
  2107. int_status = readl(&ioc->chip->HostInterruptStatus);
  2108. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2109. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  2110. "successfull count(%d), timeout(%d)\n", ioc->name,
  2111. __func__, count, timeout));
  2112. return 0;
  2113. }
  2114. if (sleep_flag == CAN_SLEEP)
  2115. msleep(1);
  2116. else
  2117. udelay(500);
  2118. count++;
  2119. } while (--cntdn);
  2120. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2121. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2122. return -EFAULT;
  2123. }
  2124. /**
  2125. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2126. * @ioc: per adapter object
  2127. * @timeout: timeout in second
  2128. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2129. *
  2130. * Returns 0 for success, non-zero for failure.
  2131. *
  2132. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2133. * doorbell.
  2134. */
  2135. static int
  2136. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2137. int sleep_flag)
  2138. {
  2139. u32 cntdn, count;
  2140. u32 int_status;
  2141. u32 doorbell;
  2142. count = 0;
  2143. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2144. do {
  2145. int_status = readl(&ioc->chip->HostInterruptStatus);
  2146. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2147. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  2148. "successfull count(%d), timeout(%d)\n", ioc->name,
  2149. __func__, count, timeout));
  2150. return 0;
  2151. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2152. doorbell = readl(&ioc->chip->Doorbell);
  2153. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2154. MPI2_IOC_STATE_FAULT) {
  2155. mpt2sas_base_fault_info(ioc , doorbell);
  2156. return -EFAULT;
  2157. }
  2158. } else if (int_status == 0xFFFFFFFF)
  2159. goto out;
  2160. if (sleep_flag == CAN_SLEEP)
  2161. msleep(1);
  2162. else
  2163. udelay(500);
  2164. count++;
  2165. } while (--cntdn);
  2166. out:
  2167. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2168. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2169. return -EFAULT;
  2170. }
  2171. /**
  2172. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2173. * @ioc: per adapter object
  2174. * @timeout: timeout in second
  2175. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2176. *
  2177. * Returns 0 for success, non-zero for failure.
  2178. *
  2179. */
  2180. static int
  2181. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2182. int sleep_flag)
  2183. {
  2184. u32 cntdn, count;
  2185. u32 doorbell_reg;
  2186. count = 0;
  2187. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2188. do {
  2189. doorbell_reg = readl(&ioc->chip->Doorbell);
  2190. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2191. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  2192. "successfull count(%d), timeout(%d)\n", ioc->name,
  2193. __func__, count, timeout));
  2194. return 0;
  2195. }
  2196. if (sleep_flag == CAN_SLEEP)
  2197. msleep(1);
  2198. else
  2199. udelay(500);
  2200. count++;
  2201. } while (--cntdn);
  2202. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2203. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2204. return -EFAULT;
  2205. }
  2206. /**
  2207. * _base_send_ioc_reset - send doorbell reset
  2208. * @ioc: per adapter object
  2209. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2210. * @timeout: timeout in second
  2211. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2212. *
  2213. * Returns 0 for success, non-zero for failure.
  2214. */
  2215. static int
  2216. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2217. int sleep_flag)
  2218. {
  2219. u32 ioc_state;
  2220. int r = 0;
  2221. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2222. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2223. ioc->name, __func__);
  2224. return -EFAULT;
  2225. }
  2226. if (!(ioc->facts.IOCCapabilities &
  2227. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2228. return -EFAULT;
  2229. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2230. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2231. &ioc->chip->Doorbell);
  2232. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2233. r = -EFAULT;
  2234. goto out;
  2235. }
  2236. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2237. timeout, sleep_flag);
  2238. if (ioc_state) {
  2239. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2240. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2241. r = -EFAULT;
  2242. goto out;
  2243. }
  2244. out:
  2245. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2246. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2247. return r;
  2248. }
  2249. /**
  2250. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2251. * @ioc: per adapter object
  2252. * @request_bytes: request length
  2253. * @request: pointer having request payload
  2254. * @reply_bytes: reply length
  2255. * @reply: pointer to reply payload
  2256. * @timeout: timeout in second
  2257. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2258. *
  2259. * Returns 0 for success, non-zero for failure.
  2260. */
  2261. static int
  2262. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2263. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2264. {
  2265. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2266. int i;
  2267. u8 failed;
  2268. u16 dummy;
  2269. u32 *mfp;
  2270. /* make sure doorbell is not in use */
  2271. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2272. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2273. " (line=%d)\n", ioc->name, __LINE__);
  2274. return -EFAULT;
  2275. }
  2276. /* clear pending doorbell interrupts from previous state changes */
  2277. if (readl(&ioc->chip->HostInterruptStatus) &
  2278. MPI2_HIS_IOC2SYS_DB_STATUS)
  2279. writel(0, &ioc->chip->HostInterruptStatus);
  2280. /* send message to ioc */
  2281. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2282. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2283. &ioc->chip->Doorbell);
  2284. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2285. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2286. "int failed (line=%d)\n", ioc->name, __LINE__);
  2287. return -EFAULT;
  2288. }
  2289. writel(0, &ioc->chip->HostInterruptStatus);
  2290. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2291. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2292. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2293. return -EFAULT;
  2294. }
  2295. /* send message 32-bits at a time */
  2296. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2297. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2298. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2299. failed = 1;
  2300. }
  2301. if (failed) {
  2302. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2303. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2304. return -EFAULT;
  2305. }
  2306. /* now wait for the reply */
  2307. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2308. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2309. "int failed (line=%d)\n", ioc->name, __LINE__);
  2310. return -EFAULT;
  2311. }
  2312. /* read the first two 16-bits, it gives the total length of the reply */
  2313. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2314. & MPI2_DOORBELL_DATA_MASK);
  2315. writel(0, &ioc->chip->HostInterruptStatus);
  2316. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2317. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2318. "int failed (line=%d)\n", ioc->name, __LINE__);
  2319. return -EFAULT;
  2320. }
  2321. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2322. & MPI2_DOORBELL_DATA_MASK);
  2323. writel(0, &ioc->chip->HostInterruptStatus);
  2324. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2325. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2326. printk(MPT2SAS_ERR_FMT "doorbell "
  2327. "handshake int failed (line=%d)\n", ioc->name,
  2328. __LINE__);
  2329. return -EFAULT;
  2330. }
  2331. if (i >= reply_bytes/2) /* overflow case */
  2332. dummy = readl(&ioc->chip->Doorbell);
  2333. else
  2334. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2335. & MPI2_DOORBELL_DATA_MASK);
  2336. writel(0, &ioc->chip->HostInterruptStatus);
  2337. }
  2338. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2339. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2340. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2341. " (line=%d)\n", ioc->name, __LINE__));
  2342. }
  2343. writel(0, &ioc->chip->HostInterruptStatus);
  2344. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2345. mfp = (u32 *)reply;
  2346. printk(KERN_DEBUG "\toffset:data\n");
  2347. for (i = 0; i < reply_bytes/4; i++)
  2348. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2349. le32_to_cpu(mfp[i]));
  2350. }
  2351. return 0;
  2352. }
  2353. /**
  2354. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2355. * @ioc: per adapter object
  2356. * @mpi_reply: the reply payload from FW
  2357. * @mpi_request: the request payload sent to FW
  2358. *
  2359. * The SAS IO Unit Control Request message allows the host to perform low-level
  2360. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2361. * to obtain the IOC assigned device handles for a device if it has other
  2362. * identifying information about the device, in addition allows the host to
  2363. * remove IOC resources associated with the device.
  2364. *
  2365. * Returns 0 for success, non-zero for failure.
  2366. */
  2367. int
  2368. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2369. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2370. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2371. {
  2372. u16 smid;
  2373. u32 ioc_state;
  2374. unsigned long timeleft;
  2375. u8 issue_reset;
  2376. int rc;
  2377. void *request;
  2378. u16 wait_state_count;
  2379. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2380. __func__));
  2381. mutex_lock(&ioc->base_cmds.mutex);
  2382. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2383. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2384. ioc->name, __func__);
  2385. rc = -EAGAIN;
  2386. goto out;
  2387. }
  2388. wait_state_count = 0;
  2389. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2390. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2391. if (wait_state_count++ == 10) {
  2392. printk(MPT2SAS_ERR_FMT
  2393. "%s: failed due to ioc not operational\n",
  2394. ioc->name, __func__);
  2395. rc = -EFAULT;
  2396. goto out;
  2397. }
  2398. ssleep(1);
  2399. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2400. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2401. "operational state(count=%d)\n", ioc->name,
  2402. __func__, wait_state_count);
  2403. }
  2404. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2405. if (!smid) {
  2406. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2407. ioc->name, __func__);
  2408. rc = -EAGAIN;
  2409. goto out;
  2410. }
  2411. rc = 0;
  2412. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2413. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2414. ioc->base_cmds.smid = smid;
  2415. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2416. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2417. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2418. ioc->ioc_link_reset_in_progress = 1;
  2419. mpt2sas_base_put_smid_default(ioc, smid);
  2420. init_completion(&ioc->base_cmds.done);
  2421. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2422. msecs_to_jiffies(10000));
  2423. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2424. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2425. ioc->ioc_link_reset_in_progress)
  2426. ioc->ioc_link_reset_in_progress = 0;
  2427. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2428. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2429. ioc->name, __func__);
  2430. _debug_dump_mf(mpi_request,
  2431. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2432. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2433. issue_reset = 1;
  2434. goto issue_host_reset;
  2435. }
  2436. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2437. memcpy(mpi_reply, ioc->base_cmds.reply,
  2438. sizeof(Mpi2SasIoUnitControlReply_t));
  2439. else
  2440. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2441. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2442. goto out;
  2443. issue_host_reset:
  2444. if (issue_reset)
  2445. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2446. FORCE_BIG_HAMMER);
  2447. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2448. rc = -EFAULT;
  2449. out:
  2450. mutex_unlock(&ioc->base_cmds.mutex);
  2451. return rc;
  2452. }
  2453. /**
  2454. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2455. * @ioc: per adapter object
  2456. * @mpi_reply: the reply payload from FW
  2457. * @mpi_request: the request payload sent to FW
  2458. *
  2459. * The SCSI Enclosure Processor request message causes the IOC to
  2460. * communicate with SES devices to control LED status signals.
  2461. *
  2462. * Returns 0 for success, non-zero for failure.
  2463. */
  2464. int
  2465. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2466. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2467. {
  2468. u16 smid;
  2469. u32 ioc_state;
  2470. unsigned long timeleft;
  2471. u8 issue_reset;
  2472. int rc;
  2473. void *request;
  2474. u16 wait_state_count;
  2475. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2476. __func__));
  2477. mutex_lock(&ioc->base_cmds.mutex);
  2478. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2479. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2480. ioc->name, __func__);
  2481. rc = -EAGAIN;
  2482. goto out;
  2483. }
  2484. wait_state_count = 0;
  2485. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2486. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2487. if (wait_state_count++ == 10) {
  2488. printk(MPT2SAS_ERR_FMT
  2489. "%s: failed due to ioc not operational\n",
  2490. ioc->name, __func__);
  2491. rc = -EFAULT;
  2492. goto out;
  2493. }
  2494. ssleep(1);
  2495. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2496. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2497. "operational state(count=%d)\n", ioc->name,
  2498. __func__, wait_state_count);
  2499. }
  2500. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2501. if (!smid) {
  2502. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2503. ioc->name, __func__);
  2504. rc = -EAGAIN;
  2505. goto out;
  2506. }
  2507. rc = 0;
  2508. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2509. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2510. ioc->base_cmds.smid = smid;
  2511. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2512. mpt2sas_base_put_smid_default(ioc, smid);
  2513. init_completion(&ioc->base_cmds.done);
  2514. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2515. msecs_to_jiffies(10000));
  2516. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2517. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2518. ioc->name, __func__);
  2519. _debug_dump_mf(mpi_request,
  2520. sizeof(Mpi2SepRequest_t)/4);
  2521. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2522. issue_reset = 1;
  2523. goto issue_host_reset;
  2524. }
  2525. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2526. memcpy(mpi_reply, ioc->base_cmds.reply,
  2527. sizeof(Mpi2SepReply_t));
  2528. else
  2529. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2530. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2531. goto out;
  2532. issue_host_reset:
  2533. if (issue_reset)
  2534. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2535. FORCE_BIG_HAMMER);
  2536. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2537. rc = -EFAULT;
  2538. out:
  2539. mutex_unlock(&ioc->base_cmds.mutex);
  2540. return rc;
  2541. }
  2542. /**
  2543. * _base_get_port_facts - obtain port facts reply and save in ioc
  2544. * @ioc: per adapter object
  2545. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2546. *
  2547. * Returns 0 for success, non-zero for failure.
  2548. */
  2549. static int
  2550. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2551. {
  2552. Mpi2PortFactsRequest_t mpi_request;
  2553. Mpi2PortFactsReply_t mpi_reply, *pfacts;
  2554. int mpi_reply_sz, mpi_request_sz, r;
  2555. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2556. __func__));
  2557. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2558. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2559. memset(&mpi_request, 0, mpi_request_sz);
  2560. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2561. mpi_request.PortNumber = port;
  2562. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2563. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2564. if (r != 0) {
  2565. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2566. ioc->name, __func__, r);
  2567. return r;
  2568. }
  2569. pfacts = &ioc->pfacts[port];
  2570. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2571. pfacts->PortNumber = mpi_reply.PortNumber;
  2572. pfacts->VP_ID = mpi_reply.VP_ID;
  2573. pfacts->VF_ID = mpi_reply.VF_ID;
  2574. pfacts->MaxPostedCmdBuffers =
  2575. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2576. return 0;
  2577. }
  2578. /**
  2579. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2580. * @ioc: per adapter object
  2581. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2582. *
  2583. * Returns 0 for success, non-zero for failure.
  2584. */
  2585. static int
  2586. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2587. {
  2588. Mpi2IOCFactsRequest_t mpi_request;
  2589. Mpi2IOCFactsReply_t mpi_reply, *facts;
  2590. int mpi_reply_sz, mpi_request_sz, r;
  2591. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2592. __func__));
  2593. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2594. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2595. memset(&mpi_request, 0, mpi_request_sz);
  2596. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2597. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2598. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2599. if (r != 0) {
  2600. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2601. ioc->name, __func__, r);
  2602. return r;
  2603. }
  2604. facts = &ioc->facts;
  2605. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2606. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2607. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2608. facts->VP_ID = mpi_reply.VP_ID;
  2609. facts->VF_ID = mpi_reply.VF_ID;
  2610. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2611. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2612. facts->WhoInit = mpi_reply.WhoInit;
  2613. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2614. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2615. facts->MaxReplyDescriptorPostQueueDepth =
  2616. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2617. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2618. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2619. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2620. ioc->ir_firmware = 1;
  2621. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2622. facts->IOCRequestFrameSize =
  2623. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2624. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2625. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2626. ioc->shost->max_id = -1;
  2627. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2628. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2629. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2630. facts->HighPriorityCredit =
  2631. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2632. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2633. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2634. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2635. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2636. facts->MaxChainDepth));
  2637. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2638. "reply frame size(%d)\n", ioc->name,
  2639. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2640. return 0;
  2641. }
  2642. /**
  2643. * _base_send_ioc_init - send ioc_init to firmware
  2644. * @ioc: per adapter object
  2645. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2646. *
  2647. * Returns 0 for success, non-zero for failure.
  2648. */
  2649. static int
  2650. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2651. {
  2652. Mpi2IOCInitRequest_t mpi_request;
  2653. Mpi2IOCInitReply_t mpi_reply;
  2654. int r;
  2655. struct timeval current_time;
  2656. u16 ioc_status;
  2657. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2658. __func__));
  2659. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2660. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2661. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2662. mpi_request.VF_ID = 0; /* TODO */
  2663. mpi_request.VP_ID = 0;
  2664. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2665. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2666. /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
  2667. * removed and made reserved. For those with older firmware will need
  2668. * this fix. It was decided that the Reply and Request frame sizes are
  2669. * the same.
  2670. */
  2671. if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
  2672. mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
  2673. /* mpi_request.SystemReplyFrameSize =
  2674. * cpu_to_le16(ioc->reply_sz);
  2675. */
  2676. }
  2677. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2678. mpi_request.ReplyDescriptorPostQueueDepth =
  2679. cpu_to_le16(ioc->reply_post_queue_depth);
  2680. mpi_request.ReplyFreeQueueDepth =
  2681. cpu_to_le16(ioc->reply_free_queue_depth);
  2682. #if BITS_PER_LONG > 32
  2683. mpi_request.SenseBufferAddressHigh =
  2684. cpu_to_le32(ioc->sense_dma >> 32);
  2685. mpi_request.SystemReplyAddressHigh =
  2686. cpu_to_le32(ioc->reply_dma >> 32);
  2687. mpi_request.SystemRequestFrameBaseAddress =
  2688. cpu_to_le64(ioc->request_dma);
  2689. mpi_request.ReplyFreeQueueAddress =
  2690. cpu_to_le64(ioc->reply_free_dma);
  2691. mpi_request.ReplyDescriptorPostQueueAddress =
  2692. cpu_to_le64(ioc->reply_post_free_dma);
  2693. #else
  2694. mpi_request.SystemRequestFrameBaseAddress =
  2695. cpu_to_le32(ioc->request_dma);
  2696. mpi_request.ReplyFreeQueueAddress =
  2697. cpu_to_le32(ioc->reply_free_dma);
  2698. mpi_request.ReplyDescriptorPostQueueAddress =
  2699. cpu_to_le32(ioc->reply_post_free_dma);
  2700. #endif
  2701. /* This time stamp specifies number of milliseconds
  2702. * since epoch ~ midnight January 1, 1970.
  2703. */
  2704. do_gettimeofday(&current_time);
  2705. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  2706. (current_time.tv_usec / 1000));
  2707. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2708. u32 *mfp;
  2709. int i;
  2710. mfp = (u32 *)&mpi_request;
  2711. printk(KERN_DEBUG "\toffset:data\n");
  2712. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2713. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2714. le32_to_cpu(mfp[i]));
  2715. }
  2716. r = _base_handshake_req_reply_wait(ioc,
  2717. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2718. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2719. sleep_flag);
  2720. if (r != 0) {
  2721. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2722. ioc->name, __func__, r);
  2723. return r;
  2724. }
  2725. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  2726. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  2727. mpi_reply.IOCLogInfo) {
  2728. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2729. r = -EIO;
  2730. }
  2731. return 0;
  2732. }
  2733. /**
  2734. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2735. * @ioc: per adapter object
  2736. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2737. *
  2738. * Returns 0 for success, non-zero for failure.
  2739. */
  2740. static int
  2741. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2742. {
  2743. Mpi2PortEnableRequest_t *mpi_request;
  2744. u32 ioc_state;
  2745. unsigned long timeleft;
  2746. int r = 0;
  2747. u16 smid;
  2748. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2749. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2750. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2751. ioc->name, __func__);
  2752. return -EAGAIN;
  2753. }
  2754. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2755. if (!smid) {
  2756. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2757. ioc->name, __func__);
  2758. return -EAGAIN;
  2759. }
  2760. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2761. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2762. ioc->base_cmds.smid = smid;
  2763. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2764. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2765. mpi_request->VF_ID = 0; /* TODO */
  2766. mpi_request->VP_ID = 0;
  2767. mpt2sas_base_put_smid_default(ioc, smid);
  2768. init_completion(&ioc->base_cmds.done);
  2769. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2770. 300*HZ);
  2771. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2772. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2773. ioc->name, __func__);
  2774. _debug_dump_mf(mpi_request,
  2775. sizeof(Mpi2PortEnableRequest_t)/4);
  2776. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2777. r = -EFAULT;
  2778. else
  2779. r = -ETIME;
  2780. goto out;
  2781. } else
  2782. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2783. ioc->name, __func__));
  2784. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  2785. 60, sleep_flag);
  2786. if (ioc_state) {
  2787. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  2788. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2789. r = -EFAULT;
  2790. }
  2791. out:
  2792. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2793. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  2794. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2795. return r;
  2796. }
  2797. /**
  2798. * _base_unmask_events - turn on notification for this event
  2799. * @ioc: per adapter object
  2800. * @event: firmware event
  2801. *
  2802. * The mask is stored in ioc->event_masks.
  2803. */
  2804. static void
  2805. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  2806. {
  2807. u32 desired_event;
  2808. if (event >= 128)
  2809. return;
  2810. desired_event = (1 << (event % 32));
  2811. if (event < 32)
  2812. ioc->event_masks[0] &= ~desired_event;
  2813. else if (event < 64)
  2814. ioc->event_masks[1] &= ~desired_event;
  2815. else if (event < 96)
  2816. ioc->event_masks[2] &= ~desired_event;
  2817. else if (event < 128)
  2818. ioc->event_masks[3] &= ~desired_event;
  2819. }
  2820. /**
  2821. * _base_event_notification - send event notification
  2822. * @ioc: per adapter object
  2823. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2824. *
  2825. * Returns 0 for success, non-zero for failure.
  2826. */
  2827. static int
  2828. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2829. {
  2830. Mpi2EventNotificationRequest_t *mpi_request;
  2831. unsigned long timeleft;
  2832. u16 smid;
  2833. int r = 0;
  2834. int i;
  2835. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2836. __func__));
  2837. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2838. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2839. ioc->name, __func__);
  2840. return -EAGAIN;
  2841. }
  2842. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2843. if (!smid) {
  2844. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2845. ioc->name, __func__);
  2846. return -EAGAIN;
  2847. }
  2848. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2849. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2850. ioc->base_cmds.smid = smid;
  2851. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  2852. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  2853. mpi_request->VF_ID = 0; /* TODO */
  2854. mpi_request->VP_ID = 0;
  2855. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2856. mpi_request->EventMasks[i] =
  2857. cpu_to_le32(ioc->event_masks[i]);
  2858. mpt2sas_base_put_smid_default(ioc, smid);
  2859. init_completion(&ioc->base_cmds.done);
  2860. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  2861. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2862. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2863. ioc->name, __func__);
  2864. _debug_dump_mf(mpi_request,
  2865. sizeof(Mpi2EventNotificationRequest_t)/4);
  2866. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2867. r = -EFAULT;
  2868. else
  2869. r = -ETIME;
  2870. } else
  2871. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2872. ioc->name, __func__));
  2873. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2874. return r;
  2875. }
  2876. /**
  2877. * mpt2sas_base_validate_event_type - validating event types
  2878. * @ioc: per adapter object
  2879. * @event: firmware event
  2880. *
  2881. * This will turn on firmware event notification when application
  2882. * ask for that event. We don't mask events that are already enabled.
  2883. */
  2884. void
  2885. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  2886. {
  2887. int i, j;
  2888. u32 event_mask, desired_event;
  2889. u8 send_update_to_fw;
  2890. for (i = 0, send_update_to_fw = 0; i <
  2891. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  2892. event_mask = ~event_type[i];
  2893. desired_event = 1;
  2894. for (j = 0; j < 32; j++) {
  2895. if (!(event_mask & desired_event) &&
  2896. (ioc->event_masks[i] & desired_event)) {
  2897. ioc->event_masks[i] &= ~desired_event;
  2898. send_update_to_fw = 1;
  2899. }
  2900. desired_event = (desired_event << 1);
  2901. }
  2902. }
  2903. if (!send_update_to_fw)
  2904. return;
  2905. mutex_lock(&ioc->base_cmds.mutex);
  2906. _base_event_notification(ioc, CAN_SLEEP);
  2907. mutex_unlock(&ioc->base_cmds.mutex);
  2908. }
  2909. /**
  2910. * _base_diag_reset - the "big hammer" start of day reset
  2911. * @ioc: per adapter object
  2912. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2913. *
  2914. * Returns 0 for success, non-zero for failure.
  2915. */
  2916. static int
  2917. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2918. {
  2919. u32 host_diagnostic;
  2920. u32 ioc_state;
  2921. u32 count;
  2922. u32 hcb_size;
  2923. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  2924. _base_save_msix_table(ioc);
  2925. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
  2926. ioc->name));
  2927. count = 0;
  2928. do {
  2929. /* Write magic sequence to WriteSequence register
  2930. * Loop until in diagnostic mode
  2931. */
  2932. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
  2933. "sequence\n", ioc->name));
  2934. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2935. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  2936. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  2937. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  2938. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2939. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2940. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2941. /* wait 100 msec */
  2942. if (sleep_flag == CAN_SLEEP)
  2943. msleep(100);
  2944. else
  2945. mdelay(100);
  2946. if (count++ > 20)
  2947. goto out;
  2948. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2949. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
  2950. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  2951. ioc->name, count, host_diagnostic));
  2952. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  2953. hcb_size = readl(&ioc->chip->HCBSize);
  2954. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
  2955. ioc->name));
  2956. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  2957. &ioc->chip->HostDiagnostic);
  2958. /* don't access any registers for 50 milliseconds */
  2959. msleep(50);
  2960. /* 300 second max wait */
  2961. for (count = 0; count < 3000000 ; count++) {
  2962. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2963. if (host_diagnostic == 0xFFFFFFFF)
  2964. goto out;
  2965. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  2966. break;
  2967. /* wait 100 msec */
  2968. if (sleep_flag == CAN_SLEEP)
  2969. msleep(1);
  2970. else
  2971. mdelay(1);
  2972. }
  2973. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  2974. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
  2975. "assuming the HCB Address points to good F/W\n",
  2976. ioc->name));
  2977. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  2978. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  2979. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  2980. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
  2981. "re-enable the HCDW\n", ioc->name));
  2982. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  2983. &ioc->chip->HCBSize);
  2984. }
  2985. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
  2986. ioc->name));
  2987. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  2988. &ioc->chip->HostDiagnostic);
  2989. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
  2990. "diagnostic register\n", ioc->name));
  2991. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2992. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
  2993. "READY state\n", ioc->name));
  2994. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  2995. sleep_flag);
  2996. if (ioc_state) {
  2997. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2998. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2999. goto out;
  3000. }
  3001. _base_restore_msix_table(ioc);
  3002. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3003. return 0;
  3004. out:
  3005. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3006. return -EFAULT;
  3007. }
  3008. /**
  3009. * _base_make_ioc_ready - put controller in READY state
  3010. * @ioc: per adapter object
  3011. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3012. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3013. *
  3014. * Returns 0 for success, non-zero for failure.
  3015. */
  3016. static int
  3017. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3018. enum reset_type type)
  3019. {
  3020. u32 ioc_state;
  3021. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3022. __func__));
  3023. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3024. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
  3025. ioc->name, __func__, ioc_state));
  3026. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3027. return 0;
  3028. if (ioc_state & MPI2_DOORBELL_USED) {
  3029. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
  3030. "active!\n", ioc->name));
  3031. goto issue_diag_reset;
  3032. }
  3033. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3034. mpt2sas_base_fault_info(ioc, ioc_state &
  3035. MPI2_DOORBELL_DATA_MASK);
  3036. goto issue_diag_reset;
  3037. }
  3038. if (type == FORCE_BIG_HAMMER)
  3039. goto issue_diag_reset;
  3040. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3041. if (!(_base_send_ioc_reset(ioc,
  3042. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
  3043. return 0;
  3044. issue_diag_reset:
  3045. return _base_diag_reset(ioc, CAN_SLEEP);
  3046. }
  3047. /**
  3048. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3049. * @ioc: per adapter object
  3050. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3051. *
  3052. * Returns 0 for success, non-zero for failure.
  3053. */
  3054. static int
  3055. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3056. {
  3057. int r, i;
  3058. unsigned long flags;
  3059. u32 reply_address;
  3060. u16 smid;
  3061. struct _tr_list *delayed_tr, *delayed_tr_next;
  3062. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3063. __func__));
  3064. /* clean the delayed target reset list */
  3065. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3066. &ioc->delayed_tr_list, list) {
  3067. list_del(&delayed_tr->list);
  3068. kfree(delayed_tr);
  3069. }
  3070. /* initialize the scsi lookup free list */
  3071. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3072. INIT_LIST_HEAD(&ioc->free_list);
  3073. smid = 1;
  3074. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3075. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3076. ioc->scsi_lookup[i].smid = smid;
  3077. ioc->scsi_lookup[i].scmd = NULL;
  3078. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3079. &ioc->free_list);
  3080. }
  3081. /* hi-priority queue */
  3082. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3083. smid = ioc->hi_priority_smid;
  3084. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3085. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3086. ioc->hpr_lookup[i].smid = smid;
  3087. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3088. &ioc->hpr_free_list);
  3089. }
  3090. /* internal queue */
  3091. INIT_LIST_HEAD(&ioc->internal_free_list);
  3092. smid = ioc->internal_smid;
  3093. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3094. ioc->internal_lookup[i].cb_idx = 0xFF;
  3095. ioc->internal_lookup[i].smid = smid;
  3096. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3097. &ioc->internal_free_list);
  3098. }
  3099. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3100. /* initialize Reply Free Queue */
  3101. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3102. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3103. ioc->reply_sz)
  3104. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3105. /* initialize Reply Post Free Queue */
  3106. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3107. ioc->reply_post_free[i].Words = ULLONG_MAX;
  3108. r = _base_send_ioc_init(ioc, sleep_flag);
  3109. if (r)
  3110. return r;
  3111. /* initialize the index's */
  3112. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3113. ioc->reply_post_host_index = 0;
  3114. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3115. writel(0, &ioc->chip->ReplyPostHostIndex);
  3116. _base_unmask_interrupts(ioc);
  3117. r = _base_event_notification(ioc, sleep_flag);
  3118. if (r)
  3119. return r;
  3120. if (sleep_flag == CAN_SLEEP)
  3121. _base_static_config_pages(ioc);
  3122. r = _base_send_port_enable(ioc, sleep_flag);
  3123. if (r)
  3124. return r;
  3125. return r;
  3126. }
  3127. /**
  3128. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3129. * @ioc: per adapter object
  3130. *
  3131. * Return nothing.
  3132. */
  3133. void
  3134. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3135. {
  3136. struct pci_dev *pdev = ioc->pdev;
  3137. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3138. __func__));
  3139. _base_mask_interrupts(ioc);
  3140. ioc->shost_recovery = 1;
  3141. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3142. ioc->shost_recovery = 0;
  3143. if (ioc->pci_irq) {
  3144. synchronize_irq(pdev->irq);
  3145. free_irq(ioc->pci_irq, ioc);
  3146. }
  3147. _base_disable_msix(ioc);
  3148. if (ioc->chip_phys)
  3149. iounmap(ioc->chip);
  3150. ioc->pci_irq = -1;
  3151. ioc->chip_phys = 0;
  3152. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3153. pci_disable_pcie_error_reporting(pdev);
  3154. pci_disable_device(pdev);
  3155. return;
  3156. }
  3157. /**
  3158. * mpt2sas_base_attach - attach controller instance
  3159. * @ioc: per adapter object
  3160. *
  3161. * Returns 0 for success, non-zero for failure.
  3162. */
  3163. int
  3164. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3165. {
  3166. int r, i;
  3167. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3168. __func__));
  3169. r = mpt2sas_base_map_resources(ioc);
  3170. if (r)
  3171. return r;
  3172. pci_set_drvdata(ioc->pdev, ioc->shost);
  3173. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3174. if (r)
  3175. goto out_free_resources;
  3176. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3177. if (r)
  3178. goto out_free_resources;
  3179. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3180. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3181. if (!ioc->pfacts) {
  3182. r = -ENOMEM;
  3183. goto out_free_resources;
  3184. }
  3185. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3186. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3187. if (r)
  3188. goto out_free_resources;
  3189. }
  3190. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3191. if (r)
  3192. goto out_free_resources;
  3193. init_waitqueue_head(&ioc->reset_wq);
  3194. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3195. /* base internal command bits */
  3196. mutex_init(&ioc->base_cmds.mutex);
  3197. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3198. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3199. /* transport internal command bits */
  3200. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3201. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3202. mutex_init(&ioc->transport_cmds.mutex);
  3203. /* scsih internal command bits */
  3204. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3205. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3206. mutex_init(&ioc->scsih_cmds.mutex);
  3207. /* task management internal command bits */
  3208. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3209. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3210. mutex_init(&ioc->tm_cmds.mutex);
  3211. /* config page internal command bits */
  3212. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3213. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3214. mutex_init(&ioc->config_cmds.mutex);
  3215. /* ctl module internal command bits */
  3216. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3217. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3218. mutex_init(&ioc->ctl_cmds.mutex);
  3219. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3220. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3221. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3222. r = -ENOMEM;
  3223. goto out_free_resources;
  3224. }
  3225. init_completion(&ioc->shost_recovery_done);
  3226. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3227. ioc->event_masks[i] = -1;
  3228. /* here we enable the events we care about */
  3229. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3230. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3231. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3232. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3233. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3234. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3235. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3236. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3237. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3238. _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
  3239. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3240. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3241. if (r)
  3242. goto out_free_resources;
  3243. mpt2sas_base_start_watchdog(ioc);
  3244. if (diag_buffer_enable != 0)
  3245. mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
  3246. return 0;
  3247. out_free_resources:
  3248. ioc->remove_host = 1;
  3249. mpt2sas_base_free_resources(ioc);
  3250. _base_release_memory_pools(ioc);
  3251. pci_set_drvdata(ioc->pdev, NULL);
  3252. kfree(ioc->tm_cmds.reply);
  3253. kfree(ioc->transport_cmds.reply);
  3254. kfree(ioc->scsih_cmds.reply);
  3255. kfree(ioc->config_cmds.reply);
  3256. kfree(ioc->base_cmds.reply);
  3257. kfree(ioc->ctl_cmds.reply);
  3258. kfree(ioc->pfacts);
  3259. ioc->ctl_cmds.reply = NULL;
  3260. ioc->base_cmds.reply = NULL;
  3261. ioc->tm_cmds.reply = NULL;
  3262. ioc->scsih_cmds.reply = NULL;
  3263. ioc->transport_cmds.reply = NULL;
  3264. ioc->config_cmds.reply = NULL;
  3265. ioc->pfacts = NULL;
  3266. return r;
  3267. }
  3268. /**
  3269. * mpt2sas_base_detach - remove controller instance
  3270. * @ioc: per adapter object
  3271. *
  3272. * Return nothing.
  3273. */
  3274. void
  3275. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3276. {
  3277. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3278. __func__));
  3279. mpt2sas_base_stop_watchdog(ioc);
  3280. mpt2sas_base_free_resources(ioc);
  3281. _base_release_memory_pools(ioc);
  3282. pci_set_drvdata(ioc->pdev, NULL);
  3283. kfree(ioc->pfacts);
  3284. kfree(ioc->ctl_cmds.reply);
  3285. kfree(ioc->base_cmds.reply);
  3286. kfree(ioc->tm_cmds.reply);
  3287. kfree(ioc->transport_cmds.reply);
  3288. kfree(ioc->scsih_cmds.reply);
  3289. kfree(ioc->config_cmds.reply);
  3290. }
  3291. /**
  3292. * _base_reset_handler - reset callback handler (for base)
  3293. * @ioc: per adapter object
  3294. * @reset_phase: phase
  3295. *
  3296. * The handler for doing any required cleanup or initialization.
  3297. *
  3298. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3299. * MPT2_IOC_DONE_RESET
  3300. *
  3301. * Return nothing.
  3302. */
  3303. static void
  3304. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3305. {
  3306. switch (reset_phase) {
  3307. case MPT2_IOC_PRE_RESET:
  3308. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3309. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3310. break;
  3311. case MPT2_IOC_AFTER_RESET:
  3312. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3313. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3314. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3315. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3316. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3317. complete(&ioc->transport_cmds.done);
  3318. }
  3319. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3320. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3321. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3322. complete(&ioc->base_cmds.done);
  3323. }
  3324. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3325. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3326. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3327. ioc->config_cmds.smid = USHORT_MAX;
  3328. complete(&ioc->config_cmds.done);
  3329. }
  3330. break;
  3331. case MPT2_IOC_DONE_RESET:
  3332. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3333. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3334. break;
  3335. }
  3336. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3337. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3338. }
  3339. /**
  3340. * _wait_for_commands_to_complete - reset controller
  3341. * @ioc: Pointer to MPT_ADAPTER structure
  3342. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3343. *
  3344. * This function waiting(3s) for all pending commands to complete
  3345. * prior to putting controller in reset.
  3346. */
  3347. static void
  3348. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3349. {
  3350. u32 ioc_state;
  3351. unsigned long flags;
  3352. u16 i;
  3353. ioc->pending_io_count = 0;
  3354. if (sleep_flag != CAN_SLEEP)
  3355. return;
  3356. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3357. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3358. return;
  3359. /* pending command count */
  3360. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3361. for (i = 0; i < ioc->scsiio_depth; i++)
  3362. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3363. ioc->pending_io_count++;
  3364. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3365. if (!ioc->pending_io_count)
  3366. return;
  3367. /* wait for pending commands to complete */
  3368. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
  3369. }
  3370. /**
  3371. * mpt2sas_base_hard_reset_handler - reset controller
  3372. * @ioc: Pointer to MPT_ADAPTER structure
  3373. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3374. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3375. *
  3376. * Returns 0 for success, non-zero for failure.
  3377. */
  3378. int
  3379. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3380. enum reset_type type)
  3381. {
  3382. int r;
  3383. unsigned long flags;
  3384. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
  3385. __func__));
  3386. if (mpt2sas_fwfault_debug)
  3387. mpt2sas_halt_firmware(ioc);
  3388. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3389. if (ioc->shost_recovery) {
  3390. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3391. printk(MPT2SAS_ERR_FMT "%s: busy\n",
  3392. ioc->name, __func__);
  3393. return -EBUSY;
  3394. }
  3395. ioc->shost_recovery = 1;
  3396. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3397. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3398. _wait_for_commands_to_complete(ioc, sleep_flag);
  3399. _base_mask_interrupts(ioc);
  3400. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3401. if (r)
  3402. goto out;
  3403. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3404. r = _base_make_ioc_operational(ioc, sleep_flag);
  3405. if (!r)
  3406. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3407. out:
  3408. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
  3409. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3410. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3411. ioc->shost_recovery = 0;
  3412. complete(&ioc->shost_recovery_done);
  3413. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3414. return r;
  3415. }