cx88-dvb.c 25 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #ifdef HAVE_VP3054_I2C
  36. # include "cx88-vp3054-i2c.h"
  37. #endif
  38. #include "zl10353.h"
  39. #include "cx22702.h"
  40. #include "or51132.h"
  41. #include "lgdt330x.h"
  42. #include "lg_h06xf.h"
  43. #include "nxt200x.h"
  44. #include "cx24123.h"
  45. #include "isl6421.h"
  46. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  47. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  48. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  49. MODULE_LICENSE("GPL");
  50. static unsigned int debug = 0;
  51. module_param(debug, int, 0644);
  52. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  53. #define dprintk(level,fmt, arg...) if (debug >= level) \
  54. printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
  55. /* ------------------------------------------------------------------ */
  56. static int dvb_buf_setup(struct videobuf_queue *q,
  57. unsigned int *count, unsigned int *size)
  58. {
  59. struct cx8802_dev *dev = q->priv_data;
  60. dev->ts_packet_size = 188 * 4;
  61. dev->ts_packet_count = 32;
  62. *size = dev->ts_packet_size * dev->ts_packet_count;
  63. *count = 32;
  64. return 0;
  65. }
  66. static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  67. enum v4l2_field field)
  68. {
  69. struct cx8802_dev *dev = q->priv_data;
  70. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  71. }
  72. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  73. {
  74. struct cx8802_dev *dev = q->priv_data;
  75. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  76. }
  77. static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  78. {
  79. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  80. }
  81. static struct videobuf_queue_ops dvb_qops = {
  82. .buf_setup = dvb_buf_setup,
  83. .buf_prepare = dvb_buf_prepare,
  84. .buf_queue = dvb_buf_queue,
  85. .buf_release = dvb_buf_release,
  86. };
  87. /* ------------------------------------------------------------------ */
  88. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  89. {
  90. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  91. static u8 reset [] = { RESET, 0x80 };
  92. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  93. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  94. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  95. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  96. mt352_write(fe, clock_config, sizeof(clock_config));
  97. udelay(200);
  98. mt352_write(fe, reset, sizeof(reset));
  99. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  100. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  101. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  102. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  103. return 0;
  104. }
  105. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  106. {
  107. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  108. static u8 reset [] = { RESET, 0x80 };
  109. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  110. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  111. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  112. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  113. mt352_write(fe, clock_config, sizeof(clock_config));
  114. udelay(200);
  115. mt352_write(fe, reset, sizeof(reset));
  116. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  117. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  118. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  119. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  120. return 0;
  121. }
  122. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  123. {
  124. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  125. static u8 reset [] = { 0x50, 0x80 };
  126. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  127. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  128. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  129. static u8 dntv_extra[] = { 0xB5, 0x7A };
  130. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  131. mt352_write(fe, clock_config, sizeof(clock_config));
  132. udelay(2000);
  133. mt352_write(fe, reset, sizeof(reset));
  134. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  135. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  136. udelay(2000);
  137. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  138. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  139. return 0;
  140. }
  141. static struct mt352_config dvico_fusionhdtv = {
  142. .demod_address = 0x0f,
  143. .demod_init = dvico_fusionhdtv_demod_init,
  144. };
  145. static struct mt352_config dntv_live_dvbt_config = {
  146. .demod_address = 0x0f,
  147. .demod_init = dntv_live_dvbt_demod_init,
  148. };
  149. static struct mt352_config dvico_fusionhdtv_dual = {
  150. .demod_address = 0x0f,
  151. .demod_init = dvico_dual_demod_init,
  152. };
  153. #ifdef HAVE_VP3054_I2C
  154. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  155. {
  156. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  157. static u8 reset [] = { 0x50, 0x80 };
  158. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  159. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  160. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  161. static u8 dntv_extra[] = { 0xB5, 0x7A };
  162. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  163. mt352_write(fe, clock_config, sizeof(clock_config));
  164. udelay(2000);
  165. mt352_write(fe, reset, sizeof(reset));
  166. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  167. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  168. udelay(2000);
  169. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  170. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  171. return 0;
  172. }
  173. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  174. {
  175. struct cx8802_dev *dev= fe->dvb->priv;
  176. /* this message is to set up ATC and ALC */
  177. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  178. struct i2c_msg msg =
  179. { .addr = dev->core->pll_addr, .flags = 0,
  180. .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
  181. int err;
  182. if (fe->ops.i2c_gate_ctrl)
  183. fe->ops.i2c_gate_ctrl(fe, 1);
  184. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  185. if (err < 0)
  186. return err;
  187. else
  188. return -EREMOTEIO;
  189. }
  190. return 0;
  191. }
  192. static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
  193. struct dvb_frontend_parameters* params)
  194. {
  195. struct cx8802_dev *dev= fe->dvb->priv;
  196. u8 buf[4];
  197. struct i2c_msg msg =
  198. { .addr = dev->core->pll_addr, .flags = 0,
  199. .buf = buf, .len = 4 };
  200. int err;
  201. /* Switch PLL to DVB mode */
  202. err = philips_fmd1216_pll_init(fe);
  203. if (err)
  204. return err;
  205. /* Tune PLL */
  206. dvb_pll_configure(dev->core->pll_desc, buf,
  207. params->frequency,
  208. params->u.ofdm.bandwidth);
  209. if (fe->ops.i2c_gate_ctrl)
  210. fe->ops.i2c_gate_ctrl(fe, 1);
  211. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  212. printk(KERN_WARNING "cx88-dvb: %s error "
  213. "(addr %02x <- %02x, err = %i)\n",
  214. __FUNCTION__, dev->core->pll_addr, buf[0], err);
  215. if (err < 0)
  216. return err;
  217. else
  218. return -EREMOTEIO;
  219. }
  220. return 0;
  221. }
  222. static struct mt352_config dntv_live_dvbt_pro_config = {
  223. .demod_address = 0x0f,
  224. .no_tuner = 1,
  225. .demod_init = dntv_live_dvbt_pro_demod_init,
  226. };
  227. #endif
  228. static int dvico_hybrid_tuner_set_params(struct dvb_frontend *fe,
  229. struct dvb_frontend_parameters *params)
  230. {
  231. u8 pllbuf[4];
  232. struct cx8802_dev *dev= fe->dvb->priv;
  233. struct i2c_msg msg =
  234. { .addr = dev->core->pll_addr, .flags = 0,
  235. .buf = pllbuf, .len = 4 };
  236. int err;
  237. dvb_pll_configure(dev->core->pll_desc, pllbuf,
  238. params->frequency,
  239. params->u.ofdm.bandwidth);
  240. if (fe->ops.i2c_gate_ctrl)
  241. fe->ops.i2c_gate_ctrl(fe, 1);
  242. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  243. printk(KERN_WARNING "cx88-dvb: %s error "
  244. "(addr %02x <- %02x, err = %i)\n",
  245. __FUNCTION__, pllbuf[0], pllbuf[1], err);
  246. if (err < 0)
  247. return err;
  248. else
  249. return -EREMOTEIO;
  250. }
  251. return 0;
  252. }
  253. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  254. .demod_address = 0x0f,
  255. .no_tuner = 1,
  256. };
  257. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  258. .demod_address = 0x0f,
  259. };
  260. static struct cx22702_config connexant_refboard_config = {
  261. .demod_address = 0x43,
  262. .output_mode = CX22702_SERIAL_OUTPUT,
  263. };
  264. static struct cx22702_config hauppauge_novat_config = {
  265. .demod_address = 0x43,
  266. .output_mode = CX22702_SERIAL_OUTPUT,
  267. };
  268. static struct cx22702_config hauppauge_hvr1100_config = {
  269. .demod_address = 0x63,
  270. .output_mode = CX22702_SERIAL_OUTPUT,
  271. };
  272. static int or51132_set_ts_param(struct dvb_frontend* fe,
  273. int is_punctured)
  274. {
  275. struct cx8802_dev *dev= fe->dvb->priv;
  276. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  277. return 0;
  278. }
  279. static struct or51132_config pchdtv_hd3000 = {
  280. .demod_address = 0x15,
  281. .set_ts_params = or51132_set_ts_param,
  282. };
  283. static int lgdt3302_tuner_set_params(struct dvb_frontend* fe,
  284. struct dvb_frontend_parameters* params)
  285. {
  286. /* FIXME make this routine use the tuner-simple code.
  287. * It could probably be shared with a number of ATSC
  288. * frontends. Many share the same tuner with analog TV. */
  289. struct cx8802_dev *dev= fe->dvb->priv;
  290. struct cx88_core *core = dev->core;
  291. u8 buf[4];
  292. struct i2c_msg msg =
  293. { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
  294. int err;
  295. dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
  296. dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
  297. __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
  298. if (fe->ops.i2c_gate_ctrl)
  299. fe->ops.i2c_gate_ctrl(fe, 1);
  300. if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
  301. printk(KERN_WARNING "cx88-dvb: %s error "
  302. "(addr %02x <- %02x, err = %i)\n",
  303. __FUNCTION__, buf[0], buf[1], err);
  304. if (err < 0)
  305. return err;
  306. else
  307. return -EREMOTEIO;
  308. }
  309. return 0;
  310. }
  311. static int lgdt3303_tuner_set_params(struct dvb_frontend* fe,
  312. struct dvb_frontend_parameters* params)
  313. {
  314. struct cx8802_dev *dev= fe->dvb->priv;
  315. struct cx88_core *core = dev->core;
  316. /* Put the analog decoder in standby to keep it quiet */
  317. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  318. return lg_h06xf_pll_set(fe, &core->i2c_adap, params);
  319. }
  320. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  321. {
  322. struct cx8802_dev *dev= fe->dvb->priv;
  323. struct cx88_core *core = dev->core;
  324. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  325. if (index == 0)
  326. cx_clear(MO_GP0_IO, 8);
  327. else
  328. cx_set(MO_GP0_IO, 8);
  329. return 0;
  330. }
  331. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  332. {
  333. struct cx8802_dev *dev= fe->dvb->priv;
  334. if (is_punctured)
  335. dev->ts_gen_cntrl |= 0x04;
  336. else
  337. dev->ts_gen_cntrl &= ~0x04;
  338. return 0;
  339. }
  340. static struct lgdt330x_config fusionhdtv_3_gold = {
  341. .demod_address = 0x0e,
  342. .demod_chip = LGDT3302,
  343. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  344. .set_ts_params = lgdt330x_set_ts_param,
  345. };
  346. static struct lgdt330x_config fusionhdtv_5_gold = {
  347. .demod_address = 0x0e,
  348. .demod_chip = LGDT3303,
  349. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  350. .set_ts_params = lgdt330x_set_ts_param,
  351. };
  352. static struct lgdt330x_config pchdtv_hd5500 = {
  353. .demod_address = 0x59,
  354. .demod_chip = LGDT3303,
  355. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  356. .set_ts_params = lgdt330x_set_ts_param,
  357. };
  358. static int nxt200x_set_ts_param(struct dvb_frontend* fe,
  359. int is_punctured)
  360. {
  361. struct cx8802_dev *dev= fe->dvb->priv;
  362. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  363. return 0;
  364. }
  365. static int nxt200x_set_pll_input(u8* buf, int input)
  366. {
  367. if (input)
  368. buf[3] |= 0x08;
  369. else
  370. buf[3] &= ~0x08;
  371. return 0;
  372. }
  373. static struct nxt200x_config ati_hdtvwonder = {
  374. .demod_address = 0x0a,
  375. .set_pll_input = nxt200x_set_pll_input,
  376. .set_ts_params = nxt200x_set_ts_param,
  377. };
  378. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  379. int is_punctured)
  380. {
  381. struct cx8802_dev *dev= fe->dvb->priv;
  382. dev->ts_gen_cntrl = 0x02;
  383. return 0;
  384. }
  385. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  386. fe_sec_voltage_t voltage)
  387. {
  388. struct cx8802_dev *dev= fe->dvb->priv;
  389. struct cx88_core *core = dev->core;
  390. if (voltage == SEC_VOLTAGE_OFF) {
  391. cx_write(MO_GP0_IO, 0x000006fb);
  392. } else {
  393. cx_write(MO_GP0_IO, 0x000006f9);
  394. }
  395. if (core->prev_set_voltage)
  396. return core->prev_set_voltage(fe, voltage);
  397. return 0;
  398. }
  399. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  400. fe_sec_voltage_t voltage)
  401. {
  402. struct cx8802_dev *dev= fe->dvb->priv;
  403. struct cx88_core *core = dev->core;
  404. if (voltage == SEC_VOLTAGE_OFF) {
  405. dprintk(1,"LNB Voltage OFF\n");
  406. cx_write(MO_GP0_IO, 0x0000efff);
  407. }
  408. if (core->prev_set_voltage)
  409. return core->prev_set_voltage(fe, voltage);
  410. return 0;
  411. }
  412. static struct cx24123_config geniatech_dvbs_config = {
  413. .demod_address = 0x55,
  414. .set_ts_params = cx24123_set_ts_param,
  415. };
  416. static struct cx24123_config hauppauge_novas_config = {
  417. .demod_address = 0x55,
  418. .set_ts_params = cx24123_set_ts_param,
  419. };
  420. static struct cx24123_config kworld_dvbs_100_config = {
  421. .demod_address = 0x15,
  422. .set_ts_params = cx24123_set_ts_param,
  423. .lnb_polarity = 1,
  424. };
  425. static int dvb_register(struct cx8802_dev *dev)
  426. {
  427. /* init struct videobuf_dvb */
  428. dev->dvb.name = dev->core->name;
  429. dev->ts_gen_cntrl = 0x0c;
  430. /* init frontend */
  431. switch (dev->core->board) {
  432. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  433. dev->dvb.frontend = dvb_attach(cx22702_attach,
  434. &hauppauge_novat_config,
  435. &dev->core->i2c_adap);
  436. if (dev->dvb.frontend != NULL) {
  437. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  438. &dev->core->i2c_adap,
  439. &dvb_pll_thomson_dtt759x);
  440. }
  441. break;
  442. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  443. case CX88_BOARD_CONEXANT_DVB_T1:
  444. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  445. case CX88_BOARD_WINFAST_DTV1000:
  446. dev->dvb.frontend = dvb_attach(cx22702_attach,
  447. &connexant_refboard_config,
  448. &dev->core->i2c_adap);
  449. if (dev->dvb.frontend != NULL) {
  450. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  451. &dev->core->i2c_adap,
  452. &dvb_pll_thomson_dtt7579);
  453. }
  454. break;
  455. case CX88_BOARD_WINFAST_DTV2000H:
  456. case CX88_BOARD_HAUPPAUGE_HVR1100:
  457. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  458. dev->dvb.frontend = dvb_attach(cx22702_attach,
  459. &hauppauge_hvr1100_config,
  460. &dev->core->i2c_adap);
  461. if (dev->dvb.frontend != NULL) {
  462. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  463. &dev->core->i2c_adap,
  464. &dvb_pll_fmd1216me);
  465. }
  466. break;
  467. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  468. dev->dvb.frontend = dvb_attach(mt352_attach,
  469. &dvico_fusionhdtv,
  470. &dev->core->i2c_adap);
  471. if (dev->dvb.frontend != NULL) {
  472. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  473. NULL, &dvb_pll_thomson_dtt7579);
  474. break;
  475. }
  476. /* ZL10353 replaces MT352 on later cards */
  477. dev->dvb.frontend = dvb_attach(zl10353_attach,
  478. &dvico_fusionhdtv_plus_v1_1,
  479. &dev->core->i2c_adap);
  480. if (dev->dvb.frontend != NULL) {
  481. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  482. NULL, &dvb_pll_thomson_dtt7579);
  483. }
  484. break;
  485. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  486. /* The tin box says DEE1601, but it seems to be DTT7579
  487. * compatible, with a slightly different MT352 AGC gain. */
  488. dev->dvb.frontend = dvb_attach(mt352_attach,
  489. &dvico_fusionhdtv_dual,
  490. &dev->core->i2c_adap);
  491. if (dev->dvb.frontend != NULL) {
  492. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  493. NULL, &dvb_pll_thomson_dtt7579);
  494. break;
  495. }
  496. /* ZL10353 replaces MT352 on later cards */
  497. dev->dvb.frontend = dvb_attach(zl10353_attach,
  498. &dvico_fusionhdtv_plus_v1_1,
  499. &dev->core->i2c_adap);
  500. if (dev->dvb.frontend != NULL) {
  501. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  502. NULL, &dvb_pll_thomson_dtt7579);
  503. }
  504. break;
  505. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  506. dev->dvb.frontend = dvb_attach(mt352_attach,
  507. &dvico_fusionhdtv,
  508. &dev->core->i2c_adap);
  509. if (dev->dvb.frontend != NULL) {
  510. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  511. NULL, &dvb_pll_lg_z201);
  512. }
  513. break;
  514. case CX88_BOARD_KWORLD_DVB_T:
  515. case CX88_BOARD_DNTV_LIVE_DVB_T:
  516. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  517. dev->dvb.frontend = dvb_attach(mt352_attach,
  518. &dntv_live_dvbt_config,
  519. &dev->core->i2c_adap);
  520. if (dev->dvb.frontend != NULL) {
  521. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  522. NULL, &dvb_pll_unknown_1);
  523. }
  524. break;
  525. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  526. #ifdef HAVE_VP3054_I2C
  527. dev->core->pll_addr = 0x61;
  528. dev->core->pll_desc = &dvb_pll_fmd1216me;
  529. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  530. &((struct vp3054_i2c_state *)dev->card_priv)->adap);
  531. if (dev->dvb.frontend != NULL) {
  532. dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
  533. }
  534. #else
  535. printk("%s: built without vp3054 support\n", dev->core->name);
  536. #endif
  537. break;
  538. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  539. dev->core->pll_addr = 0x61;
  540. dev->core->pll_desc = &dvb_pll_thomson_fe6600;
  541. dev->dvb.frontend = dvb_attach(zl10353_attach,
  542. &dvico_fusionhdtv_hybrid,
  543. &dev->core->i2c_adap);
  544. if (dev->dvb.frontend != NULL) {
  545. dev->dvb.frontend->ops.tuner_ops.set_params = dvico_hybrid_tuner_set_params;
  546. }
  547. break;
  548. case CX88_BOARD_PCHDTV_HD3000:
  549. dev->dvb.frontend = dvb_attach(or51132_attach,
  550. &pchdtv_hd3000,
  551. &dev->core->i2c_adap);
  552. if (dev->dvb.frontend != NULL) {
  553. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  554. &dev->core->i2c_adap,
  555. &dvb_pll_thomson_dtt761x);
  556. }
  557. break;
  558. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  559. dev->ts_gen_cntrl = 0x08;
  560. {
  561. /* Do a hardware reset of chip before using it. */
  562. struct cx88_core *core = dev->core;
  563. cx_clear(MO_GP0_IO, 1);
  564. mdelay(100);
  565. cx_set(MO_GP0_IO, 1);
  566. mdelay(200);
  567. /* Select RF connector callback */
  568. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  569. dev->core->pll_addr = 0x61;
  570. dev->core->pll_desc = &dvb_pll_microtune_4042;
  571. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  572. &fusionhdtv_3_gold,
  573. &dev->core->i2c_adap);
  574. if (dev->dvb.frontend != NULL) {
  575. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
  576. }
  577. }
  578. break;
  579. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  580. dev->ts_gen_cntrl = 0x08;
  581. {
  582. /* Do a hardware reset of chip before using it. */
  583. struct cx88_core *core = dev->core;
  584. cx_clear(MO_GP0_IO, 1);
  585. mdelay(100);
  586. cx_set(MO_GP0_IO, 9);
  587. mdelay(200);
  588. dev->core->pll_addr = 0x61;
  589. dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
  590. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  591. &fusionhdtv_3_gold,
  592. &dev->core->i2c_adap);
  593. if (dev->dvb.frontend != NULL) {
  594. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
  595. }
  596. }
  597. break;
  598. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  599. dev->ts_gen_cntrl = 0x08;
  600. {
  601. /* Do a hardware reset of chip before using it. */
  602. struct cx88_core *core = dev->core;
  603. cx_clear(MO_GP0_IO, 1);
  604. mdelay(100);
  605. cx_set(MO_GP0_IO, 1);
  606. mdelay(200);
  607. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  608. &fusionhdtv_5_gold,
  609. &dev->core->i2c_adap);
  610. if (dev->dvb.frontend != NULL) {
  611. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
  612. }
  613. }
  614. break;
  615. case CX88_BOARD_PCHDTV_HD5500:
  616. dev->ts_gen_cntrl = 0x08;
  617. {
  618. /* Do a hardware reset of chip before using it. */
  619. struct cx88_core *core = dev->core;
  620. cx_clear(MO_GP0_IO, 1);
  621. mdelay(100);
  622. cx_set(MO_GP0_IO, 1);
  623. mdelay(200);
  624. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  625. &pchdtv_hd5500,
  626. &dev->core->i2c_adap);
  627. if (dev->dvb.frontend != NULL) {
  628. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
  629. }
  630. }
  631. break;
  632. case CX88_BOARD_ATI_HDTVWONDER:
  633. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  634. &ati_hdtvwonder,
  635. &dev->core->i2c_adap);
  636. if (dev->dvb.frontend != NULL) {
  637. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  638. NULL, &dvb_pll_tuv1236d);
  639. }
  640. break;
  641. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  642. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  643. dev->dvb.frontend = dvb_attach(cx24123_attach,
  644. &hauppauge_novas_config,
  645. &dev->core->i2c_adap);
  646. if (dev->dvb.frontend) {
  647. dvb_attach(isl6421_attach, dev->dvb.frontend,
  648. &dev->core->i2c_adap, 0x08, 0x00, 0x00);
  649. }
  650. break;
  651. case CX88_BOARD_KWORLD_DVBS_100:
  652. dev->dvb.frontend = dvb_attach(cx24123_attach,
  653. &kworld_dvbs_100_config,
  654. &dev->core->i2c_adap);
  655. if (dev->dvb.frontend) {
  656. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  657. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  658. }
  659. break;
  660. case CX88_BOARD_GENIATECH_DVBS:
  661. dev->dvb.frontend = dvb_attach(cx24123_attach,
  662. &geniatech_dvbs_config,
  663. &dev->core->i2c_adap);
  664. if (dev->dvb.frontend) {
  665. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  666. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  667. }
  668. break;
  669. default:
  670. printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
  671. dev->core->name);
  672. break;
  673. }
  674. if (NULL == dev->dvb.frontend) {
  675. printk("%s: frontend initialization failed\n",dev->core->name);
  676. return -1;
  677. }
  678. if (dev->core->pll_desc) {
  679. dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
  680. dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
  681. }
  682. /* Put the analog decoder in standby to keep it quiet */
  683. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  684. /* register everything */
  685. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  686. }
  687. /* ----------------------------------------------------------- */
  688. static int __devinit dvb_probe(struct pci_dev *pci_dev,
  689. const struct pci_device_id *pci_id)
  690. {
  691. struct cx8802_dev *dev;
  692. struct cx88_core *core;
  693. int err;
  694. /* general setup */
  695. core = cx88_core_get(pci_dev);
  696. if (NULL == core)
  697. return -EINVAL;
  698. err = -ENODEV;
  699. if (!cx88_boards[core->board].dvb)
  700. goto fail_core;
  701. err = -ENOMEM;
  702. dev = kzalloc(sizeof(*dev),GFP_KERNEL);
  703. if (NULL == dev)
  704. goto fail_core;
  705. dev->pci = pci_dev;
  706. dev->core = core;
  707. err = cx8802_init_common(dev);
  708. if (0 != err)
  709. goto fail_free;
  710. #ifdef HAVE_VP3054_I2C
  711. err = vp3054_i2c_probe(dev);
  712. if (0 != err)
  713. goto fail_free;
  714. #endif
  715. /* dvb stuff */
  716. printk("%s/2: cx2388x based dvb card\n", core->name);
  717. videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
  718. dev->pci, &dev->slock,
  719. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  720. V4L2_FIELD_TOP,
  721. sizeof(struct cx88_buffer),
  722. dev);
  723. err = dvb_register(dev);
  724. if (0 != err)
  725. goto fail_fini;
  726. /* Maintain a reference to cx88-video can query the 8802 device. */
  727. core->dvbdev = dev;
  728. return 0;
  729. fail_fini:
  730. cx8802_fini_common(dev);
  731. fail_free:
  732. kfree(dev);
  733. fail_core:
  734. cx88_core_put(core,pci_dev);
  735. return err;
  736. }
  737. static void __devexit dvb_remove(struct pci_dev *pci_dev)
  738. {
  739. struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
  740. /* Destroy any 8802 reference. */
  741. dev->core->dvbdev = NULL;
  742. /* dvb */
  743. videobuf_dvb_unregister(&dev->dvb);
  744. #ifdef HAVE_VP3054_I2C
  745. vp3054_i2c_remove(dev);
  746. #endif
  747. /* common */
  748. cx8802_fini_common(dev);
  749. cx88_core_put(dev->core,dev->pci);
  750. kfree(dev);
  751. }
  752. static struct pci_device_id cx8802_pci_tbl[] = {
  753. {
  754. .vendor = 0x14f1,
  755. .device = 0x8802,
  756. .subvendor = PCI_ANY_ID,
  757. .subdevice = PCI_ANY_ID,
  758. },{
  759. /* --- end of list --- */
  760. }
  761. };
  762. MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
  763. static struct pci_driver dvb_pci_driver = {
  764. .name = "cx88-dvb",
  765. .id_table = cx8802_pci_tbl,
  766. .probe = dvb_probe,
  767. .remove = __devexit_p(dvb_remove),
  768. .suspend = cx8802_suspend_common,
  769. .resume = cx8802_resume_common,
  770. };
  771. static int dvb_init(void)
  772. {
  773. printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
  774. (CX88_VERSION_CODE >> 16) & 0xff,
  775. (CX88_VERSION_CODE >> 8) & 0xff,
  776. CX88_VERSION_CODE & 0xff);
  777. #ifdef SNAPSHOT
  778. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  779. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  780. #endif
  781. return pci_register_driver(&dvb_pci_driver);
  782. }
  783. static void dvb_fini(void)
  784. {
  785. pci_unregister_driver(&dvb_pci_driver);
  786. }
  787. module_init(dvb_init);
  788. module_exit(dvb_fini);
  789. /*
  790. * Local variables:
  791. * c-basic-offset: 8
  792. * compile-command: "make DVB=1"
  793. * End:
  794. */