qlcnic_init.c 41 KB

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  1. /*
  2. * Copyright (C) 2009 - QLogic Corporation.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called "COPYING".
  22. *
  23. */
  24. #include <linux/netdevice.h>
  25. #include <linux/delay.h>
  26. #include <linux/slab.h>
  27. #include "qlcnic.h"
  28. struct crb_addr_pair {
  29. u32 addr;
  30. u32 data;
  31. };
  32. #define QLCNIC_MAX_CRB_XFORM 60
  33. static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
  34. #define crb_addr_transform(name) \
  35. (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
  36. QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
  37. #define QLCNIC_ADDR_ERROR (0xffffffff)
  38. static void
  39. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  40. struct qlcnic_host_rds_ring *rds_ring);
  41. static void crb_addr_transform_setup(void)
  42. {
  43. crb_addr_transform(XDMA);
  44. crb_addr_transform(TIMR);
  45. crb_addr_transform(SRE);
  46. crb_addr_transform(SQN3);
  47. crb_addr_transform(SQN2);
  48. crb_addr_transform(SQN1);
  49. crb_addr_transform(SQN0);
  50. crb_addr_transform(SQS3);
  51. crb_addr_transform(SQS2);
  52. crb_addr_transform(SQS1);
  53. crb_addr_transform(SQS0);
  54. crb_addr_transform(RPMX7);
  55. crb_addr_transform(RPMX6);
  56. crb_addr_transform(RPMX5);
  57. crb_addr_transform(RPMX4);
  58. crb_addr_transform(RPMX3);
  59. crb_addr_transform(RPMX2);
  60. crb_addr_transform(RPMX1);
  61. crb_addr_transform(RPMX0);
  62. crb_addr_transform(ROMUSB);
  63. crb_addr_transform(SN);
  64. crb_addr_transform(QMN);
  65. crb_addr_transform(QMS);
  66. crb_addr_transform(PGNI);
  67. crb_addr_transform(PGND);
  68. crb_addr_transform(PGN3);
  69. crb_addr_transform(PGN2);
  70. crb_addr_transform(PGN1);
  71. crb_addr_transform(PGN0);
  72. crb_addr_transform(PGSI);
  73. crb_addr_transform(PGSD);
  74. crb_addr_transform(PGS3);
  75. crb_addr_transform(PGS2);
  76. crb_addr_transform(PGS1);
  77. crb_addr_transform(PGS0);
  78. crb_addr_transform(PS);
  79. crb_addr_transform(PH);
  80. crb_addr_transform(NIU);
  81. crb_addr_transform(I2Q);
  82. crb_addr_transform(EG);
  83. crb_addr_transform(MN);
  84. crb_addr_transform(MS);
  85. crb_addr_transform(CAS2);
  86. crb_addr_transform(CAS1);
  87. crb_addr_transform(CAS0);
  88. crb_addr_transform(CAM);
  89. crb_addr_transform(C2C1);
  90. crb_addr_transform(C2C0);
  91. crb_addr_transform(SMB);
  92. crb_addr_transform(OCM0);
  93. crb_addr_transform(I2C0);
  94. }
  95. void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
  96. {
  97. struct qlcnic_recv_context *recv_ctx;
  98. struct qlcnic_host_rds_ring *rds_ring;
  99. struct qlcnic_rx_buffer *rx_buf;
  100. int i, ring;
  101. recv_ctx = &adapter->recv_ctx;
  102. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  103. rds_ring = &recv_ctx->rds_rings[ring];
  104. for (i = 0; i < rds_ring->num_desc; ++i) {
  105. rx_buf = &(rds_ring->rx_buf_arr[i]);
  106. if (rx_buf->state == QLCNIC_BUFFER_FREE)
  107. continue;
  108. pci_unmap_single(adapter->pdev,
  109. rx_buf->dma,
  110. rds_ring->dma_size,
  111. PCI_DMA_FROMDEVICE);
  112. if (rx_buf->skb != NULL)
  113. dev_kfree_skb_any(rx_buf->skb);
  114. }
  115. }
  116. }
  117. void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter)
  118. {
  119. struct qlcnic_cmd_buffer *cmd_buf;
  120. struct qlcnic_skb_frag *buffrag;
  121. int i, j;
  122. struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
  123. cmd_buf = tx_ring->cmd_buf_arr;
  124. for (i = 0; i < tx_ring->num_desc; i++) {
  125. buffrag = cmd_buf->frag_array;
  126. if (buffrag->dma) {
  127. pci_unmap_single(adapter->pdev, buffrag->dma,
  128. buffrag->length, PCI_DMA_TODEVICE);
  129. buffrag->dma = 0ULL;
  130. }
  131. for (j = 0; j < cmd_buf->frag_count; j++) {
  132. buffrag++;
  133. if (buffrag->dma) {
  134. pci_unmap_page(adapter->pdev, buffrag->dma,
  135. buffrag->length,
  136. PCI_DMA_TODEVICE);
  137. buffrag->dma = 0ULL;
  138. }
  139. }
  140. if (cmd_buf->skb) {
  141. dev_kfree_skb_any(cmd_buf->skb);
  142. cmd_buf->skb = NULL;
  143. }
  144. cmd_buf++;
  145. }
  146. }
  147. void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
  148. {
  149. struct qlcnic_recv_context *recv_ctx;
  150. struct qlcnic_host_rds_ring *rds_ring;
  151. struct qlcnic_host_tx_ring *tx_ring;
  152. int ring;
  153. recv_ctx = &adapter->recv_ctx;
  154. if (recv_ctx->rds_rings == NULL)
  155. goto skip_rds;
  156. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  157. rds_ring = &recv_ctx->rds_rings[ring];
  158. vfree(rds_ring->rx_buf_arr);
  159. rds_ring->rx_buf_arr = NULL;
  160. }
  161. kfree(recv_ctx->rds_rings);
  162. skip_rds:
  163. if (adapter->tx_ring == NULL)
  164. return;
  165. tx_ring = adapter->tx_ring;
  166. vfree(tx_ring->cmd_buf_arr);
  167. tx_ring->cmd_buf_arr = NULL;
  168. kfree(adapter->tx_ring);
  169. adapter->tx_ring = NULL;
  170. }
  171. int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
  172. {
  173. struct qlcnic_recv_context *recv_ctx;
  174. struct qlcnic_host_rds_ring *rds_ring;
  175. struct qlcnic_host_sds_ring *sds_ring;
  176. struct qlcnic_host_tx_ring *tx_ring;
  177. struct qlcnic_rx_buffer *rx_buf;
  178. int ring, i, size;
  179. struct qlcnic_cmd_buffer *cmd_buf_arr;
  180. struct net_device *netdev = adapter->netdev;
  181. size = sizeof(struct qlcnic_host_tx_ring);
  182. tx_ring = kzalloc(size, GFP_KERNEL);
  183. if (tx_ring == NULL) {
  184. dev_err(&netdev->dev, "failed to allocate tx ring struct\n");
  185. return -ENOMEM;
  186. }
  187. adapter->tx_ring = tx_ring;
  188. tx_ring->num_desc = adapter->num_txd;
  189. tx_ring->txq = netdev_get_tx_queue(netdev, 0);
  190. cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
  191. if (cmd_buf_arr == NULL) {
  192. dev_err(&netdev->dev, "failed to allocate cmd buffer ring\n");
  193. goto err_out;
  194. }
  195. memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
  196. tx_ring->cmd_buf_arr = cmd_buf_arr;
  197. recv_ctx = &adapter->recv_ctx;
  198. size = adapter->max_rds_rings * sizeof(struct qlcnic_host_rds_ring);
  199. rds_ring = kzalloc(size, GFP_KERNEL);
  200. if (rds_ring == NULL) {
  201. dev_err(&netdev->dev, "failed to allocate rds ring struct\n");
  202. goto err_out;
  203. }
  204. recv_ctx->rds_rings = rds_ring;
  205. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  206. rds_ring = &recv_ctx->rds_rings[ring];
  207. switch (ring) {
  208. case RCV_RING_NORMAL:
  209. rds_ring->num_desc = adapter->num_rxd;
  210. rds_ring->dma_size = QLCNIC_P3_RX_BUF_MAX_LEN;
  211. rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
  212. break;
  213. case RCV_RING_JUMBO:
  214. rds_ring->num_desc = adapter->num_jumbo_rxd;
  215. rds_ring->dma_size =
  216. QLCNIC_P3_RX_JUMBO_BUF_MAX_LEN;
  217. if (adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO)
  218. rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
  219. rds_ring->skb_size =
  220. rds_ring->dma_size + NET_IP_ALIGN;
  221. break;
  222. }
  223. rds_ring->rx_buf_arr = (struct qlcnic_rx_buffer *)
  224. vmalloc(RCV_BUFF_RINGSIZE(rds_ring));
  225. if (rds_ring->rx_buf_arr == NULL) {
  226. dev_err(&netdev->dev, "Failed to allocate "
  227. "rx buffer ring %d\n", ring);
  228. goto err_out;
  229. }
  230. memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring));
  231. INIT_LIST_HEAD(&rds_ring->free_list);
  232. /*
  233. * Now go through all of them, set reference handles
  234. * and put them in the queues.
  235. */
  236. rx_buf = rds_ring->rx_buf_arr;
  237. for (i = 0; i < rds_ring->num_desc; i++) {
  238. list_add_tail(&rx_buf->list,
  239. &rds_ring->free_list);
  240. rx_buf->ref_handle = i;
  241. rx_buf->state = QLCNIC_BUFFER_FREE;
  242. rx_buf++;
  243. }
  244. spin_lock_init(&rds_ring->lock);
  245. }
  246. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  247. sds_ring = &recv_ctx->sds_rings[ring];
  248. sds_ring->irq = adapter->msix_entries[ring].vector;
  249. sds_ring->adapter = adapter;
  250. sds_ring->num_desc = adapter->num_rxd;
  251. for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
  252. INIT_LIST_HEAD(&sds_ring->free_list[i]);
  253. }
  254. return 0;
  255. err_out:
  256. qlcnic_free_sw_resources(adapter);
  257. return -ENOMEM;
  258. }
  259. /*
  260. * Utility to translate from internal Phantom CRB address
  261. * to external PCI CRB address.
  262. */
  263. static u32 qlcnic_decode_crb_addr(u32 addr)
  264. {
  265. int i;
  266. u32 base_addr, offset, pci_base;
  267. crb_addr_transform_setup();
  268. pci_base = QLCNIC_ADDR_ERROR;
  269. base_addr = addr & 0xfff00000;
  270. offset = addr & 0x000fffff;
  271. for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
  272. if (crb_addr_xform[i] == base_addr) {
  273. pci_base = i << 20;
  274. break;
  275. }
  276. }
  277. if (pci_base == QLCNIC_ADDR_ERROR)
  278. return pci_base;
  279. else
  280. return pci_base + offset;
  281. }
  282. #define QLCNIC_MAX_ROM_WAIT_USEC 100
  283. static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
  284. {
  285. long timeout = 0;
  286. long done = 0;
  287. cond_resched();
  288. while (done == 0) {
  289. done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS);
  290. done &= 2;
  291. if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
  292. dev_err(&adapter->pdev->dev,
  293. "Timeout reached waiting for rom done");
  294. return -EIO;
  295. }
  296. udelay(1);
  297. }
  298. return 0;
  299. }
  300. static int do_rom_fast_read(struct qlcnic_adapter *adapter,
  301. int addr, int *valp)
  302. {
  303. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
  304. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  305. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
  306. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  307. if (qlcnic_wait_rom_done(adapter)) {
  308. dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
  309. return -EIO;
  310. }
  311. /* reset abyte_cnt and dummy_byte_cnt */
  312. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
  313. udelay(10);
  314. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  315. *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA);
  316. return 0;
  317. }
  318. static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  319. u8 *bytes, size_t size)
  320. {
  321. int addridx;
  322. int ret = 0;
  323. for (addridx = addr; addridx < (addr + size); addridx += 4) {
  324. int v;
  325. ret = do_rom_fast_read(adapter, addridx, &v);
  326. if (ret != 0)
  327. break;
  328. *(__le32 *)bytes = cpu_to_le32(v);
  329. bytes += 4;
  330. }
  331. return ret;
  332. }
  333. int
  334. qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  335. u8 *bytes, size_t size)
  336. {
  337. int ret;
  338. ret = qlcnic_rom_lock(adapter);
  339. if (ret < 0)
  340. return ret;
  341. ret = do_rom_fast_read_words(adapter, addr, bytes, size);
  342. qlcnic_rom_unlock(adapter);
  343. return ret;
  344. }
  345. int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, int addr, int *valp)
  346. {
  347. int ret;
  348. if (qlcnic_rom_lock(adapter) != 0)
  349. return -EIO;
  350. ret = do_rom_fast_read(adapter, addr, valp);
  351. qlcnic_rom_unlock(adapter);
  352. return ret;
  353. }
  354. int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
  355. {
  356. int addr, val;
  357. int i, n, init_delay;
  358. struct crb_addr_pair *buf;
  359. unsigned offset;
  360. u32 off;
  361. struct pci_dev *pdev = adapter->pdev;
  362. /* resetall */
  363. qlcnic_rom_lock(adapter);
  364. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
  365. qlcnic_rom_unlock(adapter);
  366. if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
  367. qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
  368. dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
  369. return -EIO;
  370. }
  371. offset = n & 0xffffU;
  372. n = (n >> 16) & 0xffffU;
  373. if (n >= 1024) {
  374. dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
  375. return -EIO;
  376. }
  377. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  378. if (buf == NULL) {
  379. dev_err(&pdev->dev, "Unable to calloc memory for rom read.\n");
  380. return -ENOMEM;
  381. }
  382. for (i = 0; i < n; i++) {
  383. if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
  384. qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
  385. kfree(buf);
  386. return -EIO;
  387. }
  388. buf[i].addr = addr;
  389. buf[i].data = val;
  390. }
  391. for (i = 0; i < n; i++) {
  392. off = qlcnic_decode_crb_addr(buf[i].addr);
  393. if (off == QLCNIC_ADDR_ERROR) {
  394. dev_err(&pdev->dev, "CRB init value out of range %x\n",
  395. buf[i].addr);
  396. continue;
  397. }
  398. off += QLCNIC_PCI_CRBSPACE;
  399. if (off & 1)
  400. continue;
  401. /* skipping cold reboot MAGIC */
  402. if (off == QLCNIC_CAM_RAM(0x1fc))
  403. continue;
  404. if (off == (QLCNIC_CRB_I2C0 + 0x1c))
  405. continue;
  406. if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
  407. continue;
  408. if (off == (ROMUSB_GLB + 0xa8))
  409. continue;
  410. if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
  411. continue;
  412. if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
  413. continue;
  414. if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
  415. continue;
  416. if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
  417. continue;
  418. /* skip the function enable register */
  419. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
  420. continue;
  421. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
  422. continue;
  423. if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
  424. continue;
  425. init_delay = 1;
  426. /* After writing this register, HW needs time for CRB */
  427. /* to quiet down (else crb_window returns 0xffffffff) */
  428. if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
  429. init_delay = 1000;
  430. QLCWR32(adapter, off, buf[i].data);
  431. msleep(init_delay);
  432. }
  433. kfree(buf);
  434. /* p2dn replyCount */
  435. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
  436. /* disable_peg_cache 0 & 1*/
  437. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
  438. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
  439. /* peg_clr_all */
  440. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
  441. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
  442. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
  443. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
  444. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
  445. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
  446. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
  447. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
  448. return 0;
  449. }
  450. int
  451. qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
  452. int timeo;
  453. u32 val;
  454. if (adapter->fw_hal_version == QLCNIC_FW_BASE) {
  455. val = QLCRD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
  456. val = QLC_DEV_GET_DRV(val, adapter->portnum);
  457. if ((val & 0x3) != QLCNIC_TYPE_NIC) {
  458. dev_err(&adapter->pdev->dev,
  459. "Not an Ethernet NIC func=%u\n", val);
  460. return -EIO;
  461. }
  462. adapter->physical_port = (val >> 2);
  463. }
  464. if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
  465. timeo = 30;
  466. adapter->dev_init_timeo = timeo;
  467. if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
  468. timeo = 10;
  469. adapter->reset_ack_timeo = timeo;
  470. return 0;
  471. }
  472. int
  473. qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
  474. {
  475. u32 ver = -1, min_ver;
  476. qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET, (int *)&ver);
  477. ver = QLCNIC_DECODE_VERSION(ver);
  478. min_ver = QLCNIC_MIN_FW_VERSION;
  479. if (ver < min_ver) {
  480. dev_err(&adapter->pdev->dev,
  481. "firmware version %d.%d.%d unsupported."
  482. "Min supported version %d.%d.%d\n",
  483. _major(ver), _minor(ver), _build(ver),
  484. _major(min_ver), _minor(min_ver), _build(min_ver));
  485. return -EINVAL;
  486. }
  487. return 0;
  488. }
  489. static int
  490. qlcnic_has_mn(struct qlcnic_adapter *adapter)
  491. {
  492. u32 capability;
  493. capability = 0;
  494. capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY);
  495. if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
  496. return 1;
  497. return 0;
  498. }
  499. static
  500. struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
  501. {
  502. u32 i;
  503. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  504. __le32 entries = cpu_to_le32(directory->num_entries);
  505. for (i = 0; i < entries; i++) {
  506. __le32 offs = cpu_to_le32(directory->findex) +
  507. (i * cpu_to_le32(directory->entry_size));
  508. __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8));
  509. if (tab_type == section)
  510. return (struct uni_table_desc *) &unirom[offs];
  511. }
  512. return NULL;
  513. }
  514. #define FILEHEADER_SIZE (14 * 4)
  515. static int
  516. qlcnic_validate_header(struct qlcnic_adapter *adapter)
  517. {
  518. const u8 *unirom = adapter->fw->data;
  519. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  520. __le32 fw_file_size = adapter->fw->size;
  521. __le32 entries;
  522. __le32 entry_size;
  523. __le32 tab_size;
  524. if (fw_file_size < FILEHEADER_SIZE)
  525. return -EINVAL;
  526. entries = cpu_to_le32(directory->num_entries);
  527. entry_size = cpu_to_le32(directory->entry_size);
  528. tab_size = cpu_to_le32(directory->findex) + (entries * entry_size);
  529. if (fw_file_size < tab_size)
  530. return -EINVAL;
  531. return 0;
  532. }
  533. static int
  534. qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
  535. {
  536. struct uni_table_desc *tab_desc;
  537. struct uni_data_desc *descr;
  538. const u8 *unirom = adapter->fw->data;
  539. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  540. QLCNIC_UNI_BOOTLD_IDX_OFF));
  541. __le32 offs;
  542. __le32 tab_size;
  543. __le32 data_size;
  544. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
  545. if (!tab_desc)
  546. return -EINVAL;
  547. tab_size = cpu_to_le32(tab_desc->findex) +
  548. (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
  549. if (adapter->fw->size < tab_size)
  550. return -EINVAL;
  551. offs = cpu_to_le32(tab_desc->findex) +
  552. (cpu_to_le32(tab_desc->entry_size) * (idx));
  553. descr = (struct uni_data_desc *)&unirom[offs];
  554. data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
  555. if (adapter->fw->size < data_size)
  556. return -EINVAL;
  557. return 0;
  558. }
  559. static int
  560. qlcnic_validate_fw(struct qlcnic_adapter *adapter)
  561. {
  562. struct uni_table_desc *tab_desc;
  563. struct uni_data_desc *descr;
  564. const u8 *unirom = adapter->fw->data;
  565. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  566. QLCNIC_UNI_FIRMWARE_IDX_OFF));
  567. __le32 offs;
  568. __le32 tab_size;
  569. __le32 data_size;
  570. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
  571. if (!tab_desc)
  572. return -EINVAL;
  573. tab_size = cpu_to_le32(tab_desc->findex) +
  574. (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
  575. if (adapter->fw->size < tab_size)
  576. return -EINVAL;
  577. offs = cpu_to_le32(tab_desc->findex) +
  578. (cpu_to_le32(tab_desc->entry_size) * (idx));
  579. descr = (struct uni_data_desc *)&unirom[offs];
  580. data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
  581. if (adapter->fw->size < data_size)
  582. return -EINVAL;
  583. return 0;
  584. }
  585. static int
  586. qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
  587. {
  588. struct uni_table_desc *ptab_descr;
  589. const u8 *unirom = adapter->fw->data;
  590. int mn_present = qlcnic_has_mn(adapter);
  591. __le32 entries;
  592. __le32 entry_size;
  593. __le32 tab_size;
  594. u32 i;
  595. ptab_descr = qlcnic_get_table_desc(unirom,
  596. QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
  597. if (!ptab_descr)
  598. return -EINVAL;
  599. entries = cpu_to_le32(ptab_descr->num_entries);
  600. entry_size = cpu_to_le32(ptab_descr->entry_size);
  601. tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size);
  602. if (adapter->fw->size < tab_size)
  603. return -EINVAL;
  604. nomn:
  605. for (i = 0; i < entries; i++) {
  606. __le32 flags, file_chiprev, offs;
  607. u8 chiprev = adapter->ahw.revision_id;
  608. u32 flagbit;
  609. offs = cpu_to_le32(ptab_descr->findex) +
  610. (i * cpu_to_le32(ptab_descr->entry_size));
  611. flags = cpu_to_le32(*((int *)&unirom[offs] +
  612. QLCNIC_UNI_FLAGS_OFF));
  613. file_chiprev = cpu_to_le32(*((int *)&unirom[offs] +
  614. QLCNIC_UNI_CHIP_REV_OFF));
  615. flagbit = mn_present ? 1 : 2;
  616. if ((chiprev == file_chiprev) &&
  617. ((1ULL << flagbit) & flags)) {
  618. adapter->file_prd_off = offs;
  619. return 0;
  620. }
  621. }
  622. if (mn_present) {
  623. mn_present = 0;
  624. goto nomn;
  625. }
  626. return -EINVAL;
  627. }
  628. static int
  629. qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
  630. {
  631. if (qlcnic_validate_header(adapter)) {
  632. dev_err(&adapter->pdev->dev,
  633. "unified image: header validation failed\n");
  634. return -EINVAL;
  635. }
  636. if (qlcnic_validate_product_offs(adapter)) {
  637. dev_err(&adapter->pdev->dev,
  638. "unified image: product validation failed\n");
  639. return -EINVAL;
  640. }
  641. if (qlcnic_validate_bootld(adapter)) {
  642. dev_err(&adapter->pdev->dev,
  643. "unified image: bootld validation failed\n");
  644. return -EINVAL;
  645. }
  646. if (qlcnic_validate_fw(adapter)) {
  647. dev_err(&adapter->pdev->dev,
  648. "unified image: firmware validation failed\n");
  649. return -EINVAL;
  650. }
  651. return 0;
  652. }
  653. static
  654. struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
  655. u32 section, u32 idx_offset)
  656. {
  657. const u8 *unirom = adapter->fw->data;
  658. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  659. idx_offset));
  660. struct uni_table_desc *tab_desc;
  661. __le32 offs;
  662. tab_desc = qlcnic_get_table_desc(unirom, section);
  663. if (tab_desc == NULL)
  664. return NULL;
  665. offs = cpu_to_le32(tab_desc->findex) +
  666. (cpu_to_le32(tab_desc->entry_size) * idx);
  667. return (struct uni_data_desc *)&unirom[offs];
  668. }
  669. static u8 *
  670. qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
  671. {
  672. u32 offs = QLCNIC_BOOTLD_START;
  673. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  674. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  675. QLCNIC_UNI_DIR_SECT_BOOTLD,
  676. QLCNIC_UNI_BOOTLD_IDX_OFF))->findex);
  677. return (u8 *)&adapter->fw->data[offs];
  678. }
  679. static u8 *
  680. qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
  681. {
  682. u32 offs = QLCNIC_IMAGE_START;
  683. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  684. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  685. QLCNIC_UNI_DIR_SECT_FW,
  686. QLCNIC_UNI_FIRMWARE_IDX_OFF))->findex);
  687. return (u8 *)&adapter->fw->data[offs];
  688. }
  689. static __le32
  690. qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
  691. {
  692. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  693. return cpu_to_le32((qlcnic_get_data_desc(adapter,
  694. QLCNIC_UNI_DIR_SECT_FW,
  695. QLCNIC_UNI_FIRMWARE_IDX_OFF))->size);
  696. else
  697. return cpu_to_le32(
  698. *(u32 *)&adapter->fw->data[QLCNIC_FW_SIZE_OFFSET]);
  699. }
  700. static __le32
  701. qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
  702. {
  703. struct uni_data_desc *fw_data_desc;
  704. const struct firmware *fw = adapter->fw;
  705. __le32 major, minor, sub;
  706. const u8 *ver_str;
  707. int i, ret;
  708. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  709. return cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET]);
  710. fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
  711. QLCNIC_UNI_FIRMWARE_IDX_OFF);
  712. ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) +
  713. cpu_to_le32(fw_data_desc->size) - 17;
  714. for (i = 0; i < 12; i++) {
  715. if (!strncmp(&ver_str[i], "REV=", 4)) {
  716. ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
  717. &major, &minor, &sub);
  718. if (ret != 3)
  719. return 0;
  720. else
  721. return major + (minor << 8) + (sub << 16);
  722. }
  723. }
  724. return 0;
  725. }
  726. static __le32
  727. qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
  728. {
  729. const struct firmware *fw = adapter->fw;
  730. __le32 bios_ver, prd_off = adapter->file_prd_off;
  731. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  732. return cpu_to_le32(
  733. *(u32 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET]);
  734. bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
  735. + QLCNIC_UNI_BIOS_VERSION_OFF));
  736. return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
  737. }
  738. int
  739. qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
  740. {
  741. u32 count, old_count;
  742. u32 val, version, major, minor, build;
  743. int i, timeout;
  744. if (adapter->need_fw_reset)
  745. return 1;
  746. /* last attempt had failed */
  747. if (QLCRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
  748. return 1;
  749. old_count = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  750. for (i = 0; i < 10; i++) {
  751. timeout = msleep_interruptible(200);
  752. if (timeout) {
  753. QLCWR32(adapter, CRB_CMDPEG_STATE,
  754. PHAN_INITIALIZE_FAILED);
  755. return -EINTR;
  756. }
  757. count = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  758. if (count != old_count)
  759. break;
  760. }
  761. /* firmware is dead */
  762. if (count == old_count)
  763. return 1;
  764. /* check if we have got newer or different file firmware */
  765. if (adapter->fw) {
  766. val = qlcnic_get_fw_version(adapter);
  767. version = QLCNIC_DECODE_VERSION(val);
  768. major = QLCRD32(adapter, QLCNIC_FW_VERSION_MAJOR);
  769. minor = QLCRD32(adapter, QLCNIC_FW_VERSION_MINOR);
  770. build = QLCRD32(adapter, QLCNIC_FW_VERSION_SUB);
  771. if (version > QLCNIC_VERSION_CODE(major, minor, build))
  772. return 1;
  773. }
  774. return 0;
  775. }
  776. static const char *fw_name[] = {
  777. QLCNIC_UNIFIED_ROMIMAGE_NAME,
  778. QLCNIC_FLASH_ROMIMAGE_NAME,
  779. };
  780. int
  781. qlcnic_load_firmware(struct qlcnic_adapter *adapter)
  782. {
  783. u64 *ptr64;
  784. u32 i, flashaddr, size;
  785. const struct firmware *fw = adapter->fw;
  786. struct pci_dev *pdev = adapter->pdev;
  787. dev_info(&pdev->dev, "loading firmware from %s\n",
  788. fw_name[adapter->fw_type]);
  789. if (fw) {
  790. __le64 data;
  791. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  792. ptr64 = (u64 *)qlcnic_get_bootld_offs(adapter);
  793. flashaddr = QLCNIC_BOOTLD_START;
  794. for (i = 0; i < size; i++) {
  795. data = cpu_to_le64(ptr64[i]);
  796. if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
  797. return -EIO;
  798. flashaddr += 8;
  799. }
  800. size = (__force u32)qlcnic_get_fw_size(adapter) / 8;
  801. ptr64 = (u64 *)qlcnic_get_fw_offs(adapter);
  802. flashaddr = QLCNIC_IMAGE_START;
  803. for (i = 0; i < size; i++) {
  804. data = cpu_to_le64(ptr64[i]);
  805. if (qlcnic_pci_mem_write_2M(adapter,
  806. flashaddr, data))
  807. return -EIO;
  808. flashaddr += 8;
  809. }
  810. size = (__force u32)qlcnic_get_fw_size(adapter) % 8;
  811. if (size) {
  812. data = cpu_to_le64(ptr64[i]);
  813. if (qlcnic_pci_mem_write_2M(adapter,
  814. flashaddr, data))
  815. return -EIO;
  816. }
  817. } else {
  818. u64 data;
  819. u32 hi, lo;
  820. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  821. flashaddr = QLCNIC_BOOTLD_START;
  822. for (i = 0; i < size; i++) {
  823. if (qlcnic_rom_fast_read(adapter,
  824. flashaddr, (int *)&lo) != 0)
  825. return -EIO;
  826. if (qlcnic_rom_fast_read(adapter,
  827. flashaddr + 4, (int *)&hi) != 0)
  828. return -EIO;
  829. data = (((u64)hi << 32) | lo);
  830. if (qlcnic_pci_mem_write_2M(adapter,
  831. flashaddr, data))
  832. return -EIO;
  833. flashaddr += 8;
  834. }
  835. }
  836. msleep(1);
  837. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
  838. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
  839. return 0;
  840. }
  841. static int
  842. qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
  843. {
  844. __le32 val;
  845. u32 ver, bios, min_size;
  846. struct pci_dev *pdev = adapter->pdev;
  847. const struct firmware *fw = adapter->fw;
  848. u8 fw_type = adapter->fw_type;
  849. if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
  850. if (qlcnic_validate_unified_romimage(adapter))
  851. return -EINVAL;
  852. min_size = QLCNIC_UNI_FW_MIN_SIZE;
  853. } else {
  854. val = cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
  855. if ((__force u32)val != QLCNIC_BDINFO_MAGIC)
  856. return -EINVAL;
  857. min_size = QLCNIC_FW_MIN_SIZE;
  858. }
  859. if (fw->size < min_size)
  860. return -EINVAL;
  861. val = qlcnic_get_fw_version(adapter);
  862. ver = QLCNIC_DECODE_VERSION(val);
  863. if (ver < QLCNIC_MIN_FW_VERSION) {
  864. dev_err(&pdev->dev,
  865. "%s: firmware version %d.%d.%d unsupported\n",
  866. fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
  867. return -EINVAL;
  868. }
  869. val = qlcnic_get_bios_version(adapter);
  870. qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
  871. if ((__force u32)val != bios) {
  872. dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
  873. fw_name[fw_type]);
  874. return -EINVAL;
  875. }
  876. /* check if flashed firmware is newer */
  877. if (qlcnic_rom_fast_read(adapter,
  878. QLCNIC_FW_VERSION_OFFSET, (int *)&val))
  879. return -EIO;
  880. val = QLCNIC_DECODE_VERSION(val);
  881. if (val > ver) {
  882. dev_info(&pdev->dev, "%s: firmware is older than flash\n",
  883. fw_name[fw_type]);
  884. return -EINVAL;
  885. }
  886. QLCWR32(adapter, QLCNIC_CAM_RAM(0x1fc), QLCNIC_BDINFO_MAGIC);
  887. return 0;
  888. }
  889. static void
  890. qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
  891. {
  892. u8 fw_type;
  893. switch (adapter->fw_type) {
  894. case QLCNIC_UNKNOWN_ROMIMAGE:
  895. fw_type = QLCNIC_UNIFIED_ROMIMAGE;
  896. break;
  897. case QLCNIC_UNIFIED_ROMIMAGE:
  898. default:
  899. fw_type = QLCNIC_FLASH_ROMIMAGE;
  900. break;
  901. }
  902. adapter->fw_type = fw_type;
  903. }
  904. void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
  905. {
  906. struct pci_dev *pdev = adapter->pdev;
  907. int rc;
  908. adapter->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
  909. next:
  910. qlcnic_get_next_fwtype(adapter);
  911. if (adapter->fw_type == QLCNIC_FLASH_ROMIMAGE) {
  912. adapter->fw = NULL;
  913. } else {
  914. rc = request_firmware(&adapter->fw,
  915. fw_name[adapter->fw_type], &pdev->dev);
  916. if (rc != 0)
  917. goto next;
  918. rc = qlcnic_validate_firmware(adapter);
  919. if (rc != 0) {
  920. release_firmware(adapter->fw);
  921. msleep(1);
  922. goto next;
  923. }
  924. }
  925. }
  926. void
  927. qlcnic_release_firmware(struct qlcnic_adapter *adapter)
  928. {
  929. if (adapter->fw)
  930. release_firmware(adapter->fw);
  931. adapter->fw = NULL;
  932. }
  933. int qlcnic_phantom_init(struct qlcnic_adapter *adapter)
  934. {
  935. u32 val;
  936. int retries = 60;
  937. do {
  938. val = QLCRD32(adapter, CRB_CMDPEG_STATE);
  939. switch (val) {
  940. case PHAN_INITIALIZE_COMPLETE:
  941. case PHAN_INITIALIZE_ACK:
  942. return 0;
  943. case PHAN_INITIALIZE_FAILED:
  944. goto out_err;
  945. default:
  946. break;
  947. }
  948. msleep(500);
  949. } while (--retries);
  950. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
  951. out_err:
  952. dev_err(&adapter->pdev->dev, "firmware init failed\n");
  953. return -EIO;
  954. }
  955. static int
  956. qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
  957. {
  958. u32 val;
  959. int retries = 2000;
  960. do {
  961. val = QLCRD32(adapter, CRB_RCVPEG_STATE);
  962. if (val == PHAN_PEG_RCV_INITIALIZED)
  963. return 0;
  964. msleep(10);
  965. } while (--retries);
  966. if (!retries) {
  967. dev_err(&adapter->pdev->dev, "Receive Peg initialization not "
  968. "complete, state: 0x%x.\n", val);
  969. return -EIO;
  970. }
  971. return 0;
  972. }
  973. int qlcnic_init_firmware(struct qlcnic_adapter *adapter)
  974. {
  975. int err;
  976. err = qlcnic_receive_peg_ready(adapter);
  977. if (err)
  978. return err;
  979. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
  980. return err;
  981. }
  982. static void
  983. qlcnic_handle_linkevent(struct qlcnic_adapter *adapter,
  984. struct qlcnic_fw_msg *msg)
  985. {
  986. u32 cable_OUI;
  987. u16 cable_len;
  988. u16 link_speed;
  989. u8 link_status, module, duplex, autoneg;
  990. struct net_device *netdev = adapter->netdev;
  991. adapter->has_link_events = 1;
  992. cable_OUI = msg->body[1] & 0xffffffff;
  993. cable_len = (msg->body[1] >> 32) & 0xffff;
  994. link_speed = (msg->body[1] >> 48) & 0xffff;
  995. link_status = msg->body[2] & 0xff;
  996. duplex = (msg->body[2] >> 16) & 0xff;
  997. autoneg = (msg->body[2] >> 24) & 0xff;
  998. module = (msg->body[2] >> 8) & 0xff;
  999. if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE)
  1000. dev_info(&netdev->dev, "unsupported cable: OUI 0x%x, "
  1001. "length %d\n", cable_OUI, cable_len);
  1002. else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN)
  1003. dev_info(&netdev->dev, "unsupported cable length %d\n",
  1004. cable_len);
  1005. qlcnic_advert_link_change(adapter, link_status);
  1006. if (duplex == LINKEVENT_FULL_DUPLEX)
  1007. adapter->link_duplex = DUPLEX_FULL;
  1008. else
  1009. adapter->link_duplex = DUPLEX_HALF;
  1010. adapter->module_type = module;
  1011. adapter->link_autoneg = autoneg;
  1012. adapter->link_speed = link_speed;
  1013. }
  1014. static void
  1015. qlcnic_handle_fw_message(int desc_cnt, int index,
  1016. struct qlcnic_host_sds_ring *sds_ring)
  1017. {
  1018. struct qlcnic_fw_msg msg;
  1019. struct status_desc *desc;
  1020. int i = 0, opcode;
  1021. while (desc_cnt > 0 && i < 8) {
  1022. desc = &sds_ring->desc_head[index];
  1023. msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
  1024. msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
  1025. index = get_next_index(index, sds_ring->num_desc);
  1026. desc_cnt--;
  1027. }
  1028. opcode = qlcnic_get_nic_msg_opcode(msg.body[0]);
  1029. switch (opcode) {
  1030. case QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
  1031. qlcnic_handle_linkevent(sds_ring->adapter, &msg);
  1032. break;
  1033. default:
  1034. break;
  1035. }
  1036. }
  1037. static int
  1038. qlcnic_alloc_rx_skb(struct qlcnic_adapter *adapter,
  1039. struct qlcnic_host_rds_ring *rds_ring,
  1040. struct qlcnic_rx_buffer *buffer)
  1041. {
  1042. struct sk_buff *skb;
  1043. dma_addr_t dma;
  1044. struct pci_dev *pdev = adapter->pdev;
  1045. buffer->skb = dev_alloc_skb(rds_ring->skb_size);
  1046. if (!buffer->skb) {
  1047. adapter->stats.skb_alloc_failure++;
  1048. return -ENOMEM;
  1049. }
  1050. skb = buffer->skb;
  1051. skb_reserve(skb, 2);
  1052. dma = pci_map_single(pdev, skb->data,
  1053. rds_ring->dma_size, PCI_DMA_FROMDEVICE);
  1054. if (pci_dma_mapping_error(pdev, dma)) {
  1055. adapter->stats.rx_dma_map_error++;
  1056. dev_kfree_skb_any(skb);
  1057. buffer->skb = NULL;
  1058. return -ENOMEM;
  1059. }
  1060. buffer->skb = skb;
  1061. buffer->dma = dma;
  1062. buffer->state = QLCNIC_BUFFER_BUSY;
  1063. return 0;
  1064. }
  1065. static struct sk_buff *qlcnic_process_rxbuf(struct qlcnic_adapter *adapter,
  1066. struct qlcnic_host_rds_ring *rds_ring, u16 index, u16 cksum)
  1067. {
  1068. struct qlcnic_rx_buffer *buffer;
  1069. struct sk_buff *skb;
  1070. buffer = &rds_ring->rx_buf_arr[index];
  1071. pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
  1072. PCI_DMA_FROMDEVICE);
  1073. skb = buffer->skb;
  1074. if (!skb) {
  1075. adapter->stats.null_skb++;
  1076. goto no_skb;
  1077. }
  1078. if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
  1079. adapter->stats.csummed++;
  1080. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1081. } else {
  1082. skb->ip_summed = CHECKSUM_NONE;
  1083. }
  1084. skb->dev = adapter->netdev;
  1085. buffer->skb = NULL;
  1086. no_skb:
  1087. buffer->state = QLCNIC_BUFFER_FREE;
  1088. return skb;
  1089. }
  1090. static struct qlcnic_rx_buffer *
  1091. qlcnic_process_rcv(struct qlcnic_adapter *adapter,
  1092. struct qlcnic_host_sds_ring *sds_ring,
  1093. int ring, u64 sts_data0)
  1094. {
  1095. struct net_device *netdev = adapter->netdev;
  1096. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1097. struct qlcnic_rx_buffer *buffer;
  1098. struct sk_buff *skb;
  1099. struct qlcnic_host_rds_ring *rds_ring;
  1100. int index, length, cksum, pkt_offset;
  1101. if (unlikely(ring >= adapter->max_rds_rings))
  1102. return NULL;
  1103. rds_ring = &recv_ctx->rds_rings[ring];
  1104. index = qlcnic_get_sts_refhandle(sts_data0);
  1105. if (unlikely(index >= rds_ring->num_desc))
  1106. return NULL;
  1107. buffer = &rds_ring->rx_buf_arr[index];
  1108. length = qlcnic_get_sts_totallength(sts_data0);
  1109. cksum = qlcnic_get_sts_status(sts_data0);
  1110. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1111. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1112. if (!skb)
  1113. return buffer;
  1114. if (length > rds_ring->skb_size)
  1115. skb_put(skb, rds_ring->skb_size);
  1116. else
  1117. skb_put(skb, length);
  1118. if (pkt_offset)
  1119. skb_pull(skb, pkt_offset);
  1120. skb->truesize = skb->len + sizeof(struct sk_buff);
  1121. skb->protocol = eth_type_trans(skb, netdev);
  1122. napi_gro_receive(&sds_ring->napi, skb);
  1123. adapter->stats.rx_pkts++;
  1124. adapter->stats.rxbytes += length;
  1125. return buffer;
  1126. }
  1127. #define QLC_TCP_HDR_SIZE 20
  1128. #define QLC_TCP_TS_OPTION_SIZE 12
  1129. #define QLC_TCP_TS_HDR_SIZE (QLC_TCP_HDR_SIZE + QLC_TCP_TS_OPTION_SIZE)
  1130. static struct qlcnic_rx_buffer *
  1131. qlcnic_process_lro(struct qlcnic_adapter *adapter,
  1132. struct qlcnic_host_sds_ring *sds_ring,
  1133. int ring, u64 sts_data0, u64 sts_data1)
  1134. {
  1135. struct net_device *netdev = adapter->netdev;
  1136. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1137. struct qlcnic_rx_buffer *buffer;
  1138. struct sk_buff *skb;
  1139. struct qlcnic_host_rds_ring *rds_ring;
  1140. struct iphdr *iph;
  1141. struct tcphdr *th;
  1142. bool push, timestamp;
  1143. int l2_hdr_offset, l4_hdr_offset;
  1144. int index;
  1145. u16 lro_length, length, data_offset;
  1146. u32 seq_number;
  1147. if (unlikely(ring > adapter->max_rds_rings))
  1148. return NULL;
  1149. rds_ring = &recv_ctx->rds_rings[ring];
  1150. index = qlcnic_get_lro_sts_refhandle(sts_data0);
  1151. if (unlikely(index > rds_ring->num_desc))
  1152. return NULL;
  1153. buffer = &rds_ring->rx_buf_arr[index];
  1154. timestamp = qlcnic_get_lro_sts_timestamp(sts_data0);
  1155. lro_length = qlcnic_get_lro_sts_length(sts_data0);
  1156. l2_hdr_offset = qlcnic_get_lro_sts_l2_hdr_offset(sts_data0);
  1157. l4_hdr_offset = qlcnic_get_lro_sts_l4_hdr_offset(sts_data0);
  1158. push = qlcnic_get_lro_sts_push_flag(sts_data0);
  1159. seq_number = qlcnic_get_lro_sts_seq_number(sts_data1);
  1160. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
  1161. if (!skb)
  1162. return buffer;
  1163. if (timestamp)
  1164. data_offset = l4_hdr_offset + QLC_TCP_TS_HDR_SIZE;
  1165. else
  1166. data_offset = l4_hdr_offset + QLC_TCP_HDR_SIZE;
  1167. skb_put(skb, lro_length + data_offset);
  1168. skb->truesize = skb->len + sizeof(struct sk_buff) + skb_headroom(skb);
  1169. skb_pull(skb, l2_hdr_offset);
  1170. skb->protocol = eth_type_trans(skb, netdev);
  1171. iph = (struct iphdr *)skb->data;
  1172. th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
  1173. length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
  1174. iph->tot_len = htons(length);
  1175. iph->check = 0;
  1176. iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
  1177. th->psh = push;
  1178. th->seq = htonl(seq_number);
  1179. length = skb->len;
  1180. netif_receive_skb(skb);
  1181. adapter->stats.lro_pkts++;
  1182. adapter->stats.lrobytes += length;
  1183. return buffer;
  1184. }
  1185. int
  1186. qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max)
  1187. {
  1188. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1189. struct list_head *cur;
  1190. struct status_desc *desc;
  1191. struct qlcnic_rx_buffer *rxbuf;
  1192. u64 sts_data0, sts_data1;
  1193. int count = 0;
  1194. int opcode, ring, desc_cnt;
  1195. u32 consumer = sds_ring->consumer;
  1196. while (count < max) {
  1197. desc = &sds_ring->desc_head[consumer];
  1198. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1199. if (!(sts_data0 & STATUS_OWNER_HOST))
  1200. break;
  1201. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1202. opcode = qlcnic_get_sts_opcode(sts_data0);
  1203. switch (opcode) {
  1204. case QLCNIC_RXPKT_DESC:
  1205. case QLCNIC_OLD_RXPKT_DESC:
  1206. case QLCNIC_SYN_OFFLOAD:
  1207. ring = qlcnic_get_sts_type(sts_data0);
  1208. rxbuf = qlcnic_process_rcv(adapter, sds_ring,
  1209. ring, sts_data0);
  1210. break;
  1211. case QLCNIC_LRO_DESC:
  1212. ring = qlcnic_get_lro_sts_type(sts_data0);
  1213. sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
  1214. rxbuf = qlcnic_process_lro(adapter, sds_ring,
  1215. ring, sts_data0, sts_data1);
  1216. break;
  1217. case QLCNIC_RESPONSE_DESC:
  1218. qlcnic_handle_fw_message(desc_cnt, consumer, sds_ring);
  1219. default:
  1220. goto skip;
  1221. }
  1222. WARN_ON(desc_cnt > 1);
  1223. if (rxbuf)
  1224. list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
  1225. else
  1226. adapter->stats.null_rxbuf++;
  1227. skip:
  1228. for (; desc_cnt > 0; desc_cnt--) {
  1229. desc = &sds_ring->desc_head[consumer];
  1230. desc->status_desc_data[0] =
  1231. cpu_to_le64(STATUS_OWNER_PHANTOM);
  1232. consumer = get_next_index(consumer, sds_ring->num_desc);
  1233. }
  1234. count++;
  1235. }
  1236. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  1237. struct qlcnic_host_rds_ring *rds_ring =
  1238. &adapter->recv_ctx.rds_rings[ring];
  1239. if (!list_empty(&sds_ring->free_list[ring])) {
  1240. list_for_each(cur, &sds_ring->free_list[ring]) {
  1241. rxbuf = list_entry(cur,
  1242. struct qlcnic_rx_buffer, list);
  1243. qlcnic_alloc_rx_skb(adapter, rds_ring, rxbuf);
  1244. }
  1245. spin_lock(&rds_ring->lock);
  1246. list_splice_tail_init(&sds_ring->free_list[ring],
  1247. &rds_ring->free_list);
  1248. spin_unlock(&rds_ring->lock);
  1249. }
  1250. qlcnic_post_rx_buffers_nodb(adapter, rds_ring);
  1251. }
  1252. if (count) {
  1253. sds_ring->consumer = consumer;
  1254. writel(consumer, sds_ring->crb_sts_consumer);
  1255. }
  1256. return count;
  1257. }
  1258. void
  1259. qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter, u32 ringid,
  1260. struct qlcnic_host_rds_ring *rds_ring)
  1261. {
  1262. struct rcv_desc *pdesc;
  1263. struct qlcnic_rx_buffer *buffer;
  1264. int producer, count = 0;
  1265. struct list_head *head;
  1266. spin_lock(&rds_ring->lock);
  1267. producer = rds_ring->producer;
  1268. head = &rds_ring->free_list;
  1269. while (!list_empty(head)) {
  1270. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1271. if (!buffer->skb) {
  1272. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1273. break;
  1274. }
  1275. count++;
  1276. list_del(&buffer->list);
  1277. /* make a rcv descriptor */
  1278. pdesc = &rds_ring->desc_head[producer];
  1279. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1280. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1281. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1282. producer = get_next_index(producer, rds_ring->num_desc);
  1283. }
  1284. if (count) {
  1285. rds_ring->producer = producer;
  1286. writel((producer-1) & (rds_ring->num_desc-1),
  1287. rds_ring->crb_rcv_producer);
  1288. }
  1289. spin_unlock(&rds_ring->lock);
  1290. }
  1291. static void
  1292. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  1293. struct qlcnic_host_rds_ring *rds_ring)
  1294. {
  1295. struct rcv_desc *pdesc;
  1296. struct qlcnic_rx_buffer *buffer;
  1297. int producer, count = 0;
  1298. struct list_head *head;
  1299. if (!spin_trylock(&rds_ring->lock))
  1300. return;
  1301. producer = rds_ring->producer;
  1302. head = &rds_ring->free_list;
  1303. while (!list_empty(head)) {
  1304. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1305. if (!buffer->skb) {
  1306. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1307. break;
  1308. }
  1309. count++;
  1310. list_del(&buffer->list);
  1311. /* make a rcv descriptor */
  1312. pdesc = &rds_ring->desc_head[producer];
  1313. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1314. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1315. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1316. producer = get_next_index(producer, rds_ring->num_desc);
  1317. }
  1318. if (count) {
  1319. rds_ring->producer = producer;
  1320. writel((producer - 1) & (rds_ring->num_desc - 1),
  1321. rds_ring->crb_rcv_producer);
  1322. }
  1323. spin_unlock(&rds_ring->lock);
  1324. }
  1325. static struct qlcnic_rx_buffer *
  1326. qlcnic_process_rcv_diag(struct qlcnic_adapter *adapter,
  1327. struct qlcnic_host_sds_ring *sds_ring,
  1328. int ring, u64 sts_data0)
  1329. {
  1330. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1331. struct qlcnic_rx_buffer *buffer;
  1332. struct sk_buff *skb;
  1333. struct qlcnic_host_rds_ring *rds_ring;
  1334. int index, length, cksum, pkt_offset;
  1335. if (unlikely(ring >= adapter->max_rds_rings))
  1336. return NULL;
  1337. rds_ring = &recv_ctx->rds_rings[ring];
  1338. index = qlcnic_get_sts_refhandle(sts_data0);
  1339. if (unlikely(index >= rds_ring->num_desc))
  1340. return NULL;
  1341. buffer = &rds_ring->rx_buf_arr[index];
  1342. length = qlcnic_get_sts_totallength(sts_data0);
  1343. cksum = qlcnic_get_sts_status(sts_data0);
  1344. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1345. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1346. if (!skb)
  1347. return buffer;
  1348. skb_put(skb, rds_ring->skb_size);
  1349. if (pkt_offset)
  1350. skb_pull(skb, pkt_offset);
  1351. skb->truesize = skb->len + sizeof(struct sk_buff);
  1352. if (!qlcnic_check_loopback_buff(skb->data))
  1353. adapter->diag_cnt++;
  1354. dev_kfree_skb_any(skb);
  1355. adapter->stats.rx_pkts++;
  1356. adapter->stats.rxbytes += length;
  1357. return buffer;
  1358. }
  1359. void
  1360. qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
  1361. {
  1362. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1363. struct status_desc *desc;
  1364. struct qlcnic_rx_buffer *rxbuf;
  1365. u64 sts_data0;
  1366. int opcode, ring, desc_cnt;
  1367. u32 consumer = sds_ring->consumer;
  1368. desc = &sds_ring->desc_head[consumer];
  1369. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1370. if (!(sts_data0 & STATUS_OWNER_HOST))
  1371. return;
  1372. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1373. opcode = qlcnic_get_sts_opcode(sts_data0);
  1374. ring = qlcnic_get_sts_type(sts_data0);
  1375. rxbuf = qlcnic_process_rcv_diag(adapter, sds_ring,
  1376. ring, sts_data0);
  1377. desc->status_desc_data[0] = cpu_to_le64(STATUS_OWNER_PHANTOM);
  1378. consumer = get_next_index(consumer, sds_ring->num_desc);
  1379. sds_ring->consumer = consumer;
  1380. writel(consumer, sds_ring->crb_sts_consumer);
  1381. }
  1382. void
  1383. qlcnic_fetch_mac(struct qlcnic_adapter *adapter, u32 off1, u32 off2,
  1384. u8 alt_mac, u8 *mac)
  1385. {
  1386. u32 mac_low, mac_high;
  1387. int i;
  1388. mac_low = QLCRD32(adapter, off1);
  1389. mac_high = QLCRD32(adapter, off2);
  1390. if (alt_mac) {
  1391. mac_low |= (mac_low >> 16) | (mac_high << 16);
  1392. mac_high >>= 16;
  1393. }
  1394. for (i = 0; i < 2; i++)
  1395. mac[i] = (u8)(mac_high >> ((1 - i) * 8));
  1396. for (i = 2; i < 6; i++)
  1397. mac[i] = (u8)(mac_low >> ((5 - i) * 8));
  1398. }