pm.c 7.5 KB

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  1. /* linux/arch/arm/plat-s3c/pm.c
  2. *
  3. * Copyright 2008 Openmoko, Inc.
  4. * Copyright 2004,2006,2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>
  6. * http://armlinux.simtec.co.uk/
  7. *
  8. * S3C common power management (suspend to ram) support.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/suspend.h>
  16. #include <linux/errno.h>
  17. #include <linux/delay.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/io.h>
  20. #include <asm/cacheflush.h>
  21. #include <mach/hardware.h>
  22. #include <plat/regs-serial.h>
  23. #include <mach/regs-clock.h>
  24. #include <mach/regs-gpio.h>
  25. #include <mach/regs-mem.h>
  26. #include <mach/regs-irq.h>
  27. #include <asm/irq.h>
  28. #include <plat/pm.h>
  29. #include <plat/pm-core.h>
  30. /* for external use */
  31. unsigned long s3c_pm_flags;
  32. /* Debug code:
  33. *
  34. * This code supports debug output to the low level UARTs for use on
  35. * resume before the console layer is available.
  36. */
  37. #ifdef CONFIG_S3C2410_PM_DEBUG
  38. extern void printascii(const char *);
  39. void s3c_pm_dbg(const char *fmt, ...)
  40. {
  41. va_list va;
  42. char buff[256];
  43. va_start(va, fmt);
  44. vsprintf(buff, fmt, va);
  45. va_end(va);
  46. printascii(buff);
  47. }
  48. static inline void s3c_pm_debug_init(void)
  49. {
  50. /* restart uart clocks so we can use them to output */
  51. s3c_pm_debug_init_uart();
  52. }
  53. #else
  54. #define s3c_pm_debug_init() do { } while(0)
  55. #endif /* CONFIG_S3C2410_PM_DEBUG */
  56. /* Save the UART configurations if we are configured for debug. */
  57. #ifdef CONFIG_S3C2410_PM_DEBUG
  58. #define SAVE_UART(va) \
  59. SAVE_ITEM((va) + S3C2410_ULCON), \
  60. SAVE_ITEM((va) + S3C2410_UCON), \
  61. SAVE_ITEM((va) + S3C2410_UFCON), \
  62. SAVE_ITEM((va) + S3C2410_UMCON), \
  63. SAVE_ITEM((va) + S3C2410_UBRDIV)
  64. static struct sleep_save uart_save[] = {
  65. SAVE_UART(S3C_VA_UART0),
  66. SAVE_UART(S3C_VA_UART1),
  67. #ifndef CONFIG_CPU_S3C2400
  68. SAVE_UART(S3C_VA_UART2),
  69. #endif
  70. };
  71. static void s3c_pm_save_uart(void)
  72. {
  73. s3c_pm_do_save(uart_save, ARRAY_SIZE(uart_save));
  74. }
  75. static void s3c_pm_restore_uart(void)
  76. {
  77. s3c_pm_do_restore(uart_save, ARRAY_SIZE(uart_save));
  78. }
  79. #else
  80. static void s3c_pm_save_uart(void) { }
  81. static void s3c_pm_restore_uart(void) { }
  82. #endif
  83. /* The IRQ ext-int code goes here, it is too small to currently bother
  84. * with its own file. */
  85. unsigned long s3c_irqwake_intmask = 0xffffffffL;
  86. unsigned long s3c_irqwake_eintmask = 0xffffffffL;
  87. int s3c_irqext_wake(unsigned int irqno, unsigned int state)
  88. {
  89. unsigned long bit = 1L << IRQ_EINT_BIT(irqno);
  90. if (!(s3c_irqwake_eintallow & bit))
  91. return -ENOENT;
  92. printk(KERN_INFO "wake %s for irq %d\n",
  93. state ? "enabled" : "disabled", irqno);
  94. if (!state)
  95. s3c_irqwake_eintmask |= bit;
  96. else
  97. s3c_irqwake_eintmask &= ~bit;
  98. return 0;
  99. }
  100. /* helper functions to save and restore register state */
  101. /**
  102. * s3c_pm_do_save() - save a set of registers for restoration on resume.
  103. * @ptr: Pointer to an array of registers.
  104. * @count: Size of the ptr array.
  105. *
  106. * Run through the list of registers given, saving their contents in the
  107. * array for later restoration when we wakeup.
  108. */
  109. void s3c_pm_do_save(struct sleep_save *ptr, int count)
  110. {
  111. for (; count > 0; count--, ptr++) {
  112. ptr->val = __raw_readl(ptr->reg);
  113. S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val);
  114. }
  115. }
  116. /**
  117. * s3c_pm_do_restore() - restore register values from the save list.
  118. * @ptr: Pointer to an array of registers.
  119. * @count: Size of the ptr array.
  120. *
  121. * Restore the register values saved from s3c_pm_do_save().
  122. *
  123. * Note, we do not use S3C_PMDBG() in here, as the system may not have
  124. * restore the UARTs state yet
  125. */
  126. void s3c_pm_do_restore(struct sleep_save *ptr, int count)
  127. {
  128. for (; count > 0; count--, ptr++) {
  129. printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n",
  130. ptr->reg, ptr->val, __raw_readl(ptr->reg));
  131. __raw_writel(ptr->val, ptr->reg);
  132. }
  133. }
  134. /**
  135. * s3c_pm_do_restore_core() - early restore register values from save list.
  136. *
  137. * This is similar to s3c_pm_do_restore() except we try and minimise the
  138. * side effects of the function in case registers that hardware might need
  139. * to work has been restored.
  140. *
  141. * WARNING: Do not put any debug in here that may effect memory or use
  142. * peripherals, as things may be changing!
  143. */
  144. void s3c_pm_do_restore_core(struct sleep_save *ptr, int count)
  145. {
  146. for (; count > 0; count--, ptr++)
  147. __raw_writel(ptr->val, ptr->reg);
  148. }
  149. /* s3c2410_pm_show_resume_irqs
  150. *
  151. * print any IRQs asserted at resume time (ie, we woke from)
  152. */
  153. static void s3c_pm_show_resume_irqs(int start, unsigned long which,
  154. unsigned long mask)
  155. {
  156. int i;
  157. which &= ~mask;
  158. for (i = 0; i <= 31; i++) {
  159. if (which & (1L<<i)) {
  160. S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
  161. }
  162. }
  163. }
  164. void (*pm_cpu_prep)(void);
  165. void (*pm_cpu_sleep)(void);
  166. #define any_allowed(mask, allow) (((mask) & (allow)) != (allow))
  167. /* s3c_pm_enter
  168. *
  169. * central control for sleep/resume process
  170. */
  171. static int s3c_pm_enter(suspend_state_t state)
  172. {
  173. unsigned long regs_save[16];
  174. /* ensure the debug is initialised (if enabled) */
  175. s3c_pm_debug_init();
  176. S3C_PMDBG("%s(%d)\n", __func__, state);
  177. if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
  178. printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
  179. return -EINVAL;
  180. }
  181. /* check if we have anything to wake-up with... bad things seem
  182. * to happen if you suspend with no wakeup (system will often
  183. * require a full power-cycle)
  184. */
  185. if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
  186. !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
  187. printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
  188. printk(KERN_ERR "%s: Aborting sleep\n", __func__);
  189. return -EINVAL;
  190. }
  191. /* prepare check area if configured */
  192. s3c_pm_check_prepare();
  193. /* store the physical address of the register recovery block */
  194. s3c_sleep_save_phys = virt_to_phys(regs_save);
  195. S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);
  196. /* save all necessary core registers not covered by the drivers */
  197. s3c_pm_save_gpios();
  198. s3c_pm_save_uart();
  199. s3c_pm_save_core();
  200. /* set the irq configuration for wake */
  201. s3c_pm_configure_extint();
  202. S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
  203. s3c_irqwake_intmask, s3c_irqwake_eintmask);
  204. s3c_pm_arch_prepare_irqs();
  205. /* call cpu specific preparation */
  206. pm_cpu_prep();
  207. /* flush cache back to ram */
  208. flush_cache_all();
  209. s3c_pm_check_store();
  210. /* send the cpu to sleep... */
  211. s3c_pm_arch_stop_clocks();
  212. /* s3c2410_cpu_save will also act as our return point from when
  213. * we resume as it saves its own register state, so use the return
  214. * code to differentiate return from save and return from sleep */
  215. if (s3c_cpu_save(regs_save) == 0) {
  216. flush_cache_all();
  217. S3C_PMDBG("preparing to sleep\n");
  218. pm_cpu_sleep();
  219. }
  220. /* restore the cpu state using the kernel's cpu init code. */
  221. cpu_init();
  222. /* restore the system state */
  223. s3c_pm_restore_core();
  224. s3c_pm_restore_uart();
  225. s3c_pm_restore_gpios();
  226. s3c_pm_debug_init();
  227. /* check what irq (if any) restored the system */
  228. s3c_pm_arch_show_resume_irqs();
  229. S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
  230. s3c_pm_check_restore();
  231. /* ok, let's return from sleep */
  232. S3C_PMDBG("S3C PM Resume (post-restore)\n");
  233. return 0;
  234. }
  235. static struct platform_suspend_ops s3c_pm_ops = {
  236. .enter = s3c_pm_enter,
  237. .valid = suspend_valid_only_mem,
  238. };
  239. /* s3c_pm_init
  240. *
  241. * Attach the power management functions. This should be called
  242. * from the board specific initialisation if the board supports
  243. * it.
  244. */
  245. int __init s3c_pm_init(void)
  246. {
  247. printk("S3C Power Management, Copyright 2004 Simtec Electronics\n");
  248. suspend_set_ops(&s3c_pm_ops);
  249. return 0;
  250. }