intel_hdmi.c 12 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2009 Intel Corporation
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Jesse Barnes <jesse.barnes@intel.com>
  27. */
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/delay.h>
  31. #include "drmP.h"
  32. #include "drm.h"
  33. #include "drm_crtc.h"
  34. #include "drm_edid.h"
  35. #include "intel_drv.h"
  36. #include "i915_drm.h"
  37. #include "i915_drv.h"
  38. struct intel_hdmi {
  39. struct intel_encoder base;
  40. u32 sdvox_reg;
  41. int ddc_bus;
  42. uint32_t color_range;
  43. bool has_hdmi_sink;
  44. bool has_audio;
  45. int force_audio;
  46. };
  47. static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder)
  48. {
  49. return container_of(encoder, struct intel_hdmi, base.base);
  50. }
  51. static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector)
  52. {
  53. return container_of(intel_attached_encoder(connector),
  54. struct intel_hdmi, base);
  55. }
  56. void intel_dip_infoframe_csum(struct dip_infoframe *avi_if)
  57. {
  58. uint8_t *data = (uint8_t *)avi_if;
  59. uint8_t sum = 0;
  60. unsigned i;
  61. avi_if->checksum = 0;
  62. avi_if->ecc = 0;
  63. for (i = 0; i < sizeof(*avi_if); i++)
  64. sum += data[i];
  65. avi_if->checksum = 0x100 - sum;
  66. }
  67. static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder)
  68. {
  69. struct dip_infoframe avi_if = {
  70. .type = DIP_TYPE_AVI,
  71. .ver = DIP_VERSION_AVI,
  72. .len = DIP_LEN_AVI,
  73. };
  74. uint32_t *data = (uint32_t *)&avi_if;
  75. struct drm_device *dev = encoder->dev;
  76. struct drm_i915_private *dev_priv = dev->dev_private;
  77. struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
  78. u32 port;
  79. unsigned i;
  80. if (!intel_hdmi->has_hdmi_sink)
  81. return;
  82. /* XXX first guess at handling video port, is this corrent? */
  83. if (intel_hdmi->sdvox_reg == SDVOB)
  84. port = VIDEO_DIP_PORT_B;
  85. else if (intel_hdmi->sdvox_reg == SDVOC)
  86. port = VIDEO_DIP_PORT_C;
  87. else
  88. return;
  89. I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | port |
  90. VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC);
  91. intel_dip_infoframe_csum(&avi_if);
  92. for (i = 0; i < sizeof(avi_if); i += 4) {
  93. I915_WRITE(VIDEO_DIP_DATA, *data);
  94. data++;
  95. }
  96. I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | port |
  97. VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC |
  98. VIDEO_DIP_ENABLE_AVI);
  99. }
  100. static void intel_hdmi_mode_set(struct drm_encoder *encoder,
  101. struct drm_display_mode *mode,
  102. struct drm_display_mode *adjusted_mode)
  103. {
  104. struct drm_device *dev = encoder->dev;
  105. struct drm_i915_private *dev_priv = dev->dev_private;
  106. struct drm_crtc *crtc = encoder->crtc;
  107. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  108. struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
  109. u32 sdvox;
  110. sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE;
  111. sdvox |= intel_hdmi->color_range;
  112. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  113. sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
  114. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  115. sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
  116. /* Required on CPT */
  117. if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev))
  118. sdvox |= HDMI_MODE_SELECT;
  119. if (intel_hdmi->has_audio) {
  120. sdvox |= SDVO_AUDIO_ENABLE;
  121. sdvox |= SDVO_NULL_PACKETS_DURING_VSYNC;
  122. }
  123. if (intel_crtc->pipe == 1) {
  124. if (HAS_PCH_CPT(dev))
  125. sdvox |= PORT_TRANS_B_SEL_CPT;
  126. else
  127. sdvox |= SDVO_PIPE_B_SELECT;
  128. }
  129. I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
  130. POSTING_READ(intel_hdmi->sdvox_reg);
  131. intel_hdmi_set_avi_infoframe(encoder);
  132. }
  133. static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
  134. {
  135. struct drm_device *dev = encoder->dev;
  136. struct drm_i915_private *dev_priv = dev->dev_private;
  137. struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
  138. u32 temp;
  139. temp = I915_READ(intel_hdmi->sdvox_reg);
  140. /* HW workaround, need to toggle enable bit off and on for 12bpc, but
  141. * we do this anyway which shows more stable in testing.
  142. */
  143. if (HAS_PCH_SPLIT(dev)) {
  144. I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE);
  145. POSTING_READ(intel_hdmi->sdvox_reg);
  146. }
  147. if (mode != DRM_MODE_DPMS_ON) {
  148. temp &= ~SDVO_ENABLE;
  149. } else {
  150. temp |= SDVO_ENABLE;
  151. }
  152. I915_WRITE(intel_hdmi->sdvox_reg, temp);
  153. POSTING_READ(intel_hdmi->sdvox_reg);
  154. /* HW workaround, need to write this twice for issue that may result
  155. * in first write getting masked.
  156. */
  157. if (HAS_PCH_SPLIT(dev)) {
  158. I915_WRITE(intel_hdmi->sdvox_reg, temp);
  159. POSTING_READ(intel_hdmi->sdvox_reg);
  160. }
  161. }
  162. static int intel_hdmi_mode_valid(struct drm_connector *connector,
  163. struct drm_display_mode *mode)
  164. {
  165. if (mode->clock > 165000)
  166. return MODE_CLOCK_HIGH;
  167. if (mode->clock < 20000)
  168. return MODE_CLOCK_LOW;
  169. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  170. return MODE_NO_DBLESCAN;
  171. return MODE_OK;
  172. }
  173. static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
  174. struct drm_display_mode *mode,
  175. struct drm_display_mode *adjusted_mode)
  176. {
  177. return true;
  178. }
  179. static enum drm_connector_status
  180. intel_hdmi_detect(struct drm_connector *connector, bool force)
  181. {
  182. struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
  183. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  184. struct edid *edid;
  185. enum drm_connector_status status = connector_status_disconnected;
  186. intel_hdmi->has_hdmi_sink = false;
  187. intel_hdmi->has_audio = false;
  188. edid = drm_get_edid(connector,
  189. &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
  190. if (edid) {
  191. if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  192. status = connector_status_connected;
  193. intel_hdmi->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
  194. intel_hdmi->has_audio = drm_detect_monitor_audio(edid);
  195. }
  196. connector->display_info.raw_edid = NULL;
  197. kfree(edid);
  198. }
  199. if (status == connector_status_connected) {
  200. if (intel_hdmi->force_audio)
  201. intel_hdmi->has_audio = intel_hdmi->force_audio > 0;
  202. }
  203. return status;
  204. }
  205. static int intel_hdmi_get_modes(struct drm_connector *connector)
  206. {
  207. struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
  208. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  209. /* We should parse the EDID data and find out if it's an HDMI sink so
  210. * we can send audio to it.
  211. */
  212. return intel_ddc_get_modes(connector,
  213. &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
  214. }
  215. static bool
  216. intel_hdmi_detect_audio(struct drm_connector *connector)
  217. {
  218. struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
  219. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  220. struct edid *edid;
  221. bool has_audio = false;
  222. edid = drm_get_edid(connector,
  223. &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
  224. if (edid) {
  225. if (edid->input & DRM_EDID_INPUT_DIGITAL)
  226. has_audio = drm_detect_monitor_audio(edid);
  227. connector->display_info.raw_edid = NULL;
  228. kfree(edid);
  229. }
  230. return has_audio;
  231. }
  232. static int
  233. intel_hdmi_set_property(struct drm_connector *connector,
  234. struct drm_property *property,
  235. uint64_t val)
  236. {
  237. struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
  238. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  239. int ret;
  240. ret = drm_connector_property_set_value(connector, property, val);
  241. if (ret)
  242. return ret;
  243. if (property == dev_priv->force_audio_property) {
  244. int i = val;
  245. bool has_audio;
  246. if (i == intel_hdmi->force_audio)
  247. return 0;
  248. intel_hdmi->force_audio = i;
  249. if (i == 0)
  250. has_audio = intel_hdmi_detect_audio(connector);
  251. else
  252. has_audio = i > 0;
  253. if (has_audio == intel_hdmi->has_audio)
  254. return 0;
  255. intel_hdmi->has_audio = has_audio;
  256. goto done;
  257. }
  258. if (property == dev_priv->broadcast_rgb_property) {
  259. if (val == !!intel_hdmi->color_range)
  260. return 0;
  261. intel_hdmi->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
  262. goto done;
  263. }
  264. return -EINVAL;
  265. done:
  266. if (intel_hdmi->base.base.crtc) {
  267. struct drm_crtc *crtc = intel_hdmi->base.base.crtc;
  268. drm_crtc_helper_set_mode(crtc, &crtc->mode,
  269. crtc->x, crtc->y,
  270. crtc->fb);
  271. }
  272. return 0;
  273. }
  274. static void intel_hdmi_destroy(struct drm_connector *connector)
  275. {
  276. drm_sysfs_connector_remove(connector);
  277. drm_connector_cleanup(connector);
  278. kfree(connector);
  279. }
  280. static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
  281. .dpms = intel_hdmi_dpms,
  282. .mode_fixup = intel_hdmi_mode_fixup,
  283. .prepare = intel_encoder_prepare,
  284. .mode_set = intel_hdmi_mode_set,
  285. .commit = intel_encoder_commit,
  286. };
  287. static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
  288. .dpms = drm_helper_connector_dpms,
  289. .detect = intel_hdmi_detect,
  290. .fill_modes = drm_helper_probe_single_connector_modes,
  291. .set_property = intel_hdmi_set_property,
  292. .destroy = intel_hdmi_destroy,
  293. };
  294. static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
  295. .get_modes = intel_hdmi_get_modes,
  296. .mode_valid = intel_hdmi_mode_valid,
  297. .best_encoder = intel_best_encoder,
  298. };
  299. static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
  300. .destroy = intel_encoder_destroy,
  301. };
  302. static void
  303. intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector)
  304. {
  305. intel_attach_force_audio_property(connector);
  306. intel_attach_broadcast_rgb_property(connector);
  307. }
  308. void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
  309. {
  310. struct drm_i915_private *dev_priv = dev->dev_private;
  311. struct drm_connector *connector;
  312. struct intel_encoder *intel_encoder;
  313. struct intel_connector *intel_connector;
  314. struct intel_hdmi *intel_hdmi;
  315. intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL);
  316. if (!intel_hdmi)
  317. return;
  318. intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  319. if (!intel_connector) {
  320. kfree(intel_hdmi);
  321. return;
  322. }
  323. intel_encoder = &intel_hdmi->base;
  324. drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs,
  325. DRM_MODE_ENCODER_TMDS);
  326. connector = &intel_connector->base;
  327. drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
  328. DRM_MODE_CONNECTOR_HDMIA);
  329. drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
  330. intel_encoder->type = INTEL_OUTPUT_HDMI;
  331. connector->polled = DRM_CONNECTOR_POLL_HPD;
  332. connector->interlace_allowed = 0;
  333. connector->doublescan_allowed = 0;
  334. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  335. /* Set up the DDC bus. */
  336. if (sdvox_reg == SDVOB) {
  337. intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
  338. intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
  339. dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
  340. } else if (sdvox_reg == SDVOC) {
  341. intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
  342. intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
  343. dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
  344. } else if (sdvox_reg == HDMIB) {
  345. intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
  346. intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
  347. dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
  348. } else if (sdvox_reg == HDMIC) {
  349. intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
  350. intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
  351. dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
  352. } else if (sdvox_reg == HDMID) {
  353. intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
  354. intel_hdmi->ddc_bus = GMBUS_PORT_DPD;
  355. dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
  356. }
  357. intel_hdmi->sdvox_reg = sdvox_reg;
  358. drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);
  359. intel_hdmi_add_properties(intel_hdmi, connector);
  360. intel_connector_attach_encoder(intel_connector, intel_encoder);
  361. drm_sysfs_connector_add(connector);
  362. /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
  363. * 0xd. Failure to do so will result in spurious interrupts being
  364. * generated on the port when a cable is not attached.
  365. */
  366. if (IS_G4X(dev) && !IS_GM45(dev)) {
  367. u32 temp = I915_READ(PEG_BAND_GAP_DATA);
  368. I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
  369. }
  370. }