tc35815.c 88 KB

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  1. /*
  2. * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
  3. *
  4. * Based on skelton.c by Donald Becker.
  5. *
  6. * This driver is a replacement of older and less maintained version.
  7. * This is a header of the older version:
  8. * -----<snip>-----
  9. * Copyright 2001 MontaVista Software Inc.
  10. * Author: MontaVista Software, Inc.
  11. * ahennessy@mvista.com
  12. * Copyright (C) 2000-2001 Toshiba Corporation
  13. * static const char *version =
  14. * "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
  15. * -----<snip>-----
  16. *
  17. * This file is subject to the terms and conditions of the GNU General Public
  18. * License. See the file "COPYING" in the main directory of this archive
  19. * for more details.
  20. *
  21. * (C) Copyright TOSHIBA CORPORATION 2004-2005
  22. * All Rights Reserved.
  23. */
  24. #ifdef TC35815_NAPI
  25. #define DRV_VERSION "1.36-NAPI"
  26. #else
  27. #define DRV_VERSION "1.36"
  28. #endif
  29. static const char *version = "tc35815.c:v" DRV_VERSION "\n";
  30. #define MODNAME "tc35815"
  31. #include <linux/module.h>
  32. #include <linux/kernel.h>
  33. #include <linux/types.h>
  34. #include <linux/fcntl.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/ioport.h>
  37. #include <linux/in.h>
  38. #include <linux/slab.h>
  39. #include <linux/string.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/errno.h>
  42. #include <linux/init.h>
  43. #include <linux/netdevice.h>
  44. #include <linux/etherdevice.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/delay.h>
  47. #include <linux/pci.h>
  48. #include <linux/mii.h>
  49. #include <linux/ethtool.h>
  50. #include <linux/platform_device.h>
  51. #include <asm/io.h>
  52. #include <asm/byteorder.h>
  53. /* First, a few definitions that the brave might change. */
  54. #define GATHER_TXINT /* On-Demand Tx Interrupt */
  55. #define WORKAROUND_LOSTCAR
  56. #define WORKAROUND_100HALF_PROMISC
  57. /* #define TC35815_USE_PACKEDBUFFER */
  58. typedef enum {
  59. TC35815CF = 0,
  60. TC35815_NWU,
  61. TC35815_TX4939,
  62. } board_t;
  63. /* indexed by board_t, above */
  64. static const struct {
  65. const char *name;
  66. } board_info[] __devinitdata = {
  67. { "TOSHIBA TC35815CF 10/100BaseTX" },
  68. { "TOSHIBA TC35815 with Wake on LAN" },
  69. { "TOSHIBA TC35815/TX4939" },
  70. };
  71. static const struct pci_device_id tc35815_pci_tbl[] = {
  72. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
  73. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
  74. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
  75. {0,}
  76. };
  77. MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl);
  78. /* see MODULE_PARM_DESC */
  79. static struct tc35815_options {
  80. int speed;
  81. int duplex;
  82. int doforce;
  83. } options;
  84. /*
  85. * Registers
  86. */
  87. struct tc35815_regs {
  88. volatile __u32 DMA_Ctl; /* 0x00 */
  89. volatile __u32 TxFrmPtr;
  90. volatile __u32 TxThrsh;
  91. volatile __u32 TxPollCtr;
  92. volatile __u32 BLFrmPtr;
  93. volatile __u32 RxFragSize;
  94. volatile __u32 Int_En;
  95. volatile __u32 FDA_Bas;
  96. volatile __u32 FDA_Lim; /* 0x20 */
  97. volatile __u32 Int_Src;
  98. volatile __u32 unused0[2];
  99. volatile __u32 PauseCnt;
  100. volatile __u32 RemPauCnt;
  101. volatile __u32 TxCtlFrmStat;
  102. volatile __u32 unused1;
  103. volatile __u32 MAC_Ctl; /* 0x40 */
  104. volatile __u32 CAM_Ctl;
  105. volatile __u32 Tx_Ctl;
  106. volatile __u32 Tx_Stat;
  107. volatile __u32 Rx_Ctl;
  108. volatile __u32 Rx_Stat;
  109. volatile __u32 MD_Data;
  110. volatile __u32 MD_CA;
  111. volatile __u32 CAM_Adr; /* 0x60 */
  112. volatile __u32 CAM_Data;
  113. volatile __u32 CAM_Ena;
  114. volatile __u32 PROM_Ctl;
  115. volatile __u32 PROM_Data;
  116. volatile __u32 Algn_Cnt;
  117. volatile __u32 CRC_Cnt;
  118. volatile __u32 Miss_Cnt;
  119. };
  120. /*
  121. * Bit assignments
  122. */
  123. /* DMA_Ctl bit asign ------------------------------------------------------- */
  124. #define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */
  125. #define DMA_RxAlign_1 0x00400000
  126. #define DMA_RxAlign_2 0x00800000
  127. #define DMA_RxAlign_3 0x00c00000
  128. #define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */
  129. #define DMA_IntMask 0x00040000 /* 1:Interupt mask */
  130. #define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */
  131. #define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */
  132. #define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */
  133. #define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */
  134. #define DMA_TestMode 0x00002000 /* 1:Test Mode */
  135. #define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */
  136. #define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */
  137. /* RxFragSize bit asign ---------------------------------------------------- */
  138. #define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */
  139. #define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */
  140. /* MAC_Ctl bit asign ------------------------------------------------------- */
  141. #define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */
  142. #define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */
  143. #define MAC_MissRoll 0x00000400 /* 1:Missed Roll */
  144. #define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */
  145. #define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */
  146. #define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/
  147. #define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */
  148. #define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */
  149. #define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */
  150. #define MAC_Reset 0x00000004 /* 1:Software Reset */
  151. #define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */
  152. #define MAC_HaltReq 0x00000001 /* 1:Halt request */
  153. /* PROM_Ctl bit asign ------------------------------------------------------ */
  154. #define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */
  155. #define PROM_Read 0x00004000 /*10:Read operation */
  156. #define PROM_Write 0x00002000 /*01:Write operation */
  157. #define PROM_Erase 0x00006000 /*11:Erase operation */
  158. /*00:Enable or Disable Writting, */
  159. /* as specified in PROM_Addr. */
  160. #define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */
  161. /*00xxxx: disable */
  162. /* CAM_Ctl bit asign ------------------------------------------------------- */
  163. #define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */
  164. #define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/
  165. /* accept other */
  166. #define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */
  167. #define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */
  168. #define CAM_StationAcc 0x00000001 /* 1:unicast accept */
  169. /* CAM_Ena bit asign ------------------------------------------------------- */
  170. #define CAM_ENTRY_MAX 21 /* CAM Data entry max count */
  171. #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */
  172. #define CAM_Ena_Bit(index) (1<<(index))
  173. #define CAM_ENTRY_DESTINATION 0
  174. #define CAM_ENTRY_SOURCE 1
  175. #define CAM_ENTRY_MACCTL 20
  176. /* Tx_Ctl bit asign -------------------------------------------------------- */
  177. #define Tx_En 0x00000001 /* 1:Transmit enable */
  178. #define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */
  179. #define Tx_NoPad 0x00000004 /* 1:Suppress Padding */
  180. #define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */
  181. #define Tx_FBack 0x00000010 /* 1:Fast Back-off */
  182. #define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */
  183. #define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */
  184. #define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */
  185. #define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */
  186. #define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */
  187. #define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */
  188. #define Tx_EnComp 0x00004000 /* 1:Enable Completion */
  189. /* Tx_Stat bit asign ------------------------------------------------------- */
  190. #define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */
  191. #define Tx_ExColl 0x00000010 /* Excessive Collision */
  192. #define Tx_TXDefer 0x00000020 /* Transmit Defered */
  193. #define Tx_Paused 0x00000040 /* Transmit Paused */
  194. #define Tx_IntTx 0x00000080 /* Interrupt on Tx */
  195. #define Tx_Under 0x00000100 /* Underrun */
  196. #define Tx_Defer 0x00000200 /* Deferral */
  197. #define Tx_NCarr 0x00000400 /* No Carrier */
  198. #define Tx_10Stat 0x00000800 /* 10Mbps Status */
  199. #define Tx_LateColl 0x00001000 /* Late Collision */
  200. #define Tx_TxPar 0x00002000 /* Tx Parity Error */
  201. #define Tx_Comp 0x00004000 /* Completion */
  202. #define Tx_Halted 0x00008000 /* Tx Halted */
  203. #define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */
  204. /* Rx_Ctl bit asign -------------------------------------------------------- */
  205. #define Rx_EnGood 0x00004000 /* 1:Enable Good */
  206. #define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */
  207. #define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */
  208. #define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */
  209. #define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */
  210. #define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */
  211. #define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */
  212. #define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */
  213. #define Rx_ShortEn 0x00000008 /* 1:Short Enable */
  214. #define Rx_LongEn 0x00000004 /* 1:Long Enable */
  215. #define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */
  216. #define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */
  217. /* Rx_Stat bit asign ------------------------------------------------------- */
  218. #define Rx_Halted 0x00008000 /* Rx Halted */
  219. #define Rx_Good 0x00004000 /* Rx Good */
  220. #define Rx_RxPar 0x00002000 /* Rx Parity Error */
  221. /* 0x00001000 not use */
  222. #define Rx_LongErr 0x00000800 /* Rx Long Error */
  223. #define Rx_Over 0x00000400 /* Rx Overflow */
  224. #define Rx_CRCErr 0x00000200 /* Rx CRC Error */
  225. #define Rx_Align 0x00000100 /* Rx Alignment Error */
  226. #define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */
  227. #define Rx_IntRx 0x00000040 /* Rx Interrupt */
  228. #define Rx_CtlRecd 0x00000020 /* Rx Control Receive */
  229. #define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */
  230. /* Int_En bit asign -------------------------------------------------------- */
  231. #define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */
  232. #define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Control Complete Enable */
  233. #define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */
  234. #define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */
  235. #define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */
  236. #define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */
  237. #define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */
  238. #define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */
  239. #define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */
  240. #define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */
  241. #define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */
  242. #define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */
  243. /* Exhausted Enable */
  244. /* Int_Src bit asign ------------------------------------------------------- */
  245. #define Int_NRabt 0x00004000 /* 1:Non Recoverable error */
  246. #define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */
  247. #define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */
  248. #define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */
  249. #define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */
  250. #define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */
  251. #define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */
  252. #define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */
  253. #define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */
  254. #define Int_SWInt 0x00000020 /* 1:Software request & Clear */
  255. #define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */
  256. #define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */
  257. #define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */
  258. #define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */
  259. #define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */
  260. /* MD_CA bit asign --------------------------------------------------------- */
  261. #define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */
  262. #define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */
  263. #define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */
  264. /*
  265. * Descriptors
  266. */
  267. /* Frame descripter */
  268. struct FDesc {
  269. volatile __u32 FDNext;
  270. volatile __u32 FDSystem;
  271. volatile __u32 FDStat;
  272. volatile __u32 FDCtl;
  273. };
  274. /* Buffer descripter */
  275. struct BDesc {
  276. volatile __u32 BuffData;
  277. volatile __u32 BDCtl;
  278. };
  279. #define FD_ALIGN 16
  280. /* Frame Descripter bit asign ---------------------------------------------- */
  281. #define FD_FDLength_MASK 0x0000FFFF /* Length MASK */
  282. #define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */
  283. #define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */
  284. #define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */
  285. #define FD_FrmOpt_IntTx 0x20000000 /* Tx only */
  286. #define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */
  287. #define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */
  288. #define FD_FrmOpt_Packing 0x04000000 /* Rx only */
  289. #define FD_CownsFD 0x80000000 /* FD Controller owner bit */
  290. #define FD_Next_EOL 0x00000001 /* FD EOL indicator */
  291. #define FD_BDCnt_SHIFT 16
  292. /* Buffer Descripter bit asign --------------------------------------------- */
  293. #define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */
  294. #define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */
  295. #define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */
  296. #define BD_CownsBD 0x80000000 /* BD Controller owner bit */
  297. #define BD_RxBDID_SHIFT 16
  298. #define BD_RxBDSeqN_SHIFT 24
  299. /* Some useful constants. */
  300. #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
  301. #ifdef NO_CHECK_CARRIER
  302. #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
  303. Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
  304. Tx_En) /* maybe 0x7b01 */
  305. #else
  306. #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
  307. Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
  308. Tx_En) /* maybe 0x7b01 */
  309. #endif
  310. #define RX_CTL_CMD (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
  311. | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) /* maybe 0x6f01 */
  312. #define INT_EN_CMD (Int_NRAbtEn | \
  313. Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
  314. Int_SSysErrEn | Int_RMasAbtEn | Int_RTargAbtEn | \
  315. Int_STargAbtEn | \
  316. Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/
  317. #define DMA_CTL_CMD DMA_BURST_SIZE
  318. #define HAVE_DMA_RXALIGN(lp) likely((lp)->boardtype != TC35815CF)
  319. /* Tuning parameters */
  320. #define DMA_BURST_SIZE 32
  321. #define TX_THRESHOLD 1024
  322. #define TX_THRESHOLD_MAX 1536 /* used threshold with packet max byte for low pci transfer ability.*/
  323. #define TX_THRESHOLD_KEEP_LIMIT 10 /* setting threshold max value when overrun error occured this count. */
  324. /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
  325. #ifdef TC35815_USE_PACKEDBUFFER
  326. #define FD_PAGE_NUM 2
  327. #define RX_BUF_NUM 8 /* >= 2 */
  328. #define RX_FD_NUM 250 /* >= 32 */
  329. #define TX_FD_NUM 128
  330. #define RX_BUF_SIZE PAGE_SIZE
  331. #else /* TC35815_USE_PACKEDBUFFER */
  332. #define FD_PAGE_NUM 4
  333. #define RX_BUF_NUM 128 /* < 256 */
  334. #define RX_FD_NUM 256 /* >= 32 */
  335. #define TX_FD_NUM 128
  336. #if RX_CTL_CMD & Rx_LongEn
  337. #define RX_BUF_SIZE PAGE_SIZE
  338. #elif RX_CTL_CMD & Rx_StripCRC
  339. #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */
  340. #else
  341. #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */
  342. #endif
  343. #endif /* TC35815_USE_PACKEDBUFFER */
  344. #define RX_FD_RESERVE (2 / 2) /* max 2 BD per RxFD */
  345. #define NAPI_WEIGHT 16
  346. struct TxFD {
  347. struct FDesc fd;
  348. struct BDesc bd;
  349. struct BDesc unused;
  350. };
  351. struct RxFD {
  352. struct FDesc fd;
  353. struct BDesc bd[0]; /* variable length */
  354. };
  355. struct FrFD {
  356. struct FDesc fd;
  357. struct BDesc bd[RX_BUF_NUM];
  358. };
  359. #define tc_readl(addr) readl(addr)
  360. #define tc_writel(d, addr) writel(d, addr)
  361. #define TC35815_TX_TIMEOUT msecs_to_jiffies(400)
  362. /* Timer state engine. */
  363. enum tc35815_timer_state {
  364. arbwait = 0, /* Waiting for auto negotiation to complete. */
  365. lupwait = 1, /* Auto-neg complete, awaiting link-up status. */
  366. ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */
  367. asleep = 3, /* Time inactive. */
  368. lcheck = 4, /* Check link status. */
  369. };
  370. /* Information that need to be kept for each board. */
  371. struct tc35815_local {
  372. struct pci_dev *pci_dev;
  373. struct net_device *dev;
  374. struct napi_struct napi;
  375. /* statistics */
  376. struct {
  377. int max_tx_qlen;
  378. int tx_ints;
  379. int rx_ints;
  380. int tx_underrun;
  381. } lstats;
  382. /* Tx control lock. This protects the transmit buffer ring
  383. * state along with the "tx full" state of the driver. This
  384. * means all netif_queue flow control actions are protected
  385. * by this lock as well.
  386. */
  387. spinlock_t lock;
  388. int phy_addr;
  389. int fullduplex;
  390. unsigned short saved_lpa;
  391. struct timer_list timer;
  392. enum tc35815_timer_state timer_state; /* State of auto-neg timer. */
  393. unsigned int timer_ticks; /* Number of clicks at each state */
  394. /*
  395. * Transmitting: Batch Mode.
  396. * 1 BD in 1 TxFD.
  397. * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
  398. * 1 circular FD for Free Buffer List.
  399. * RX_BUF_NUM BD in Free Buffer FD.
  400. * One Free Buffer BD has PAGE_SIZE data buffer.
  401. * Or Non-Packing Mode.
  402. * 1 circular FD for Free Buffer List.
  403. * RX_BUF_NUM BD in Free Buffer FD.
  404. * One Free Buffer BD has ETH_FRAME_LEN data buffer.
  405. */
  406. void * fd_buf; /* for TxFD, RxFD, FrFD */
  407. dma_addr_t fd_buf_dma;
  408. struct TxFD *tfd_base;
  409. unsigned int tfd_start;
  410. unsigned int tfd_end;
  411. struct RxFD *rfd_base;
  412. struct RxFD *rfd_limit;
  413. struct RxFD *rfd_cur;
  414. struct FrFD *fbl_ptr;
  415. #ifdef TC35815_USE_PACKEDBUFFER
  416. unsigned char fbl_curid;
  417. void * data_buf[RX_BUF_NUM]; /* packing */
  418. dma_addr_t data_buf_dma[RX_BUF_NUM];
  419. struct {
  420. struct sk_buff *skb;
  421. dma_addr_t skb_dma;
  422. } tx_skbs[TX_FD_NUM];
  423. #else
  424. unsigned int fbl_count;
  425. struct {
  426. struct sk_buff *skb;
  427. dma_addr_t skb_dma;
  428. } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
  429. #endif
  430. struct mii_if_info mii;
  431. unsigned short mii_id[2];
  432. u32 msg_enable;
  433. board_t boardtype;
  434. };
  435. static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
  436. {
  437. return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
  438. }
  439. #ifdef DEBUG
  440. static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
  441. {
  442. return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
  443. }
  444. #endif
  445. #ifdef TC35815_USE_PACKEDBUFFER
  446. static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
  447. {
  448. int i;
  449. for (i = 0; i < RX_BUF_NUM; i++) {
  450. if (bus >= lp->data_buf_dma[i] &&
  451. bus < lp->data_buf_dma[i] + PAGE_SIZE)
  452. return (void *)((u8 *)lp->data_buf[i] +
  453. (bus - lp->data_buf_dma[i]));
  454. }
  455. return NULL;
  456. }
  457. #define TC35815_DMA_SYNC_ONDEMAND
  458. static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
  459. {
  460. #ifdef TC35815_DMA_SYNC_ONDEMAND
  461. void *buf;
  462. /* pci_map + pci_dma_sync will be more effective than
  463. * pci_alloc_consistent on some archs. */
  464. if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL)
  465. return NULL;
  466. *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
  467. PCI_DMA_FROMDEVICE);
  468. if (pci_dma_mapping_error(*dma_handle)) {
  469. free_page((unsigned long)buf);
  470. return NULL;
  471. }
  472. return buf;
  473. #else
  474. return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
  475. #endif
  476. }
  477. static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
  478. {
  479. #ifdef TC35815_DMA_SYNC_ONDEMAND
  480. pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
  481. free_page((unsigned long)buf);
  482. #else
  483. pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
  484. #endif
  485. }
  486. #else /* TC35815_USE_PACKEDBUFFER */
  487. static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
  488. struct pci_dev *hwdev,
  489. dma_addr_t *dma_handle)
  490. {
  491. struct sk_buff *skb;
  492. skb = dev_alloc_skb(RX_BUF_SIZE);
  493. if (!skb)
  494. return NULL;
  495. *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
  496. PCI_DMA_FROMDEVICE);
  497. if (pci_dma_mapping_error(*dma_handle)) {
  498. dev_kfree_skb_any(skb);
  499. return NULL;
  500. }
  501. skb_reserve(skb, 2); /* make IP header 4byte aligned */
  502. return skb;
  503. }
  504. static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
  505. {
  506. pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
  507. PCI_DMA_FROMDEVICE);
  508. dev_kfree_skb_any(skb);
  509. }
  510. #endif /* TC35815_USE_PACKEDBUFFER */
  511. /* Index to functions, as function prototypes. */
  512. static int tc35815_open(struct net_device *dev);
  513. static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
  514. static irqreturn_t tc35815_interrupt(int irq, void *dev_id);
  515. #ifdef TC35815_NAPI
  516. static int tc35815_rx(struct net_device *dev, int limit);
  517. static int tc35815_poll(struct napi_struct *napi, int budget);
  518. #else
  519. static void tc35815_rx(struct net_device *dev);
  520. #endif
  521. static void tc35815_txdone(struct net_device *dev);
  522. static int tc35815_close(struct net_device *dev);
  523. static struct net_device_stats *tc35815_get_stats(struct net_device *dev);
  524. static void tc35815_set_multicast_list(struct net_device *dev);
  525. static void tc35815_tx_timeout(struct net_device *dev);
  526. static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
  527. #ifdef CONFIG_NET_POLL_CONTROLLER
  528. static void tc35815_poll_controller(struct net_device *dev);
  529. #endif
  530. static const struct ethtool_ops tc35815_ethtool_ops;
  531. /* Example routines you must write ;->. */
  532. static void tc35815_chip_reset(struct net_device *dev);
  533. static void tc35815_chip_init(struct net_device *dev);
  534. static void tc35815_find_phy(struct net_device *dev);
  535. static void tc35815_phy_chip_init(struct net_device *dev);
  536. #ifdef DEBUG
  537. static void panic_queues(struct net_device *dev);
  538. #endif
  539. static void tc35815_timer(unsigned long data);
  540. static void tc35815_start_auto_negotiation(struct net_device *dev,
  541. struct ethtool_cmd *ep);
  542. static int tc_mdio_read(struct net_device *dev, int phy_id, int location);
  543. static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
  544. int val);
  545. #ifdef CONFIG_CPU_TX49XX
  546. /*
  547. * Find a platform_device providing a MAC address. The platform code
  548. * should provide a "tc35815-mac" device with a MAC address in its
  549. * platform_data.
  550. */
  551. static int __devinit tc35815_mac_match(struct device *dev, void *data)
  552. {
  553. struct platform_device *plat_dev = to_platform_device(dev);
  554. struct pci_dev *pci_dev = data;
  555. unsigned int id = pci_dev->irq;
  556. return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id;
  557. }
  558. static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
  559. {
  560. struct tc35815_local *lp = netdev_priv(dev);
  561. struct device *pd = bus_find_device(&platform_bus_type, NULL,
  562. lp->pci_dev, tc35815_mac_match);
  563. if (pd) {
  564. if (pd->platform_data)
  565. memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN);
  566. put_device(pd);
  567. return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV;
  568. }
  569. return -ENODEV;
  570. }
  571. #else
  572. static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
  573. {
  574. return -ENODEV;
  575. }
  576. #endif
  577. static int __devinit tc35815_init_dev_addr (struct net_device *dev)
  578. {
  579. struct tc35815_regs __iomem *tr =
  580. (struct tc35815_regs __iomem *)dev->base_addr;
  581. int i;
  582. while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
  583. ;
  584. for (i = 0; i < 6; i += 2) {
  585. unsigned short data;
  586. tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
  587. while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
  588. ;
  589. data = tc_readl(&tr->PROM_Data);
  590. dev->dev_addr[i] = data & 0xff;
  591. dev->dev_addr[i+1] = data >> 8;
  592. }
  593. if (!is_valid_ether_addr(dev->dev_addr))
  594. return tc35815_read_plat_dev_addr(dev);
  595. return 0;
  596. }
  597. static int __devinit tc35815_init_one (struct pci_dev *pdev,
  598. const struct pci_device_id *ent)
  599. {
  600. void __iomem *ioaddr = NULL;
  601. struct net_device *dev;
  602. struct tc35815_local *lp;
  603. int rc;
  604. unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
  605. DECLARE_MAC_BUF(mac);
  606. static int printed_version;
  607. if (!printed_version++) {
  608. printk(version);
  609. dev_printk(KERN_DEBUG, &pdev->dev,
  610. "speed:%d duplex:%d doforce:%d\n",
  611. options.speed, options.duplex, options.doforce);
  612. }
  613. if (!pdev->irq) {
  614. dev_warn(&pdev->dev, "no IRQ assigned.\n");
  615. return -ENODEV;
  616. }
  617. /* dev zeroed in alloc_etherdev */
  618. dev = alloc_etherdev (sizeof (*lp));
  619. if (dev == NULL) {
  620. dev_err(&pdev->dev, "unable to alloc new ethernet\n");
  621. return -ENOMEM;
  622. }
  623. SET_NETDEV_DEV(dev, &pdev->dev);
  624. lp = netdev_priv(dev);
  625. lp->dev = dev;
  626. /* enable device (incl. PCI PM wakeup), and bus-mastering */
  627. rc = pci_enable_device (pdev);
  628. if (rc)
  629. goto err_out;
  630. mmio_start = pci_resource_start (pdev, 1);
  631. mmio_end = pci_resource_end (pdev, 1);
  632. mmio_flags = pci_resource_flags (pdev, 1);
  633. mmio_len = pci_resource_len (pdev, 1);
  634. /* set this immediately, we need to know before
  635. * we talk to the chip directly */
  636. /* make sure PCI base addr 1 is MMIO */
  637. if (!(mmio_flags & IORESOURCE_MEM)) {
  638. dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
  639. rc = -ENODEV;
  640. goto err_out;
  641. }
  642. /* check for weird/broken PCI region reporting */
  643. if ((mmio_len < sizeof(struct tc35815_regs))) {
  644. dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n");
  645. rc = -ENODEV;
  646. goto err_out;
  647. }
  648. rc = pci_request_regions (pdev, MODNAME);
  649. if (rc)
  650. goto err_out;
  651. pci_set_master (pdev);
  652. /* ioremap MMIO region */
  653. ioaddr = ioremap (mmio_start, mmio_len);
  654. if (ioaddr == NULL) {
  655. dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
  656. rc = -EIO;
  657. goto err_out_free_res;
  658. }
  659. /* Initialize the device structure. */
  660. dev->open = tc35815_open;
  661. dev->hard_start_xmit = tc35815_send_packet;
  662. dev->stop = tc35815_close;
  663. dev->get_stats = tc35815_get_stats;
  664. dev->set_multicast_list = tc35815_set_multicast_list;
  665. dev->do_ioctl = tc35815_ioctl;
  666. dev->ethtool_ops = &tc35815_ethtool_ops;
  667. dev->tx_timeout = tc35815_tx_timeout;
  668. dev->watchdog_timeo = TC35815_TX_TIMEOUT;
  669. #ifdef TC35815_NAPI
  670. netif_napi_add(dev, &lp->napi, tc35815_poll, NAPI_WEIGHT);
  671. #endif
  672. #ifdef CONFIG_NET_POLL_CONTROLLER
  673. dev->poll_controller = tc35815_poll_controller;
  674. #endif
  675. dev->irq = pdev->irq;
  676. dev->base_addr = (unsigned long) ioaddr;
  677. spin_lock_init(&lp->lock);
  678. lp->pci_dev = pdev;
  679. lp->boardtype = ent->driver_data;
  680. lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
  681. pci_set_drvdata(pdev, dev);
  682. /* Soft reset the chip. */
  683. tc35815_chip_reset(dev);
  684. /* Retrieve the ethernet address. */
  685. if (tc35815_init_dev_addr(dev)) {
  686. dev_warn(&pdev->dev, "not valid ether addr\n");
  687. random_ether_addr(dev->dev_addr);
  688. }
  689. rc = register_netdev (dev);
  690. if (rc)
  691. goto err_out_unmap;
  692. memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
  693. printk(KERN_INFO "%s: %s at 0x%lx, %s, IRQ %d\n",
  694. dev->name,
  695. board_info[ent->driver_data].name,
  696. dev->base_addr,
  697. print_mac(mac, dev->dev_addr),
  698. dev->irq);
  699. setup_timer(&lp->timer, tc35815_timer, (unsigned long) dev);
  700. lp->mii.dev = dev;
  701. lp->mii.mdio_read = tc_mdio_read;
  702. lp->mii.mdio_write = tc_mdio_write;
  703. lp->mii.phy_id_mask = 0x1f;
  704. lp->mii.reg_num_mask = 0x1f;
  705. tc35815_find_phy(dev);
  706. lp->mii.phy_id = lp->phy_addr;
  707. lp->mii.full_duplex = 0;
  708. lp->mii.force_media = 0;
  709. return 0;
  710. err_out_unmap:
  711. iounmap(ioaddr);
  712. err_out_free_res:
  713. pci_release_regions (pdev);
  714. err_out:
  715. free_netdev (dev);
  716. return rc;
  717. }
  718. static void __devexit tc35815_remove_one (struct pci_dev *pdev)
  719. {
  720. struct net_device *dev = pci_get_drvdata (pdev);
  721. unsigned long mmio_addr;
  722. mmio_addr = dev->base_addr;
  723. unregister_netdev (dev);
  724. if (mmio_addr) {
  725. iounmap ((void __iomem *)mmio_addr);
  726. pci_release_regions (pdev);
  727. }
  728. free_netdev (dev);
  729. pci_set_drvdata (pdev, NULL);
  730. }
  731. static int
  732. tc35815_init_queues(struct net_device *dev)
  733. {
  734. struct tc35815_local *lp = netdev_priv(dev);
  735. int i;
  736. unsigned long fd_addr;
  737. if (!lp->fd_buf) {
  738. BUG_ON(sizeof(struct FDesc) +
  739. sizeof(struct BDesc) * RX_BUF_NUM +
  740. sizeof(struct FDesc) * RX_FD_NUM +
  741. sizeof(struct TxFD) * TX_FD_NUM >
  742. PAGE_SIZE * FD_PAGE_NUM);
  743. if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0)
  744. return -ENOMEM;
  745. for (i = 0; i < RX_BUF_NUM; i++) {
  746. #ifdef TC35815_USE_PACKEDBUFFER
  747. if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) {
  748. while (--i >= 0) {
  749. free_rxbuf_page(lp->pci_dev,
  750. lp->data_buf[i],
  751. lp->data_buf_dma[i]);
  752. lp->data_buf[i] = NULL;
  753. }
  754. pci_free_consistent(lp->pci_dev,
  755. PAGE_SIZE * FD_PAGE_NUM,
  756. lp->fd_buf,
  757. lp->fd_buf_dma);
  758. lp->fd_buf = NULL;
  759. return -ENOMEM;
  760. }
  761. #else
  762. lp->rx_skbs[i].skb =
  763. alloc_rxbuf_skb(dev, lp->pci_dev,
  764. &lp->rx_skbs[i].skb_dma);
  765. if (!lp->rx_skbs[i].skb) {
  766. while (--i >= 0) {
  767. free_rxbuf_skb(lp->pci_dev,
  768. lp->rx_skbs[i].skb,
  769. lp->rx_skbs[i].skb_dma);
  770. lp->rx_skbs[i].skb = NULL;
  771. }
  772. pci_free_consistent(lp->pci_dev,
  773. PAGE_SIZE * FD_PAGE_NUM,
  774. lp->fd_buf,
  775. lp->fd_buf_dma);
  776. lp->fd_buf = NULL;
  777. return -ENOMEM;
  778. }
  779. #endif
  780. }
  781. printk(KERN_DEBUG "%s: FD buf %p DataBuf",
  782. dev->name, lp->fd_buf);
  783. #ifdef TC35815_USE_PACKEDBUFFER
  784. printk(" DataBuf");
  785. for (i = 0; i < RX_BUF_NUM; i++)
  786. printk(" %p", lp->data_buf[i]);
  787. #endif
  788. printk("\n");
  789. } else {
  790. for (i = 0; i < FD_PAGE_NUM; i++) {
  791. clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE));
  792. }
  793. }
  794. fd_addr = (unsigned long)lp->fd_buf;
  795. /* Free Descriptors (for Receive) */
  796. lp->rfd_base = (struct RxFD *)fd_addr;
  797. fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
  798. for (i = 0; i < RX_FD_NUM; i++) {
  799. lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
  800. }
  801. lp->rfd_cur = lp->rfd_base;
  802. lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
  803. /* Transmit Descriptors */
  804. lp->tfd_base = (struct TxFD *)fd_addr;
  805. fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
  806. for (i = 0; i < TX_FD_NUM; i++) {
  807. lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
  808. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  809. lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
  810. }
  811. lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
  812. lp->tfd_start = 0;
  813. lp->tfd_end = 0;
  814. /* Buffer List (for Receive) */
  815. lp->fbl_ptr = (struct FrFD *)fd_addr;
  816. lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
  817. lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
  818. #ifndef TC35815_USE_PACKEDBUFFER
  819. /*
  820. * move all allocated skbs to head of rx_skbs[] array.
  821. * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
  822. * tc35815_rx() had failed.
  823. */
  824. lp->fbl_count = 0;
  825. for (i = 0; i < RX_BUF_NUM; i++) {
  826. if (lp->rx_skbs[i].skb) {
  827. if (i != lp->fbl_count) {
  828. lp->rx_skbs[lp->fbl_count].skb =
  829. lp->rx_skbs[i].skb;
  830. lp->rx_skbs[lp->fbl_count].skb_dma =
  831. lp->rx_skbs[i].skb_dma;
  832. }
  833. lp->fbl_count++;
  834. }
  835. }
  836. #endif
  837. for (i = 0; i < RX_BUF_NUM; i++) {
  838. #ifdef TC35815_USE_PACKEDBUFFER
  839. lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
  840. #else
  841. if (i >= lp->fbl_count) {
  842. lp->fbl_ptr->bd[i].BuffData = 0;
  843. lp->fbl_ptr->bd[i].BDCtl = 0;
  844. continue;
  845. }
  846. lp->fbl_ptr->bd[i].BuffData =
  847. cpu_to_le32(lp->rx_skbs[i].skb_dma);
  848. #endif
  849. /* BDID is index of FrFD.bd[] */
  850. lp->fbl_ptr->bd[i].BDCtl =
  851. cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
  852. RX_BUF_SIZE);
  853. }
  854. #ifdef TC35815_USE_PACKEDBUFFER
  855. lp->fbl_curid = 0;
  856. #endif
  857. printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
  858. dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
  859. return 0;
  860. }
  861. static void
  862. tc35815_clear_queues(struct net_device *dev)
  863. {
  864. struct tc35815_local *lp = netdev_priv(dev);
  865. int i;
  866. for (i = 0; i < TX_FD_NUM; i++) {
  867. u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
  868. struct sk_buff *skb =
  869. fdsystem != 0xffffffff ?
  870. lp->tx_skbs[fdsystem].skb : NULL;
  871. #ifdef DEBUG
  872. if (lp->tx_skbs[i].skb != skb) {
  873. printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
  874. panic_queues(dev);
  875. }
  876. #else
  877. BUG_ON(lp->tx_skbs[i].skb != skb);
  878. #endif
  879. if (skb) {
  880. pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
  881. lp->tx_skbs[i].skb = NULL;
  882. lp->tx_skbs[i].skb_dma = 0;
  883. dev_kfree_skb_any(skb);
  884. }
  885. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  886. }
  887. tc35815_init_queues(dev);
  888. }
  889. static void
  890. tc35815_free_queues(struct net_device *dev)
  891. {
  892. struct tc35815_local *lp = netdev_priv(dev);
  893. int i;
  894. if (lp->tfd_base) {
  895. for (i = 0; i < TX_FD_NUM; i++) {
  896. u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
  897. struct sk_buff *skb =
  898. fdsystem != 0xffffffff ?
  899. lp->tx_skbs[fdsystem].skb : NULL;
  900. #ifdef DEBUG
  901. if (lp->tx_skbs[i].skb != skb) {
  902. printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
  903. panic_queues(dev);
  904. }
  905. #else
  906. BUG_ON(lp->tx_skbs[i].skb != skb);
  907. #endif
  908. if (skb) {
  909. dev_kfree_skb(skb);
  910. pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
  911. lp->tx_skbs[i].skb = NULL;
  912. lp->tx_skbs[i].skb_dma = 0;
  913. }
  914. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  915. }
  916. }
  917. lp->rfd_base = NULL;
  918. lp->rfd_limit = NULL;
  919. lp->rfd_cur = NULL;
  920. lp->fbl_ptr = NULL;
  921. for (i = 0; i < RX_BUF_NUM; i++) {
  922. #ifdef TC35815_USE_PACKEDBUFFER
  923. if (lp->data_buf[i]) {
  924. free_rxbuf_page(lp->pci_dev,
  925. lp->data_buf[i], lp->data_buf_dma[i]);
  926. lp->data_buf[i] = NULL;
  927. }
  928. #else
  929. if (lp->rx_skbs[i].skb) {
  930. free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
  931. lp->rx_skbs[i].skb_dma);
  932. lp->rx_skbs[i].skb = NULL;
  933. }
  934. #endif
  935. }
  936. if (lp->fd_buf) {
  937. pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
  938. lp->fd_buf, lp->fd_buf_dma);
  939. lp->fd_buf = NULL;
  940. }
  941. }
  942. static void
  943. dump_txfd(struct TxFD *fd)
  944. {
  945. printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
  946. le32_to_cpu(fd->fd.FDNext),
  947. le32_to_cpu(fd->fd.FDSystem),
  948. le32_to_cpu(fd->fd.FDStat),
  949. le32_to_cpu(fd->fd.FDCtl));
  950. printk("BD: ");
  951. printk(" %08x %08x",
  952. le32_to_cpu(fd->bd.BuffData),
  953. le32_to_cpu(fd->bd.BDCtl));
  954. printk("\n");
  955. }
  956. static int
  957. dump_rxfd(struct RxFD *fd)
  958. {
  959. int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
  960. if (bd_count > 8)
  961. bd_count = 8;
  962. printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
  963. le32_to_cpu(fd->fd.FDNext),
  964. le32_to_cpu(fd->fd.FDSystem),
  965. le32_to_cpu(fd->fd.FDStat),
  966. le32_to_cpu(fd->fd.FDCtl));
  967. if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
  968. return 0;
  969. printk("BD: ");
  970. for (i = 0; i < bd_count; i++)
  971. printk(" %08x %08x",
  972. le32_to_cpu(fd->bd[i].BuffData),
  973. le32_to_cpu(fd->bd[i].BDCtl));
  974. printk("\n");
  975. return bd_count;
  976. }
  977. #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
  978. static void
  979. dump_frfd(struct FrFD *fd)
  980. {
  981. int i;
  982. printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
  983. le32_to_cpu(fd->fd.FDNext),
  984. le32_to_cpu(fd->fd.FDSystem),
  985. le32_to_cpu(fd->fd.FDStat),
  986. le32_to_cpu(fd->fd.FDCtl));
  987. printk("BD: ");
  988. for (i = 0; i < RX_BUF_NUM; i++)
  989. printk(" %08x %08x",
  990. le32_to_cpu(fd->bd[i].BuffData),
  991. le32_to_cpu(fd->bd[i].BDCtl));
  992. printk("\n");
  993. }
  994. #endif
  995. #ifdef DEBUG
  996. static void
  997. panic_queues(struct net_device *dev)
  998. {
  999. struct tc35815_local *lp = netdev_priv(dev);
  1000. int i;
  1001. printk("TxFD base %p, start %u, end %u\n",
  1002. lp->tfd_base, lp->tfd_start, lp->tfd_end);
  1003. printk("RxFD base %p limit %p cur %p\n",
  1004. lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
  1005. printk("FrFD %p\n", lp->fbl_ptr);
  1006. for (i = 0; i < TX_FD_NUM; i++)
  1007. dump_txfd(&lp->tfd_base[i]);
  1008. for (i = 0; i < RX_FD_NUM; i++) {
  1009. int bd_count = dump_rxfd(&lp->rfd_base[i]);
  1010. i += (bd_count + 1) / 2; /* skip BDs */
  1011. }
  1012. dump_frfd(lp->fbl_ptr);
  1013. panic("%s: Illegal queue state.", dev->name);
  1014. }
  1015. #endif
  1016. static void print_eth(const u8 *add)
  1017. {
  1018. DECLARE_MAC_BUF(mac);
  1019. printk(KERN_DEBUG "print_eth(%p)\n", add);
  1020. printk(KERN_DEBUG " %s =>", print_mac(mac, add + 6));
  1021. printk(KERN_CONT " %s : %02x%02x\n",
  1022. print_mac(mac, add), add[12], add[13]);
  1023. }
  1024. static int tc35815_tx_full(struct net_device *dev)
  1025. {
  1026. struct tc35815_local *lp = netdev_priv(dev);
  1027. return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
  1028. }
  1029. static void tc35815_restart(struct net_device *dev)
  1030. {
  1031. struct tc35815_local *lp = netdev_priv(dev);
  1032. int pid = lp->phy_addr;
  1033. int do_phy_reset = 1;
  1034. del_timer(&lp->timer); /* Kill if running */
  1035. if (lp->mii_id[0] == 0x0016 && (lp->mii_id[1] & 0xfc00) == 0xf800) {
  1036. /* Resetting PHY cause problem on some chip... (SEEQ 80221) */
  1037. do_phy_reset = 0;
  1038. }
  1039. if (do_phy_reset) {
  1040. int timeout;
  1041. tc_mdio_write(dev, pid, MII_BMCR, BMCR_RESET);
  1042. timeout = 100;
  1043. while (--timeout) {
  1044. if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_RESET))
  1045. break;
  1046. udelay(1);
  1047. }
  1048. if (!timeout)
  1049. printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
  1050. }
  1051. tc35815_chip_reset(dev);
  1052. tc35815_clear_queues(dev);
  1053. tc35815_chip_init(dev);
  1054. /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
  1055. tc35815_set_multicast_list(dev);
  1056. }
  1057. static void tc35815_tx_timeout(struct net_device *dev)
  1058. {
  1059. struct tc35815_local *lp = netdev_priv(dev);
  1060. struct tc35815_regs __iomem *tr =
  1061. (struct tc35815_regs __iomem *)dev->base_addr;
  1062. printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
  1063. dev->name, tc_readl(&tr->Tx_Stat));
  1064. /* Try to restart the adaptor. */
  1065. spin_lock_irq(&lp->lock);
  1066. tc35815_restart(dev);
  1067. spin_unlock_irq(&lp->lock);
  1068. dev->stats.tx_errors++;
  1069. /* If we have space available to accept new transmit
  1070. * requests, wake up the queueing layer. This would
  1071. * be the case if the chipset_init() call above just
  1072. * flushes out the tx queue and empties it.
  1073. *
  1074. * If instead, the tx queue is retained then the
  1075. * netif_wake_queue() call should be placed in the
  1076. * TX completion interrupt handler of the driver instead
  1077. * of here.
  1078. */
  1079. if (!tc35815_tx_full(dev))
  1080. netif_wake_queue(dev);
  1081. }
  1082. /*
  1083. * Open/initialize the board. This is called (in the current kernel)
  1084. * sometime after booting when the 'ifconfig' program is run.
  1085. *
  1086. * This routine should set everything up anew at each open, even
  1087. * registers that "should" only need to be set once at boot, so that
  1088. * there is non-reboot way to recover if something goes wrong.
  1089. */
  1090. static int
  1091. tc35815_open(struct net_device *dev)
  1092. {
  1093. struct tc35815_local *lp = netdev_priv(dev);
  1094. /*
  1095. * This is used if the interrupt line can turned off (shared).
  1096. * See 3c503.c for an example of selecting the IRQ at config-time.
  1097. */
  1098. if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) {
  1099. return -EAGAIN;
  1100. }
  1101. del_timer(&lp->timer); /* Kill if running */
  1102. tc35815_chip_reset(dev);
  1103. if (tc35815_init_queues(dev) != 0) {
  1104. free_irq(dev->irq, dev);
  1105. return -EAGAIN;
  1106. }
  1107. #ifdef TC35815_NAPI
  1108. napi_enable(&lp->napi);
  1109. #endif
  1110. /* Reset the hardware here. Don't forget to set the station address. */
  1111. spin_lock_irq(&lp->lock);
  1112. tc35815_chip_init(dev);
  1113. spin_unlock_irq(&lp->lock);
  1114. /* We are now ready to accept transmit requeusts from
  1115. * the queueing layer of the networking.
  1116. */
  1117. netif_start_queue(dev);
  1118. return 0;
  1119. }
  1120. /* This will only be invoked if your driver is _not_ in XOFF state.
  1121. * What this means is that you need not check it, and that this
  1122. * invariant will hold if you make sure that the netif_*_queue()
  1123. * calls are done at the proper times.
  1124. */
  1125. static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
  1126. {
  1127. struct tc35815_local *lp = netdev_priv(dev);
  1128. struct TxFD *txfd;
  1129. unsigned long flags;
  1130. /* If some error occurs while trying to transmit this
  1131. * packet, you should return '1' from this function.
  1132. * In such a case you _may not_ do anything to the
  1133. * SKB, it is still owned by the network queueing
  1134. * layer when an error is returned. This means you
  1135. * may not modify any SKB fields, you may not free
  1136. * the SKB, etc.
  1137. */
  1138. /* This is the most common case for modern hardware.
  1139. * The spinlock protects this code from the TX complete
  1140. * hardware interrupt handler. Queue flow control is
  1141. * thus managed under this lock as well.
  1142. */
  1143. spin_lock_irqsave(&lp->lock, flags);
  1144. /* failsafe... (handle txdone now if half of FDs are used) */
  1145. if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
  1146. TX_FD_NUM / 2)
  1147. tc35815_txdone(dev);
  1148. if (netif_msg_pktdata(lp))
  1149. print_eth(skb->data);
  1150. #ifdef DEBUG
  1151. if (lp->tx_skbs[lp->tfd_start].skb) {
  1152. printk("%s: tx_skbs conflict.\n", dev->name);
  1153. panic_queues(dev);
  1154. }
  1155. #else
  1156. BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
  1157. #endif
  1158. lp->tx_skbs[lp->tfd_start].skb = skb;
  1159. lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
  1160. /*add to ring */
  1161. txfd = &lp->tfd_base[lp->tfd_start];
  1162. txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
  1163. txfd->bd.BDCtl = cpu_to_le32(skb->len);
  1164. txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
  1165. txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
  1166. if (lp->tfd_start == lp->tfd_end) {
  1167. struct tc35815_regs __iomem *tr =
  1168. (struct tc35815_regs __iomem *)dev->base_addr;
  1169. /* Start DMA Transmitter. */
  1170. txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
  1171. #ifdef GATHER_TXINT
  1172. txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
  1173. #endif
  1174. if (netif_msg_tx_queued(lp)) {
  1175. printk("%s: starting TxFD.\n", dev->name);
  1176. dump_txfd(txfd);
  1177. }
  1178. tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
  1179. } else {
  1180. txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
  1181. if (netif_msg_tx_queued(lp)) {
  1182. printk("%s: queueing TxFD.\n", dev->name);
  1183. dump_txfd(txfd);
  1184. }
  1185. }
  1186. lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
  1187. dev->trans_start = jiffies;
  1188. /* If we just used up the very last entry in the
  1189. * TX ring on this device, tell the queueing
  1190. * layer to send no more.
  1191. */
  1192. if (tc35815_tx_full(dev)) {
  1193. if (netif_msg_tx_queued(lp))
  1194. printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
  1195. netif_stop_queue(dev);
  1196. }
  1197. /* When the TX completion hw interrupt arrives, this
  1198. * is when the transmit statistics are updated.
  1199. */
  1200. spin_unlock_irqrestore(&lp->lock, flags);
  1201. return 0;
  1202. }
  1203. #define FATAL_ERROR_INT \
  1204. (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
  1205. static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
  1206. {
  1207. static int count;
  1208. printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
  1209. dev->name, status);
  1210. if (status & Int_IntPCI)
  1211. printk(" IntPCI");
  1212. if (status & Int_DmParErr)
  1213. printk(" DmParErr");
  1214. if (status & Int_IntNRAbt)
  1215. printk(" IntNRAbt");
  1216. printk("\n");
  1217. if (count++ > 100)
  1218. panic("%s: Too many fatal errors.", dev->name);
  1219. printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
  1220. /* Try to restart the adaptor. */
  1221. tc35815_restart(dev);
  1222. }
  1223. #ifdef TC35815_NAPI
  1224. static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
  1225. #else
  1226. static int tc35815_do_interrupt(struct net_device *dev, u32 status)
  1227. #endif
  1228. {
  1229. struct tc35815_local *lp = netdev_priv(dev);
  1230. struct tc35815_regs __iomem *tr =
  1231. (struct tc35815_regs __iomem *)dev->base_addr;
  1232. int ret = -1;
  1233. /* Fatal errors... */
  1234. if (status & FATAL_ERROR_INT) {
  1235. tc35815_fatal_error_interrupt(dev, status);
  1236. return 0;
  1237. }
  1238. /* recoverable errors */
  1239. if (status & Int_IntFDAEx) {
  1240. /* disable FDAEx int. (until we make rooms...) */
  1241. tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En);
  1242. printk(KERN_WARNING
  1243. "%s: Free Descriptor Area Exhausted (%#x).\n",
  1244. dev->name, status);
  1245. dev->stats.rx_dropped++;
  1246. ret = 0;
  1247. }
  1248. if (status & Int_IntBLEx) {
  1249. /* disable BLEx int. (until we make rooms...) */
  1250. tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En);
  1251. printk(KERN_WARNING
  1252. "%s: Buffer List Exhausted (%#x).\n",
  1253. dev->name, status);
  1254. dev->stats.rx_dropped++;
  1255. ret = 0;
  1256. }
  1257. if (status & Int_IntExBD) {
  1258. printk(KERN_WARNING
  1259. "%s: Excessive Buffer Descriptiors (%#x).\n",
  1260. dev->name, status);
  1261. dev->stats.rx_length_errors++;
  1262. ret = 0;
  1263. }
  1264. /* normal notification */
  1265. if (status & Int_IntMacRx) {
  1266. /* Got a packet(s). */
  1267. #ifdef TC35815_NAPI
  1268. ret = tc35815_rx(dev, limit);
  1269. #else
  1270. tc35815_rx(dev);
  1271. ret = 0;
  1272. #endif
  1273. lp->lstats.rx_ints++;
  1274. }
  1275. if (status & Int_IntMacTx) {
  1276. /* Transmit complete. */
  1277. lp->lstats.tx_ints++;
  1278. tc35815_txdone(dev);
  1279. netif_wake_queue(dev);
  1280. ret = 0;
  1281. }
  1282. return ret;
  1283. }
  1284. /*
  1285. * The typical workload of the driver:
  1286. * Handle the network interface interrupts.
  1287. */
  1288. static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
  1289. {
  1290. struct net_device *dev = dev_id;
  1291. struct tc35815_local *lp = netdev_priv(dev);
  1292. struct tc35815_regs __iomem *tr =
  1293. (struct tc35815_regs __iomem *)dev->base_addr;
  1294. #ifdef TC35815_NAPI
  1295. u32 dmactl = tc_readl(&tr->DMA_Ctl);
  1296. if (!(dmactl & DMA_IntMask)) {
  1297. /* disable interrupts */
  1298. tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
  1299. if (netif_rx_schedule_prep(dev, &lp->napi))
  1300. __netif_rx_schedule(dev, &lp->napi);
  1301. else {
  1302. printk(KERN_ERR "%s: interrupt taken in poll\n",
  1303. dev->name);
  1304. BUG();
  1305. }
  1306. (void)tc_readl(&tr->Int_Src); /* flush */
  1307. return IRQ_HANDLED;
  1308. }
  1309. return IRQ_NONE;
  1310. #else
  1311. int handled;
  1312. u32 status;
  1313. spin_lock(&lp->lock);
  1314. status = tc_readl(&tr->Int_Src);
  1315. tc_writel(status, &tr->Int_Src); /* write to clear */
  1316. handled = tc35815_do_interrupt(dev, status);
  1317. (void)tc_readl(&tr->Int_Src); /* flush */
  1318. spin_unlock(&lp->lock);
  1319. return IRQ_RETVAL(handled >= 0);
  1320. #endif /* TC35815_NAPI */
  1321. }
  1322. #ifdef CONFIG_NET_POLL_CONTROLLER
  1323. static void tc35815_poll_controller(struct net_device *dev)
  1324. {
  1325. disable_irq(dev->irq);
  1326. tc35815_interrupt(dev->irq, dev);
  1327. enable_irq(dev->irq);
  1328. }
  1329. #endif
  1330. /* We have a good packet(s), get it/them out of the buffers. */
  1331. #ifdef TC35815_NAPI
  1332. static int
  1333. tc35815_rx(struct net_device *dev, int limit)
  1334. #else
  1335. static void
  1336. tc35815_rx(struct net_device *dev)
  1337. #endif
  1338. {
  1339. struct tc35815_local *lp = netdev_priv(dev);
  1340. unsigned int fdctl;
  1341. int i;
  1342. int buf_free_count = 0;
  1343. int fd_free_count = 0;
  1344. #ifdef TC35815_NAPI
  1345. int received = 0;
  1346. #endif
  1347. while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
  1348. int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
  1349. int pkt_len = fdctl & FD_FDLength_MASK;
  1350. int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
  1351. #ifdef DEBUG
  1352. struct RxFD *next_rfd;
  1353. #endif
  1354. #if (RX_CTL_CMD & Rx_StripCRC) == 0
  1355. pkt_len -= 4;
  1356. #endif
  1357. if (netif_msg_rx_status(lp))
  1358. dump_rxfd(lp->rfd_cur);
  1359. if (status & Rx_Good) {
  1360. struct sk_buff *skb;
  1361. unsigned char *data;
  1362. int cur_bd;
  1363. #ifdef TC35815_USE_PACKEDBUFFER
  1364. int offset;
  1365. #endif
  1366. #ifdef TC35815_NAPI
  1367. if (--limit < 0)
  1368. break;
  1369. #endif
  1370. #ifdef TC35815_USE_PACKEDBUFFER
  1371. BUG_ON(bd_count > 2);
  1372. skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */
  1373. if (skb == NULL) {
  1374. printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
  1375. dev->name);
  1376. dev->stats.rx_dropped++;
  1377. break;
  1378. }
  1379. skb_reserve(skb, 2); /* 16 bit alignment */
  1380. data = skb_put(skb, pkt_len);
  1381. /* copy from receive buffer */
  1382. cur_bd = 0;
  1383. offset = 0;
  1384. while (offset < pkt_len && cur_bd < bd_count) {
  1385. int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
  1386. BD_BuffLength_MASK;
  1387. dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
  1388. void *rxbuf = rxbuf_bus_to_virt(lp, dma);
  1389. if (offset + len > pkt_len)
  1390. len = pkt_len - offset;
  1391. #ifdef TC35815_DMA_SYNC_ONDEMAND
  1392. pci_dma_sync_single_for_cpu(lp->pci_dev,
  1393. dma, len,
  1394. PCI_DMA_FROMDEVICE);
  1395. #endif
  1396. memcpy(data + offset, rxbuf, len);
  1397. #ifdef TC35815_DMA_SYNC_ONDEMAND
  1398. pci_dma_sync_single_for_device(lp->pci_dev,
  1399. dma, len,
  1400. PCI_DMA_FROMDEVICE);
  1401. #endif
  1402. offset += len;
  1403. cur_bd++;
  1404. }
  1405. #else /* TC35815_USE_PACKEDBUFFER */
  1406. BUG_ON(bd_count > 1);
  1407. cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
  1408. & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
  1409. #ifdef DEBUG
  1410. if (cur_bd >= RX_BUF_NUM) {
  1411. printk("%s: invalid BDID.\n", dev->name);
  1412. panic_queues(dev);
  1413. }
  1414. BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
  1415. (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
  1416. if (!lp->rx_skbs[cur_bd].skb) {
  1417. printk("%s: NULL skb.\n", dev->name);
  1418. panic_queues(dev);
  1419. }
  1420. #else
  1421. BUG_ON(cur_bd >= RX_BUF_NUM);
  1422. #endif
  1423. skb = lp->rx_skbs[cur_bd].skb;
  1424. prefetch(skb->data);
  1425. lp->rx_skbs[cur_bd].skb = NULL;
  1426. lp->fbl_count--;
  1427. pci_unmap_single(lp->pci_dev,
  1428. lp->rx_skbs[cur_bd].skb_dma,
  1429. RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  1430. if (!HAVE_DMA_RXALIGN(lp))
  1431. memmove(skb->data, skb->data - 2, pkt_len);
  1432. data = skb_put(skb, pkt_len);
  1433. #endif /* TC35815_USE_PACKEDBUFFER */
  1434. if (netif_msg_pktdata(lp))
  1435. print_eth(data);
  1436. skb->protocol = eth_type_trans(skb, dev);
  1437. #ifdef TC35815_NAPI
  1438. netif_receive_skb(skb);
  1439. received++;
  1440. #else
  1441. netif_rx(skb);
  1442. #endif
  1443. dev->last_rx = jiffies;
  1444. dev->stats.rx_packets++;
  1445. dev->stats.rx_bytes += pkt_len;
  1446. } else {
  1447. dev->stats.rx_errors++;
  1448. printk(KERN_DEBUG "%s: Rx error (status %x)\n",
  1449. dev->name, status & Rx_Stat_Mask);
  1450. /* WORKAROUND: LongErr and CRCErr means Overflow. */
  1451. if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
  1452. status &= ~(Rx_LongErr|Rx_CRCErr);
  1453. status |= Rx_Over;
  1454. }
  1455. if (status & Rx_LongErr)
  1456. dev->stats.rx_length_errors++;
  1457. if (status & Rx_Over)
  1458. dev->stats.rx_fifo_errors++;
  1459. if (status & Rx_CRCErr)
  1460. dev->stats.rx_crc_errors++;
  1461. if (status & Rx_Align)
  1462. dev->stats.rx_frame_errors++;
  1463. }
  1464. if (bd_count > 0) {
  1465. /* put Free Buffer back to controller */
  1466. int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
  1467. unsigned char id =
  1468. (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
  1469. #ifdef DEBUG
  1470. if (id >= RX_BUF_NUM) {
  1471. printk("%s: invalid BDID.\n", dev->name);
  1472. panic_queues(dev);
  1473. }
  1474. #else
  1475. BUG_ON(id >= RX_BUF_NUM);
  1476. #endif
  1477. /* free old buffers */
  1478. #ifdef TC35815_USE_PACKEDBUFFER
  1479. while (lp->fbl_curid != id)
  1480. #else
  1481. while (lp->fbl_count < RX_BUF_NUM)
  1482. #endif
  1483. {
  1484. #ifdef TC35815_USE_PACKEDBUFFER
  1485. unsigned char curid = lp->fbl_curid;
  1486. #else
  1487. unsigned char curid =
  1488. (id + 1 + lp->fbl_count) % RX_BUF_NUM;
  1489. #endif
  1490. struct BDesc *bd = &lp->fbl_ptr->bd[curid];
  1491. #ifdef DEBUG
  1492. bdctl = le32_to_cpu(bd->BDCtl);
  1493. if (bdctl & BD_CownsBD) {
  1494. printk("%s: Freeing invalid BD.\n",
  1495. dev->name);
  1496. panic_queues(dev);
  1497. }
  1498. #endif
  1499. /* pass BD to controller */
  1500. #ifndef TC35815_USE_PACKEDBUFFER
  1501. if (!lp->rx_skbs[curid].skb) {
  1502. lp->rx_skbs[curid].skb =
  1503. alloc_rxbuf_skb(dev,
  1504. lp->pci_dev,
  1505. &lp->rx_skbs[curid].skb_dma);
  1506. if (!lp->rx_skbs[curid].skb)
  1507. break; /* try on next reception */
  1508. bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
  1509. }
  1510. #endif /* TC35815_USE_PACKEDBUFFER */
  1511. /* Note: BDLength was modified by chip. */
  1512. bd->BDCtl = cpu_to_le32(BD_CownsBD |
  1513. (curid << BD_RxBDID_SHIFT) |
  1514. RX_BUF_SIZE);
  1515. #ifdef TC35815_USE_PACKEDBUFFER
  1516. lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
  1517. if (netif_msg_rx_status(lp)) {
  1518. printk("%s: Entering new FBD %d\n",
  1519. dev->name, lp->fbl_curid);
  1520. dump_frfd(lp->fbl_ptr);
  1521. }
  1522. #else
  1523. lp->fbl_count++;
  1524. #endif
  1525. buf_free_count++;
  1526. }
  1527. }
  1528. /* put RxFD back to controller */
  1529. #ifdef DEBUG
  1530. next_rfd = fd_bus_to_virt(lp,
  1531. le32_to_cpu(lp->rfd_cur->fd.FDNext));
  1532. if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
  1533. printk("%s: RxFD FDNext invalid.\n", dev->name);
  1534. panic_queues(dev);
  1535. }
  1536. #endif
  1537. for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
  1538. /* pass FD to controller */
  1539. #ifdef DEBUG
  1540. lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
  1541. #else
  1542. lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
  1543. #endif
  1544. lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
  1545. lp->rfd_cur++;
  1546. fd_free_count++;
  1547. }
  1548. if (lp->rfd_cur > lp->rfd_limit)
  1549. lp->rfd_cur = lp->rfd_base;
  1550. #ifdef DEBUG
  1551. if (lp->rfd_cur != next_rfd)
  1552. printk("rfd_cur = %p, next_rfd %p\n",
  1553. lp->rfd_cur, next_rfd);
  1554. #endif
  1555. }
  1556. /* re-enable BL/FDA Exhaust interrupts. */
  1557. if (fd_free_count) {
  1558. struct tc35815_regs __iomem *tr =
  1559. (struct tc35815_regs __iomem *)dev->base_addr;
  1560. u32 en, en_old = tc_readl(&tr->Int_En);
  1561. en = en_old | Int_FDAExEn;
  1562. if (buf_free_count)
  1563. en |= Int_BLExEn;
  1564. if (en != en_old)
  1565. tc_writel(en, &tr->Int_En);
  1566. }
  1567. #ifdef TC35815_NAPI
  1568. return received;
  1569. #endif
  1570. }
  1571. #ifdef TC35815_NAPI
  1572. static int tc35815_poll(struct napi_struct *napi, int budget)
  1573. {
  1574. struct tc35815_local *lp = container_of(napi, struct tc35815_local, napi);
  1575. struct net_device *dev = lp->dev;
  1576. struct tc35815_regs __iomem *tr =
  1577. (struct tc35815_regs __iomem *)dev->base_addr;
  1578. int received = 0, handled;
  1579. u32 status;
  1580. spin_lock(&lp->lock);
  1581. status = tc_readl(&tr->Int_Src);
  1582. do {
  1583. tc_writel(status, &tr->Int_Src); /* write to clear */
  1584. handled = tc35815_do_interrupt(dev, status, limit);
  1585. if (handled >= 0) {
  1586. received += handled;
  1587. if (received >= budget)
  1588. break;
  1589. }
  1590. status = tc_readl(&tr->Int_Src);
  1591. } while (status);
  1592. spin_unlock(&lp->lock);
  1593. if (received < budget) {
  1594. netif_rx_complete(dev, napi);
  1595. /* enable interrupts */
  1596. tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
  1597. }
  1598. return received;
  1599. }
  1600. #endif
  1601. #ifdef NO_CHECK_CARRIER
  1602. #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
  1603. #else
  1604. #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
  1605. #endif
  1606. static void
  1607. tc35815_check_tx_stat(struct net_device *dev, int status)
  1608. {
  1609. struct tc35815_local *lp = netdev_priv(dev);
  1610. const char *msg = NULL;
  1611. /* count collisions */
  1612. if (status & Tx_ExColl)
  1613. dev->stats.collisions += 16;
  1614. if (status & Tx_TxColl_MASK)
  1615. dev->stats.collisions += status & Tx_TxColl_MASK;
  1616. #ifndef NO_CHECK_CARRIER
  1617. /* TX4939 does not have NCarr */
  1618. if (lp->boardtype == TC35815_TX4939)
  1619. status &= ~Tx_NCarr;
  1620. #ifdef WORKAROUND_LOSTCAR
  1621. /* WORKAROUND: ignore LostCrS in full duplex operation */
  1622. if ((lp->timer_state != asleep && lp->timer_state != lcheck)
  1623. || lp->fullduplex)
  1624. status &= ~Tx_NCarr;
  1625. #endif
  1626. #endif
  1627. if (!(status & TX_STA_ERR)) {
  1628. /* no error. */
  1629. dev->stats.tx_packets++;
  1630. return;
  1631. }
  1632. dev->stats.tx_errors++;
  1633. if (status & Tx_ExColl) {
  1634. dev->stats.tx_aborted_errors++;
  1635. msg = "Excessive Collision.";
  1636. }
  1637. if (status & Tx_Under) {
  1638. dev->stats.tx_fifo_errors++;
  1639. msg = "Tx FIFO Underrun.";
  1640. if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
  1641. lp->lstats.tx_underrun++;
  1642. if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
  1643. struct tc35815_regs __iomem *tr =
  1644. (struct tc35815_regs __iomem *)dev->base_addr;
  1645. tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
  1646. msg = "Tx FIFO Underrun.Change Tx threshold to max.";
  1647. }
  1648. }
  1649. }
  1650. if (status & Tx_Defer) {
  1651. dev->stats.tx_fifo_errors++;
  1652. msg = "Excessive Deferral.";
  1653. }
  1654. #ifndef NO_CHECK_CARRIER
  1655. if (status & Tx_NCarr) {
  1656. dev->stats.tx_carrier_errors++;
  1657. msg = "Lost Carrier Sense.";
  1658. }
  1659. #endif
  1660. if (status & Tx_LateColl) {
  1661. dev->stats.tx_aborted_errors++;
  1662. msg = "Late Collision.";
  1663. }
  1664. if (status & Tx_TxPar) {
  1665. dev->stats.tx_fifo_errors++;
  1666. msg = "Transmit Parity Error.";
  1667. }
  1668. if (status & Tx_SQErr) {
  1669. dev->stats.tx_heartbeat_errors++;
  1670. msg = "Signal Quality Error.";
  1671. }
  1672. if (msg && netif_msg_tx_err(lp))
  1673. printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
  1674. }
  1675. /* This handles TX complete events posted by the device
  1676. * via interrupts.
  1677. */
  1678. static void
  1679. tc35815_txdone(struct net_device *dev)
  1680. {
  1681. struct tc35815_local *lp = netdev_priv(dev);
  1682. struct TxFD *txfd;
  1683. unsigned int fdctl;
  1684. txfd = &lp->tfd_base[lp->tfd_end];
  1685. while (lp->tfd_start != lp->tfd_end &&
  1686. !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
  1687. int status = le32_to_cpu(txfd->fd.FDStat);
  1688. struct sk_buff *skb;
  1689. unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
  1690. u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
  1691. if (netif_msg_tx_done(lp)) {
  1692. printk("%s: complete TxFD.\n", dev->name);
  1693. dump_txfd(txfd);
  1694. }
  1695. tc35815_check_tx_stat(dev, status);
  1696. skb = fdsystem != 0xffffffff ?
  1697. lp->tx_skbs[fdsystem].skb : NULL;
  1698. #ifdef DEBUG
  1699. if (lp->tx_skbs[lp->tfd_end].skb != skb) {
  1700. printk("%s: tx_skbs mismatch.\n", dev->name);
  1701. panic_queues(dev);
  1702. }
  1703. #else
  1704. BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
  1705. #endif
  1706. if (skb) {
  1707. dev->stats.tx_bytes += skb->len;
  1708. pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
  1709. lp->tx_skbs[lp->tfd_end].skb = NULL;
  1710. lp->tx_skbs[lp->tfd_end].skb_dma = 0;
  1711. #ifdef TC35815_NAPI
  1712. dev_kfree_skb_any(skb);
  1713. #else
  1714. dev_kfree_skb_irq(skb);
  1715. #endif
  1716. }
  1717. txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
  1718. lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
  1719. txfd = &lp->tfd_base[lp->tfd_end];
  1720. #ifdef DEBUG
  1721. if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
  1722. printk("%s: TxFD FDNext invalid.\n", dev->name);
  1723. panic_queues(dev);
  1724. }
  1725. #endif
  1726. if (fdnext & FD_Next_EOL) {
  1727. /* DMA Transmitter has been stopping... */
  1728. if (lp->tfd_end != lp->tfd_start) {
  1729. struct tc35815_regs __iomem *tr =
  1730. (struct tc35815_regs __iomem *)dev->base_addr;
  1731. int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
  1732. struct TxFD* txhead = &lp->tfd_base[head];
  1733. int qlen = (lp->tfd_start + TX_FD_NUM
  1734. - lp->tfd_end) % TX_FD_NUM;
  1735. #ifdef DEBUG
  1736. if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
  1737. printk("%s: TxFD FDCtl invalid.\n", dev->name);
  1738. panic_queues(dev);
  1739. }
  1740. #endif
  1741. /* log max queue length */
  1742. if (lp->lstats.max_tx_qlen < qlen)
  1743. lp->lstats.max_tx_qlen = qlen;
  1744. /* start DMA Transmitter again */
  1745. txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
  1746. #ifdef GATHER_TXINT
  1747. txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
  1748. #endif
  1749. if (netif_msg_tx_queued(lp)) {
  1750. printk("%s: start TxFD on queue.\n",
  1751. dev->name);
  1752. dump_txfd(txfd);
  1753. }
  1754. tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
  1755. }
  1756. break;
  1757. }
  1758. }
  1759. /* If we had stopped the queue due to a "tx full"
  1760. * condition, and space has now been made available,
  1761. * wake up the queue.
  1762. */
  1763. if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev))
  1764. netif_wake_queue(dev);
  1765. }
  1766. /* The inverse routine to tc35815_open(). */
  1767. static int
  1768. tc35815_close(struct net_device *dev)
  1769. {
  1770. struct tc35815_local *lp = netdev_priv(dev);
  1771. netif_stop_queue(dev);
  1772. #ifdef TC35815_NAPI
  1773. napi_disable(&lp->napi);
  1774. #endif
  1775. /* Flush the Tx and disable Rx here. */
  1776. del_timer(&lp->timer); /* Kill if running */
  1777. tc35815_chip_reset(dev);
  1778. free_irq(dev->irq, dev);
  1779. tc35815_free_queues(dev);
  1780. return 0;
  1781. }
  1782. /*
  1783. * Get the current statistics.
  1784. * This may be called with the card open or closed.
  1785. */
  1786. static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
  1787. {
  1788. struct tc35815_regs __iomem *tr =
  1789. (struct tc35815_regs __iomem *)dev->base_addr;
  1790. if (netif_running(dev))
  1791. /* Update the statistics from the device registers. */
  1792. dev->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
  1793. return &dev->stats;
  1794. }
  1795. static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
  1796. {
  1797. struct tc35815_local *lp = netdev_priv(dev);
  1798. struct tc35815_regs __iomem *tr =
  1799. (struct tc35815_regs __iomem *)dev->base_addr;
  1800. int cam_index = index * 6;
  1801. u32 cam_data;
  1802. u32 saved_addr;
  1803. DECLARE_MAC_BUF(mac);
  1804. saved_addr = tc_readl(&tr->CAM_Adr);
  1805. if (netif_msg_hw(lp))
  1806. printk(KERN_DEBUG "%s: CAM %d: %s\n",
  1807. dev->name, index, print_mac(mac, addr));
  1808. if (index & 1) {
  1809. /* read modify write */
  1810. tc_writel(cam_index - 2, &tr->CAM_Adr);
  1811. cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
  1812. cam_data |= addr[0] << 8 | addr[1];
  1813. tc_writel(cam_data, &tr->CAM_Data);
  1814. /* write whole word */
  1815. tc_writel(cam_index + 2, &tr->CAM_Adr);
  1816. cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
  1817. tc_writel(cam_data, &tr->CAM_Data);
  1818. } else {
  1819. /* write whole word */
  1820. tc_writel(cam_index, &tr->CAM_Adr);
  1821. cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
  1822. tc_writel(cam_data, &tr->CAM_Data);
  1823. /* read modify write */
  1824. tc_writel(cam_index + 4, &tr->CAM_Adr);
  1825. cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
  1826. cam_data |= addr[4] << 24 | (addr[5] << 16);
  1827. tc_writel(cam_data, &tr->CAM_Data);
  1828. }
  1829. tc_writel(saved_addr, &tr->CAM_Adr);
  1830. }
  1831. /*
  1832. * Set or clear the multicast filter for this adaptor.
  1833. * num_addrs == -1 Promiscuous mode, receive all packets
  1834. * num_addrs == 0 Normal mode, clear multicast list
  1835. * num_addrs > 0 Multicast mode, receive normal and MC packets,
  1836. * and do best-effort filtering.
  1837. */
  1838. static void
  1839. tc35815_set_multicast_list(struct net_device *dev)
  1840. {
  1841. struct tc35815_regs __iomem *tr =
  1842. (struct tc35815_regs __iomem *)dev->base_addr;
  1843. if (dev->flags&IFF_PROMISC)
  1844. {
  1845. #ifdef WORKAROUND_100HALF_PROMISC
  1846. /* With some (all?) 100MHalf HUB, controller will hang
  1847. * if we enabled promiscuous mode before linkup... */
  1848. struct tc35815_local *lp = netdev_priv(dev);
  1849. int pid = lp->phy_addr;
  1850. if (!(tc_mdio_read(dev, pid, MII_BMSR) & BMSR_LSTATUS))
  1851. return;
  1852. #endif
  1853. /* Enable promiscuous mode */
  1854. tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
  1855. }
  1856. else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3)
  1857. {
  1858. /* CAM 0, 1, 20 are reserved. */
  1859. /* Disable promiscuous mode, use normal mode. */
  1860. tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
  1861. }
  1862. else if(dev->mc_count)
  1863. {
  1864. struct dev_mc_list* cur_addr = dev->mc_list;
  1865. int i;
  1866. int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
  1867. tc_writel(0, &tr->CAM_Ctl);
  1868. /* Walk the address list, and load the filter */
  1869. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1870. if (!cur_addr)
  1871. break;
  1872. /* entry 0,1 is reserved. */
  1873. tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
  1874. ena_bits |= CAM_Ena_Bit(i + 2);
  1875. }
  1876. tc_writel(ena_bits, &tr->CAM_Ena);
  1877. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  1878. }
  1879. else {
  1880. tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
  1881. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  1882. }
  1883. }
  1884. static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1885. {
  1886. struct tc35815_local *lp = netdev_priv(dev);
  1887. strcpy(info->driver, MODNAME);
  1888. strcpy(info->version, DRV_VERSION);
  1889. strcpy(info->bus_info, pci_name(lp->pci_dev));
  1890. }
  1891. static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1892. {
  1893. struct tc35815_local *lp = netdev_priv(dev);
  1894. spin_lock_irq(&lp->lock);
  1895. mii_ethtool_gset(&lp->mii, cmd);
  1896. spin_unlock_irq(&lp->lock);
  1897. return 0;
  1898. }
  1899. static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1900. {
  1901. struct tc35815_local *lp = netdev_priv(dev);
  1902. int rc;
  1903. #if 1 /* use our negotiation method... */
  1904. /* Verify the settings we care about. */
  1905. if (cmd->autoneg != AUTONEG_ENABLE &&
  1906. cmd->autoneg != AUTONEG_DISABLE)
  1907. return -EINVAL;
  1908. if (cmd->autoneg == AUTONEG_DISABLE &&
  1909. ((cmd->speed != SPEED_100 &&
  1910. cmd->speed != SPEED_10) ||
  1911. (cmd->duplex != DUPLEX_HALF &&
  1912. cmd->duplex != DUPLEX_FULL)))
  1913. return -EINVAL;
  1914. /* Ok, do it to it. */
  1915. spin_lock_irq(&lp->lock);
  1916. del_timer(&lp->timer);
  1917. tc35815_start_auto_negotiation(dev, cmd);
  1918. spin_unlock_irq(&lp->lock);
  1919. rc = 0;
  1920. #else
  1921. spin_lock_irq(&lp->lock);
  1922. rc = mii_ethtool_sset(&lp->mii, cmd);
  1923. spin_unlock_irq(&lp->lock);
  1924. #endif
  1925. return rc;
  1926. }
  1927. static int tc35815_nway_reset(struct net_device *dev)
  1928. {
  1929. struct tc35815_local *lp = netdev_priv(dev);
  1930. int rc;
  1931. spin_lock_irq(&lp->lock);
  1932. rc = mii_nway_restart(&lp->mii);
  1933. spin_unlock_irq(&lp->lock);
  1934. return rc;
  1935. }
  1936. static u32 tc35815_get_link(struct net_device *dev)
  1937. {
  1938. struct tc35815_local *lp = netdev_priv(dev);
  1939. int rc;
  1940. spin_lock_irq(&lp->lock);
  1941. rc = mii_link_ok(&lp->mii);
  1942. spin_unlock_irq(&lp->lock);
  1943. return rc;
  1944. }
  1945. static u32 tc35815_get_msglevel(struct net_device *dev)
  1946. {
  1947. struct tc35815_local *lp = netdev_priv(dev);
  1948. return lp->msg_enable;
  1949. }
  1950. static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
  1951. {
  1952. struct tc35815_local *lp = netdev_priv(dev);
  1953. lp->msg_enable = datum;
  1954. }
  1955. static int tc35815_get_sset_count(struct net_device *dev, int sset)
  1956. {
  1957. struct tc35815_local *lp = netdev_priv(dev);
  1958. switch (sset) {
  1959. case ETH_SS_STATS:
  1960. return sizeof(lp->lstats) / sizeof(int);
  1961. default:
  1962. return -EOPNOTSUPP;
  1963. }
  1964. }
  1965. static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
  1966. {
  1967. struct tc35815_local *lp = netdev_priv(dev);
  1968. data[0] = lp->lstats.max_tx_qlen;
  1969. data[1] = lp->lstats.tx_ints;
  1970. data[2] = lp->lstats.rx_ints;
  1971. data[3] = lp->lstats.tx_underrun;
  1972. }
  1973. static struct {
  1974. const char str[ETH_GSTRING_LEN];
  1975. } ethtool_stats_keys[] = {
  1976. { "max_tx_qlen" },
  1977. { "tx_ints" },
  1978. { "rx_ints" },
  1979. { "tx_underrun" },
  1980. };
  1981. static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  1982. {
  1983. memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
  1984. }
  1985. static const struct ethtool_ops tc35815_ethtool_ops = {
  1986. .get_drvinfo = tc35815_get_drvinfo,
  1987. .get_settings = tc35815_get_settings,
  1988. .set_settings = tc35815_set_settings,
  1989. .nway_reset = tc35815_nway_reset,
  1990. .get_link = tc35815_get_link,
  1991. .get_msglevel = tc35815_get_msglevel,
  1992. .set_msglevel = tc35815_set_msglevel,
  1993. .get_strings = tc35815_get_strings,
  1994. .get_sset_count = tc35815_get_sset_count,
  1995. .get_ethtool_stats = tc35815_get_ethtool_stats,
  1996. };
  1997. static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1998. {
  1999. struct tc35815_local *lp = netdev_priv(dev);
  2000. int rc;
  2001. if (!netif_running(dev))
  2002. return -EINVAL;
  2003. spin_lock_irq(&lp->lock);
  2004. rc = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL);
  2005. spin_unlock_irq(&lp->lock);
  2006. return rc;
  2007. }
  2008. static int tc_mdio_read(struct net_device *dev, int phy_id, int location)
  2009. {
  2010. struct tc35815_regs __iomem *tr =
  2011. (struct tc35815_regs __iomem *)dev->base_addr;
  2012. u32 data;
  2013. tc_writel(MD_CA_Busy | (phy_id << 5) | location, &tr->MD_CA);
  2014. while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
  2015. ;
  2016. data = tc_readl(&tr->MD_Data);
  2017. return data & 0xffff;
  2018. }
  2019. static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
  2020. int val)
  2021. {
  2022. struct tc35815_regs __iomem *tr =
  2023. (struct tc35815_regs __iomem *)dev->base_addr;
  2024. tc_writel(val, &tr->MD_Data);
  2025. tc_writel(MD_CA_Busy | MD_CA_Wr | (phy_id << 5) | location, &tr->MD_CA);
  2026. while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
  2027. ;
  2028. }
  2029. /* Auto negotiation. The scheme is very simple. We have a timer routine
  2030. * that keeps watching the auto negotiation process as it progresses.
  2031. * The DP83840 is first told to start doing it's thing, we set up the time
  2032. * and place the timer state machine in it's initial state.
  2033. *
  2034. * Here the timer peeks at the DP83840 status registers at each click to see
  2035. * if the auto negotiation has completed, we assume here that the DP83840 PHY
  2036. * will time out at some point and just tell us what (didn't) happen. For
  2037. * complete coverage we only allow so many of the ticks at this level to run,
  2038. * when this has expired we print a warning message and try another strategy.
  2039. * This "other" strategy is to force the interface into various speed/duplex
  2040. * configurations and we stop when we see a link-up condition before the
  2041. * maximum number of "peek" ticks have occurred.
  2042. *
  2043. * Once a valid link status has been detected we configure the BigMAC and
  2044. * the rest of the Happy Meal to speak the most efficient protocol we could
  2045. * get a clean link for. The priority for link configurations, highest first
  2046. * is:
  2047. * 100 Base-T Full Duplex
  2048. * 100 Base-T Half Duplex
  2049. * 10 Base-T Full Duplex
  2050. * 10 Base-T Half Duplex
  2051. *
  2052. * We start a new timer now, after a successful auto negotiation status has
  2053. * been detected. This timer just waits for the link-up bit to get set in
  2054. * the BMCR of the DP83840. When this occurs we print a kernel log message
  2055. * describing the link type in use and the fact that it is up.
  2056. *
  2057. * If a fatal error of some sort is signalled and detected in the interrupt
  2058. * service routine, and the chip is reset, or the link is ifconfig'd down
  2059. * and then back up, this entire process repeats itself all over again.
  2060. */
  2061. /* Note: Above comments are come from sunhme driver. */
  2062. static int tc35815_try_next_permutation(struct net_device *dev)
  2063. {
  2064. struct tc35815_local *lp = netdev_priv(dev);
  2065. int pid = lp->phy_addr;
  2066. unsigned short bmcr;
  2067. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2068. /* Downgrade from full to half duplex. Only possible via ethtool. */
  2069. if (bmcr & BMCR_FULLDPLX) {
  2070. bmcr &= ~BMCR_FULLDPLX;
  2071. printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
  2072. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2073. return 0;
  2074. }
  2075. /* Downgrade from 100 to 10. */
  2076. if (bmcr & BMCR_SPEED100) {
  2077. bmcr &= ~BMCR_SPEED100;
  2078. printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
  2079. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2080. return 0;
  2081. }
  2082. /* We've tried everything. */
  2083. return -1;
  2084. }
  2085. static void
  2086. tc35815_display_link_mode(struct net_device *dev)
  2087. {
  2088. struct tc35815_local *lp = netdev_priv(dev);
  2089. int pid = lp->phy_addr;
  2090. unsigned short lpa, bmcr;
  2091. char *speed = "", *duplex = "";
  2092. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2093. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2094. if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
  2095. speed = "100Mb/s";
  2096. else
  2097. speed = "10Mb/s";
  2098. if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
  2099. duplex = "Full Duplex";
  2100. else
  2101. duplex = "Half Duplex";
  2102. if (netif_msg_link(lp))
  2103. printk(KERN_INFO "%s: Link is up at %s, %s.\n",
  2104. dev->name, speed, duplex);
  2105. printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
  2106. dev->name,
  2107. bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
  2108. }
  2109. static void tc35815_display_forced_link_mode(struct net_device *dev)
  2110. {
  2111. struct tc35815_local *lp = netdev_priv(dev);
  2112. int pid = lp->phy_addr;
  2113. unsigned short bmcr;
  2114. char *speed = "", *duplex = "";
  2115. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2116. if (bmcr & BMCR_SPEED100)
  2117. speed = "100Mb/s";
  2118. else
  2119. speed = "10Mb/s";
  2120. if (bmcr & BMCR_FULLDPLX)
  2121. duplex = "Full Duplex.\n";
  2122. else
  2123. duplex = "Half Duplex.\n";
  2124. if (netif_msg_link(lp))
  2125. printk(KERN_INFO "%s: Link has been forced up at %s, %s",
  2126. dev->name, speed, duplex);
  2127. }
  2128. static void tc35815_set_link_modes(struct net_device *dev)
  2129. {
  2130. struct tc35815_local *lp = netdev_priv(dev);
  2131. struct tc35815_regs __iomem *tr =
  2132. (struct tc35815_regs __iomem *)dev->base_addr;
  2133. int pid = lp->phy_addr;
  2134. unsigned short bmcr, lpa;
  2135. int speed;
  2136. if (lp->timer_state == arbwait) {
  2137. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2138. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2139. printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
  2140. dev->name,
  2141. bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
  2142. if (!(lpa & (LPA_10HALF | LPA_10FULL |
  2143. LPA_100HALF | LPA_100FULL))) {
  2144. /* fall back to 10HALF */
  2145. printk(KERN_INFO "%s: bad ability %04x - falling back to 10HD.\n",
  2146. dev->name, lpa);
  2147. lpa = LPA_10HALF;
  2148. }
  2149. if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
  2150. lp->fullduplex = 1;
  2151. else
  2152. lp->fullduplex = 0;
  2153. if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
  2154. speed = 100;
  2155. else
  2156. speed = 10;
  2157. } else {
  2158. /* Forcing a link mode. */
  2159. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2160. if (bmcr & BMCR_FULLDPLX)
  2161. lp->fullduplex = 1;
  2162. else
  2163. lp->fullduplex = 0;
  2164. if (bmcr & BMCR_SPEED100)
  2165. speed = 100;
  2166. else
  2167. speed = 10;
  2168. }
  2169. tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_HaltReq, &tr->MAC_Ctl);
  2170. if (lp->fullduplex) {
  2171. tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl);
  2172. } else {
  2173. tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_FullDup, &tr->MAC_Ctl);
  2174. }
  2175. tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_HaltReq, &tr->MAC_Ctl);
  2176. /* TX4939 PCFG.SPEEDn bit will be changed on NETDEV_CHANGE event. */
  2177. #ifndef NO_CHECK_CARRIER
  2178. /* TX4939 does not have EnLCarr */
  2179. if (lp->boardtype != TC35815_TX4939) {
  2180. #ifdef WORKAROUND_LOSTCAR
  2181. /* WORKAROUND: enable LostCrS only if half duplex operation */
  2182. if (!lp->fullduplex && lp->boardtype != TC35815_TX4939)
  2183. tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, &tr->Tx_Ctl);
  2184. #endif
  2185. }
  2186. #endif
  2187. lp->mii.full_duplex = lp->fullduplex;
  2188. }
  2189. static void tc35815_timer(unsigned long data)
  2190. {
  2191. struct net_device *dev = (struct net_device *)data;
  2192. struct tc35815_local *lp = netdev_priv(dev);
  2193. int pid = lp->phy_addr;
  2194. unsigned short bmsr, bmcr, lpa;
  2195. int restart_timer = 0;
  2196. spin_lock_irq(&lp->lock);
  2197. lp->timer_ticks++;
  2198. switch (lp->timer_state) {
  2199. case arbwait:
  2200. /*
  2201. * Only allow for 5 ticks, thats 10 seconds and much too
  2202. * long to wait for arbitration to complete.
  2203. */
  2204. /* TC35815 need more times... */
  2205. if (lp->timer_ticks >= 10) {
  2206. /* Enter force mode. */
  2207. if (!options.doforce) {
  2208. printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
  2209. " cable probblem?\n", dev->name);
  2210. /* Try to restart the adaptor. */
  2211. tc35815_restart(dev);
  2212. goto out;
  2213. }
  2214. printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
  2215. " trying force link mode\n", dev->name);
  2216. printk(KERN_DEBUG "%s: BMCR %x BMSR %x\n", dev->name,
  2217. tc_mdio_read(dev, pid, MII_BMCR),
  2218. tc_mdio_read(dev, pid, MII_BMSR));
  2219. bmcr = BMCR_SPEED100;
  2220. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2221. /*
  2222. * OK, seems we need do disable the transceiver
  2223. * for the first tick to make sure we get an
  2224. * accurate link state at the second tick.
  2225. */
  2226. lp->timer_state = ltrywait;
  2227. lp->timer_ticks = 0;
  2228. restart_timer = 1;
  2229. } else {
  2230. /* Anything interesting happen? */
  2231. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2232. if (bmsr & BMSR_ANEGCOMPLETE) {
  2233. /* Just what we've been waiting for... */
  2234. tc35815_set_link_modes(dev);
  2235. /*
  2236. * Success, at least so far, advance our state
  2237. * engine.
  2238. */
  2239. lp->timer_state = lupwait;
  2240. restart_timer = 1;
  2241. } else {
  2242. restart_timer = 1;
  2243. }
  2244. }
  2245. break;
  2246. case lupwait:
  2247. /*
  2248. * Auto negotiation was successful and we are awaiting a
  2249. * link up status. I have decided to let this timer run
  2250. * forever until some sort of error is signalled, reporting
  2251. * a message to the user at 10 second intervals.
  2252. */
  2253. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2254. if (bmsr & BMSR_LSTATUS) {
  2255. /*
  2256. * Wheee, it's up, display the link mode in use and put
  2257. * the timer to sleep.
  2258. */
  2259. tc35815_display_link_mode(dev);
  2260. netif_carrier_on(dev);
  2261. #ifdef WORKAROUND_100HALF_PROMISC
  2262. /* delayed promiscuous enabling */
  2263. if (dev->flags & IFF_PROMISC)
  2264. tc35815_set_multicast_list(dev);
  2265. #endif
  2266. #if 1
  2267. lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
  2268. lp->timer_state = lcheck;
  2269. restart_timer = 1;
  2270. #else
  2271. lp->timer_state = asleep;
  2272. restart_timer = 0;
  2273. #endif
  2274. } else {
  2275. if (lp->timer_ticks >= 10) {
  2276. printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
  2277. "not completely up.\n", dev->name);
  2278. lp->timer_ticks = 0;
  2279. restart_timer = 1;
  2280. } else {
  2281. restart_timer = 1;
  2282. }
  2283. }
  2284. break;
  2285. case ltrywait:
  2286. /*
  2287. * Making the timeout here too long can make it take
  2288. * annoyingly long to attempt all of the link mode
  2289. * permutations, but then again this is essentially
  2290. * error recovery code for the most part.
  2291. */
  2292. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2293. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2294. if (lp->timer_ticks == 1) {
  2295. /*
  2296. * Re-enable transceiver, we'll re-enable the
  2297. * transceiver next tick, then check link state
  2298. * on the following tick.
  2299. */
  2300. restart_timer = 1;
  2301. break;
  2302. }
  2303. if (lp->timer_ticks == 2) {
  2304. restart_timer = 1;
  2305. break;
  2306. }
  2307. if (bmsr & BMSR_LSTATUS) {
  2308. /* Force mode selection success. */
  2309. tc35815_display_forced_link_mode(dev);
  2310. netif_carrier_on(dev);
  2311. tc35815_set_link_modes(dev);
  2312. #ifdef WORKAROUND_100HALF_PROMISC
  2313. /* delayed promiscuous enabling */
  2314. if (dev->flags & IFF_PROMISC)
  2315. tc35815_set_multicast_list(dev);
  2316. #endif
  2317. #if 1
  2318. lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
  2319. lp->timer_state = lcheck;
  2320. restart_timer = 1;
  2321. #else
  2322. lp->timer_state = asleep;
  2323. restart_timer = 0;
  2324. #endif
  2325. } else {
  2326. if (lp->timer_ticks >= 4) { /* 6 seconds or so... */
  2327. int ret;
  2328. ret = tc35815_try_next_permutation(dev);
  2329. if (ret == -1) {
  2330. /*
  2331. * Aieee, tried them all, reset the
  2332. * chip and try all over again.
  2333. */
  2334. printk(KERN_NOTICE "%s: Link down, "
  2335. "cable problem?\n",
  2336. dev->name);
  2337. /* Try to restart the adaptor. */
  2338. tc35815_restart(dev);
  2339. goto out;
  2340. }
  2341. lp->timer_ticks = 0;
  2342. restart_timer = 1;
  2343. } else {
  2344. restart_timer = 1;
  2345. }
  2346. }
  2347. break;
  2348. case lcheck:
  2349. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2350. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2351. if (bmcr & (BMCR_PDOWN | BMCR_ISOLATE | BMCR_RESET)) {
  2352. printk(KERN_ERR "%s: PHY down? (BMCR %x)\n", dev->name,
  2353. bmcr);
  2354. } else if ((lp->saved_lpa ^ lpa) &
  2355. (LPA_100FULL|LPA_100HALF|LPA_10FULL|LPA_10HALF)) {
  2356. printk(KERN_NOTICE "%s: link status changed"
  2357. " (BMCR %x LPA %x->%x)\n", dev->name,
  2358. bmcr, lp->saved_lpa, lpa);
  2359. } else {
  2360. /* go on */
  2361. restart_timer = 1;
  2362. break;
  2363. }
  2364. /* Try to restart the adaptor. */
  2365. tc35815_restart(dev);
  2366. goto out;
  2367. case asleep:
  2368. default:
  2369. /* Can't happens.... */
  2370. printk(KERN_ERR "%s: Aieee, link timer is asleep but we got "
  2371. "one anyways!\n", dev->name);
  2372. restart_timer = 0;
  2373. lp->timer_ticks = 0;
  2374. lp->timer_state = asleep; /* foo on you */
  2375. break;
  2376. }
  2377. if (restart_timer) {
  2378. lp->timer.expires = jiffies + msecs_to_jiffies(1200);
  2379. add_timer(&lp->timer);
  2380. }
  2381. out:
  2382. spin_unlock_irq(&lp->lock);
  2383. }
  2384. static void tc35815_start_auto_negotiation(struct net_device *dev,
  2385. struct ethtool_cmd *ep)
  2386. {
  2387. struct tc35815_local *lp = netdev_priv(dev);
  2388. int pid = lp->phy_addr;
  2389. unsigned short bmsr, bmcr, advertize;
  2390. int timeout;
  2391. netif_carrier_off(dev);
  2392. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2393. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2394. advertize = tc_mdio_read(dev, pid, MII_ADVERTISE);
  2395. if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
  2396. if (options.speed || options.duplex) {
  2397. /* Advertise only specified configuration. */
  2398. advertize &= ~(ADVERTISE_10HALF |
  2399. ADVERTISE_10FULL |
  2400. ADVERTISE_100HALF |
  2401. ADVERTISE_100FULL);
  2402. if (options.speed != 10) {
  2403. if (options.duplex != 1)
  2404. advertize |= ADVERTISE_100FULL;
  2405. if (options.duplex != 2)
  2406. advertize |= ADVERTISE_100HALF;
  2407. }
  2408. if (options.speed != 100) {
  2409. if (options.duplex != 1)
  2410. advertize |= ADVERTISE_10FULL;
  2411. if (options.duplex != 2)
  2412. advertize |= ADVERTISE_10HALF;
  2413. }
  2414. if (options.speed == 100)
  2415. bmcr |= BMCR_SPEED100;
  2416. else if (options.speed == 10)
  2417. bmcr &= ~BMCR_SPEED100;
  2418. if (options.duplex == 2)
  2419. bmcr |= BMCR_FULLDPLX;
  2420. else if (options.duplex == 1)
  2421. bmcr &= ~BMCR_FULLDPLX;
  2422. } else {
  2423. /* Advertise everything we can support. */
  2424. if (bmsr & BMSR_10HALF)
  2425. advertize |= ADVERTISE_10HALF;
  2426. else
  2427. advertize &= ~ADVERTISE_10HALF;
  2428. if (bmsr & BMSR_10FULL)
  2429. advertize |= ADVERTISE_10FULL;
  2430. else
  2431. advertize &= ~ADVERTISE_10FULL;
  2432. if (bmsr & BMSR_100HALF)
  2433. advertize |= ADVERTISE_100HALF;
  2434. else
  2435. advertize &= ~ADVERTISE_100HALF;
  2436. if (bmsr & BMSR_100FULL)
  2437. advertize |= ADVERTISE_100FULL;
  2438. else
  2439. advertize &= ~ADVERTISE_100FULL;
  2440. }
  2441. tc_mdio_write(dev, pid, MII_ADVERTISE, advertize);
  2442. /* Enable Auto-Negotiation, this is usually on already... */
  2443. bmcr |= BMCR_ANENABLE;
  2444. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2445. /* Restart it to make sure it is going. */
  2446. bmcr |= BMCR_ANRESTART;
  2447. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2448. printk(KERN_DEBUG "%s: ADVERTISE %x BMCR %x\n", dev->name, advertize, bmcr);
  2449. /* BMCR_ANRESTART self clears when the process has begun. */
  2450. timeout = 64; /* More than enough. */
  2451. while (--timeout) {
  2452. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2453. if (!(bmcr & BMCR_ANRESTART))
  2454. break; /* got it. */
  2455. udelay(10);
  2456. }
  2457. if (!timeout) {
  2458. printk(KERN_ERR "%s: TC35815 would not start auto "
  2459. "negotiation BMCR=0x%04x\n",
  2460. dev->name, bmcr);
  2461. printk(KERN_NOTICE "%s: Performing force link "
  2462. "detection.\n", dev->name);
  2463. goto force_link;
  2464. } else {
  2465. printk(KERN_DEBUG "%s: auto negotiation started.\n", dev->name);
  2466. lp->timer_state = arbwait;
  2467. }
  2468. } else {
  2469. force_link:
  2470. /* Force the link up, trying first a particular mode.
  2471. * Either we are here at the request of ethtool or
  2472. * because the Happy Meal would not start to autoneg.
  2473. */
  2474. /* Disable auto-negotiation in BMCR, enable the duplex and
  2475. * speed setting, init the timer state machine, and fire it off.
  2476. */
  2477. if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
  2478. bmcr = BMCR_SPEED100;
  2479. } else {
  2480. if (ep->speed == SPEED_100)
  2481. bmcr = BMCR_SPEED100;
  2482. else
  2483. bmcr = 0;
  2484. if (ep->duplex == DUPLEX_FULL)
  2485. bmcr |= BMCR_FULLDPLX;
  2486. }
  2487. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2488. /* OK, seems we need do disable the transceiver for the first
  2489. * tick to make sure we get an accurate link state at the
  2490. * second tick.
  2491. */
  2492. lp->timer_state = ltrywait;
  2493. }
  2494. del_timer(&lp->timer);
  2495. lp->timer_ticks = 0;
  2496. lp->timer.expires = jiffies + msecs_to_jiffies(1200);
  2497. add_timer(&lp->timer);
  2498. }
  2499. static void tc35815_find_phy(struct net_device *dev)
  2500. {
  2501. struct tc35815_local *lp = netdev_priv(dev);
  2502. int pid = lp->phy_addr;
  2503. unsigned short id0;
  2504. /* find MII phy */
  2505. for (pid = 31; pid >= 0; pid--) {
  2506. id0 = tc_mdio_read(dev, pid, MII_BMSR);
  2507. if (id0 != 0xffff && id0 != 0x0000 &&
  2508. (id0 & BMSR_RESV) != (0xffff & BMSR_RESV) /* paranoia? */
  2509. ) {
  2510. lp->phy_addr = pid;
  2511. break;
  2512. }
  2513. }
  2514. if (pid < 0) {
  2515. printk(KERN_ERR "%s: No MII Phy found.\n",
  2516. dev->name);
  2517. lp->phy_addr = pid = 0;
  2518. }
  2519. lp->mii_id[0] = tc_mdio_read(dev, pid, MII_PHYSID1);
  2520. lp->mii_id[1] = tc_mdio_read(dev, pid, MII_PHYSID2);
  2521. if (netif_msg_hw(lp))
  2522. printk(KERN_INFO "%s: PHY(%02x) ID %04x %04x\n", dev->name,
  2523. pid, lp->mii_id[0], lp->mii_id[1]);
  2524. }
  2525. static void tc35815_phy_chip_init(struct net_device *dev)
  2526. {
  2527. struct tc35815_local *lp = netdev_priv(dev);
  2528. int pid = lp->phy_addr;
  2529. unsigned short bmcr;
  2530. struct ethtool_cmd ecmd, *ep;
  2531. /* dis-isolate if needed. */
  2532. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2533. if (bmcr & BMCR_ISOLATE) {
  2534. int count = 32;
  2535. printk(KERN_DEBUG "%s: unisolating...", dev->name);
  2536. tc_mdio_write(dev, pid, MII_BMCR, bmcr & ~BMCR_ISOLATE);
  2537. while (--count) {
  2538. if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_ISOLATE))
  2539. break;
  2540. udelay(20);
  2541. }
  2542. printk(" %s.\n", count ? "done" : "failed");
  2543. }
  2544. if (options.speed && options.duplex) {
  2545. ecmd.autoneg = AUTONEG_DISABLE;
  2546. ecmd.speed = options.speed == 10 ? SPEED_10 : SPEED_100;
  2547. ecmd.duplex = options.duplex == 1 ? DUPLEX_HALF : DUPLEX_FULL;
  2548. ep = &ecmd;
  2549. } else {
  2550. ep = NULL;
  2551. }
  2552. tc35815_start_auto_negotiation(dev, ep);
  2553. }
  2554. static void tc35815_chip_reset(struct net_device *dev)
  2555. {
  2556. struct tc35815_regs __iomem *tr =
  2557. (struct tc35815_regs __iomem *)dev->base_addr;
  2558. int i;
  2559. /* reset the controller */
  2560. tc_writel(MAC_Reset, &tr->MAC_Ctl);
  2561. udelay(4); /* 3200ns */
  2562. i = 0;
  2563. while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
  2564. if (i++ > 100) {
  2565. printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
  2566. break;
  2567. }
  2568. mdelay(1);
  2569. }
  2570. tc_writel(0, &tr->MAC_Ctl);
  2571. /* initialize registers to default value */
  2572. tc_writel(0, &tr->DMA_Ctl);
  2573. tc_writel(0, &tr->TxThrsh);
  2574. tc_writel(0, &tr->TxPollCtr);
  2575. tc_writel(0, &tr->RxFragSize);
  2576. tc_writel(0, &tr->Int_En);
  2577. tc_writel(0, &tr->FDA_Bas);
  2578. tc_writel(0, &tr->FDA_Lim);
  2579. tc_writel(0xffffffff, &tr->Int_Src); /* Write 1 to clear */
  2580. tc_writel(0, &tr->CAM_Ctl);
  2581. tc_writel(0, &tr->Tx_Ctl);
  2582. tc_writel(0, &tr->Rx_Ctl);
  2583. tc_writel(0, &tr->CAM_Ena);
  2584. (void)tc_readl(&tr->Miss_Cnt); /* Read to clear */
  2585. /* initialize internal SRAM */
  2586. tc_writel(DMA_TestMode, &tr->DMA_Ctl);
  2587. for (i = 0; i < 0x1000; i += 4) {
  2588. tc_writel(i, &tr->CAM_Adr);
  2589. tc_writel(0, &tr->CAM_Data);
  2590. }
  2591. tc_writel(0, &tr->DMA_Ctl);
  2592. }
  2593. static void tc35815_chip_init(struct net_device *dev)
  2594. {
  2595. struct tc35815_local *lp = netdev_priv(dev);
  2596. struct tc35815_regs __iomem *tr =
  2597. (struct tc35815_regs __iomem *)dev->base_addr;
  2598. unsigned long txctl = TX_CTL_CMD;
  2599. tc35815_phy_chip_init(dev);
  2600. /* load station address to CAM */
  2601. tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
  2602. /* Enable CAM (broadcast and unicast) */
  2603. tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
  2604. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  2605. /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
  2606. if (HAVE_DMA_RXALIGN(lp))
  2607. tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
  2608. else
  2609. tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
  2610. #ifdef TC35815_USE_PACKEDBUFFER
  2611. tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize); /* Packing */
  2612. #else
  2613. tc_writel(ETH_ZLEN, &tr->RxFragSize);
  2614. #endif
  2615. tc_writel(0, &tr->TxPollCtr); /* Batch mode */
  2616. tc_writel(TX_THRESHOLD, &tr->TxThrsh);
  2617. tc_writel(INT_EN_CMD, &tr->Int_En);
  2618. /* set queues */
  2619. tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
  2620. tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
  2621. &tr->FDA_Lim);
  2622. /*
  2623. * Activation method:
  2624. * First, enable the MAC Transmitter and the DMA Receive circuits.
  2625. * Then enable the DMA Transmitter and the MAC Receive circuits.
  2626. */
  2627. tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr); /* start DMA receiver */
  2628. tc_writel(RX_CTL_CMD, &tr->Rx_Ctl); /* start MAC receiver */
  2629. /* start MAC transmitter */
  2630. #ifndef NO_CHECK_CARRIER
  2631. /* TX4939 does not have EnLCarr */
  2632. if (lp->boardtype == TC35815_TX4939)
  2633. txctl &= ~Tx_EnLCarr;
  2634. #ifdef WORKAROUND_LOSTCAR
  2635. /* WORKAROUND: ignore LostCrS in full duplex operation */
  2636. if ((lp->timer_state != asleep && lp->timer_state != lcheck) ||
  2637. lp->fullduplex)
  2638. txctl &= ~Tx_EnLCarr;
  2639. #endif
  2640. #endif /* !NO_CHECK_CARRIER */
  2641. #ifdef GATHER_TXINT
  2642. txctl &= ~Tx_EnComp; /* disable global tx completion int. */
  2643. #endif
  2644. tc_writel(txctl, &tr->Tx_Ctl);
  2645. }
  2646. #ifdef CONFIG_PM
  2647. static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
  2648. {
  2649. struct net_device *dev = pci_get_drvdata(pdev);
  2650. struct tc35815_local *lp = netdev_priv(dev);
  2651. unsigned long flags;
  2652. pci_save_state(pdev);
  2653. if (!netif_running(dev))
  2654. return 0;
  2655. netif_device_detach(dev);
  2656. spin_lock_irqsave(&lp->lock, flags);
  2657. del_timer(&lp->timer); /* Kill if running */
  2658. tc35815_chip_reset(dev);
  2659. spin_unlock_irqrestore(&lp->lock, flags);
  2660. pci_set_power_state(pdev, PCI_D3hot);
  2661. return 0;
  2662. }
  2663. static int tc35815_resume(struct pci_dev *pdev)
  2664. {
  2665. struct net_device *dev = pci_get_drvdata(pdev);
  2666. struct tc35815_local *lp = netdev_priv(dev);
  2667. unsigned long flags;
  2668. pci_restore_state(pdev);
  2669. if (!netif_running(dev))
  2670. return 0;
  2671. pci_set_power_state(pdev, PCI_D0);
  2672. spin_lock_irqsave(&lp->lock, flags);
  2673. tc35815_restart(dev);
  2674. spin_unlock_irqrestore(&lp->lock, flags);
  2675. netif_device_attach(dev);
  2676. return 0;
  2677. }
  2678. #endif /* CONFIG_PM */
  2679. static struct pci_driver tc35815_pci_driver = {
  2680. .name = MODNAME,
  2681. .id_table = tc35815_pci_tbl,
  2682. .probe = tc35815_init_one,
  2683. .remove = __devexit_p(tc35815_remove_one),
  2684. #ifdef CONFIG_PM
  2685. .suspend = tc35815_suspend,
  2686. .resume = tc35815_resume,
  2687. #endif
  2688. };
  2689. module_param_named(speed, options.speed, int, 0);
  2690. MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
  2691. module_param_named(duplex, options.duplex, int, 0);
  2692. MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
  2693. module_param_named(doforce, options.doforce, int, 0);
  2694. MODULE_PARM_DESC(doforce, "try force link mode if auto-negotiation failed");
  2695. static int __init tc35815_init_module(void)
  2696. {
  2697. return pci_register_driver(&tc35815_pci_driver);
  2698. }
  2699. static void __exit tc35815_cleanup_module(void)
  2700. {
  2701. pci_unregister_driver(&tc35815_pci_driver);
  2702. }
  2703. module_init(tc35815_init_module);
  2704. module_exit(tc35815_cleanup_module);
  2705. MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
  2706. MODULE_LICENSE("GPL");