ice1724.c 67 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <asm/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/pci.h>
  29. #include <linux/slab.h>
  30. #include <linux/moduleparam.h>
  31. #include <linux/mutex.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/mpu401.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "prodigy_hifi.h"
  47. #include "juli.h"
  48. #include "phase.h"
  49. #include "wtm.h"
  50. #include "se.h"
  51. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  52. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  53. MODULE_LICENSE("GPL");
  54. MODULE_SUPPORTED_DEVICE("{"
  55. REVO_DEVICE_DESC
  56. AMP_AUDIO2000_DEVICE_DESC
  57. AUREON_DEVICE_DESC
  58. VT1720_MOBO_DEVICE_DESC
  59. PONTIS_DEVICE_DESC
  60. PRODIGY192_DEVICE_DESC
  61. PRODIGY_HIFI_DEVICE_DESC
  62. JULI_DEVICE_DESC
  63. PHASE_DEVICE_DESC
  64. WTM_DEVICE_DESC
  65. SE_DEVICE_DESC
  66. "{VIA,VT1720},"
  67. "{VIA,VT1724},"
  68. "{ICEnsemble,Generic ICE1724},"
  69. "{ICEnsemble,Generic Envy24HT}"
  70. "{ICEnsemble,Generic Envy24PT}}");
  71. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  72. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  73. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  74. static char *model[SNDRV_CARDS];
  75. module_param_array(index, int, NULL, 0444);
  76. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  77. module_param_array(id, charp, NULL, 0444);
  78. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  79. module_param_array(enable, bool, NULL, 0444);
  80. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  81. module_param_array(model, charp, NULL, 0444);
  82. MODULE_PARM_DESC(model, "Use the given board model.");
  83. /* Both VT1720 and VT1724 have the same PCI IDs */
  84. static const struct pci_device_id snd_vt1724_ids[] = {
  85. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  86. { 0, }
  87. };
  88. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  89. static int PRO_RATE_LOCKED;
  90. static int PRO_RATE_RESET = 1;
  91. static unsigned int PRO_RATE_DEFAULT = 44100;
  92. /*
  93. * Basic I/O
  94. */
  95. /* check whether the clock mode is spdif-in */
  96. static inline int is_spdif_master(struct snd_ice1712 *ice)
  97. {
  98. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  99. }
  100. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  101. {
  102. return is_spdif_master(ice) || PRO_RATE_LOCKED;
  103. }
  104. /*
  105. * ac97 section
  106. */
  107. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  108. {
  109. unsigned char old_cmd;
  110. int tm;
  111. for (tm = 0; tm < 0x10000; tm++) {
  112. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  113. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  114. continue;
  115. if (!(old_cmd & VT1724_AC97_READY))
  116. continue;
  117. return old_cmd;
  118. }
  119. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  120. return old_cmd;
  121. }
  122. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  123. {
  124. int tm;
  125. for (tm = 0; tm < 0x10000; tm++)
  126. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  127. return 0;
  128. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  129. return -EIO;
  130. }
  131. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  132. unsigned short reg,
  133. unsigned short val)
  134. {
  135. struct snd_ice1712 *ice = ac97->private_data;
  136. unsigned char old_cmd;
  137. old_cmd = snd_vt1724_ac97_ready(ice);
  138. old_cmd &= ~VT1724_AC97_ID_MASK;
  139. old_cmd |= ac97->num;
  140. outb(reg, ICEMT1724(ice, AC97_INDEX));
  141. outw(val, ICEMT1724(ice, AC97_DATA));
  142. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  143. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  144. }
  145. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  146. {
  147. struct snd_ice1712 *ice = ac97->private_data;
  148. unsigned char old_cmd;
  149. old_cmd = snd_vt1724_ac97_ready(ice);
  150. old_cmd &= ~VT1724_AC97_ID_MASK;
  151. old_cmd |= ac97->num;
  152. outb(reg, ICEMT1724(ice, AC97_INDEX));
  153. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  154. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  155. return ~0;
  156. return inw(ICEMT1724(ice, AC97_DATA));
  157. }
  158. /*
  159. * GPIO operations
  160. */
  161. /* set gpio direction 0 = read, 1 = write */
  162. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  163. {
  164. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  165. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  166. }
  167. /* set the gpio mask (0 = writable) */
  168. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  169. {
  170. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  171. if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  172. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  173. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  174. }
  175. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  176. {
  177. outw(data, ICEREG1724(ice, GPIO_DATA));
  178. if (! ice->vt1720)
  179. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  180. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  181. }
  182. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  183. {
  184. unsigned int data;
  185. if (! ice->vt1720)
  186. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  187. else
  188. data = 0;
  189. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  190. return data;
  191. }
  192. /*
  193. * Interrupt handler
  194. */
  195. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
  196. {
  197. struct snd_ice1712 *ice = dev_id;
  198. unsigned char status;
  199. int handled = 0;
  200. while (1) {
  201. status = inb(ICEREG1724(ice, IRQSTAT));
  202. if (status == 0)
  203. break;
  204. handled = 1;
  205. /* these should probably be separated at some point,
  206. * but as we don't currently have MPU support on the board
  207. * I will leave it
  208. */
  209. if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) {
  210. if (ice->rmidi[0])
  211. snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
  212. outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT));
  213. status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX);
  214. }
  215. if (status & VT1724_IRQ_MTPCM) {
  216. /*
  217. * Multi-track PCM
  218. * PCM assignment are:
  219. * Playback DMA0 (M/C) = playback_pro_substream
  220. * Playback DMA1 = playback_con_substream_ds[0]
  221. * Playback DMA2 = playback_con_substream_ds[1]
  222. * Playback DMA3 = playback_con_substream_ds[2]
  223. * Playback DMA4 (SPDIF) = playback_con_substream
  224. * Record DMA0 = capture_pro_substream
  225. * Record DMA1 = capture_con_substream
  226. */
  227. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  228. if (mtstat & VT1724_MULTI_PDMA0) {
  229. if (ice->playback_pro_substream)
  230. snd_pcm_period_elapsed(ice->playback_pro_substream);
  231. }
  232. if (mtstat & VT1724_MULTI_RDMA0) {
  233. if (ice->capture_pro_substream)
  234. snd_pcm_period_elapsed(ice->capture_pro_substream);
  235. }
  236. if (mtstat & VT1724_MULTI_PDMA1) {
  237. if (ice->playback_con_substream_ds[0])
  238. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  239. }
  240. if (mtstat & VT1724_MULTI_PDMA2) {
  241. if (ice->playback_con_substream_ds[1])
  242. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  243. }
  244. if (mtstat & VT1724_MULTI_PDMA3) {
  245. if (ice->playback_con_substream_ds[2])
  246. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  247. }
  248. if (mtstat & VT1724_MULTI_PDMA4) {
  249. if (ice->playback_con_substream)
  250. snd_pcm_period_elapsed(ice->playback_con_substream);
  251. }
  252. if (mtstat & VT1724_MULTI_RDMA1) {
  253. if (ice->capture_con_substream)
  254. snd_pcm_period_elapsed(ice->capture_con_substream);
  255. }
  256. /* ack anyway to avoid freeze */
  257. outb(mtstat, ICEMT1724(ice, IRQ));
  258. /* ought to really handle this properly */
  259. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  260. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  261. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  262. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  263. /* If I don't do this, I get machine lockup due to continual interrupts */
  264. }
  265. }
  266. }
  267. return IRQ_RETVAL(handled);
  268. }
  269. /*
  270. * PCM code - professional part (multitrack)
  271. */
  272. static unsigned int rates[] = {
  273. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  274. 32000, 44100, 48000, 64000, 88200, 96000,
  275. 176400, 192000,
  276. };
  277. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  278. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  279. .list = rates,
  280. .mask = 0,
  281. };
  282. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  283. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  284. .list = rates,
  285. .mask = 0,
  286. };
  287. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  288. .count = ARRAY_SIZE(rates),
  289. .list = rates,
  290. .mask = 0,
  291. };
  292. struct vt1724_pcm_reg {
  293. unsigned int addr; /* ADDR register offset */
  294. unsigned int size; /* SIZE register offset */
  295. unsigned int count; /* COUNT register offset */
  296. unsigned int start; /* start & pause bit */
  297. };
  298. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  299. {
  300. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  301. unsigned char what;
  302. unsigned char old;
  303. struct snd_pcm_substream *s;
  304. what = 0;
  305. snd_pcm_group_for_each_entry(s, substream) {
  306. if (snd_pcm_substream_chip(s) == ice) {
  307. const struct vt1724_pcm_reg *reg;
  308. reg = s->runtime->private_data;
  309. what |= reg->start;
  310. snd_pcm_trigger_done(s, substream);
  311. }
  312. }
  313. switch (cmd) {
  314. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  315. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  316. spin_lock(&ice->reg_lock);
  317. old = inb(ICEMT1724(ice, DMA_PAUSE));
  318. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  319. old |= what;
  320. else
  321. old &= ~what;
  322. outb(old, ICEMT1724(ice, DMA_PAUSE));
  323. spin_unlock(&ice->reg_lock);
  324. break;
  325. case SNDRV_PCM_TRIGGER_START:
  326. case SNDRV_PCM_TRIGGER_STOP:
  327. spin_lock(&ice->reg_lock);
  328. old = inb(ICEMT1724(ice, DMA_CONTROL));
  329. if (cmd == SNDRV_PCM_TRIGGER_START)
  330. old |= what;
  331. else
  332. old &= ~what;
  333. outb(old, ICEMT1724(ice, DMA_CONTROL));
  334. spin_unlock(&ice->reg_lock);
  335. break;
  336. default:
  337. return -EINVAL;
  338. }
  339. return 0;
  340. }
  341. /*
  342. */
  343. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  344. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  345. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  346. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  347. static int get_max_rate(struct snd_ice1712 *ice)
  348. {
  349. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  350. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  351. return 192000;
  352. else
  353. return 96000;
  354. } else
  355. return 48000;
  356. }
  357. static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  358. int force)
  359. {
  360. unsigned long flags;
  361. unsigned char val, old;
  362. unsigned int i, mclk_change;
  363. if (rate > get_max_rate(ice))
  364. return;
  365. switch (rate) {
  366. case 8000: val = 6; break;
  367. case 9600: val = 3; break;
  368. case 11025: val = 10; break;
  369. case 12000: val = 2; break;
  370. case 16000: val = 5; break;
  371. case 22050: val = 9; break;
  372. case 24000: val = 1; break;
  373. case 32000: val = 4; break;
  374. case 44100: val = 8; break;
  375. case 48000: val = 0; break;
  376. case 64000: val = 15; break;
  377. case 88200: val = 11; break;
  378. case 96000: val = 7; break;
  379. case 176400: val = 12; break;
  380. case 192000: val = 14; break;
  381. default:
  382. snd_BUG();
  383. val = 0;
  384. break;
  385. }
  386. spin_lock_irqsave(&ice->reg_lock, flags);
  387. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  388. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  389. /* running? we cannot change the rate now... */
  390. spin_unlock_irqrestore(&ice->reg_lock, flags);
  391. return;
  392. }
  393. if (!force && is_pro_rate_locked(ice)) {
  394. spin_unlock_irqrestore(&ice->reg_lock, flags);
  395. return;
  396. }
  397. old = inb(ICEMT1724(ice, RATE));
  398. if (force || old != val)
  399. outb(val, ICEMT1724(ice, RATE));
  400. else if (rate == ice->cur_rate) {
  401. spin_unlock_irqrestore(&ice->reg_lock, flags);
  402. return;
  403. }
  404. ice->cur_rate = rate;
  405. /* check MT02 */
  406. mclk_change = 0;
  407. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  408. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  409. if (rate > 96000)
  410. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  411. else
  412. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  413. if (val != old) {
  414. outb(val, ICEMT1724(ice, I2S_FORMAT));
  415. mclk_change = 1;
  416. }
  417. }
  418. spin_unlock_irqrestore(&ice->reg_lock, flags);
  419. if (mclk_change && ice->gpio.i2s_mclk_changed)
  420. ice->gpio.i2s_mclk_changed(ice);
  421. if (ice->gpio.set_pro_rate)
  422. ice->gpio.set_pro_rate(ice, rate);
  423. /* set up codecs */
  424. for (i = 0; i < ice->akm_codecs; i++) {
  425. if (ice->akm[i].ops.set_rate_val)
  426. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  427. }
  428. if (ice->spdif.ops.setup_rate)
  429. ice->spdif.ops.setup_rate(ice, rate);
  430. }
  431. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  432. struct snd_pcm_hw_params *hw_params)
  433. {
  434. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  435. int i, chs;
  436. chs = params_channels(hw_params);
  437. mutex_lock(&ice->open_mutex);
  438. /* mark surround channels */
  439. if (substream == ice->playback_pro_substream) {
  440. /* PDMA0 can be multi-channel up to 8 */
  441. chs = chs / 2 - 1;
  442. for (i = 0; i < chs; i++) {
  443. if (ice->pcm_reserved[i] &&
  444. ice->pcm_reserved[i] != substream) {
  445. mutex_unlock(&ice->open_mutex);
  446. return -EBUSY;
  447. }
  448. ice->pcm_reserved[i] = substream;
  449. }
  450. for (; i < 3; i++) {
  451. if (ice->pcm_reserved[i] == substream)
  452. ice->pcm_reserved[i] = NULL;
  453. }
  454. } else {
  455. for (i = 0; i < 3; i++) {
  456. /* check individual playback stream */
  457. if (ice->playback_con_substream_ds[i] == substream) {
  458. if (ice->pcm_reserved[i] &&
  459. ice->pcm_reserved[i] != substream) {
  460. mutex_unlock(&ice->open_mutex);
  461. return -EBUSY;
  462. }
  463. ice->pcm_reserved[i] = substream;
  464. break;
  465. }
  466. }
  467. }
  468. mutex_unlock(&ice->open_mutex);
  469. snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  470. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  471. }
  472. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  473. {
  474. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  475. int i;
  476. mutex_lock(&ice->open_mutex);
  477. /* unmark surround channels */
  478. for (i = 0; i < 3; i++)
  479. if (ice->pcm_reserved[i] == substream)
  480. ice->pcm_reserved[i] = NULL;
  481. mutex_unlock(&ice->open_mutex);
  482. return snd_pcm_lib_free_pages(substream);
  483. }
  484. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  485. {
  486. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  487. unsigned char val;
  488. unsigned int size;
  489. spin_lock_irq(&ice->reg_lock);
  490. val = (8 - substream->runtime->channels) >> 1;
  491. outb(val, ICEMT1724(ice, BURST));
  492. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  493. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  494. // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
  495. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  496. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  497. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  498. // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
  499. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  500. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  501. spin_unlock_irq(&ice->reg_lock);
  502. // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
  503. return 0;
  504. }
  505. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  506. {
  507. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  508. size_t ptr;
  509. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  510. return 0;
  511. #if 0 /* read PLAYBACK_ADDR */
  512. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  513. if (ptr < substream->runtime->dma_addr) {
  514. snd_printd("ice1724: invalid negative ptr\n");
  515. return 0;
  516. }
  517. ptr -= substream->runtime->dma_addr;
  518. ptr = bytes_to_frames(substream->runtime, ptr);
  519. if (ptr >= substream->runtime->buffer_size) {
  520. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  521. (int)ptr, (int)substream->runtime->period_size);
  522. return 0;
  523. }
  524. #else /* read PLAYBACK_SIZE */
  525. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  526. ptr = (ptr + 1) << 2;
  527. ptr = bytes_to_frames(substream->runtime, ptr);
  528. if (! ptr)
  529. ;
  530. else if (ptr <= substream->runtime->buffer_size)
  531. ptr = substream->runtime->buffer_size - ptr;
  532. else {
  533. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  534. (int)ptr, (int)substream->runtime->buffer_size);
  535. ptr = 0;
  536. }
  537. #endif
  538. return ptr;
  539. }
  540. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  541. {
  542. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  543. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  544. spin_lock_irq(&ice->reg_lock);
  545. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  546. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  547. ice->profi_port + reg->size);
  548. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  549. ice->profi_port + reg->count);
  550. spin_unlock_irq(&ice->reg_lock);
  551. return 0;
  552. }
  553. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  554. {
  555. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  556. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  557. size_t ptr;
  558. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  559. return 0;
  560. #if 0 /* use ADDR register */
  561. ptr = inl(ice->profi_port + reg->addr);
  562. ptr -= substream->runtime->dma_addr;
  563. return bytes_to_frames(substream->runtime, ptr);
  564. #else /* use SIZE register */
  565. ptr = inw(ice->profi_port + reg->size);
  566. ptr = (ptr + 1) << 2;
  567. ptr = bytes_to_frames(substream->runtime, ptr);
  568. if (! ptr)
  569. ;
  570. else if (ptr <= substream->runtime->buffer_size)
  571. ptr = substream->runtime->buffer_size - ptr;
  572. else {
  573. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  574. (int)ptr, (int)substream->runtime->buffer_size);
  575. ptr = 0;
  576. }
  577. return ptr;
  578. #endif
  579. }
  580. static const struct vt1724_pcm_reg vt1724_playback_pro_reg = {
  581. .addr = VT1724_MT_PLAYBACK_ADDR,
  582. .size = VT1724_MT_PLAYBACK_SIZE,
  583. .count = VT1724_MT_PLAYBACK_COUNT,
  584. .start = VT1724_PDMA0_START,
  585. };
  586. static const struct vt1724_pcm_reg vt1724_capture_pro_reg = {
  587. .addr = VT1724_MT_CAPTURE_ADDR,
  588. .size = VT1724_MT_CAPTURE_SIZE,
  589. .count = VT1724_MT_CAPTURE_COUNT,
  590. .start = VT1724_RDMA0_START,
  591. };
  592. static const struct snd_pcm_hardware snd_vt1724_playback_pro =
  593. {
  594. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  595. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  596. SNDRV_PCM_INFO_MMAP_VALID |
  597. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  598. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  599. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  600. .rate_min = 8000,
  601. .rate_max = 192000,
  602. .channels_min = 2,
  603. .channels_max = 8,
  604. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  605. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  606. .period_bytes_max = (1UL << 21),
  607. .periods_min = 2,
  608. .periods_max = 1024,
  609. };
  610. static const struct snd_pcm_hardware snd_vt1724_spdif =
  611. {
  612. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  613. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  614. SNDRV_PCM_INFO_MMAP_VALID |
  615. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  616. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  617. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  618. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  619. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  620. SNDRV_PCM_RATE_192000),
  621. .rate_min = 32000,
  622. .rate_max = 192000,
  623. .channels_min = 2,
  624. .channels_max = 2,
  625. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  626. .period_bytes_min = 2 * 4 * 2,
  627. .period_bytes_max = (1UL << 18),
  628. .periods_min = 2,
  629. .periods_max = 1024,
  630. };
  631. static const struct snd_pcm_hardware snd_vt1724_2ch_stereo =
  632. {
  633. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  634. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  635. SNDRV_PCM_INFO_MMAP_VALID |
  636. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  637. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  638. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  639. .rate_min = 8000,
  640. .rate_max = 192000,
  641. .channels_min = 2,
  642. .channels_max = 2,
  643. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  644. .period_bytes_min = 2 * 4 * 2,
  645. .period_bytes_max = (1UL << 18),
  646. .periods_min = 2,
  647. .periods_max = 1024,
  648. };
  649. /*
  650. * set rate constraints
  651. */
  652. static int set_rate_constraints(struct snd_ice1712 *ice,
  653. struct snd_pcm_substream *substream)
  654. {
  655. struct snd_pcm_runtime *runtime = substream->runtime;
  656. if (ice->hw_rates) {
  657. /* hardware specific */
  658. runtime->hw.rate_min = ice->hw_rates->list[0];
  659. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  660. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  661. return snd_pcm_hw_constraint_list(runtime, 0,
  662. SNDRV_PCM_HW_PARAM_RATE,
  663. ice->hw_rates);
  664. }
  665. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  666. /* I2S */
  667. /* VT1720 doesn't support more than 96kHz */
  668. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  669. return snd_pcm_hw_constraint_list(runtime, 0,
  670. SNDRV_PCM_HW_PARAM_RATE,
  671. &hw_constraints_rates_192);
  672. else {
  673. runtime->hw.rates = SNDRV_PCM_RATE_KNOT |
  674. SNDRV_PCM_RATE_8000_96000;
  675. runtime->hw.rate_max = 96000;
  676. return snd_pcm_hw_constraint_list(runtime, 0,
  677. SNDRV_PCM_HW_PARAM_RATE,
  678. &hw_constraints_rates_96);
  679. }
  680. } else if (ice->ac97) {
  681. /* ACLINK */
  682. runtime->hw.rate_max = 48000;
  683. runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
  684. return snd_pcm_hw_constraint_list(runtime, 0,
  685. SNDRV_PCM_HW_PARAM_RATE,
  686. &hw_constraints_rates_48);
  687. }
  688. return 0;
  689. }
  690. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  691. * actually used
  692. */
  693. #define VT1724_BUFFER_ALIGN 0x20
  694. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  695. {
  696. struct snd_pcm_runtime *runtime = substream->runtime;
  697. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  698. int chs;
  699. runtime->private_data = (void *)&vt1724_playback_pro_reg;
  700. ice->playback_pro_substream = substream;
  701. runtime->hw = snd_vt1724_playback_pro;
  702. snd_pcm_set_sync(substream);
  703. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  704. set_rate_constraints(ice, substream);
  705. mutex_lock(&ice->open_mutex);
  706. /* calculate the currently available channels */
  707. for (chs = 0; chs < 3; chs++) {
  708. if (ice->pcm_reserved[chs])
  709. break;
  710. }
  711. chs = (chs + 1) * 2;
  712. runtime->hw.channels_max = chs;
  713. if (chs > 2) /* channels must be even */
  714. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  715. mutex_unlock(&ice->open_mutex);
  716. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  717. VT1724_BUFFER_ALIGN);
  718. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  719. VT1724_BUFFER_ALIGN);
  720. return 0;
  721. }
  722. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  723. {
  724. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  725. struct snd_pcm_runtime *runtime = substream->runtime;
  726. runtime->private_data = (void *)&vt1724_capture_pro_reg;
  727. ice->capture_pro_substream = substream;
  728. runtime->hw = snd_vt1724_2ch_stereo;
  729. snd_pcm_set_sync(substream);
  730. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  731. set_rate_constraints(ice, substream);
  732. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  733. VT1724_BUFFER_ALIGN);
  734. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  735. VT1724_BUFFER_ALIGN);
  736. return 0;
  737. }
  738. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  739. {
  740. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  741. if (PRO_RATE_RESET)
  742. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  743. ice->playback_pro_substream = NULL;
  744. return 0;
  745. }
  746. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  747. {
  748. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  749. if (PRO_RATE_RESET)
  750. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  751. ice->capture_pro_substream = NULL;
  752. return 0;
  753. }
  754. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  755. .open = snd_vt1724_playback_pro_open,
  756. .close = snd_vt1724_playback_pro_close,
  757. .ioctl = snd_pcm_lib_ioctl,
  758. .hw_params = snd_vt1724_pcm_hw_params,
  759. .hw_free = snd_vt1724_pcm_hw_free,
  760. .prepare = snd_vt1724_playback_pro_prepare,
  761. .trigger = snd_vt1724_pcm_trigger,
  762. .pointer = snd_vt1724_playback_pro_pointer,
  763. };
  764. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  765. .open = snd_vt1724_capture_pro_open,
  766. .close = snd_vt1724_capture_pro_close,
  767. .ioctl = snd_pcm_lib_ioctl,
  768. .hw_params = snd_vt1724_pcm_hw_params,
  769. .hw_free = snd_vt1724_pcm_hw_free,
  770. .prepare = snd_vt1724_pcm_prepare,
  771. .trigger = snd_vt1724_pcm_trigger,
  772. .pointer = snd_vt1724_pcm_pointer,
  773. };
  774. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 * ice, int device)
  775. {
  776. struct snd_pcm *pcm;
  777. int err;
  778. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  779. if (err < 0)
  780. return err;
  781. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  782. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  783. pcm->private_data = ice;
  784. pcm->info_flags = 0;
  785. strcpy(pcm->name, "ICE1724");
  786. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  787. snd_dma_pci_data(ice->pci),
  788. 256*1024, 256*1024);
  789. ice->pcm_pro = pcm;
  790. return 0;
  791. }
  792. /*
  793. * SPDIF PCM
  794. */
  795. static const struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
  796. .addr = VT1724_MT_PDMA4_ADDR,
  797. .size = VT1724_MT_PDMA4_SIZE,
  798. .count = VT1724_MT_PDMA4_COUNT,
  799. .start = VT1724_PDMA4_START,
  800. };
  801. static const struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
  802. .addr = VT1724_MT_RDMA1_ADDR,
  803. .size = VT1724_MT_RDMA1_SIZE,
  804. .count = VT1724_MT_RDMA1_COUNT,
  805. .start = VT1724_RDMA1_START,
  806. };
  807. /* update spdif control bits; call with reg_lock */
  808. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  809. {
  810. unsigned char cbit, disabled;
  811. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  812. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  813. if (cbit != disabled)
  814. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  815. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  816. if (cbit != disabled)
  817. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  818. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  819. }
  820. /* update SPDIF control bits according to the given rate */
  821. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  822. {
  823. unsigned int val, nval;
  824. unsigned long flags;
  825. spin_lock_irqsave(&ice->reg_lock, flags);
  826. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  827. nval &= ~(7 << 12);
  828. switch (rate) {
  829. case 44100: break;
  830. case 48000: nval |= 2 << 12; break;
  831. case 32000: nval |= 3 << 12; break;
  832. case 88200: nval |= 4 << 12; break;
  833. case 96000: nval |= 5 << 12; break;
  834. case 192000: nval |= 6 << 12; break;
  835. case 176400: nval |= 7 << 12; break;
  836. }
  837. if (val != nval)
  838. update_spdif_bits(ice, nval);
  839. spin_unlock_irqrestore(&ice->reg_lock, flags);
  840. }
  841. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  842. {
  843. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  844. if (! ice->force_pdma4)
  845. update_spdif_rate(ice, substream->runtime->rate);
  846. return snd_vt1724_pcm_prepare(substream);
  847. }
  848. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  849. {
  850. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  851. struct snd_pcm_runtime *runtime = substream->runtime;
  852. runtime->private_data = (void *)&vt1724_playback_spdif_reg;
  853. ice->playback_con_substream = substream;
  854. if (ice->force_pdma4) {
  855. runtime->hw = snd_vt1724_2ch_stereo;
  856. set_rate_constraints(ice, substream);
  857. } else
  858. runtime->hw = snd_vt1724_spdif;
  859. snd_pcm_set_sync(substream);
  860. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  861. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  862. VT1724_BUFFER_ALIGN);
  863. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  864. VT1724_BUFFER_ALIGN);
  865. return 0;
  866. }
  867. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  868. {
  869. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  870. if (PRO_RATE_RESET)
  871. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  872. ice->playback_con_substream = NULL;
  873. return 0;
  874. }
  875. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  876. {
  877. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  878. struct snd_pcm_runtime *runtime = substream->runtime;
  879. runtime->private_data = (void *)&vt1724_capture_spdif_reg;
  880. ice->capture_con_substream = substream;
  881. if (ice->force_rdma1) {
  882. runtime->hw = snd_vt1724_2ch_stereo;
  883. set_rate_constraints(ice, substream);
  884. } else
  885. runtime->hw = snd_vt1724_spdif;
  886. snd_pcm_set_sync(substream);
  887. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  888. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  889. VT1724_BUFFER_ALIGN);
  890. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  891. VT1724_BUFFER_ALIGN);
  892. return 0;
  893. }
  894. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  895. {
  896. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  897. if (PRO_RATE_RESET)
  898. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  899. ice->capture_con_substream = NULL;
  900. return 0;
  901. }
  902. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  903. .open = snd_vt1724_playback_spdif_open,
  904. .close = snd_vt1724_playback_spdif_close,
  905. .ioctl = snd_pcm_lib_ioctl,
  906. .hw_params = snd_vt1724_pcm_hw_params,
  907. .hw_free = snd_vt1724_pcm_hw_free,
  908. .prepare = snd_vt1724_playback_spdif_prepare,
  909. .trigger = snd_vt1724_pcm_trigger,
  910. .pointer = snd_vt1724_pcm_pointer,
  911. };
  912. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  913. .open = snd_vt1724_capture_spdif_open,
  914. .close = snd_vt1724_capture_spdif_close,
  915. .ioctl = snd_pcm_lib_ioctl,
  916. .hw_params = snd_vt1724_pcm_hw_params,
  917. .hw_free = snd_vt1724_pcm_hw_free,
  918. .prepare = snd_vt1724_pcm_prepare,
  919. .trigger = snd_vt1724_pcm_trigger,
  920. .pointer = snd_vt1724_pcm_pointer,
  921. };
  922. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 * ice, int device)
  923. {
  924. char *name;
  925. struct snd_pcm *pcm;
  926. int play, capt;
  927. int err;
  928. if (ice->force_pdma4 ||
  929. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  930. play = 1;
  931. ice->has_spdif = 1;
  932. } else
  933. play = 0;
  934. if (ice->force_rdma1 ||
  935. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  936. capt = 1;
  937. ice->has_spdif = 1;
  938. } else
  939. capt = 0;
  940. if (! play && ! capt)
  941. return 0; /* no spdif device */
  942. if (ice->force_pdma4 || ice->force_rdma1)
  943. name = "ICE1724 Secondary";
  944. else
  945. name = "IEC1724 IEC958";
  946. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  947. if (err < 0)
  948. return err;
  949. if (play)
  950. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  951. &snd_vt1724_playback_spdif_ops);
  952. if (capt)
  953. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  954. &snd_vt1724_capture_spdif_ops);
  955. pcm->private_data = ice;
  956. pcm->info_flags = 0;
  957. strcpy(pcm->name, name);
  958. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  959. snd_dma_pci_data(ice->pci),
  960. 64*1024, 64*1024);
  961. ice->pcm = pcm;
  962. return 0;
  963. }
  964. /*
  965. * independent surround PCMs
  966. */
  967. static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  968. {
  969. .addr = VT1724_MT_PDMA1_ADDR,
  970. .size = VT1724_MT_PDMA1_SIZE,
  971. .count = VT1724_MT_PDMA1_COUNT,
  972. .start = VT1724_PDMA1_START,
  973. },
  974. {
  975. .addr = VT1724_MT_PDMA2_ADDR,
  976. .size = VT1724_MT_PDMA2_SIZE,
  977. .count = VT1724_MT_PDMA2_COUNT,
  978. .start = VT1724_PDMA2_START,
  979. },
  980. {
  981. .addr = VT1724_MT_PDMA3_ADDR,
  982. .size = VT1724_MT_PDMA3_SIZE,
  983. .count = VT1724_MT_PDMA3_COUNT,
  984. .start = VT1724_PDMA3_START,
  985. },
  986. };
  987. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  988. {
  989. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  990. unsigned char val;
  991. spin_lock_irq(&ice->reg_lock);
  992. val = 3 - substream->number;
  993. if (inb(ICEMT1724(ice, BURST)) < val)
  994. outb(val, ICEMT1724(ice, BURST));
  995. spin_unlock_irq(&ice->reg_lock);
  996. return snd_vt1724_pcm_prepare(substream);
  997. }
  998. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  999. {
  1000. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1001. struct snd_pcm_runtime *runtime = substream->runtime;
  1002. mutex_lock(&ice->open_mutex);
  1003. /* already used by PDMA0? */
  1004. if (ice->pcm_reserved[substream->number]) {
  1005. mutex_unlock(&ice->open_mutex);
  1006. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1007. }
  1008. mutex_unlock(&ice->open_mutex);
  1009. runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
  1010. ice->playback_con_substream_ds[substream->number] = substream;
  1011. runtime->hw = snd_vt1724_2ch_stereo;
  1012. snd_pcm_set_sync(substream);
  1013. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1014. set_rate_constraints(ice, substream);
  1015. return 0;
  1016. }
  1017. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1018. {
  1019. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1020. if (PRO_RATE_RESET)
  1021. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1022. ice->playback_con_substream_ds[substream->number] = NULL;
  1023. ice->pcm_reserved[substream->number] = NULL;
  1024. return 0;
  1025. }
  1026. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1027. .open = snd_vt1724_playback_indep_open,
  1028. .close = snd_vt1724_playback_indep_close,
  1029. .ioctl = snd_pcm_lib_ioctl,
  1030. .hw_params = snd_vt1724_pcm_hw_params,
  1031. .hw_free = snd_vt1724_pcm_hw_free,
  1032. .prepare = snd_vt1724_playback_indep_prepare,
  1033. .trigger = snd_vt1724_pcm_trigger,
  1034. .pointer = snd_vt1724_pcm_pointer,
  1035. };
  1036. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 * ice, int device)
  1037. {
  1038. struct snd_pcm *pcm;
  1039. int play;
  1040. int err;
  1041. play = ice->num_total_dacs / 2 - 1;
  1042. if (play <= 0)
  1043. return 0;
  1044. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1045. if (err < 0)
  1046. return err;
  1047. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1048. &snd_vt1724_playback_indep_ops);
  1049. pcm->private_data = ice;
  1050. pcm->info_flags = 0;
  1051. strcpy(pcm->name, "ICE1724 Surround PCM");
  1052. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1053. snd_dma_pci_data(ice->pci),
  1054. 64*1024, 64*1024);
  1055. ice->pcm_ds = pcm;
  1056. return 0;
  1057. }
  1058. /*
  1059. * Mixer section
  1060. */
  1061. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 * ice)
  1062. {
  1063. int err;
  1064. if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1065. struct snd_ac97_bus *pbus;
  1066. struct snd_ac97_template ac97;
  1067. static struct snd_ac97_bus_ops ops = {
  1068. .write = snd_vt1724_ac97_write,
  1069. .read = snd_vt1724_ac97_read,
  1070. };
  1071. /* cold reset */
  1072. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1073. mdelay(5); /* FIXME */
  1074. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1075. if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
  1076. return err;
  1077. memset(&ac97, 0, sizeof(ac97));
  1078. ac97.private_data = ice;
  1079. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1080. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1081. else
  1082. return 0;
  1083. }
  1084. /* I2S mixer only */
  1085. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1086. return 0;
  1087. }
  1088. /*
  1089. *
  1090. */
  1091. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1092. {
  1093. return (unsigned int)ice->eeprom.data[idx] | \
  1094. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1095. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1096. }
  1097. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1098. struct snd_info_buffer *buffer)
  1099. {
  1100. struct snd_ice1712 *ice = entry->private_data;
  1101. unsigned int idx;
  1102. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1103. snd_iprintf(buffer, "EEPROM:\n");
  1104. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1105. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1106. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1107. snd_iprintf(buffer, " System Config : 0x%x\n",
  1108. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1109. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1110. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1111. snd_iprintf(buffer, " I2S : 0x%x\n",
  1112. ice->eeprom.data[ICE_EEP2_I2S]);
  1113. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1114. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1115. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1116. ice->eeprom.gpiodir);
  1117. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1118. ice->eeprom.gpiomask);
  1119. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1120. ice->eeprom.gpiostate);
  1121. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1122. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1123. idx, ice->eeprom.data[idx]);
  1124. snd_iprintf(buffer, "\nRegisters:\n");
  1125. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1126. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1127. for (idx = 0x0; idx < 0x20 ; idx++)
  1128. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1129. idx, inb(ice->port+idx));
  1130. for (idx = 0x0; idx < 0x30 ; idx++)
  1131. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1132. idx, inb(ice->profi_port+idx));
  1133. }
  1134. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 * ice)
  1135. {
  1136. struct snd_info_entry *entry;
  1137. if (! snd_card_proc_new(ice->card, "ice1724", &entry))
  1138. snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
  1139. }
  1140. /*
  1141. *
  1142. */
  1143. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1144. struct snd_ctl_elem_info *uinfo)
  1145. {
  1146. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1147. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1148. return 0;
  1149. }
  1150. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1151. struct snd_ctl_elem_value *ucontrol)
  1152. {
  1153. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1154. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1155. return 0;
  1156. }
  1157. static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1158. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1159. .name = "ICE1724 EEPROM",
  1160. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1161. .info = snd_vt1724_eeprom_info,
  1162. .get = snd_vt1724_eeprom_get
  1163. };
  1164. /*
  1165. */
  1166. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1167. struct snd_ctl_elem_info *uinfo)
  1168. {
  1169. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1170. uinfo->count = 1;
  1171. return 0;
  1172. }
  1173. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1174. {
  1175. unsigned int val, rbits;
  1176. val = diga->status[0] & 0x03; /* professional, non-audio */
  1177. if (val & 0x01) {
  1178. /* professional */
  1179. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1180. IEC958_AES0_PRO_EMPHASIS_5015)
  1181. val |= 1U << 3;
  1182. rbits = (diga->status[4] >> 3) & 0x0f;
  1183. if (rbits) {
  1184. switch (rbits) {
  1185. case 2: val |= 5 << 12; break; /* 96k */
  1186. case 3: val |= 6 << 12; break; /* 192k */
  1187. case 10: val |= 4 << 12; break; /* 88.2k */
  1188. case 11: val |= 7 << 12; break; /* 176.4k */
  1189. }
  1190. } else {
  1191. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1192. case IEC958_AES0_PRO_FS_44100:
  1193. break;
  1194. case IEC958_AES0_PRO_FS_32000:
  1195. val |= 3U << 12;
  1196. break;
  1197. default:
  1198. val |= 2U << 12;
  1199. break;
  1200. }
  1201. }
  1202. } else {
  1203. /* consumer */
  1204. val |= diga->status[1] & 0x04; /* copyright */
  1205. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1206. IEC958_AES0_CON_EMPHASIS_5015)
  1207. val |= 1U << 3;
  1208. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1209. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1210. }
  1211. return val;
  1212. }
  1213. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1214. {
  1215. memset(diga->status, 0, sizeof(diga->status));
  1216. diga->status[0] = val & 0x03; /* professional, non-audio */
  1217. if (val & 0x01) {
  1218. /* professional */
  1219. if (val & (1U << 3))
  1220. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1221. switch ((val >> 12) & 0x7) {
  1222. case 0:
  1223. break;
  1224. case 2:
  1225. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1226. break;
  1227. default:
  1228. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1229. break;
  1230. }
  1231. } else {
  1232. /* consumer */
  1233. diga->status[0] |= val & (1U << 2); /* copyright */
  1234. if (val & (1U << 3))
  1235. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1236. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1237. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1238. }
  1239. }
  1240. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1241. struct snd_ctl_elem_value *ucontrol)
  1242. {
  1243. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1244. unsigned int val;
  1245. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1246. decode_spdif_bits(&ucontrol->value.iec958, val);
  1247. return 0;
  1248. }
  1249. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1250. struct snd_ctl_elem_value *ucontrol)
  1251. {
  1252. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1253. unsigned int val, old;
  1254. val = encode_spdif_bits(&ucontrol->value.iec958);
  1255. spin_lock_irq(&ice->reg_lock);
  1256. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1257. if (val != old)
  1258. update_spdif_bits(ice, val);
  1259. spin_unlock_irq(&ice->reg_lock);
  1260. return (val != old);
  1261. }
  1262. static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1263. {
  1264. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1265. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1266. .info = snd_vt1724_spdif_info,
  1267. .get = snd_vt1724_spdif_default_get,
  1268. .put = snd_vt1724_spdif_default_put
  1269. };
  1270. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1271. struct snd_ctl_elem_value *ucontrol)
  1272. {
  1273. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1274. IEC958_AES0_PROFESSIONAL |
  1275. IEC958_AES0_CON_NOT_COPYRIGHT |
  1276. IEC958_AES0_CON_EMPHASIS;
  1277. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1278. IEC958_AES1_CON_CATEGORY;
  1279. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1280. return 0;
  1281. }
  1282. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1283. struct snd_ctl_elem_value *ucontrol)
  1284. {
  1285. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1286. IEC958_AES0_PROFESSIONAL |
  1287. IEC958_AES0_PRO_FS |
  1288. IEC958_AES0_PRO_EMPHASIS;
  1289. return 0;
  1290. }
  1291. static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1292. {
  1293. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1294. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1295. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1296. .info = snd_vt1724_spdif_info,
  1297. .get = snd_vt1724_spdif_maskc_get,
  1298. };
  1299. static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1300. {
  1301. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1302. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1303. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
  1304. .info = snd_vt1724_spdif_info,
  1305. .get = snd_vt1724_spdif_maskp_get,
  1306. };
  1307. #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
  1308. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1309. struct snd_ctl_elem_value *ucontrol)
  1310. {
  1311. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1312. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1313. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1314. return 0;
  1315. }
  1316. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1317. struct snd_ctl_elem_value *ucontrol)
  1318. {
  1319. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1320. unsigned char old, val;
  1321. spin_lock_irq(&ice->reg_lock);
  1322. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1323. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1324. if (ucontrol->value.integer.value[0])
  1325. val |= VT1724_CFG_SPDIF_OUT_EN;
  1326. if (old != val)
  1327. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1328. spin_unlock_irq(&ice->reg_lock);
  1329. return old != val;
  1330. }
  1331. static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1332. {
  1333. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1334. /* FIXME: the following conflict with IEC958 Playback Route */
  1335. // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
  1336. .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
  1337. .info = snd_vt1724_spdif_sw_info,
  1338. .get = snd_vt1724_spdif_sw_get,
  1339. .put = snd_vt1724_spdif_sw_put
  1340. };
  1341. #if 0 /* NOT USED YET */
  1342. /*
  1343. * GPIO access from extern
  1344. */
  1345. #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
  1346. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1347. struct snd_ctl_elem_value *ucontrol)
  1348. {
  1349. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1350. int shift = kcontrol->private_value & 0xff;
  1351. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1352. snd_ice1712_save_gpio_status(ice);
  1353. ucontrol->value.integer.value[0] =
  1354. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1355. snd_ice1712_restore_gpio_status(ice);
  1356. return 0;
  1357. }
  1358. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1359. struct snd_ctl_elem_value *ucontrol)
  1360. {
  1361. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1362. int shift = kcontrol->private_value & 0xff;
  1363. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1364. unsigned int val, nval;
  1365. if (kcontrol->private_value & (1 << 31))
  1366. return -EPERM;
  1367. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1368. snd_ice1712_save_gpio_status(ice);
  1369. val = snd_ice1712_gpio_read(ice);
  1370. nval |= val & ~(1 << shift);
  1371. if (val != nval)
  1372. snd_ice1712_gpio_write(ice, nval);
  1373. snd_ice1712_restore_gpio_status(ice);
  1374. return val != nval;
  1375. }
  1376. #endif /* NOT USED YET */
  1377. /*
  1378. * rate
  1379. */
  1380. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1381. struct snd_ctl_elem_info *uinfo)
  1382. {
  1383. static const char * const texts_1724[] = {
  1384. "8000", /* 0: 6 */
  1385. "9600", /* 1: 3 */
  1386. "11025", /* 2: 10 */
  1387. "12000", /* 3: 2 */
  1388. "16000", /* 4: 5 */
  1389. "22050", /* 5: 9 */
  1390. "24000", /* 6: 1 */
  1391. "32000", /* 7: 4 */
  1392. "44100", /* 8: 8 */
  1393. "48000", /* 9: 0 */
  1394. "64000", /* 10: 15 */
  1395. "88200", /* 11: 11 */
  1396. "96000", /* 12: 7 */
  1397. "176400", /* 13: 12 */
  1398. "192000", /* 14: 14 */
  1399. "IEC958 Input", /* 15: -- */
  1400. };
  1401. static const char * const texts_1720[] = {
  1402. "8000", /* 0: 6 */
  1403. "9600", /* 1: 3 */
  1404. "11025", /* 2: 10 */
  1405. "12000", /* 3: 2 */
  1406. "16000", /* 4: 5 */
  1407. "22050", /* 5: 9 */
  1408. "24000", /* 6: 1 */
  1409. "32000", /* 7: 4 */
  1410. "44100", /* 8: 8 */
  1411. "48000", /* 9: 0 */
  1412. "64000", /* 10: 15 */
  1413. "88200", /* 11: 11 */
  1414. "96000", /* 12: 7 */
  1415. "IEC958 Input", /* 13: -- */
  1416. };
  1417. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1418. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1419. uinfo->count = 1;
  1420. uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16;
  1421. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1422. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1423. strcpy(uinfo->value.enumerated.name,
  1424. ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] :
  1425. texts_1724[uinfo->value.enumerated.item]);
  1426. return 0;
  1427. }
  1428. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1429. struct snd_ctl_elem_value *ucontrol)
  1430. {
  1431. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1432. static const unsigned char xlate[16] = {
  1433. 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
  1434. };
  1435. unsigned char val;
  1436. spin_lock_irq(&ice->reg_lock);
  1437. if (is_spdif_master(ice)) {
  1438. ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15;
  1439. } else {
  1440. val = xlate[inb(ICEMT1724(ice, RATE)) & 15];
  1441. if (val == 255) {
  1442. snd_BUG();
  1443. val = 0;
  1444. }
  1445. ucontrol->value.enumerated.item[0] = val;
  1446. }
  1447. spin_unlock_irq(&ice->reg_lock);
  1448. return 0;
  1449. }
  1450. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1451. struct snd_ctl_elem_value *ucontrol)
  1452. {
  1453. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1454. unsigned char oval;
  1455. int rate;
  1456. int change = 0;
  1457. int spdif = ice->vt1720 ? 13 : 15;
  1458. spin_lock_irq(&ice->reg_lock);
  1459. oval = inb(ICEMT1724(ice, RATE));
  1460. if (ucontrol->value.enumerated.item[0] == spdif) {
  1461. unsigned char i2s_oval;
  1462. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1463. /* setting 256fs */
  1464. i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
  1465. outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X,
  1466. ICEMT1724(ice, I2S_FORMAT));
  1467. } else {
  1468. rate = rates[ucontrol->value.integer.value[0] % 15];
  1469. if (rate <= get_max_rate(ice)) {
  1470. PRO_RATE_DEFAULT = rate;
  1471. spin_unlock_irq(&ice->reg_lock);
  1472. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
  1473. spin_lock_irq(&ice->reg_lock);
  1474. }
  1475. }
  1476. change = inb(ICEMT1724(ice, RATE)) != oval;
  1477. spin_unlock_irq(&ice->reg_lock);
  1478. if ((oval & VT1724_SPDIF_MASTER) !=
  1479. (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) {
  1480. /* notify akm chips as well */
  1481. if (is_spdif_master(ice)) {
  1482. unsigned int i;
  1483. for (i = 0; i < ice->akm_codecs; i++) {
  1484. if (ice->akm[i].ops.set_rate_val)
  1485. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1486. }
  1487. }
  1488. }
  1489. return change;
  1490. }
  1491. static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1492. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1493. .name = "Multi Track Internal Clock",
  1494. .info = snd_vt1724_pro_internal_clock_info,
  1495. .get = snd_vt1724_pro_internal_clock_get,
  1496. .put = snd_vt1724_pro_internal_clock_put
  1497. };
  1498. #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
  1499. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1500. struct snd_ctl_elem_value *ucontrol)
  1501. {
  1502. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1503. return 0;
  1504. }
  1505. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1506. struct snd_ctl_elem_value *ucontrol)
  1507. {
  1508. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1509. int change = 0, nval;
  1510. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1511. spin_lock_irq(&ice->reg_lock);
  1512. change = PRO_RATE_LOCKED != nval;
  1513. PRO_RATE_LOCKED = nval;
  1514. spin_unlock_irq(&ice->reg_lock);
  1515. return change;
  1516. }
  1517. static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1518. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1519. .name = "Multi Track Rate Locking",
  1520. .info = snd_vt1724_pro_rate_locking_info,
  1521. .get = snd_vt1724_pro_rate_locking_get,
  1522. .put = snd_vt1724_pro_rate_locking_put
  1523. };
  1524. #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
  1525. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1526. struct snd_ctl_elem_value *ucontrol)
  1527. {
  1528. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1529. return 0;
  1530. }
  1531. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1532. struct snd_ctl_elem_value *ucontrol)
  1533. {
  1534. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1535. int change = 0, nval;
  1536. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1537. spin_lock_irq(&ice->reg_lock);
  1538. change = PRO_RATE_RESET != nval;
  1539. PRO_RATE_RESET = nval;
  1540. spin_unlock_irq(&ice->reg_lock);
  1541. return change;
  1542. }
  1543. static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1544. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1545. .name = "Multi Track Rate Reset",
  1546. .info = snd_vt1724_pro_rate_reset_info,
  1547. .get = snd_vt1724_pro_rate_reset_get,
  1548. .put = snd_vt1724_pro_rate_reset_put
  1549. };
  1550. /*
  1551. * routing
  1552. */
  1553. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1554. struct snd_ctl_elem_info *uinfo)
  1555. {
  1556. static char *texts[] = {
  1557. "PCM Out", /* 0 */
  1558. "H/W In 0", "H/W In 1", /* 1-2 */
  1559. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1560. };
  1561. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1562. uinfo->count = 1;
  1563. uinfo->value.enumerated.items = 5;
  1564. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1565. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1566. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1567. return 0;
  1568. }
  1569. static inline int analog_route_shift(int idx)
  1570. {
  1571. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1572. }
  1573. static inline int digital_route_shift(int idx)
  1574. {
  1575. return idx * 3;
  1576. }
  1577. static int get_route_val(struct snd_ice1712 *ice, int shift)
  1578. {
  1579. unsigned long val;
  1580. unsigned char eitem;
  1581. static const unsigned char xlate[8] = {
  1582. 0, 255, 1, 2, 255, 255, 3, 4,
  1583. };
  1584. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1585. val >>= shift;
  1586. val &= 7; //we now have 3 bits per output
  1587. eitem = xlate[val];
  1588. if (eitem == 255) {
  1589. snd_BUG();
  1590. return 0;
  1591. }
  1592. return eitem;
  1593. }
  1594. static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
  1595. {
  1596. unsigned int old_val, nval;
  1597. int change;
  1598. static const unsigned char xroute[8] = {
  1599. 0, /* PCM */
  1600. 2, /* PSDIN0 Left */
  1601. 3, /* PSDIN0 Right */
  1602. 6, /* SPDIN Left */
  1603. 7, /* SPDIN Right */
  1604. };
  1605. nval = xroute[val % 5];
  1606. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1607. val &= ~(0x07 << shift);
  1608. val |= nval << shift;
  1609. change = val != old_val;
  1610. if (change)
  1611. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1612. return change;
  1613. }
  1614. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1615. struct snd_ctl_elem_value *ucontrol)
  1616. {
  1617. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1618. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1619. ucontrol->value.enumerated.item[0] =
  1620. get_route_val(ice, analog_route_shift(idx));
  1621. return 0;
  1622. }
  1623. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1624. struct snd_ctl_elem_value *ucontrol)
  1625. {
  1626. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1627. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1628. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1629. analog_route_shift(idx));
  1630. }
  1631. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1632. struct snd_ctl_elem_value *ucontrol)
  1633. {
  1634. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1635. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1636. ucontrol->value.enumerated.item[0] =
  1637. get_route_val(ice, digital_route_shift(idx));
  1638. return 0;
  1639. }
  1640. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1641. struct snd_ctl_elem_value *ucontrol)
  1642. {
  1643. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1644. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1645. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1646. digital_route_shift(idx));
  1647. }
  1648. static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
  1649. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1650. .name = "H/W Playback Route",
  1651. .info = snd_vt1724_pro_route_info,
  1652. .get = snd_vt1724_pro_route_analog_get,
  1653. .put = snd_vt1724_pro_route_analog_put,
  1654. };
  1655. static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1656. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1657. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
  1658. .info = snd_vt1724_pro_route_info,
  1659. .get = snd_vt1724_pro_route_spdif_get,
  1660. .put = snd_vt1724_pro_route_spdif_put,
  1661. .count = 2,
  1662. };
  1663. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1664. struct snd_ctl_elem_info *uinfo)
  1665. {
  1666. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1667. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1668. uinfo->value.integer.min = 0;
  1669. uinfo->value.integer.max = 255;
  1670. return 0;
  1671. }
  1672. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1673. struct snd_ctl_elem_value *ucontrol)
  1674. {
  1675. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1676. int idx;
  1677. spin_lock_irq(&ice->reg_lock);
  1678. for (idx = 0; idx < 22; idx++) {
  1679. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1680. ucontrol->value.integer.value[idx] =
  1681. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1682. }
  1683. spin_unlock_irq(&ice->reg_lock);
  1684. return 0;
  1685. }
  1686. static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1687. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1688. .name = "Multi Track Peak",
  1689. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1690. .info = snd_vt1724_pro_peak_info,
  1691. .get = snd_vt1724_pro_peak_get
  1692. };
  1693. /*
  1694. *
  1695. */
  1696. static struct snd_ice1712_card_info no_matched __devinitdata;
  1697. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1698. snd_vt1724_revo_cards,
  1699. snd_vt1724_amp_cards,
  1700. snd_vt1724_aureon_cards,
  1701. snd_vt1720_mobo_cards,
  1702. snd_vt1720_pontis_cards,
  1703. snd_vt1724_prodigy_hifi_cards,
  1704. snd_vt1724_prodigy192_cards,
  1705. snd_vt1724_juli_cards,
  1706. snd_vt1724_phase_cards,
  1707. snd_vt1724_wtm_cards,
  1708. snd_vt1724_se_cards,
  1709. NULL,
  1710. };
  1711. /*
  1712. */
  1713. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1714. {
  1715. int t = 0x10000;
  1716. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1717. ;
  1718. if (t == -1)
  1719. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1720. }
  1721. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1722. unsigned char dev, unsigned char addr)
  1723. {
  1724. unsigned char val;
  1725. mutex_lock(&ice->i2c_mutex);
  1726. wait_i2c_busy(ice);
  1727. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1728. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1729. wait_i2c_busy(ice);
  1730. val = inb(ICEREG1724(ice, I2C_DATA));
  1731. mutex_unlock(&ice->i2c_mutex);
  1732. //printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  1733. return val;
  1734. }
  1735. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  1736. unsigned char dev, unsigned char addr, unsigned char data)
  1737. {
  1738. mutex_lock(&ice->i2c_mutex);
  1739. wait_i2c_busy(ice);
  1740. //printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  1741. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1742. outb(data, ICEREG1724(ice, I2C_DATA));
  1743. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1744. wait_i2c_busy(ice);
  1745. mutex_unlock(&ice->i2c_mutex);
  1746. }
  1747. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  1748. const char *modelname)
  1749. {
  1750. const int dev = 0xa0; /* EEPROM device address */
  1751. unsigned int i, size;
  1752. struct snd_ice1712_card_info * const *tbl, *c;
  1753. if (! modelname || ! *modelname) {
  1754. ice->eeprom.subvendor = 0;
  1755. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1756. ice->eeprom.subvendor =
  1757. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1758. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1759. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1760. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1761. if (ice->eeprom.subvendor == 0 ||
  1762. ice->eeprom.subvendor == (unsigned int)-1) {
  1763. /* invalid subvendor from EEPROM, try the PCI
  1764. * subststem ID instead
  1765. */
  1766. u16 vendor, device;
  1767. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  1768. &vendor);
  1769. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1770. ice->eeprom.subvendor =
  1771. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1772. if (ice->eeprom.subvendor == 0 ||
  1773. ice->eeprom.subvendor == (unsigned int)-1) {
  1774. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1775. return -ENXIO;
  1776. }
  1777. }
  1778. }
  1779. for (tbl = card_tables; *tbl; tbl++) {
  1780. for (c = *tbl; c->subvendor; c++) {
  1781. if (modelname && c->model &&
  1782. ! strcmp(modelname, c->model)) {
  1783. printk(KERN_INFO "ice1724: Using board model %s\n",
  1784. c->name);
  1785. ice->eeprom.subvendor = c->subvendor;
  1786. } else if (c->subvendor != ice->eeprom.subvendor)
  1787. continue;
  1788. if (! c->eeprom_size || ! c->eeprom_data)
  1789. goto found;
  1790. /* if the EEPROM is given by the driver, use it */
  1791. snd_printdd("using the defined eeprom..\n");
  1792. ice->eeprom.version = 2;
  1793. ice->eeprom.size = c->eeprom_size + 6;
  1794. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1795. goto read_skipped;
  1796. }
  1797. }
  1798. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  1799. ice->eeprom.subvendor);
  1800. found:
  1801. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1802. if (ice->eeprom.size < 6)
  1803. ice->eeprom.size = 32;
  1804. else if (ice->eeprom.size > 32) {
  1805. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  1806. ice->eeprom.size);
  1807. return -EIO;
  1808. }
  1809. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1810. if (ice->eeprom.version != 2)
  1811. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  1812. ice->eeprom.version);
  1813. size = ice->eeprom.size - 6;
  1814. for (i = 0; i < size; i++)
  1815. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1816. read_skipped:
  1817. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1818. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1819. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  1820. return 0;
  1821. }
  1822. static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
  1823. {
  1824. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  1825. udelay(200);
  1826. outb(0, ICEREG1724(ice, CONTROL));
  1827. udelay(200);
  1828. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  1829. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  1830. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  1831. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  1832. ice->gpio.write_mask = ice->eeprom.gpiomask;
  1833. ice->gpio.direction = ice->eeprom.gpiodir;
  1834. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  1835. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  1836. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  1837. outb(0, ICEREG1724(ice, POWERDOWN));
  1838. return 0;
  1839. }
  1840. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  1841. {
  1842. int err;
  1843. struct snd_kcontrol *kctl;
  1844. snd_assert(ice->pcm != NULL, return -EIO);
  1845. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  1846. if (err < 0)
  1847. return err;
  1848. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  1849. if (err < 0)
  1850. return err;
  1851. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  1852. if (err < 0)
  1853. return err;
  1854. kctl->id.device = ice->pcm->device;
  1855. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  1856. if (err < 0)
  1857. return err;
  1858. kctl->id.device = ice->pcm->device;
  1859. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  1860. if (err < 0)
  1861. return err;
  1862. kctl->id.device = ice->pcm->device;
  1863. #if 0 /* use default only */
  1864. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  1865. if (err < 0)
  1866. return err;
  1867. kctl->id.device = ice->pcm->device;
  1868. ice->spdif.stream_ctl = kctl;
  1869. #endif
  1870. return 0;
  1871. }
  1872. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  1873. {
  1874. int err;
  1875. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  1876. if (err < 0)
  1877. return err;
  1878. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  1879. if (err < 0)
  1880. return err;
  1881. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  1882. if (err < 0)
  1883. return err;
  1884. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  1885. if (err < 0)
  1886. return err;
  1887. if (ice->num_total_dacs > 0) {
  1888. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  1889. tmp.count = ice->num_total_dacs;
  1890. if (ice->vt1720 && tmp.count > 2)
  1891. tmp.count = 2;
  1892. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  1893. if (err < 0)
  1894. return err;
  1895. }
  1896. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  1897. if (err < 0)
  1898. return err;
  1899. return 0;
  1900. }
  1901. static int snd_vt1724_free(struct snd_ice1712 *ice)
  1902. {
  1903. if (! ice->port)
  1904. goto __hw_end;
  1905. /* mask all interrupts */
  1906. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  1907. outb(0xff, ICEREG1724(ice, IRQMASK));
  1908. /* --- */
  1909. __hw_end:
  1910. if (ice->irq >= 0) {
  1911. synchronize_irq(ice->irq);
  1912. free_irq(ice->irq, ice);
  1913. }
  1914. pci_release_regions(ice->pci);
  1915. snd_ice1712_akm4xxx_free(ice);
  1916. pci_disable_device(ice->pci);
  1917. kfree(ice->spec);
  1918. kfree(ice);
  1919. return 0;
  1920. }
  1921. static int snd_vt1724_dev_free(struct snd_device *device)
  1922. {
  1923. struct snd_ice1712 *ice = device->device_data;
  1924. return snd_vt1724_free(ice);
  1925. }
  1926. static int __devinit snd_vt1724_create(struct snd_card *card,
  1927. struct pci_dev *pci,
  1928. const char *modelname,
  1929. struct snd_ice1712 ** r_ice1712)
  1930. {
  1931. struct snd_ice1712 *ice;
  1932. int err;
  1933. unsigned char mask;
  1934. static struct snd_device_ops ops = {
  1935. .dev_free = snd_vt1724_dev_free,
  1936. };
  1937. *r_ice1712 = NULL;
  1938. /* enable PCI device */
  1939. if ((err = pci_enable_device(pci)) < 0)
  1940. return err;
  1941. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  1942. if (ice == NULL) {
  1943. pci_disable_device(pci);
  1944. return -ENOMEM;
  1945. }
  1946. ice->vt1724 = 1;
  1947. spin_lock_init(&ice->reg_lock);
  1948. mutex_init(&ice->gpio_mutex);
  1949. mutex_init(&ice->open_mutex);
  1950. mutex_init(&ice->i2c_mutex);
  1951. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  1952. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  1953. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  1954. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  1955. ice->card = card;
  1956. ice->pci = pci;
  1957. ice->irq = -1;
  1958. pci_set_master(pci);
  1959. snd_vt1724_proc_init(ice);
  1960. synchronize_irq(pci->irq);
  1961. if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
  1962. kfree(ice);
  1963. pci_disable_device(pci);
  1964. return err;
  1965. }
  1966. ice->port = pci_resource_start(pci, 0);
  1967. ice->profi_port = pci_resource_start(pci, 1);
  1968. if (request_irq(pci->irq, snd_vt1724_interrupt,
  1969. IRQF_SHARED, "ICE1724", ice)) {
  1970. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  1971. snd_vt1724_free(ice);
  1972. return -EIO;
  1973. }
  1974. ice->irq = pci->irq;
  1975. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  1976. snd_vt1724_free(ice);
  1977. return -EIO;
  1978. }
  1979. if (snd_vt1724_chip_init(ice) < 0) {
  1980. snd_vt1724_free(ice);
  1981. return -EIO;
  1982. }
  1983. /* unmask used interrupts */
  1984. if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401))
  1985. mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
  1986. else
  1987. mask = 0;
  1988. outb(mask, ICEREG1724(ice, IRQMASK));
  1989. /* don't handle FIFO overrun/underruns (just yet),
  1990. * since they cause machine lockups
  1991. */
  1992. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  1993. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
  1994. snd_vt1724_free(ice);
  1995. return err;
  1996. }
  1997. snd_card_set_dev(card, &pci->dev);
  1998. *r_ice1712 = ice;
  1999. return 0;
  2000. }
  2001. /*
  2002. *
  2003. * Registration
  2004. *
  2005. */
  2006. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  2007. const struct pci_device_id *pci_id)
  2008. {
  2009. static int dev;
  2010. struct snd_card *card;
  2011. struct snd_ice1712 *ice;
  2012. int pcm_dev = 0, err;
  2013. struct snd_ice1712_card_info * const *tbl, *c;
  2014. if (dev >= SNDRV_CARDS)
  2015. return -ENODEV;
  2016. if (!enable[dev]) {
  2017. dev++;
  2018. return -ENOENT;
  2019. }
  2020. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  2021. if (card == NULL)
  2022. return -ENOMEM;
  2023. strcpy(card->driver, "ICE1724");
  2024. strcpy(card->shortname, "ICEnsemble ICE1724");
  2025. if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
  2026. snd_card_free(card);
  2027. return err;
  2028. }
  2029. for (tbl = card_tables; *tbl; tbl++) {
  2030. for (c = *tbl; c->subvendor; c++) {
  2031. if (c->subvendor == ice->eeprom.subvendor) {
  2032. strcpy(card->shortname, c->name);
  2033. if (c->driver) /* specific driver? */
  2034. strcpy(card->driver, c->driver);
  2035. if (c->chip_init) {
  2036. if ((err = c->chip_init(ice)) < 0) {
  2037. snd_card_free(card);
  2038. return err;
  2039. }
  2040. }
  2041. goto __found;
  2042. }
  2043. }
  2044. }
  2045. c = &no_matched;
  2046. __found:
  2047. /*
  2048. * VT1724 has separate DMAs for the analog and the SPDIF streams while
  2049. * ICE1712 has only one for both (mixed up).
  2050. *
  2051. * Confusingly the analog PCM is named "professional" here because it
  2052. * was called so in ice1712 driver, and vt1724 driver is derived from
  2053. * ice1712 driver.
  2054. */
  2055. if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
  2056. snd_card_free(card);
  2057. return err;
  2058. }
  2059. if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
  2060. snd_card_free(card);
  2061. return err;
  2062. }
  2063. if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
  2064. snd_card_free(card);
  2065. return err;
  2066. }
  2067. if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
  2068. snd_card_free(card);
  2069. return err;
  2070. }
  2071. if ((err = snd_vt1724_build_controls(ice)) < 0) {
  2072. snd_card_free(card);
  2073. return err;
  2074. }
  2075. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2076. if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
  2077. snd_card_free(card);
  2078. return err;
  2079. }
  2080. }
  2081. if (c->build_controls) {
  2082. if ((err = c->build_controls(ice)) < 0) {
  2083. snd_card_free(card);
  2084. return err;
  2085. }
  2086. }
  2087. if (! c->no_mpu401) {
  2088. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2089. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  2090. ICEREG1724(ice, MPU_CTRL),
  2091. MPU401_INFO_INTEGRATED,
  2092. ice->irq, 0,
  2093. &ice->rmidi[0])) < 0) {
  2094. snd_card_free(card);
  2095. return err;
  2096. }
  2097. }
  2098. }
  2099. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2100. card->shortname, ice->port, ice->irq);
  2101. if ((err = snd_card_register(card)) < 0) {
  2102. snd_card_free(card);
  2103. return err;
  2104. }
  2105. pci_set_drvdata(pci, card);
  2106. dev++;
  2107. return 0;
  2108. }
  2109. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2110. {
  2111. snd_card_free(pci_get_drvdata(pci));
  2112. pci_set_drvdata(pci, NULL);
  2113. }
  2114. static struct pci_driver driver = {
  2115. .name = "ICE1724",
  2116. .id_table = snd_vt1724_ids,
  2117. .probe = snd_vt1724_probe,
  2118. .remove = __devexit_p(snd_vt1724_remove),
  2119. };
  2120. static int __init alsa_card_ice1724_init(void)
  2121. {
  2122. return pci_register_driver(&driver);
  2123. }
  2124. static void __exit alsa_card_ice1724_exit(void)
  2125. {
  2126. pci_unregister_driver(&driver);
  2127. }
  2128. module_init(alsa_card_ice1724_init)
  2129. module_exit(alsa_card_ice1724_exit)