delta.c 22 KB

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  1. /*
  2. * ALSA driver for ICEnsemble ICE1712 (Envy24)
  3. *
  4. * Lowlevel functions for M-Audio Delta 1010, 44, 66, Dio2496, Audiophile
  5. * Digigram VX442
  6. *
  7. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <asm/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/slab.h>
  29. #include <linux/mutex.h>
  30. #include <sound/core.h>
  31. #include <sound/cs8427.h>
  32. #include <sound/asoundef.h>
  33. #include "ice1712.h"
  34. #include "delta.h"
  35. #define SND_CS8403
  36. #include <sound/cs8403.h>
  37. /*
  38. * CS8427 via SPI mode (for Audiophile), emulated I2C
  39. */
  40. /* send 8 bits */
  41. static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp)
  42. {
  43. int idx;
  44. for (idx = 7; idx >= 0; idx--) {
  45. tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK);
  46. if (data & (1 << idx))
  47. tmp |= ICE1712_DELTA_AP_DOUT;
  48. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  49. udelay(5);
  50. tmp |= ICE1712_DELTA_AP_CCLK;
  51. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  52. udelay(5);
  53. }
  54. }
  55. /* read 8 bits */
  56. static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp)
  57. {
  58. unsigned char data = 0;
  59. int idx;
  60. for (idx = 7; idx >= 0; idx--) {
  61. tmp &= ~ICE1712_DELTA_AP_CCLK;
  62. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  63. udelay(5);
  64. if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN)
  65. data |= 1 << idx;
  66. tmp |= ICE1712_DELTA_AP_CCLK;
  67. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  68. udelay(5);
  69. }
  70. return data;
  71. }
  72. /* assert chip select */
  73. static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice)
  74. {
  75. unsigned char tmp;
  76. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  77. switch (ice->eeprom.subvendor) {
  78. case ICE1712_SUBDEVICE_DELTA1010LT:
  79. tmp &= ~ICE1712_DELTA_1010LT_CS;
  80. tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427;
  81. break;
  82. case ICE1712_SUBDEVICE_AUDIOPHILE:
  83. case ICE1712_SUBDEVICE_DELTA410:
  84. tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC;
  85. tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL;
  86. break;
  87. case ICE1712_SUBDEVICE_VX442:
  88. tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B;
  89. tmp &= ~ICE1712_VX442_CS_DIGITAL;
  90. break;
  91. }
  92. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  93. udelay(5);
  94. return tmp;
  95. }
  96. /* deassert chip select */
  97. static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp)
  98. {
  99. switch (ice->eeprom.subvendor) {
  100. case ICE1712_SUBDEVICE_DELTA1010LT:
  101. tmp &= ~ICE1712_DELTA_1010LT_CS;
  102. tmp |= ICE1712_DELTA_1010LT_CS_NONE;
  103. break;
  104. case ICE1712_SUBDEVICE_AUDIOPHILE:
  105. case ICE1712_SUBDEVICE_DELTA410:
  106. tmp |= ICE1712_DELTA_AP_CS_DIGITAL;
  107. break;
  108. case ICE1712_SUBDEVICE_VX442:
  109. tmp |= ICE1712_VX442_CS_DIGITAL;
  110. break;
  111. }
  112. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  113. }
  114. /* sequential write */
  115. static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
  116. {
  117. struct snd_ice1712 *ice = device->bus->private_data;
  118. int res = count;
  119. unsigned char tmp;
  120. mutex_lock(&ice->gpio_mutex);
  121. tmp = ap_cs8427_codec_select(ice);
  122. ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */
  123. while (count-- > 0)
  124. ap_cs8427_write_byte(ice, *bytes++, tmp);
  125. ap_cs8427_codec_deassert(ice, tmp);
  126. mutex_unlock(&ice->gpio_mutex);
  127. return res;
  128. }
  129. /* sequential read */
  130. static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
  131. {
  132. struct snd_ice1712 *ice = device->bus->private_data;
  133. int res = count;
  134. unsigned char tmp;
  135. mutex_lock(&ice->gpio_mutex);
  136. tmp = ap_cs8427_codec_select(ice);
  137. ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */
  138. while (count-- > 0)
  139. *bytes++ = ap_cs8427_read_byte(ice, tmp);
  140. ap_cs8427_codec_deassert(ice, tmp);
  141. mutex_unlock(&ice->gpio_mutex);
  142. return res;
  143. }
  144. static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr)
  145. {
  146. if (addr == 0x10)
  147. return 1;
  148. return -ENOENT;
  149. }
  150. static struct snd_i2c_ops ap_cs8427_i2c_ops = {
  151. .sendbytes = ap_cs8427_sendbytes,
  152. .readbytes = ap_cs8427_readbytes,
  153. .probeaddr = ap_cs8427_probeaddr,
  154. };
  155. /*
  156. */
  157. static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
  158. {
  159. unsigned char tmp, mask1, mask2;
  160. int idx;
  161. /* send byte to transmitter */
  162. mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK;
  163. mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA;
  164. mutex_lock(&ice->gpio_mutex);
  165. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  166. for (idx = 7; idx >= 0; idx--) {
  167. tmp &= ~(mask1 | mask2);
  168. if (bits & (1 << idx))
  169. tmp |= mask2;
  170. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  171. udelay(100);
  172. tmp |= mask1;
  173. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  174. udelay(100);
  175. }
  176. tmp &= ~mask1;
  177. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  178. mutex_unlock(&ice->gpio_mutex);
  179. }
  180. static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  181. {
  182. snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits);
  183. }
  184. static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  185. {
  186. unsigned int val;
  187. int change;
  188. val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
  189. spin_lock_irq(&ice->reg_lock);
  190. change = ice->spdif.cs8403_bits != val;
  191. ice->spdif.cs8403_bits = val;
  192. if (change && ice->playback_pro_substream == NULL) {
  193. spin_unlock_irq(&ice->reg_lock);
  194. snd_ice1712_delta_cs8403_spdif_write(ice, val);
  195. } else {
  196. spin_unlock_irq(&ice->reg_lock);
  197. }
  198. return change;
  199. }
  200. static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  201. {
  202. snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits);
  203. }
  204. static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  205. {
  206. unsigned int val;
  207. int change;
  208. val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
  209. spin_lock_irq(&ice->reg_lock);
  210. change = ice->spdif.cs8403_stream_bits != val;
  211. ice->spdif.cs8403_stream_bits = val;
  212. if (change && ice->playback_pro_substream != NULL) {
  213. spin_unlock_irq(&ice->reg_lock);
  214. snd_ice1712_delta_cs8403_spdif_write(ice, val);
  215. } else {
  216. spin_unlock_irq(&ice->reg_lock);
  217. }
  218. return change;
  219. }
  220. /*
  221. * AK4524 on Delta 44 and 66 to choose the chip mask
  222. */
  223. static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  224. {
  225. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  226. struct snd_ice1712 *ice = ak->private_data[0];
  227. snd_ice1712_save_gpio_status(ice);
  228. priv->cs_mask =
  229. priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A :
  230. ICE1712_DELTA_CODEC_CHIP_B;
  231. }
  232. /*
  233. * AK4524 on Delta1010LT to choose the chip address
  234. */
  235. static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  236. {
  237. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  238. struct snd_ice1712 *ice = ak->private_data[0];
  239. snd_ice1712_save_gpio_status(ice);
  240. priv->cs_mask = ICE1712_DELTA_1010LT_CS;
  241. priv->cs_addr = chip << 4;
  242. }
  243. /*
  244. * AK4528 on VX442 to choose the chip mask
  245. */
  246. static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  247. {
  248. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  249. struct snd_ice1712 *ice = ak->private_data[0];
  250. snd_ice1712_save_gpio_status(ice);
  251. priv->cs_mask =
  252. priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A :
  253. ICE1712_VX442_CODEC_CHIP_B;
  254. }
  255. /*
  256. * change the DFS bit according rate for Delta1010
  257. */
  258. static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate)
  259. {
  260. unsigned char tmp, tmp2;
  261. if (rate == 0) /* no hint - S/PDIF input is master, simply return */
  262. return;
  263. mutex_lock(&ice->gpio_mutex);
  264. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  265. tmp2 = tmp & ~ICE1712_DELTA_DFS;
  266. if (rate > 48000)
  267. tmp2 |= ICE1712_DELTA_DFS;
  268. if (tmp != tmp2)
  269. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2);
  270. mutex_unlock(&ice->gpio_mutex);
  271. }
  272. /*
  273. * change the rate of AK4524 on Delta 44/66, AP, 1010LT
  274. */
  275. static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
  276. {
  277. unsigned char tmp, tmp2;
  278. struct snd_ice1712 *ice = ak->private_data[0];
  279. if (rate == 0) /* no hint - S/PDIF input is master, simply return */
  280. return;
  281. /* check before reset ak4524 to avoid unnecessary clicks */
  282. mutex_lock(&ice->gpio_mutex);
  283. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  284. mutex_unlock(&ice->gpio_mutex);
  285. tmp2 = tmp & ~ICE1712_DELTA_DFS;
  286. if (rate > 48000)
  287. tmp2 |= ICE1712_DELTA_DFS;
  288. if (tmp == tmp2)
  289. return;
  290. /* do it again */
  291. snd_akm4xxx_reset(ak, 1);
  292. mutex_lock(&ice->gpio_mutex);
  293. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS;
  294. if (rate > 48000)
  295. tmp |= ICE1712_DELTA_DFS;
  296. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  297. mutex_unlock(&ice->gpio_mutex);
  298. snd_akm4xxx_reset(ak, 0);
  299. }
  300. /*
  301. * change the rate of AK4524 on VX442
  302. */
  303. static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
  304. {
  305. unsigned char val;
  306. val = (rate > 48000) ? 0x65 : 0x60;
  307. if (snd_akm4xxx_get(ak, 0, 0x02) != val ||
  308. snd_akm4xxx_get(ak, 1, 0x02) != val) {
  309. snd_akm4xxx_reset(ak, 1);
  310. snd_akm4xxx_write(ak, 0, 0x02, val);
  311. snd_akm4xxx_write(ak, 1, 0x02, val);
  312. snd_akm4xxx_reset(ak, 0);
  313. }
  314. }
  315. /*
  316. * SPDIF ops for Delta 1010, Dio, 66
  317. */
  318. /* open callback */
  319. static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  320. {
  321. ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits;
  322. }
  323. /* set up */
  324. static void delta_setup_spdif(struct snd_ice1712 *ice, int rate)
  325. {
  326. unsigned long flags;
  327. unsigned int tmp;
  328. int change;
  329. spin_lock_irqsave(&ice->reg_lock, flags);
  330. tmp = ice->spdif.cs8403_stream_bits;
  331. if (tmp & 0x01) /* consumer */
  332. tmp &= (tmp & 0x01) ? ~0x06 : ~0x18;
  333. switch (rate) {
  334. case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break;
  335. case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break;
  336. case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break;
  337. default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break;
  338. }
  339. change = ice->spdif.cs8403_stream_bits != tmp;
  340. ice->spdif.cs8403_stream_bits = tmp;
  341. spin_unlock_irqrestore(&ice->reg_lock, flags);
  342. if (change)
  343. snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id);
  344. snd_ice1712_delta_cs8403_spdif_write(ice, tmp);
  345. }
  346. #define snd_ice1712_delta1010lt_wordclock_status_info \
  347. snd_ctl_boolean_mono_info
  348. static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol,
  349. struct snd_ctl_elem_value *ucontrol)
  350. {
  351. char reg = 0x10; // cs8427 receiver error register
  352. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  353. if (snd_i2c_sendbytes(ice->cs8427, &reg, 1) != 1)
  354. snd_printk(KERN_ERR "unable to send register 0x%x byte to CS8427\n", reg);
  355. snd_i2c_readbytes(ice->cs8427, &reg, 1);
  356. ucontrol->value.integer.value[0] = (reg & CS8427_UNLOCK) ? 1 : 0;
  357. return 0;
  358. }
  359. static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status __devinitdata =
  360. {
  361. .access = (SNDRV_CTL_ELEM_ACCESS_READ),
  362. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  363. .name = "Word Clock Status",
  364. .info = snd_ice1712_delta1010lt_wordclock_status_info,
  365. .get = snd_ice1712_delta1010lt_wordclock_status_get,
  366. };
  367. /*
  368. * initialize the chips on M-Audio cards
  369. */
  370. static struct snd_akm4xxx akm_audiophile __devinitdata = {
  371. .type = SND_AK4528,
  372. .num_adcs = 2,
  373. .num_dacs = 2,
  374. .ops = {
  375. .set_rate_val = delta_ak4524_set_rate_val
  376. }
  377. };
  378. static struct snd_ak4xxx_private akm_audiophile_priv __devinitdata = {
  379. .caddr = 2,
  380. .cif = 0,
  381. .data_mask = ICE1712_DELTA_AP_DOUT,
  382. .clk_mask = ICE1712_DELTA_AP_CCLK,
  383. .cs_mask = ICE1712_DELTA_AP_CS_CODEC,
  384. .cs_addr = ICE1712_DELTA_AP_CS_CODEC,
  385. .cs_none = 0,
  386. .add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
  387. .mask_flags = 0,
  388. };
  389. static struct snd_akm4xxx akm_delta410 __devinitdata = {
  390. .type = SND_AK4529,
  391. .num_adcs = 2,
  392. .num_dacs = 8,
  393. .ops = {
  394. .set_rate_val = delta_ak4524_set_rate_val
  395. }
  396. };
  397. static struct snd_ak4xxx_private akm_delta410_priv __devinitdata = {
  398. .caddr = 0,
  399. .cif = 0,
  400. .data_mask = ICE1712_DELTA_AP_DOUT,
  401. .clk_mask = ICE1712_DELTA_AP_CCLK,
  402. .cs_mask = ICE1712_DELTA_AP_CS_CODEC,
  403. .cs_addr = ICE1712_DELTA_AP_CS_CODEC,
  404. .cs_none = 0,
  405. .add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
  406. .mask_flags = 0,
  407. };
  408. static struct snd_akm4xxx akm_delta1010lt __devinitdata = {
  409. .type = SND_AK4524,
  410. .num_adcs = 8,
  411. .num_dacs = 8,
  412. .ops = {
  413. .lock = delta1010lt_ak4524_lock,
  414. .set_rate_val = delta_ak4524_set_rate_val
  415. }
  416. };
  417. static struct snd_ak4xxx_private akm_delta1010lt_priv __devinitdata = {
  418. .caddr = 2,
  419. .cif = 0, /* the default level of the CIF pin from AK4524 */
  420. .data_mask = ICE1712_DELTA_1010LT_DOUT,
  421. .clk_mask = ICE1712_DELTA_1010LT_CCLK,
  422. .cs_mask = 0,
  423. .cs_addr = 0, /* set later */
  424. .cs_none = ICE1712_DELTA_1010LT_CS_NONE,
  425. .add_flags = 0,
  426. .mask_flags = 0,
  427. };
  428. static struct snd_akm4xxx akm_delta44 __devinitdata = {
  429. .type = SND_AK4524,
  430. .num_adcs = 4,
  431. .num_dacs = 4,
  432. .ops = {
  433. .lock = delta_ak4524_lock,
  434. .set_rate_val = delta_ak4524_set_rate_val
  435. }
  436. };
  437. static struct snd_ak4xxx_private akm_delta44_priv __devinitdata = {
  438. .caddr = 2,
  439. .cif = 0, /* the default level of the CIF pin from AK4524 */
  440. .data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA,
  441. .clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK,
  442. .cs_mask = 0,
  443. .cs_addr = 0, /* set later */
  444. .cs_none = 0,
  445. .add_flags = 0,
  446. .mask_flags = 0,
  447. };
  448. static struct snd_akm4xxx akm_vx442 __devinitdata = {
  449. .type = SND_AK4524,
  450. .num_adcs = 4,
  451. .num_dacs = 4,
  452. .ops = {
  453. .lock = vx442_ak4524_lock,
  454. .set_rate_val = vx442_ak4524_set_rate_val
  455. }
  456. };
  457. static struct snd_ak4xxx_private akm_vx442_priv __devinitdata = {
  458. .caddr = 2,
  459. .cif = 0,
  460. .data_mask = ICE1712_VX442_DOUT,
  461. .clk_mask = ICE1712_VX442_CCLK,
  462. .cs_mask = 0,
  463. .cs_addr = 0, /* set later */
  464. .cs_none = 0,
  465. .add_flags = 0,
  466. .mask_flags = 0,
  467. };
  468. static int __devinit snd_ice1712_delta_init(struct snd_ice1712 *ice)
  469. {
  470. int err;
  471. struct snd_akm4xxx *ak;
  472. /* determine I2C, DACs and ADCs */
  473. switch (ice->eeprom.subvendor) {
  474. case ICE1712_SUBDEVICE_AUDIOPHILE:
  475. ice->num_total_dacs = 2;
  476. ice->num_total_adcs = 2;
  477. break;
  478. case ICE1712_SUBDEVICE_DELTA410:
  479. ice->num_total_dacs = 8;
  480. ice->num_total_adcs = 2;
  481. break;
  482. case ICE1712_SUBDEVICE_DELTA44:
  483. case ICE1712_SUBDEVICE_DELTA66:
  484. ice->num_total_dacs = ice->omni ? 8 : 4;
  485. ice->num_total_adcs = ice->omni ? 8 : 4;
  486. break;
  487. case ICE1712_SUBDEVICE_DELTA1010:
  488. case ICE1712_SUBDEVICE_DELTA1010LT:
  489. case ICE1712_SUBDEVICE_MEDIASTATION:
  490. ice->num_total_dacs = 8;
  491. ice->num_total_adcs = 8;
  492. break;
  493. case ICE1712_SUBDEVICE_DELTADIO2496:
  494. ice->num_total_dacs = 4; /* two AK4324 codecs */
  495. break;
  496. case ICE1712_SUBDEVICE_VX442:
  497. ice->num_total_dacs = 4;
  498. ice->num_total_adcs = 4;
  499. break;
  500. }
  501. /* initialize spdif */
  502. switch (ice->eeprom.subvendor) {
  503. case ICE1712_SUBDEVICE_AUDIOPHILE:
  504. case ICE1712_SUBDEVICE_DELTA410:
  505. case ICE1712_SUBDEVICE_DELTA1010LT:
  506. case ICE1712_SUBDEVICE_VX442:
  507. if ((err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c)) < 0) {
  508. snd_printk(KERN_ERR "unable to create I2C bus\n");
  509. return err;
  510. }
  511. ice->i2c->private_data = ice;
  512. ice->i2c->ops = &ap_cs8427_i2c_ops;
  513. if ((err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR)) < 0)
  514. return err;
  515. break;
  516. case ICE1712_SUBDEVICE_DELTA1010:
  517. case ICE1712_SUBDEVICE_MEDIASTATION:
  518. ice->gpio.set_pro_rate = delta_1010_set_rate_val;
  519. break;
  520. case ICE1712_SUBDEVICE_DELTADIO2496:
  521. ice->gpio.set_pro_rate = delta_1010_set_rate_val;
  522. /* fall thru */
  523. case ICE1712_SUBDEVICE_DELTA66:
  524. ice->spdif.ops.open = delta_open_spdif;
  525. ice->spdif.ops.setup_rate = delta_setup_spdif;
  526. ice->spdif.ops.default_get = delta_spdif_default_get;
  527. ice->spdif.ops.default_put = delta_spdif_default_put;
  528. ice->spdif.ops.stream_get = delta_spdif_stream_get;
  529. ice->spdif.ops.stream_put = delta_spdif_stream_put;
  530. /* Set spdif defaults */
  531. snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
  532. break;
  533. }
  534. /* no analog? */
  535. switch (ice->eeprom.subvendor) {
  536. case ICE1712_SUBDEVICE_DELTA1010:
  537. case ICE1712_SUBDEVICE_DELTADIO2496:
  538. case ICE1712_SUBDEVICE_MEDIASTATION:
  539. return 0;
  540. }
  541. /* second stage of initialization, analog parts and others */
  542. ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  543. if (! ak)
  544. return -ENOMEM;
  545. ice->akm_codecs = 1;
  546. switch (ice->eeprom.subvendor) {
  547. case ICE1712_SUBDEVICE_AUDIOPHILE:
  548. err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice);
  549. break;
  550. case ICE1712_SUBDEVICE_DELTA410:
  551. err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice);
  552. break;
  553. case ICE1712_SUBDEVICE_DELTA1010LT:
  554. err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice);
  555. break;
  556. case ICE1712_SUBDEVICE_DELTA66:
  557. case ICE1712_SUBDEVICE_DELTA44:
  558. err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice);
  559. break;
  560. case ICE1712_SUBDEVICE_VX442:
  561. err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice);
  562. break;
  563. default:
  564. snd_BUG();
  565. return -EINVAL;
  566. }
  567. return err;
  568. }
  569. /*
  570. * additional controls for M-Audio cards
  571. */
  572. static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select __devinitdata =
  573. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0);
  574. static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select __devinitdata =
  575. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0);
  576. static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status __devinitdata =
  577. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
  578. static struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select __devinitdata =
  579. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0);
  580. static struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status __devinitdata =
  581. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
  582. static int __devinit snd_ice1712_delta_add_controls(struct snd_ice1712 *ice)
  583. {
  584. int err;
  585. /* 1010 and dio specific controls */
  586. switch (ice->eeprom.subvendor) {
  587. case ICE1712_SUBDEVICE_DELTA1010:
  588. case ICE1712_SUBDEVICE_MEDIASTATION:
  589. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice));
  590. if (err < 0)
  591. return err;
  592. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice));
  593. if (err < 0)
  594. return err;
  595. break;
  596. case ICE1712_SUBDEVICE_DELTADIO2496:
  597. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice));
  598. if (err < 0)
  599. return err;
  600. break;
  601. case ICE1712_SUBDEVICE_DELTA1010LT:
  602. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice));
  603. if (err < 0)
  604. return err;
  605. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice));
  606. if (err < 0)
  607. return err;
  608. break;
  609. }
  610. /* normal spdif controls */
  611. switch (ice->eeprom.subvendor) {
  612. case ICE1712_SUBDEVICE_DELTA1010:
  613. case ICE1712_SUBDEVICE_DELTADIO2496:
  614. case ICE1712_SUBDEVICE_DELTA66:
  615. case ICE1712_SUBDEVICE_MEDIASTATION:
  616. err = snd_ice1712_spdif_build_controls(ice);
  617. if (err < 0)
  618. return err;
  619. break;
  620. }
  621. /* spdif status in */
  622. switch (ice->eeprom.subvendor) {
  623. case ICE1712_SUBDEVICE_DELTA1010:
  624. case ICE1712_SUBDEVICE_DELTADIO2496:
  625. case ICE1712_SUBDEVICE_DELTA66:
  626. case ICE1712_SUBDEVICE_MEDIASTATION:
  627. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice));
  628. if (err < 0)
  629. return err;
  630. break;
  631. }
  632. /* ak4524 controls */
  633. switch (ice->eeprom.subvendor) {
  634. case ICE1712_SUBDEVICE_DELTA1010LT:
  635. case ICE1712_SUBDEVICE_AUDIOPHILE:
  636. case ICE1712_SUBDEVICE_DELTA410:
  637. case ICE1712_SUBDEVICE_DELTA44:
  638. case ICE1712_SUBDEVICE_DELTA66:
  639. case ICE1712_SUBDEVICE_VX442:
  640. err = snd_ice1712_akm4xxx_build_controls(ice);
  641. if (err < 0)
  642. return err;
  643. break;
  644. }
  645. return 0;
  646. }
  647. /* entry point */
  648. struct snd_ice1712_card_info snd_ice1712_delta_cards[] __devinitdata = {
  649. {
  650. .subvendor = ICE1712_SUBDEVICE_DELTA1010,
  651. .name = "M Audio Delta 1010",
  652. .model = "delta1010",
  653. .chip_init = snd_ice1712_delta_init,
  654. .build_controls = snd_ice1712_delta_add_controls,
  655. },
  656. {
  657. .subvendor = ICE1712_SUBDEVICE_DELTADIO2496,
  658. .name = "M Audio Delta DiO 2496",
  659. .model = "dio2496",
  660. .chip_init = snd_ice1712_delta_init,
  661. .build_controls = snd_ice1712_delta_add_controls,
  662. .no_mpu401 = 1,
  663. },
  664. {
  665. .subvendor = ICE1712_SUBDEVICE_DELTA66,
  666. .name = "M Audio Delta 66",
  667. .model = "delta66",
  668. .chip_init = snd_ice1712_delta_init,
  669. .build_controls = snd_ice1712_delta_add_controls,
  670. .no_mpu401 = 1,
  671. },
  672. {
  673. .subvendor = ICE1712_SUBDEVICE_DELTA44,
  674. .name = "M Audio Delta 44",
  675. .model = "delta44",
  676. .chip_init = snd_ice1712_delta_init,
  677. .build_controls = snd_ice1712_delta_add_controls,
  678. .no_mpu401 = 1,
  679. },
  680. {
  681. .subvendor = ICE1712_SUBDEVICE_AUDIOPHILE,
  682. .name = "M Audio Audiophile 24/96",
  683. .model = "audiophile",
  684. .chip_init = snd_ice1712_delta_init,
  685. .build_controls = snd_ice1712_delta_add_controls,
  686. },
  687. {
  688. .subvendor = ICE1712_SUBDEVICE_DELTA410,
  689. .name = "M Audio Delta 410",
  690. .model = "delta410",
  691. .chip_init = snd_ice1712_delta_init,
  692. .build_controls = snd_ice1712_delta_add_controls,
  693. },
  694. {
  695. .subvendor = ICE1712_SUBDEVICE_DELTA1010LT,
  696. .name = "M Audio Delta 1010LT",
  697. .model = "delta1010lt",
  698. .chip_init = snd_ice1712_delta_init,
  699. .build_controls = snd_ice1712_delta_add_controls,
  700. },
  701. {
  702. .subvendor = ICE1712_SUBDEVICE_VX442,
  703. .name = "Digigram VX442",
  704. .model = "vx442",
  705. .chip_init = snd_ice1712_delta_init,
  706. .build_controls = snd_ice1712_delta_add_controls,
  707. .no_mpu401 = 1,
  708. },
  709. {
  710. .subvendor = ICE1712_SUBDEVICE_MEDIASTATION,
  711. .name = "Lionstracs Mediastation",
  712. .model = "mediastation",
  713. .chip_init = snd_ice1712_delta_init,
  714. .build_controls = snd_ice1712_delta_add_controls,
  715. },
  716. { } /* terminator */
  717. };