ptrace.h 8.0 KB

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  1. #ifndef _ASM_POWERPC_PTRACE_H
  2. #define _ASM_POWERPC_PTRACE_H
  3. /*
  4. * Copyright (C) 2001 PPC64 Team, IBM Corp
  5. *
  6. * This struct defines the way the registers are stored on the
  7. * kernel stack during a system call or other kernel entry.
  8. *
  9. * this should only contain volatile regs
  10. * since we can keep non-volatile in the thread_struct
  11. * should set this up when only volatiles are saved
  12. * by intr code.
  13. *
  14. * Since this is going on the stack, *CARE MUST BE TAKEN* to insure
  15. * that the overall structure is a multiple of 16 bytes in length.
  16. *
  17. * Note that the offsets of the fields in this struct correspond with
  18. * the PT_* values below. This simplifies arch/powerpc/kernel/ptrace.c.
  19. *
  20. * This program is free software; you can redistribute it and/or
  21. * modify it under the terms of the GNU General Public License
  22. * as published by the Free Software Foundation; either version
  23. * 2 of the License, or (at your option) any later version.
  24. */
  25. #ifndef __ASSEMBLY__
  26. struct pt_regs {
  27. unsigned long gpr[32];
  28. unsigned long nip;
  29. unsigned long msr;
  30. unsigned long orig_gpr3; /* Used for restarting system calls */
  31. unsigned long ctr;
  32. unsigned long link;
  33. unsigned long xer;
  34. unsigned long ccr;
  35. #ifdef __powerpc64__
  36. unsigned long softe; /* Soft enabled/disabled */
  37. #else
  38. unsigned long mq; /* 601 only (not used at present) */
  39. /* Used on APUS to hold IPL value. */
  40. #endif
  41. unsigned long trap; /* Reason for being here */
  42. /* N.B. for critical exceptions on 4xx, the dar and dsisr
  43. fields are overloaded to hold srr0 and srr1. */
  44. unsigned long dar; /* Fault registers */
  45. unsigned long dsisr; /* on 4xx/Book-E used for ESR */
  46. unsigned long result; /* Result of a system call */
  47. };
  48. #endif /* __ASSEMBLY__ */
  49. #ifdef __KERNEL__
  50. #ifdef __powerpc64__
  51. #define __ARCH_WANT_COMPAT_SYS_PTRACE
  52. #define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
  53. #define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */
  54. #define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265)
  55. #define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \
  56. STACK_FRAME_OVERHEAD + 288)
  57. #define STACK_FRAME_MARKER 12
  58. /* Size of dummy stack frame allocated when calling signal handler. */
  59. #define __SIGNAL_FRAMESIZE 128
  60. #define __SIGNAL_FRAMESIZE32 64
  61. #else /* __powerpc64__ */
  62. #define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
  63. #define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */
  64. #define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773)
  65. #define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD)
  66. #define STACK_FRAME_MARKER 2
  67. /* Size of stack frame allocated when calling signal handler. */
  68. #define __SIGNAL_FRAMESIZE 64
  69. #endif /* __powerpc64__ */
  70. #ifndef __ASSEMBLY__
  71. #define instruction_pointer(regs) ((regs)->nip)
  72. #define regs_return_value(regs) ((regs)->gpr[3])
  73. #ifdef CONFIG_SMP
  74. extern unsigned long profile_pc(struct pt_regs *regs);
  75. #else
  76. #define profile_pc(regs) instruction_pointer(regs)
  77. #endif
  78. #ifdef __powerpc64__
  79. #define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)
  80. #else
  81. #define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
  82. #endif
  83. #define force_successful_syscall_return() \
  84. do { \
  85. set_thread_flag(TIF_NOERROR); \
  86. } while(0)
  87. struct task_struct;
  88. extern unsigned long ptrace_get_reg(struct task_struct *task, int regno);
  89. extern int ptrace_put_reg(struct task_struct *task, int regno,
  90. unsigned long data);
  91. /*
  92. * We use the least-significant bit of the trap field to indicate
  93. * whether we have saved the full set of registers, or only a
  94. * partial set. A 1 there means the partial set.
  95. * On 4xx we use the next bit to indicate whether the exception
  96. * is a critical exception (1 means it is).
  97. */
  98. #define FULL_REGS(regs) (((regs)->trap & 1) == 0)
  99. #ifndef __powerpc64__
  100. #define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) != 0)
  101. #define IS_MCHECK_EXC(regs) (((regs)->trap & 4) != 0)
  102. #endif /* ! __powerpc64__ */
  103. #define TRAP(regs) ((regs)->trap & ~0xF)
  104. #ifdef __powerpc64__
  105. #define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1)
  106. #else
  107. #define CHECK_FULL_REGS(regs) \
  108. do { \
  109. if ((regs)->trap & 1) \
  110. printk(KERN_CRIT "%s: partial register set\n", __FUNCTION__); \
  111. } while (0)
  112. #endif /* __powerpc64__ */
  113. /*
  114. * These are defined as per linux/ptrace.h, which see.
  115. */
  116. #define arch_has_single_step() (1)
  117. extern void user_enable_single_step(struct task_struct *);
  118. extern void user_disable_single_step(struct task_struct *);
  119. #endif /* __ASSEMBLY__ */
  120. #endif /* __KERNEL__ */
  121. /*
  122. * Offsets used by 'ptrace' system call interface.
  123. * These can't be changed without breaking binary compatibility
  124. * with MkLinux, etc.
  125. */
  126. #define PT_R0 0
  127. #define PT_R1 1
  128. #define PT_R2 2
  129. #define PT_R3 3
  130. #define PT_R4 4
  131. #define PT_R5 5
  132. #define PT_R6 6
  133. #define PT_R7 7
  134. #define PT_R8 8
  135. #define PT_R9 9
  136. #define PT_R10 10
  137. #define PT_R11 11
  138. #define PT_R12 12
  139. #define PT_R13 13
  140. #define PT_R14 14
  141. #define PT_R15 15
  142. #define PT_R16 16
  143. #define PT_R17 17
  144. #define PT_R18 18
  145. #define PT_R19 19
  146. #define PT_R20 20
  147. #define PT_R21 21
  148. #define PT_R22 22
  149. #define PT_R23 23
  150. #define PT_R24 24
  151. #define PT_R25 25
  152. #define PT_R26 26
  153. #define PT_R27 27
  154. #define PT_R28 28
  155. #define PT_R29 29
  156. #define PT_R30 30
  157. #define PT_R31 31
  158. #define PT_NIP 32
  159. #define PT_MSR 33
  160. #define PT_ORIG_R3 34
  161. #define PT_CTR 35
  162. #define PT_LNK 36
  163. #define PT_XER 37
  164. #define PT_CCR 38
  165. #ifndef __powerpc64__
  166. #define PT_MQ 39
  167. #else
  168. #define PT_SOFTE 39
  169. #endif
  170. #define PT_TRAP 40
  171. #define PT_DAR 41
  172. #define PT_DSISR 42
  173. #define PT_RESULT 43
  174. #define PT_REGS_COUNT 44
  175. #define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
  176. #ifndef __powerpc64__
  177. #define PT_FPR31 (PT_FPR0 + 2*31)
  178. #define PT_FPSCR (PT_FPR0 + 2*32 + 1)
  179. #else /* __powerpc64__ */
  180. #define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
  181. #ifdef __KERNEL__
  182. #define PT_FPSCR32 (PT_FPR0 + 2*32 + 1) /* each FP reg occupies 2 32-bit userspace slots */
  183. #endif
  184. #define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */
  185. #define PT_VSCR (PT_VR0 + 32*2 + 1)
  186. #define PT_VRSAVE (PT_VR0 + 33*2)
  187. #ifdef __KERNEL__
  188. #define PT_VR0_32 164 /* each Vector reg occupies 4 slots in 32-bit */
  189. #define PT_VSCR_32 (PT_VR0 + 32*4 + 3)
  190. #define PT_VRSAVE_32 (PT_VR0 + 33*4)
  191. #endif
  192. #endif /* __powerpc64__ */
  193. /*
  194. * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
  195. * The transfer totals 34 quadword. Quadwords 0-31 contain the
  196. * corresponding vector registers. Quadword 32 contains the vscr as the
  197. * last word (offset 12) within that quadword. Quadword 33 contains the
  198. * vrsave as the first word (offset 0) within the quadword.
  199. *
  200. * This definition of the VMX state is compatible with the current PPC32
  201. * ptrace interface. This allows signal handling and ptrace to use the same
  202. * structures. This also simplifies the implementation of a bi-arch
  203. * (combined (32- and 64-bit) gdb.
  204. */
  205. #define PTRACE_GETVRREGS 18
  206. #define PTRACE_SETVRREGS 19
  207. /* Get/set all the upper 32-bits of the SPE registers, accumulator, and
  208. * spefscr, in one go */
  209. #define PTRACE_GETEVRREGS 20
  210. #define PTRACE_SETEVRREGS 21
  211. /*
  212. * Get or set a debug register. The first 16 are DABR registers and the
  213. * second 16 are IABR registers.
  214. */
  215. #define PTRACE_GET_DEBUGREG 25
  216. #define PTRACE_SET_DEBUGREG 26
  217. /* (new) PTRACE requests using the same numbers as x86 and the same
  218. * argument ordering. Additionally, they support more registers too
  219. */
  220. #define PTRACE_GETREGS 12
  221. #define PTRACE_SETREGS 13
  222. #define PTRACE_GETFPREGS 14
  223. #define PTRACE_SETFPREGS 15
  224. #define PTRACE_GETREGS64 22
  225. #define PTRACE_SETREGS64 23
  226. /* (old) PTRACE requests with inverted arguments */
  227. #define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */
  228. #define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */
  229. #define PPC_PTRACE_GETFPREGS 0x97 /* Get FPRs 0 - 31 */
  230. #define PPC_PTRACE_SETFPREGS 0x96 /* Set FPRs 0 - 31 */
  231. /* Calls to trace a 64bit program from a 32bit program */
  232. #define PPC_PTRACE_PEEKTEXT_3264 0x95
  233. #define PPC_PTRACE_PEEKDATA_3264 0x94
  234. #define PPC_PTRACE_POKETEXT_3264 0x93
  235. #define PPC_PTRACE_POKEDATA_3264 0x92
  236. #define PPC_PTRACE_PEEKUSR_3264 0x91
  237. #define PPC_PTRACE_POKEUSR_3264 0x90
  238. #endif /* _ASM_POWERPC_PTRACE_H */