ali14xx.c 6.6 KB

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  1. /*
  2. * Copyright (C) 1996 Linus Torvalds & author (see below)
  3. */
  4. /*
  5. * ALI M14xx chipset EIDE controller
  6. *
  7. * Works for ALI M1439/1443/1445/1487/1489 chipsets.
  8. *
  9. * Adapted from code developed by derekn@vw.ece.cmu.edu. -ml
  10. * Derek's notes follow:
  11. *
  12. * I think the code should be pretty understandable,
  13. * but I'll be happy to (try to) answer questions.
  14. *
  15. * The critical part is in the setupDrive function. The initRegisters
  16. * function doesn't seem to be necessary, but the DOS driver does it, so
  17. * I threw it in.
  18. *
  19. * I've only tested this on my system, which only has one disk. I posted
  20. * it to comp.sys.linux.hardware, so maybe some other people will try it
  21. * out.
  22. *
  23. * Derek Noonburg (derekn@ece.cmu.edu)
  24. * 95-sep-26
  25. *
  26. * Update 96-jul-13:
  27. *
  28. * I've since upgraded to two disks and a CD-ROM, with no trouble, and
  29. * I've also heard from several others who have used it successfully.
  30. * This driver appears to work with both the 1443/1445 and the 1487/1489
  31. * chipsets. I've added support for PIO mode 4 for the 1487. This
  32. * seems to work just fine on the 1443 also, although I'm not sure it's
  33. * advertised as supporting mode 4. (I've been running a WDC AC21200 in
  34. * mode 4 for a while now with no trouble.) -Derek
  35. */
  36. #include <linux/module.h>
  37. #include <linux/types.h>
  38. #include <linux/kernel.h>
  39. #include <linux/delay.h>
  40. #include <linux/timer.h>
  41. #include <linux/mm.h>
  42. #include <linux/ioport.h>
  43. #include <linux/blkdev.h>
  44. #include <linux/hdreg.h>
  45. #include <linux/ide.h>
  46. #include <linux/init.h>
  47. #include <asm/io.h>
  48. /* port addresses for auto-detection */
  49. #define ALI_NUM_PORTS 4
  50. static const int ports[ALI_NUM_PORTS] __initdata =
  51. { 0x074, 0x0f4, 0x034, 0x0e4 };
  52. /* register initialization data */
  53. typedef struct { u8 reg, data; } RegInitializer;
  54. static const RegInitializer initData[] __initdata = {
  55. {0x01, 0x0f}, {0x02, 0x00}, {0x03, 0x00}, {0x04, 0x00},
  56. {0x05, 0x00}, {0x06, 0x00}, {0x07, 0x2b}, {0x0a, 0x0f},
  57. {0x25, 0x00}, {0x26, 0x00}, {0x27, 0x00}, {0x28, 0x00},
  58. {0x29, 0x00}, {0x2a, 0x00}, {0x2f, 0x00}, {0x2b, 0x00},
  59. {0x2c, 0x00}, {0x2d, 0x00}, {0x2e, 0x00}, {0x30, 0x00},
  60. {0x31, 0x00}, {0x32, 0x00}, {0x33, 0x00}, {0x34, 0xff},
  61. {0x35, 0x03}, {0x00, 0x00}
  62. };
  63. /* timing parameter registers for each drive */
  64. static struct { u8 reg1, reg2, reg3, reg4; } regTab[4] = {
  65. {0x03, 0x26, 0x04, 0x27}, /* drive 0 */
  66. {0x05, 0x28, 0x06, 0x29}, /* drive 1 */
  67. {0x2b, 0x30, 0x2c, 0x31}, /* drive 2 */
  68. {0x2d, 0x32, 0x2e, 0x33}, /* drive 3 */
  69. };
  70. static int basePort; /* base port address */
  71. static int regPort; /* port for register number */
  72. static int dataPort; /* port for register data */
  73. static u8 regOn; /* output to base port to access registers */
  74. static u8 regOff; /* output to base port to close registers */
  75. /*------------------------------------------------------------------------*/
  76. /*
  77. * Read a controller register.
  78. */
  79. static inline u8 inReg (u8 reg)
  80. {
  81. outb_p(reg, regPort);
  82. return inb(dataPort);
  83. }
  84. /*
  85. * Write a controller register.
  86. */
  87. static void outReg (u8 data, u8 reg)
  88. {
  89. outb_p(reg, regPort);
  90. outb_p(data, dataPort);
  91. }
  92. static DEFINE_SPINLOCK(ali14xx_lock);
  93. /*
  94. * Set PIO mode for the specified drive.
  95. * This function computes timing parameters
  96. * and sets controller registers accordingly.
  97. */
  98. static void ali14xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
  99. {
  100. int driveNum;
  101. int time1, time2;
  102. u8 param1, param2, param3, param4;
  103. unsigned long flags;
  104. int bus_speed = system_bus_clock();
  105. /* calculate timing, according to PIO mode */
  106. time1 = ide_pio_cycle_time(drive, pio);
  107. time2 = ide_pio_timings[pio].active_time;
  108. param3 = param1 = (time2 * bus_speed + 999) / 1000;
  109. param4 = param2 = (time1 * bus_speed + 999) / 1000 - param1;
  110. if (pio < 3) {
  111. param3 += 8;
  112. param4 += 8;
  113. }
  114. printk(KERN_DEBUG "%s: PIO mode%d, t1=%dns, t2=%dns, cycles = %d+%d, %d+%d\n",
  115. drive->name, pio, time1, time2, param1, param2, param3, param4);
  116. /* stuff timing parameters into controller registers */
  117. driveNum = (HWIF(drive)->index << 1) + drive->select.b.unit;
  118. spin_lock_irqsave(&ali14xx_lock, flags);
  119. outb_p(regOn, basePort);
  120. outReg(param1, regTab[driveNum].reg1);
  121. outReg(param2, regTab[driveNum].reg2);
  122. outReg(param3, regTab[driveNum].reg3);
  123. outReg(param4, regTab[driveNum].reg4);
  124. outb_p(regOff, basePort);
  125. spin_unlock_irqrestore(&ali14xx_lock, flags);
  126. }
  127. /*
  128. * Auto-detect the IDE controller port.
  129. */
  130. static int __init findPort (void)
  131. {
  132. int i;
  133. u8 t;
  134. unsigned long flags;
  135. local_irq_save(flags);
  136. for (i = 0; i < ALI_NUM_PORTS; ++i) {
  137. basePort = ports[i];
  138. regOff = inb(basePort);
  139. for (regOn = 0x30; regOn <= 0x33; ++regOn) {
  140. outb_p(regOn, basePort);
  141. if (inb(basePort) == regOn) {
  142. regPort = basePort + 4;
  143. dataPort = basePort + 8;
  144. t = inReg(0) & 0xf0;
  145. outb_p(regOff, basePort);
  146. local_irq_restore(flags);
  147. if (t != 0x50)
  148. return 0;
  149. return 1; /* success */
  150. }
  151. }
  152. outb_p(regOff, basePort);
  153. }
  154. local_irq_restore(flags);
  155. return 0;
  156. }
  157. /*
  158. * Initialize controller registers with default values.
  159. */
  160. static int __init initRegisters (void) {
  161. const RegInitializer *p;
  162. u8 t;
  163. unsigned long flags;
  164. local_irq_save(flags);
  165. outb_p(regOn, basePort);
  166. for (p = initData; p->reg != 0; ++p)
  167. outReg(p->data, p->reg);
  168. outb_p(0x01, regPort);
  169. t = inb(regPort) & 0x01;
  170. outb_p(regOff, basePort);
  171. local_irq_restore(flags);
  172. return t;
  173. }
  174. static const struct ide_port_info ali14xx_port_info = {
  175. .chipset = ide_ali14xx,
  176. .host_flags = IDE_HFLAG_NO_DMA | IDE_HFLAG_NO_AUTOTUNE,
  177. .pio_mask = ATA_PIO4,
  178. };
  179. static int __init ali14xx_probe(void)
  180. {
  181. static u8 idx[4] = { 0, 1, 0xff, 0xff };
  182. hw_regs_t hw[2];
  183. printk(KERN_DEBUG "ali14xx: base=0x%03x, regOn=0x%02x.\n",
  184. basePort, regOn);
  185. /* initialize controller registers */
  186. if (!initRegisters()) {
  187. printk(KERN_ERR "ali14xx: Chip initialization failed.\n");
  188. return 1;
  189. }
  190. memset(&hw, 0, sizeof(hw));
  191. ide_std_init_ports(&hw[0], 0x1f0, 0x3f6);
  192. hw[0].irq = 14;
  193. ide_std_init_ports(&hw[1], 0x170, 0x376);
  194. hw[1].irq = 15;
  195. ide_init_port_hw(&ide_hwifs[0], &hw[0]);
  196. ide_init_port_hw(&ide_hwifs[1], &hw[1]);
  197. ide_hwifs[0].set_pio_mode = &ali14xx_set_pio_mode;
  198. ide_hwifs[1].set_pio_mode = &ali14xx_set_pio_mode;
  199. ide_device_add(idx, &ali14xx_port_info);
  200. return 0;
  201. }
  202. int probe_ali14xx = 0;
  203. module_param_named(probe, probe_ali14xx, bool, 0);
  204. MODULE_PARM_DESC(probe, "probe for ALI M14xx chipsets");
  205. static int __init ali14xx_init(void)
  206. {
  207. if (probe_ali14xx == 0)
  208. goto out;
  209. /* auto-detect IDE controller port */
  210. if (findPort()) {
  211. if (ali14xx_probe())
  212. return -ENODEV;
  213. return 0;
  214. }
  215. printk(KERN_ERR "ali14xx: not found.\n");
  216. out:
  217. return -ENODEV;
  218. }
  219. module_init(ali14xx_init);
  220. MODULE_AUTHOR("see local file");
  221. MODULE_DESCRIPTION("support of ALI 14XX IDE chipsets");
  222. MODULE_LICENSE("GPL");