x86.c 77 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * derived from drivers/kvm/kvm_main.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. *
  8. * Authors:
  9. * Avi Kivity <avi@qumranet.com>
  10. * Yaniv Kamay <yaniv@qumranet.com>
  11. *
  12. * This work is licensed under the terms of the GNU GPL, version 2. See
  13. * the COPYING file in the top-level directory.
  14. *
  15. */
  16. #include <linux/kvm_host.h>
  17. #include "segment_descriptor.h"
  18. #include "irq.h"
  19. #include "mmu.h"
  20. #include <linux/kvm.h>
  21. #include <linux/fs.h>
  22. #include <linux/vmalloc.h>
  23. #include <linux/module.h>
  24. #include <linux/mman.h>
  25. #include <linux/highmem.h>
  26. #include <asm/uaccess.h>
  27. #include <asm/msr.h>
  28. #define MAX_IO_MSRS 256
  29. #define CR0_RESERVED_BITS \
  30. (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  31. | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  32. | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  33. #define CR4_RESERVED_BITS \
  34. (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  35. | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
  36. | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
  37. | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  38. #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  39. #define EFER_RESERVED_BITS 0xfffffffffffff2fe
  40. #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  41. #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  42. static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  43. struct kvm_cpuid_entry2 __user *entries);
  44. struct kvm_x86_ops *kvm_x86_ops;
  45. struct kvm_stats_debugfs_item debugfs_entries[] = {
  46. { "pf_fixed", VCPU_STAT(pf_fixed) },
  47. { "pf_guest", VCPU_STAT(pf_guest) },
  48. { "tlb_flush", VCPU_STAT(tlb_flush) },
  49. { "invlpg", VCPU_STAT(invlpg) },
  50. { "exits", VCPU_STAT(exits) },
  51. { "io_exits", VCPU_STAT(io_exits) },
  52. { "mmio_exits", VCPU_STAT(mmio_exits) },
  53. { "signal_exits", VCPU_STAT(signal_exits) },
  54. { "irq_window", VCPU_STAT(irq_window_exits) },
  55. { "halt_exits", VCPU_STAT(halt_exits) },
  56. { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  57. { "request_irq", VCPU_STAT(request_irq_exits) },
  58. { "irq_exits", VCPU_STAT(irq_exits) },
  59. { "host_state_reload", VCPU_STAT(host_state_reload) },
  60. { "efer_reload", VCPU_STAT(efer_reload) },
  61. { "fpu_reload", VCPU_STAT(fpu_reload) },
  62. { "insn_emulation", VCPU_STAT(insn_emulation) },
  63. { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
  64. { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
  65. { "mmu_pte_write", VM_STAT(mmu_pte_write) },
  66. { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
  67. { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
  68. { "mmu_flooded", VM_STAT(mmu_flooded) },
  69. { "mmu_recycled", VM_STAT(mmu_recycled) },
  70. { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
  71. { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
  72. { NULL }
  73. };
  74. unsigned long segment_base(u16 selector)
  75. {
  76. struct descriptor_table gdt;
  77. struct segment_descriptor *d;
  78. unsigned long table_base;
  79. unsigned long v;
  80. if (selector == 0)
  81. return 0;
  82. asm("sgdt %0" : "=m"(gdt));
  83. table_base = gdt.base;
  84. if (selector & 4) { /* from ldt */
  85. u16 ldt_selector;
  86. asm("sldt %0" : "=g"(ldt_selector));
  87. table_base = segment_base(ldt_selector);
  88. }
  89. d = (struct segment_descriptor *)(table_base + (selector & ~7));
  90. v = d->base_low | ((unsigned long)d->base_mid << 16) |
  91. ((unsigned long)d->base_high << 24);
  92. #ifdef CONFIG_X86_64
  93. if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
  94. v |= ((unsigned long) \
  95. ((struct segment_descriptor_64 *)d)->base_higher) << 32;
  96. #endif
  97. return v;
  98. }
  99. EXPORT_SYMBOL_GPL(segment_base);
  100. u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
  101. {
  102. if (irqchip_in_kernel(vcpu->kvm))
  103. return vcpu->arch.apic_base;
  104. else
  105. return vcpu->arch.apic_base;
  106. }
  107. EXPORT_SYMBOL_GPL(kvm_get_apic_base);
  108. void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
  109. {
  110. /* TODO: reserve bits check */
  111. if (irqchip_in_kernel(vcpu->kvm))
  112. kvm_lapic_set_base(vcpu, data);
  113. else
  114. vcpu->arch.apic_base = data;
  115. }
  116. EXPORT_SYMBOL_GPL(kvm_set_apic_base);
  117. void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
  118. {
  119. WARN_ON(vcpu->arch.exception.pending);
  120. vcpu->arch.exception.pending = true;
  121. vcpu->arch.exception.has_error_code = false;
  122. vcpu->arch.exception.nr = nr;
  123. }
  124. EXPORT_SYMBOL_GPL(kvm_queue_exception);
  125. void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
  126. u32 error_code)
  127. {
  128. ++vcpu->stat.pf_guest;
  129. if (vcpu->arch.exception.pending && vcpu->arch.exception.nr == PF_VECTOR) {
  130. printk(KERN_DEBUG "kvm: inject_page_fault:"
  131. " double fault 0x%lx\n", addr);
  132. vcpu->arch.exception.nr = DF_VECTOR;
  133. vcpu->arch.exception.error_code = 0;
  134. return;
  135. }
  136. vcpu->arch.cr2 = addr;
  137. kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
  138. }
  139. void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
  140. {
  141. WARN_ON(vcpu->arch.exception.pending);
  142. vcpu->arch.exception.pending = true;
  143. vcpu->arch.exception.has_error_code = true;
  144. vcpu->arch.exception.nr = nr;
  145. vcpu->arch.exception.error_code = error_code;
  146. }
  147. EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
  148. static void __queue_exception(struct kvm_vcpu *vcpu)
  149. {
  150. kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
  151. vcpu->arch.exception.has_error_code,
  152. vcpu->arch.exception.error_code);
  153. }
  154. /*
  155. * Load the pae pdptrs. Return true is they are all valid.
  156. */
  157. int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
  158. {
  159. gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
  160. unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
  161. int i;
  162. int ret;
  163. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  164. down_read(&vcpu->kvm->slots_lock);
  165. ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
  166. offset * sizeof(u64), sizeof(pdpte));
  167. if (ret < 0) {
  168. ret = 0;
  169. goto out;
  170. }
  171. for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
  172. if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
  173. ret = 0;
  174. goto out;
  175. }
  176. }
  177. ret = 1;
  178. memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
  179. out:
  180. up_read(&vcpu->kvm->slots_lock);
  181. return ret;
  182. }
  183. static bool pdptrs_changed(struct kvm_vcpu *vcpu)
  184. {
  185. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  186. bool changed = true;
  187. int r;
  188. if (is_long_mode(vcpu) || !is_pae(vcpu))
  189. return false;
  190. down_read(&vcpu->kvm->slots_lock);
  191. r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
  192. if (r < 0)
  193. goto out;
  194. changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
  195. out:
  196. up_read(&vcpu->kvm->slots_lock);
  197. return changed;
  198. }
  199. void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
  200. {
  201. if (cr0 & CR0_RESERVED_BITS) {
  202. printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
  203. cr0, vcpu->arch.cr0);
  204. kvm_inject_gp(vcpu, 0);
  205. return;
  206. }
  207. if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
  208. printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
  209. kvm_inject_gp(vcpu, 0);
  210. return;
  211. }
  212. if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
  213. printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
  214. "and a clear PE flag\n");
  215. kvm_inject_gp(vcpu, 0);
  216. return;
  217. }
  218. if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
  219. #ifdef CONFIG_X86_64
  220. if ((vcpu->arch.shadow_efer & EFER_LME)) {
  221. int cs_db, cs_l;
  222. if (!is_pae(vcpu)) {
  223. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  224. "in long mode while PAE is disabled\n");
  225. kvm_inject_gp(vcpu, 0);
  226. return;
  227. }
  228. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  229. if (cs_l) {
  230. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  231. "in long mode while CS.L == 1\n");
  232. kvm_inject_gp(vcpu, 0);
  233. return;
  234. }
  235. } else
  236. #endif
  237. if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  238. printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
  239. "reserved bits\n");
  240. kvm_inject_gp(vcpu, 0);
  241. return;
  242. }
  243. }
  244. kvm_x86_ops->set_cr0(vcpu, cr0);
  245. vcpu->arch.cr0 = cr0;
  246. kvm_mmu_reset_context(vcpu);
  247. return;
  248. }
  249. EXPORT_SYMBOL_GPL(set_cr0);
  250. void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
  251. {
  252. set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
  253. }
  254. EXPORT_SYMBOL_GPL(lmsw);
  255. void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
  256. {
  257. if (cr4 & CR4_RESERVED_BITS) {
  258. printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
  259. kvm_inject_gp(vcpu, 0);
  260. return;
  261. }
  262. if (is_long_mode(vcpu)) {
  263. if (!(cr4 & X86_CR4_PAE)) {
  264. printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
  265. "in long mode\n");
  266. kvm_inject_gp(vcpu, 0);
  267. return;
  268. }
  269. } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
  270. && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  271. printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
  272. kvm_inject_gp(vcpu, 0);
  273. return;
  274. }
  275. if (cr4 & X86_CR4_VMXE) {
  276. printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
  277. kvm_inject_gp(vcpu, 0);
  278. return;
  279. }
  280. kvm_x86_ops->set_cr4(vcpu, cr4);
  281. vcpu->arch.cr4 = cr4;
  282. kvm_mmu_reset_context(vcpu);
  283. }
  284. EXPORT_SYMBOL_GPL(set_cr4);
  285. void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
  286. {
  287. if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
  288. kvm_mmu_flush_tlb(vcpu);
  289. return;
  290. }
  291. if (is_long_mode(vcpu)) {
  292. if (cr3 & CR3_L_MODE_RESERVED_BITS) {
  293. printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
  294. kvm_inject_gp(vcpu, 0);
  295. return;
  296. }
  297. } else {
  298. if (is_pae(vcpu)) {
  299. if (cr3 & CR3_PAE_RESERVED_BITS) {
  300. printk(KERN_DEBUG
  301. "set_cr3: #GP, reserved bits\n");
  302. kvm_inject_gp(vcpu, 0);
  303. return;
  304. }
  305. if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
  306. printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
  307. "reserved bits\n");
  308. kvm_inject_gp(vcpu, 0);
  309. return;
  310. }
  311. }
  312. /*
  313. * We don't check reserved bits in nonpae mode, because
  314. * this isn't enforced, and VMware depends on this.
  315. */
  316. }
  317. down_read(&vcpu->kvm->slots_lock);
  318. /*
  319. * Does the new cr3 value map to physical memory? (Note, we
  320. * catch an invalid cr3 even in real-mode, because it would
  321. * cause trouble later on when we turn on paging anyway.)
  322. *
  323. * A real CPU would silently accept an invalid cr3 and would
  324. * attempt to use it - with largely undefined (and often hard
  325. * to debug) behavior on the guest side.
  326. */
  327. if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
  328. kvm_inject_gp(vcpu, 0);
  329. else {
  330. vcpu->arch.cr3 = cr3;
  331. vcpu->arch.mmu.new_cr3(vcpu);
  332. }
  333. up_read(&vcpu->kvm->slots_lock);
  334. }
  335. EXPORT_SYMBOL_GPL(set_cr3);
  336. void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
  337. {
  338. if (cr8 & CR8_RESERVED_BITS) {
  339. printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
  340. kvm_inject_gp(vcpu, 0);
  341. return;
  342. }
  343. if (irqchip_in_kernel(vcpu->kvm))
  344. kvm_lapic_set_tpr(vcpu, cr8);
  345. else
  346. vcpu->arch.cr8 = cr8;
  347. }
  348. EXPORT_SYMBOL_GPL(set_cr8);
  349. unsigned long get_cr8(struct kvm_vcpu *vcpu)
  350. {
  351. if (irqchip_in_kernel(vcpu->kvm))
  352. return kvm_lapic_get_cr8(vcpu);
  353. else
  354. return vcpu->arch.cr8;
  355. }
  356. EXPORT_SYMBOL_GPL(get_cr8);
  357. /*
  358. * List of msr numbers which we expose to userspace through KVM_GET_MSRS
  359. * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
  360. *
  361. * This list is modified at module load time to reflect the
  362. * capabilities of the host cpu.
  363. */
  364. static u32 msrs_to_save[] = {
  365. MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
  366. MSR_K6_STAR,
  367. #ifdef CONFIG_X86_64
  368. MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
  369. #endif
  370. MSR_IA32_TIME_STAMP_COUNTER,
  371. };
  372. static unsigned num_msrs_to_save;
  373. static u32 emulated_msrs[] = {
  374. MSR_IA32_MISC_ENABLE,
  375. };
  376. #ifdef CONFIG_X86_64
  377. static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
  378. {
  379. if (efer & EFER_RESERVED_BITS) {
  380. printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
  381. efer);
  382. kvm_inject_gp(vcpu, 0);
  383. return;
  384. }
  385. if (is_paging(vcpu)
  386. && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
  387. printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
  388. kvm_inject_gp(vcpu, 0);
  389. return;
  390. }
  391. kvm_x86_ops->set_efer(vcpu, efer);
  392. efer &= ~EFER_LMA;
  393. efer |= vcpu->arch.shadow_efer & EFER_LMA;
  394. vcpu->arch.shadow_efer = efer;
  395. }
  396. #endif
  397. /*
  398. * Writes msr value into into the appropriate "register".
  399. * Returns 0 on success, non-0 otherwise.
  400. * Assumes vcpu_load() was already called.
  401. */
  402. int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
  403. {
  404. return kvm_x86_ops->set_msr(vcpu, msr_index, data);
  405. }
  406. /*
  407. * Adapt set_msr() to msr_io()'s calling convention
  408. */
  409. static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
  410. {
  411. return kvm_set_msr(vcpu, index, *data);
  412. }
  413. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  414. {
  415. switch (msr) {
  416. #ifdef CONFIG_X86_64
  417. case MSR_EFER:
  418. set_efer(vcpu, data);
  419. break;
  420. #endif
  421. case MSR_IA32_MC0_STATUS:
  422. pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
  423. __FUNCTION__, data);
  424. break;
  425. case MSR_IA32_MCG_STATUS:
  426. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
  427. __FUNCTION__, data);
  428. break;
  429. case MSR_IA32_MCG_CTL:
  430. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
  431. __FUNCTION__, data);
  432. break;
  433. case MSR_IA32_UCODE_REV:
  434. case MSR_IA32_UCODE_WRITE:
  435. case 0x200 ... 0x2ff: /* MTRRs */
  436. break;
  437. case MSR_IA32_APICBASE:
  438. kvm_set_apic_base(vcpu, data);
  439. break;
  440. case MSR_IA32_MISC_ENABLE:
  441. vcpu->arch.ia32_misc_enable_msr = data;
  442. break;
  443. default:
  444. pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
  445. return 1;
  446. }
  447. return 0;
  448. }
  449. EXPORT_SYMBOL_GPL(kvm_set_msr_common);
  450. /*
  451. * Reads an msr value (of 'msr_index') into 'pdata'.
  452. * Returns 0 on success, non-0 otherwise.
  453. * Assumes vcpu_load() was already called.
  454. */
  455. int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
  456. {
  457. return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
  458. }
  459. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  460. {
  461. u64 data;
  462. switch (msr) {
  463. case 0xc0010010: /* SYSCFG */
  464. case 0xc0010015: /* HWCR */
  465. case MSR_IA32_PLATFORM_ID:
  466. case MSR_IA32_P5_MC_ADDR:
  467. case MSR_IA32_P5_MC_TYPE:
  468. case MSR_IA32_MC0_CTL:
  469. case MSR_IA32_MCG_STATUS:
  470. case MSR_IA32_MCG_CAP:
  471. case MSR_IA32_MCG_CTL:
  472. case MSR_IA32_MC0_MISC:
  473. case MSR_IA32_MC0_MISC+4:
  474. case MSR_IA32_MC0_MISC+8:
  475. case MSR_IA32_MC0_MISC+12:
  476. case MSR_IA32_MC0_MISC+16:
  477. case MSR_IA32_UCODE_REV:
  478. case MSR_IA32_PERF_STATUS:
  479. case MSR_IA32_EBL_CR_POWERON:
  480. /* MTRR registers */
  481. case 0xfe:
  482. case 0x200 ... 0x2ff:
  483. data = 0;
  484. break;
  485. case 0xcd: /* fsb frequency */
  486. data = 3;
  487. break;
  488. case MSR_IA32_APICBASE:
  489. data = kvm_get_apic_base(vcpu);
  490. break;
  491. case MSR_IA32_MISC_ENABLE:
  492. data = vcpu->arch.ia32_misc_enable_msr;
  493. break;
  494. #ifdef CONFIG_X86_64
  495. case MSR_EFER:
  496. data = vcpu->arch.shadow_efer;
  497. break;
  498. #endif
  499. default:
  500. pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
  501. return 1;
  502. }
  503. *pdata = data;
  504. return 0;
  505. }
  506. EXPORT_SYMBOL_GPL(kvm_get_msr_common);
  507. /*
  508. * Read or write a bunch of msrs. All parameters are kernel addresses.
  509. *
  510. * @return number of msrs set successfully.
  511. */
  512. static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
  513. struct kvm_msr_entry *entries,
  514. int (*do_msr)(struct kvm_vcpu *vcpu,
  515. unsigned index, u64 *data))
  516. {
  517. int i;
  518. vcpu_load(vcpu);
  519. for (i = 0; i < msrs->nmsrs; ++i)
  520. if (do_msr(vcpu, entries[i].index, &entries[i].data))
  521. break;
  522. vcpu_put(vcpu);
  523. return i;
  524. }
  525. /*
  526. * Read or write a bunch of msrs. Parameters are user addresses.
  527. *
  528. * @return number of msrs set successfully.
  529. */
  530. static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
  531. int (*do_msr)(struct kvm_vcpu *vcpu,
  532. unsigned index, u64 *data),
  533. int writeback)
  534. {
  535. struct kvm_msrs msrs;
  536. struct kvm_msr_entry *entries;
  537. int r, n;
  538. unsigned size;
  539. r = -EFAULT;
  540. if (copy_from_user(&msrs, user_msrs, sizeof msrs))
  541. goto out;
  542. r = -E2BIG;
  543. if (msrs.nmsrs >= MAX_IO_MSRS)
  544. goto out;
  545. r = -ENOMEM;
  546. size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
  547. entries = vmalloc(size);
  548. if (!entries)
  549. goto out;
  550. r = -EFAULT;
  551. if (copy_from_user(entries, user_msrs->entries, size))
  552. goto out_free;
  553. r = n = __msr_io(vcpu, &msrs, entries, do_msr);
  554. if (r < 0)
  555. goto out_free;
  556. r = -EFAULT;
  557. if (writeback && copy_to_user(user_msrs->entries, entries, size))
  558. goto out_free;
  559. r = n;
  560. out_free:
  561. vfree(entries);
  562. out:
  563. return r;
  564. }
  565. /*
  566. * Make sure that a cpu that is being hot-unplugged does not have any vcpus
  567. * cached on it.
  568. */
  569. void decache_vcpus_on_cpu(int cpu)
  570. {
  571. struct kvm *vm;
  572. struct kvm_vcpu *vcpu;
  573. int i;
  574. spin_lock(&kvm_lock);
  575. list_for_each_entry(vm, &vm_list, vm_list)
  576. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  577. vcpu = vm->vcpus[i];
  578. if (!vcpu)
  579. continue;
  580. /*
  581. * If the vcpu is locked, then it is running on some
  582. * other cpu and therefore it is not cached on the
  583. * cpu in question.
  584. *
  585. * If it's not locked, check the last cpu it executed
  586. * on.
  587. */
  588. if (mutex_trylock(&vcpu->mutex)) {
  589. if (vcpu->cpu == cpu) {
  590. kvm_x86_ops->vcpu_decache(vcpu);
  591. vcpu->cpu = -1;
  592. }
  593. mutex_unlock(&vcpu->mutex);
  594. }
  595. }
  596. spin_unlock(&kvm_lock);
  597. }
  598. int kvm_dev_ioctl_check_extension(long ext)
  599. {
  600. int r;
  601. switch (ext) {
  602. case KVM_CAP_IRQCHIP:
  603. case KVM_CAP_HLT:
  604. case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
  605. case KVM_CAP_USER_MEMORY:
  606. case KVM_CAP_SET_TSS_ADDR:
  607. case KVM_CAP_EXT_CPUID:
  608. r = 1;
  609. break;
  610. case KVM_CAP_VAPIC:
  611. r = !kvm_x86_ops->cpu_has_accelerated_tpr();
  612. break;
  613. default:
  614. r = 0;
  615. break;
  616. }
  617. return r;
  618. }
  619. long kvm_arch_dev_ioctl(struct file *filp,
  620. unsigned int ioctl, unsigned long arg)
  621. {
  622. void __user *argp = (void __user *)arg;
  623. long r;
  624. switch (ioctl) {
  625. case KVM_GET_MSR_INDEX_LIST: {
  626. struct kvm_msr_list __user *user_msr_list = argp;
  627. struct kvm_msr_list msr_list;
  628. unsigned n;
  629. r = -EFAULT;
  630. if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
  631. goto out;
  632. n = msr_list.nmsrs;
  633. msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
  634. if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
  635. goto out;
  636. r = -E2BIG;
  637. if (n < num_msrs_to_save)
  638. goto out;
  639. r = -EFAULT;
  640. if (copy_to_user(user_msr_list->indices, &msrs_to_save,
  641. num_msrs_to_save * sizeof(u32)))
  642. goto out;
  643. if (copy_to_user(user_msr_list->indices
  644. + num_msrs_to_save * sizeof(u32),
  645. &emulated_msrs,
  646. ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
  647. goto out;
  648. r = 0;
  649. break;
  650. }
  651. case KVM_GET_SUPPORTED_CPUID: {
  652. struct kvm_cpuid2 __user *cpuid_arg = argp;
  653. struct kvm_cpuid2 cpuid;
  654. r = -EFAULT;
  655. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  656. goto out;
  657. r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
  658. cpuid_arg->entries);
  659. if (r)
  660. goto out;
  661. r = -EFAULT;
  662. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  663. goto out;
  664. r = 0;
  665. break;
  666. }
  667. default:
  668. r = -EINVAL;
  669. }
  670. out:
  671. return r;
  672. }
  673. void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  674. {
  675. kvm_x86_ops->vcpu_load(vcpu, cpu);
  676. }
  677. void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
  678. {
  679. kvm_x86_ops->vcpu_put(vcpu);
  680. kvm_put_guest_fpu(vcpu);
  681. }
  682. static int is_efer_nx(void)
  683. {
  684. u64 efer;
  685. rdmsrl(MSR_EFER, efer);
  686. return efer & EFER_NX;
  687. }
  688. static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
  689. {
  690. int i;
  691. struct kvm_cpuid_entry2 *e, *entry;
  692. entry = NULL;
  693. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  694. e = &vcpu->arch.cpuid_entries[i];
  695. if (e->function == 0x80000001) {
  696. entry = e;
  697. break;
  698. }
  699. }
  700. if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
  701. entry->edx &= ~(1 << 20);
  702. printk(KERN_INFO "kvm: guest NX capability removed\n");
  703. }
  704. }
  705. /* when an old userspace process fills a new kernel module */
  706. static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
  707. struct kvm_cpuid *cpuid,
  708. struct kvm_cpuid_entry __user *entries)
  709. {
  710. int r, i;
  711. struct kvm_cpuid_entry *cpuid_entries;
  712. r = -E2BIG;
  713. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  714. goto out;
  715. r = -ENOMEM;
  716. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
  717. if (!cpuid_entries)
  718. goto out;
  719. r = -EFAULT;
  720. if (copy_from_user(cpuid_entries, entries,
  721. cpuid->nent * sizeof(struct kvm_cpuid_entry)))
  722. goto out_free;
  723. for (i = 0; i < cpuid->nent; i++) {
  724. vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
  725. vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
  726. vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
  727. vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
  728. vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
  729. vcpu->arch.cpuid_entries[i].index = 0;
  730. vcpu->arch.cpuid_entries[i].flags = 0;
  731. vcpu->arch.cpuid_entries[i].padding[0] = 0;
  732. vcpu->arch.cpuid_entries[i].padding[1] = 0;
  733. vcpu->arch.cpuid_entries[i].padding[2] = 0;
  734. }
  735. vcpu->arch.cpuid_nent = cpuid->nent;
  736. cpuid_fix_nx_cap(vcpu);
  737. r = 0;
  738. out_free:
  739. vfree(cpuid_entries);
  740. out:
  741. return r;
  742. }
  743. static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
  744. struct kvm_cpuid2 *cpuid,
  745. struct kvm_cpuid_entry2 __user *entries)
  746. {
  747. int r;
  748. r = -E2BIG;
  749. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  750. goto out;
  751. r = -EFAULT;
  752. if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
  753. cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
  754. goto out;
  755. vcpu->arch.cpuid_nent = cpuid->nent;
  756. return 0;
  757. out:
  758. return r;
  759. }
  760. static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
  761. struct kvm_cpuid2 *cpuid,
  762. struct kvm_cpuid_entry2 __user *entries)
  763. {
  764. int r;
  765. r = -E2BIG;
  766. if (cpuid->nent < vcpu->arch.cpuid_nent)
  767. goto out;
  768. r = -EFAULT;
  769. if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
  770. vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
  771. goto out;
  772. return 0;
  773. out:
  774. cpuid->nent = vcpu->arch.cpuid_nent;
  775. return r;
  776. }
  777. static inline u32 bit(int bitno)
  778. {
  779. return 1 << (bitno & 31);
  780. }
  781. static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  782. u32 index)
  783. {
  784. entry->function = function;
  785. entry->index = index;
  786. cpuid_count(entry->function, entry->index,
  787. &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
  788. entry->flags = 0;
  789. }
  790. static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  791. u32 index, int *nent, int maxnent)
  792. {
  793. const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
  794. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  795. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  796. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  797. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  798. bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
  799. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  800. bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
  801. bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
  802. bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
  803. const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
  804. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  805. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  806. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  807. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  808. bit(X86_FEATURE_PGE) |
  809. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  810. bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
  811. bit(X86_FEATURE_SYSCALL) |
  812. (bit(X86_FEATURE_NX) && is_efer_nx()) |
  813. #ifdef CONFIG_X86_64
  814. bit(X86_FEATURE_LM) |
  815. #endif
  816. bit(X86_FEATURE_MMXEXT) |
  817. bit(X86_FEATURE_3DNOWEXT) |
  818. bit(X86_FEATURE_3DNOW);
  819. const u32 kvm_supported_word3_x86_features =
  820. bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
  821. const u32 kvm_supported_word6_x86_features =
  822. bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
  823. /* all func 2 cpuid_count() should be called on the same cpu */
  824. get_cpu();
  825. do_cpuid_1_ent(entry, function, index);
  826. ++*nent;
  827. switch (function) {
  828. case 0:
  829. entry->eax = min(entry->eax, (u32)0xb);
  830. break;
  831. case 1:
  832. entry->edx &= kvm_supported_word0_x86_features;
  833. entry->ecx &= kvm_supported_word3_x86_features;
  834. break;
  835. /* function 2 entries are STATEFUL. That is, repeated cpuid commands
  836. * may return different values. This forces us to get_cpu() before
  837. * issuing the first command, and also to emulate this annoying behavior
  838. * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
  839. case 2: {
  840. int t, times = entry->eax & 0xff;
  841. entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  842. for (t = 1; t < times && *nent < maxnent; ++t) {
  843. do_cpuid_1_ent(&entry[t], function, 0);
  844. entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  845. ++*nent;
  846. }
  847. break;
  848. }
  849. /* function 4 and 0xb have additional index. */
  850. case 4: {
  851. int index, cache_type;
  852. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  853. /* read more entries until cache_type is zero */
  854. for (index = 1; *nent < maxnent; ++index) {
  855. cache_type = entry[index - 1].eax & 0x1f;
  856. if (!cache_type)
  857. break;
  858. do_cpuid_1_ent(&entry[index], function, index);
  859. entry[index].flags |=
  860. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  861. ++*nent;
  862. }
  863. break;
  864. }
  865. case 0xb: {
  866. int index, level_type;
  867. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  868. /* read more entries until level_type is zero */
  869. for (index = 1; *nent < maxnent; ++index) {
  870. level_type = entry[index - 1].ecx & 0xff;
  871. if (!level_type)
  872. break;
  873. do_cpuid_1_ent(&entry[index], function, index);
  874. entry[index].flags |=
  875. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  876. ++*nent;
  877. }
  878. break;
  879. }
  880. case 0x80000000:
  881. entry->eax = min(entry->eax, 0x8000001a);
  882. break;
  883. case 0x80000001:
  884. entry->edx &= kvm_supported_word1_x86_features;
  885. entry->ecx &= kvm_supported_word6_x86_features;
  886. break;
  887. }
  888. put_cpu();
  889. }
  890. static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  891. struct kvm_cpuid_entry2 __user *entries)
  892. {
  893. struct kvm_cpuid_entry2 *cpuid_entries;
  894. int limit, nent = 0, r = -E2BIG;
  895. u32 func;
  896. if (cpuid->nent < 1)
  897. goto out;
  898. r = -ENOMEM;
  899. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
  900. if (!cpuid_entries)
  901. goto out;
  902. do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
  903. limit = cpuid_entries[0].eax;
  904. for (func = 1; func <= limit && nent < cpuid->nent; ++func)
  905. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  906. &nent, cpuid->nent);
  907. r = -E2BIG;
  908. if (nent >= cpuid->nent)
  909. goto out_free;
  910. do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
  911. limit = cpuid_entries[nent - 1].eax;
  912. for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
  913. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  914. &nent, cpuid->nent);
  915. r = -EFAULT;
  916. if (copy_to_user(entries, cpuid_entries,
  917. nent * sizeof(struct kvm_cpuid_entry2)))
  918. goto out_free;
  919. cpuid->nent = nent;
  920. r = 0;
  921. out_free:
  922. vfree(cpuid_entries);
  923. out:
  924. return r;
  925. }
  926. static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
  927. struct kvm_lapic_state *s)
  928. {
  929. vcpu_load(vcpu);
  930. memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
  931. vcpu_put(vcpu);
  932. return 0;
  933. }
  934. static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
  935. struct kvm_lapic_state *s)
  936. {
  937. vcpu_load(vcpu);
  938. memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
  939. kvm_apic_post_state_restore(vcpu);
  940. vcpu_put(vcpu);
  941. return 0;
  942. }
  943. static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
  944. struct kvm_interrupt *irq)
  945. {
  946. if (irq->irq < 0 || irq->irq >= 256)
  947. return -EINVAL;
  948. if (irqchip_in_kernel(vcpu->kvm))
  949. return -ENXIO;
  950. vcpu_load(vcpu);
  951. set_bit(irq->irq, vcpu->arch.irq_pending);
  952. set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
  953. vcpu_put(vcpu);
  954. return 0;
  955. }
  956. static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
  957. struct kvm_tpr_access_ctl *tac)
  958. {
  959. if (tac->flags)
  960. return -EINVAL;
  961. vcpu->arch.tpr_access_reporting = !!tac->enabled;
  962. return 0;
  963. }
  964. long kvm_arch_vcpu_ioctl(struct file *filp,
  965. unsigned int ioctl, unsigned long arg)
  966. {
  967. struct kvm_vcpu *vcpu = filp->private_data;
  968. void __user *argp = (void __user *)arg;
  969. int r;
  970. switch (ioctl) {
  971. case KVM_GET_LAPIC: {
  972. struct kvm_lapic_state lapic;
  973. memset(&lapic, 0, sizeof lapic);
  974. r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
  975. if (r)
  976. goto out;
  977. r = -EFAULT;
  978. if (copy_to_user(argp, &lapic, sizeof lapic))
  979. goto out;
  980. r = 0;
  981. break;
  982. }
  983. case KVM_SET_LAPIC: {
  984. struct kvm_lapic_state lapic;
  985. r = -EFAULT;
  986. if (copy_from_user(&lapic, argp, sizeof lapic))
  987. goto out;
  988. r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
  989. if (r)
  990. goto out;
  991. r = 0;
  992. break;
  993. }
  994. case KVM_INTERRUPT: {
  995. struct kvm_interrupt irq;
  996. r = -EFAULT;
  997. if (copy_from_user(&irq, argp, sizeof irq))
  998. goto out;
  999. r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
  1000. if (r)
  1001. goto out;
  1002. r = 0;
  1003. break;
  1004. }
  1005. case KVM_SET_CPUID: {
  1006. struct kvm_cpuid __user *cpuid_arg = argp;
  1007. struct kvm_cpuid cpuid;
  1008. r = -EFAULT;
  1009. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1010. goto out;
  1011. r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
  1012. if (r)
  1013. goto out;
  1014. break;
  1015. }
  1016. case KVM_SET_CPUID2: {
  1017. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1018. struct kvm_cpuid2 cpuid;
  1019. r = -EFAULT;
  1020. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1021. goto out;
  1022. r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
  1023. cpuid_arg->entries);
  1024. if (r)
  1025. goto out;
  1026. break;
  1027. }
  1028. case KVM_GET_CPUID2: {
  1029. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1030. struct kvm_cpuid2 cpuid;
  1031. r = -EFAULT;
  1032. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1033. goto out;
  1034. r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
  1035. cpuid_arg->entries);
  1036. if (r)
  1037. goto out;
  1038. r = -EFAULT;
  1039. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  1040. goto out;
  1041. r = 0;
  1042. break;
  1043. }
  1044. case KVM_GET_MSRS:
  1045. r = msr_io(vcpu, argp, kvm_get_msr, 1);
  1046. break;
  1047. case KVM_SET_MSRS:
  1048. r = msr_io(vcpu, argp, do_set_msr, 0);
  1049. break;
  1050. case KVM_TPR_ACCESS_REPORTING: {
  1051. struct kvm_tpr_access_ctl tac;
  1052. r = -EFAULT;
  1053. if (copy_from_user(&tac, argp, sizeof tac))
  1054. goto out;
  1055. r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
  1056. if (r)
  1057. goto out;
  1058. r = -EFAULT;
  1059. if (copy_to_user(argp, &tac, sizeof tac))
  1060. goto out;
  1061. r = 0;
  1062. break;
  1063. };
  1064. case KVM_SET_VAPIC_ADDR: {
  1065. struct kvm_vapic_addr va;
  1066. r = -EINVAL;
  1067. if (!irqchip_in_kernel(vcpu->kvm))
  1068. goto out;
  1069. r = -EFAULT;
  1070. if (copy_from_user(&va, argp, sizeof va))
  1071. goto out;
  1072. r = 0;
  1073. kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
  1074. break;
  1075. }
  1076. default:
  1077. r = -EINVAL;
  1078. }
  1079. out:
  1080. return r;
  1081. }
  1082. static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
  1083. {
  1084. int ret;
  1085. if (addr > (unsigned int)(-3 * PAGE_SIZE))
  1086. return -1;
  1087. ret = kvm_x86_ops->set_tss_addr(kvm, addr);
  1088. return ret;
  1089. }
  1090. static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
  1091. u32 kvm_nr_mmu_pages)
  1092. {
  1093. if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
  1094. return -EINVAL;
  1095. down_write(&kvm->slots_lock);
  1096. kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
  1097. kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
  1098. up_write(&kvm->slots_lock);
  1099. return 0;
  1100. }
  1101. static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
  1102. {
  1103. return kvm->arch.n_alloc_mmu_pages;
  1104. }
  1105. gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
  1106. {
  1107. int i;
  1108. struct kvm_mem_alias *alias;
  1109. for (i = 0; i < kvm->arch.naliases; ++i) {
  1110. alias = &kvm->arch.aliases[i];
  1111. if (gfn >= alias->base_gfn
  1112. && gfn < alias->base_gfn + alias->npages)
  1113. return alias->target_gfn + gfn - alias->base_gfn;
  1114. }
  1115. return gfn;
  1116. }
  1117. /*
  1118. * Set a new alias region. Aliases map a portion of physical memory into
  1119. * another portion. This is useful for memory windows, for example the PC
  1120. * VGA region.
  1121. */
  1122. static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
  1123. struct kvm_memory_alias *alias)
  1124. {
  1125. int r, n;
  1126. struct kvm_mem_alias *p;
  1127. r = -EINVAL;
  1128. /* General sanity checks */
  1129. if (alias->memory_size & (PAGE_SIZE - 1))
  1130. goto out;
  1131. if (alias->guest_phys_addr & (PAGE_SIZE - 1))
  1132. goto out;
  1133. if (alias->slot >= KVM_ALIAS_SLOTS)
  1134. goto out;
  1135. if (alias->guest_phys_addr + alias->memory_size
  1136. < alias->guest_phys_addr)
  1137. goto out;
  1138. if (alias->target_phys_addr + alias->memory_size
  1139. < alias->target_phys_addr)
  1140. goto out;
  1141. down_write(&kvm->slots_lock);
  1142. p = &kvm->arch.aliases[alias->slot];
  1143. p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
  1144. p->npages = alias->memory_size >> PAGE_SHIFT;
  1145. p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
  1146. for (n = KVM_ALIAS_SLOTS; n > 0; --n)
  1147. if (kvm->arch.aliases[n - 1].npages)
  1148. break;
  1149. kvm->arch.naliases = n;
  1150. kvm_mmu_zap_all(kvm);
  1151. up_write(&kvm->slots_lock);
  1152. return 0;
  1153. out:
  1154. return r;
  1155. }
  1156. static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1157. {
  1158. int r;
  1159. r = 0;
  1160. switch (chip->chip_id) {
  1161. case KVM_IRQCHIP_PIC_MASTER:
  1162. memcpy(&chip->chip.pic,
  1163. &pic_irqchip(kvm)->pics[0],
  1164. sizeof(struct kvm_pic_state));
  1165. break;
  1166. case KVM_IRQCHIP_PIC_SLAVE:
  1167. memcpy(&chip->chip.pic,
  1168. &pic_irqchip(kvm)->pics[1],
  1169. sizeof(struct kvm_pic_state));
  1170. break;
  1171. case KVM_IRQCHIP_IOAPIC:
  1172. memcpy(&chip->chip.ioapic,
  1173. ioapic_irqchip(kvm),
  1174. sizeof(struct kvm_ioapic_state));
  1175. break;
  1176. default:
  1177. r = -EINVAL;
  1178. break;
  1179. }
  1180. return r;
  1181. }
  1182. static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1183. {
  1184. int r;
  1185. r = 0;
  1186. switch (chip->chip_id) {
  1187. case KVM_IRQCHIP_PIC_MASTER:
  1188. memcpy(&pic_irqchip(kvm)->pics[0],
  1189. &chip->chip.pic,
  1190. sizeof(struct kvm_pic_state));
  1191. break;
  1192. case KVM_IRQCHIP_PIC_SLAVE:
  1193. memcpy(&pic_irqchip(kvm)->pics[1],
  1194. &chip->chip.pic,
  1195. sizeof(struct kvm_pic_state));
  1196. break;
  1197. case KVM_IRQCHIP_IOAPIC:
  1198. memcpy(ioapic_irqchip(kvm),
  1199. &chip->chip.ioapic,
  1200. sizeof(struct kvm_ioapic_state));
  1201. break;
  1202. default:
  1203. r = -EINVAL;
  1204. break;
  1205. }
  1206. kvm_pic_update_irq(pic_irqchip(kvm));
  1207. return r;
  1208. }
  1209. /*
  1210. * Get (and clear) the dirty memory log for a memory slot.
  1211. */
  1212. int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
  1213. struct kvm_dirty_log *log)
  1214. {
  1215. int r;
  1216. int n;
  1217. struct kvm_memory_slot *memslot;
  1218. int is_dirty = 0;
  1219. down_write(&kvm->slots_lock);
  1220. r = kvm_get_dirty_log(kvm, log, &is_dirty);
  1221. if (r)
  1222. goto out;
  1223. /* If nothing is dirty, don't bother messing with page tables. */
  1224. if (is_dirty) {
  1225. kvm_mmu_slot_remove_write_access(kvm, log->slot);
  1226. kvm_flush_remote_tlbs(kvm);
  1227. memslot = &kvm->memslots[log->slot];
  1228. n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
  1229. memset(memslot->dirty_bitmap, 0, n);
  1230. }
  1231. r = 0;
  1232. out:
  1233. up_write(&kvm->slots_lock);
  1234. return r;
  1235. }
  1236. long kvm_arch_vm_ioctl(struct file *filp,
  1237. unsigned int ioctl, unsigned long arg)
  1238. {
  1239. struct kvm *kvm = filp->private_data;
  1240. void __user *argp = (void __user *)arg;
  1241. int r = -EINVAL;
  1242. switch (ioctl) {
  1243. case KVM_SET_TSS_ADDR:
  1244. r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
  1245. if (r < 0)
  1246. goto out;
  1247. break;
  1248. case KVM_SET_MEMORY_REGION: {
  1249. struct kvm_memory_region kvm_mem;
  1250. struct kvm_userspace_memory_region kvm_userspace_mem;
  1251. r = -EFAULT;
  1252. if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
  1253. goto out;
  1254. kvm_userspace_mem.slot = kvm_mem.slot;
  1255. kvm_userspace_mem.flags = kvm_mem.flags;
  1256. kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
  1257. kvm_userspace_mem.memory_size = kvm_mem.memory_size;
  1258. r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
  1259. if (r)
  1260. goto out;
  1261. break;
  1262. }
  1263. case KVM_SET_NR_MMU_PAGES:
  1264. r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
  1265. if (r)
  1266. goto out;
  1267. break;
  1268. case KVM_GET_NR_MMU_PAGES:
  1269. r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
  1270. break;
  1271. case KVM_SET_MEMORY_ALIAS: {
  1272. struct kvm_memory_alias alias;
  1273. r = -EFAULT;
  1274. if (copy_from_user(&alias, argp, sizeof alias))
  1275. goto out;
  1276. r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
  1277. if (r)
  1278. goto out;
  1279. break;
  1280. }
  1281. case KVM_CREATE_IRQCHIP:
  1282. r = -ENOMEM;
  1283. kvm->arch.vpic = kvm_create_pic(kvm);
  1284. if (kvm->arch.vpic) {
  1285. r = kvm_ioapic_init(kvm);
  1286. if (r) {
  1287. kfree(kvm->arch.vpic);
  1288. kvm->arch.vpic = NULL;
  1289. goto out;
  1290. }
  1291. } else
  1292. goto out;
  1293. break;
  1294. case KVM_IRQ_LINE: {
  1295. struct kvm_irq_level irq_event;
  1296. r = -EFAULT;
  1297. if (copy_from_user(&irq_event, argp, sizeof irq_event))
  1298. goto out;
  1299. if (irqchip_in_kernel(kvm)) {
  1300. mutex_lock(&kvm->lock);
  1301. if (irq_event.irq < 16)
  1302. kvm_pic_set_irq(pic_irqchip(kvm),
  1303. irq_event.irq,
  1304. irq_event.level);
  1305. kvm_ioapic_set_irq(kvm->arch.vioapic,
  1306. irq_event.irq,
  1307. irq_event.level);
  1308. mutex_unlock(&kvm->lock);
  1309. r = 0;
  1310. }
  1311. break;
  1312. }
  1313. case KVM_GET_IRQCHIP: {
  1314. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1315. struct kvm_irqchip chip;
  1316. r = -EFAULT;
  1317. if (copy_from_user(&chip, argp, sizeof chip))
  1318. goto out;
  1319. r = -ENXIO;
  1320. if (!irqchip_in_kernel(kvm))
  1321. goto out;
  1322. r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
  1323. if (r)
  1324. goto out;
  1325. r = -EFAULT;
  1326. if (copy_to_user(argp, &chip, sizeof chip))
  1327. goto out;
  1328. r = 0;
  1329. break;
  1330. }
  1331. case KVM_SET_IRQCHIP: {
  1332. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1333. struct kvm_irqchip chip;
  1334. r = -EFAULT;
  1335. if (copy_from_user(&chip, argp, sizeof chip))
  1336. goto out;
  1337. r = -ENXIO;
  1338. if (!irqchip_in_kernel(kvm))
  1339. goto out;
  1340. r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
  1341. if (r)
  1342. goto out;
  1343. r = 0;
  1344. break;
  1345. }
  1346. default:
  1347. ;
  1348. }
  1349. out:
  1350. return r;
  1351. }
  1352. static void kvm_init_msr_list(void)
  1353. {
  1354. u32 dummy[2];
  1355. unsigned i, j;
  1356. for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
  1357. if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
  1358. continue;
  1359. if (j < i)
  1360. msrs_to_save[j] = msrs_to_save[i];
  1361. j++;
  1362. }
  1363. num_msrs_to_save = j;
  1364. }
  1365. /*
  1366. * Only apic need an MMIO device hook, so shortcut now..
  1367. */
  1368. static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
  1369. gpa_t addr)
  1370. {
  1371. struct kvm_io_device *dev;
  1372. if (vcpu->arch.apic) {
  1373. dev = &vcpu->arch.apic->dev;
  1374. if (dev->in_range(dev, addr))
  1375. return dev;
  1376. }
  1377. return NULL;
  1378. }
  1379. static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
  1380. gpa_t addr)
  1381. {
  1382. struct kvm_io_device *dev;
  1383. dev = vcpu_find_pervcpu_dev(vcpu, addr);
  1384. if (dev == NULL)
  1385. dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
  1386. return dev;
  1387. }
  1388. int emulator_read_std(unsigned long addr,
  1389. void *val,
  1390. unsigned int bytes,
  1391. struct kvm_vcpu *vcpu)
  1392. {
  1393. void *data = val;
  1394. int r = X86EMUL_CONTINUE;
  1395. down_read(&vcpu->kvm->slots_lock);
  1396. while (bytes) {
  1397. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1398. unsigned offset = addr & (PAGE_SIZE-1);
  1399. unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
  1400. int ret;
  1401. if (gpa == UNMAPPED_GVA) {
  1402. r = X86EMUL_PROPAGATE_FAULT;
  1403. goto out;
  1404. }
  1405. ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
  1406. if (ret < 0) {
  1407. r = X86EMUL_UNHANDLEABLE;
  1408. goto out;
  1409. }
  1410. bytes -= tocopy;
  1411. data += tocopy;
  1412. addr += tocopy;
  1413. }
  1414. out:
  1415. up_read(&vcpu->kvm->slots_lock);
  1416. return r;
  1417. }
  1418. EXPORT_SYMBOL_GPL(emulator_read_std);
  1419. static int emulator_read_emulated(unsigned long addr,
  1420. void *val,
  1421. unsigned int bytes,
  1422. struct kvm_vcpu *vcpu)
  1423. {
  1424. struct kvm_io_device *mmio_dev;
  1425. gpa_t gpa;
  1426. if (vcpu->mmio_read_completed) {
  1427. memcpy(val, vcpu->mmio_data, bytes);
  1428. vcpu->mmio_read_completed = 0;
  1429. return X86EMUL_CONTINUE;
  1430. }
  1431. down_read(&vcpu->kvm->slots_lock);
  1432. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1433. up_read(&vcpu->kvm->slots_lock);
  1434. /* For APIC access vmexit */
  1435. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1436. goto mmio;
  1437. if (emulator_read_std(addr, val, bytes, vcpu)
  1438. == X86EMUL_CONTINUE)
  1439. return X86EMUL_CONTINUE;
  1440. if (gpa == UNMAPPED_GVA)
  1441. return X86EMUL_PROPAGATE_FAULT;
  1442. mmio:
  1443. /*
  1444. * Is this MMIO handled locally?
  1445. */
  1446. mutex_lock(&vcpu->kvm->lock);
  1447. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1448. if (mmio_dev) {
  1449. kvm_iodevice_read(mmio_dev, gpa, bytes, val);
  1450. mutex_unlock(&vcpu->kvm->lock);
  1451. return X86EMUL_CONTINUE;
  1452. }
  1453. mutex_unlock(&vcpu->kvm->lock);
  1454. vcpu->mmio_needed = 1;
  1455. vcpu->mmio_phys_addr = gpa;
  1456. vcpu->mmio_size = bytes;
  1457. vcpu->mmio_is_write = 0;
  1458. return X86EMUL_UNHANDLEABLE;
  1459. }
  1460. static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
  1461. const void *val, int bytes)
  1462. {
  1463. int ret;
  1464. down_read(&vcpu->kvm->slots_lock);
  1465. ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
  1466. if (ret < 0) {
  1467. up_read(&vcpu->kvm->slots_lock);
  1468. return 0;
  1469. }
  1470. kvm_mmu_pte_write(vcpu, gpa, val, bytes);
  1471. up_read(&vcpu->kvm->slots_lock);
  1472. return 1;
  1473. }
  1474. static int emulator_write_emulated_onepage(unsigned long addr,
  1475. const void *val,
  1476. unsigned int bytes,
  1477. struct kvm_vcpu *vcpu)
  1478. {
  1479. struct kvm_io_device *mmio_dev;
  1480. gpa_t gpa;
  1481. down_read(&vcpu->kvm->slots_lock);
  1482. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1483. up_read(&vcpu->kvm->slots_lock);
  1484. if (gpa == UNMAPPED_GVA) {
  1485. kvm_inject_page_fault(vcpu, addr, 2);
  1486. return X86EMUL_PROPAGATE_FAULT;
  1487. }
  1488. /* For APIC access vmexit */
  1489. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1490. goto mmio;
  1491. if (emulator_write_phys(vcpu, gpa, val, bytes))
  1492. return X86EMUL_CONTINUE;
  1493. mmio:
  1494. /*
  1495. * Is this MMIO handled locally?
  1496. */
  1497. mutex_lock(&vcpu->kvm->lock);
  1498. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1499. if (mmio_dev) {
  1500. kvm_iodevice_write(mmio_dev, gpa, bytes, val);
  1501. mutex_unlock(&vcpu->kvm->lock);
  1502. return X86EMUL_CONTINUE;
  1503. }
  1504. mutex_unlock(&vcpu->kvm->lock);
  1505. vcpu->mmio_needed = 1;
  1506. vcpu->mmio_phys_addr = gpa;
  1507. vcpu->mmio_size = bytes;
  1508. vcpu->mmio_is_write = 1;
  1509. memcpy(vcpu->mmio_data, val, bytes);
  1510. return X86EMUL_CONTINUE;
  1511. }
  1512. int emulator_write_emulated(unsigned long addr,
  1513. const void *val,
  1514. unsigned int bytes,
  1515. struct kvm_vcpu *vcpu)
  1516. {
  1517. /* Crossing a page boundary? */
  1518. if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
  1519. int rc, now;
  1520. now = -addr & ~PAGE_MASK;
  1521. rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
  1522. if (rc != X86EMUL_CONTINUE)
  1523. return rc;
  1524. addr += now;
  1525. val += now;
  1526. bytes -= now;
  1527. }
  1528. return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
  1529. }
  1530. EXPORT_SYMBOL_GPL(emulator_write_emulated);
  1531. static int emulator_cmpxchg_emulated(unsigned long addr,
  1532. const void *old,
  1533. const void *new,
  1534. unsigned int bytes,
  1535. struct kvm_vcpu *vcpu)
  1536. {
  1537. static int reported;
  1538. if (!reported) {
  1539. reported = 1;
  1540. printk(KERN_WARNING "kvm: emulating exchange as write\n");
  1541. }
  1542. #ifndef CONFIG_X86_64
  1543. /* guests cmpxchg8b have to be emulated atomically */
  1544. if (bytes == 8) {
  1545. gpa_t gpa;
  1546. struct page *page;
  1547. char *kaddr;
  1548. u64 val;
  1549. down_read(&vcpu->kvm->slots_lock);
  1550. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1551. if (gpa == UNMAPPED_GVA ||
  1552. (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1553. goto emul_write;
  1554. if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
  1555. goto emul_write;
  1556. val = *(u64 *)new;
  1557. down_read(&current->mm->mmap_sem);
  1558. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1559. up_read(&current->mm->mmap_sem);
  1560. kaddr = kmap_atomic(page, KM_USER0);
  1561. set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
  1562. kunmap_atomic(kaddr, KM_USER0);
  1563. kvm_release_page_dirty(page);
  1564. emul_write:
  1565. up_read(&vcpu->kvm->slots_lock);
  1566. }
  1567. #endif
  1568. return emulator_write_emulated(addr, new, bytes, vcpu);
  1569. }
  1570. static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
  1571. {
  1572. return kvm_x86_ops->get_segment_base(vcpu, seg);
  1573. }
  1574. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
  1575. {
  1576. return X86EMUL_CONTINUE;
  1577. }
  1578. int emulate_clts(struct kvm_vcpu *vcpu)
  1579. {
  1580. kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
  1581. return X86EMUL_CONTINUE;
  1582. }
  1583. int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
  1584. {
  1585. struct kvm_vcpu *vcpu = ctxt->vcpu;
  1586. switch (dr) {
  1587. case 0 ... 3:
  1588. *dest = kvm_x86_ops->get_dr(vcpu, dr);
  1589. return X86EMUL_CONTINUE;
  1590. default:
  1591. pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
  1592. return X86EMUL_UNHANDLEABLE;
  1593. }
  1594. }
  1595. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
  1596. {
  1597. unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
  1598. int exception;
  1599. kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
  1600. if (exception) {
  1601. /* FIXME: better handling */
  1602. return X86EMUL_UNHANDLEABLE;
  1603. }
  1604. return X86EMUL_CONTINUE;
  1605. }
  1606. void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
  1607. {
  1608. static int reported;
  1609. u8 opcodes[4];
  1610. unsigned long rip = vcpu->arch.rip;
  1611. unsigned long rip_linear;
  1612. rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
  1613. if (reported)
  1614. return;
  1615. emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
  1616. printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
  1617. context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
  1618. reported = 1;
  1619. }
  1620. EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
  1621. struct x86_emulate_ops emulate_ops = {
  1622. .read_std = emulator_read_std,
  1623. .read_emulated = emulator_read_emulated,
  1624. .write_emulated = emulator_write_emulated,
  1625. .cmpxchg_emulated = emulator_cmpxchg_emulated,
  1626. };
  1627. int emulate_instruction(struct kvm_vcpu *vcpu,
  1628. struct kvm_run *run,
  1629. unsigned long cr2,
  1630. u16 error_code,
  1631. int emulation_type)
  1632. {
  1633. int r;
  1634. struct decode_cache *c;
  1635. vcpu->arch.mmio_fault_cr2 = cr2;
  1636. kvm_x86_ops->cache_regs(vcpu);
  1637. vcpu->mmio_is_write = 0;
  1638. vcpu->arch.pio.string = 0;
  1639. if (!(emulation_type & EMULTYPE_NO_DECODE)) {
  1640. int cs_db, cs_l;
  1641. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  1642. vcpu->arch.emulate_ctxt.vcpu = vcpu;
  1643. vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
  1644. vcpu->arch.emulate_ctxt.mode =
  1645. (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
  1646. ? X86EMUL_MODE_REAL : cs_l
  1647. ? X86EMUL_MODE_PROT64 : cs_db
  1648. ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
  1649. if (vcpu->arch.emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
  1650. vcpu->arch.emulate_ctxt.cs_base = 0;
  1651. vcpu->arch.emulate_ctxt.ds_base = 0;
  1652. vcpu->arch.emulate_ctxt.es_base = 0;
  1653. vcpu->arch.emulate_ctxt.ss_base = 0;
  1654. } else {
  1655. vcpu->arch.emulate_ctxt.cs_base =
  1656. get_segment_base(vcpu, VCPU_SREG_CS);
  1657. vcpu->arch.emulate_ctxt.ds_base =
  1658. get_segment_base(vcpu, VCPU_SREG_DS);
  1659. vcpu->arch.emulate_ctxt.es_base =
  1660. get_segment_base(vcpu, VCPU_SREG_ES);
  1661. vcpu->arch.emulate_ctxt.ss_base =
  1662. get_segment_base(vcpu, VCPU_SREG_SS);
  1663. }
  1664. vcpu->arch.emulate_ctxt.gs_base =
  1665. get_segment_base(vcpu, VCPU_SREG_GS);
  1666. vcpu->arch.emulate_ctxt.fs_base =
  1667. get_segment_base(vcpu, VCPU_SREG_FS);
  1668. r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  1669. /* Reject the instructions other than VMCALL/VMMCALL when
  1670. * try to emulate invalid opcode */
  1671. c = &vcpu->arch.emulate_ctxt.decode;
  1672. if ((emulation_type & EMULTYPE_TRAP_UD) &&
  1673. (!(c->twobyte && c->b == 0x01 &&
  1674. (c->modrm_reg == 0 || c->modrm_reg == 3) &&
  1675. c->modrm_mod == 3 && c->modrm_rm == 1)))
  1676. return EMULATE_FAIL;
  1677. ++vcpu->stat.insn_emulation;
  1678. if (r) {
  1679. ++vcpu->stat.insn_emulation_fail;
  1680. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1681. return EMULATE_DONE;
  1682. return EMULATE_FAIL;
  1683. }
  1684. }
  1685. r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  1686. if (vcpu->arch.pio.string)
  1687. return EMULATE_DO_MMIO;
  1688. if ((r || vcpu->mmio_is_write) && run) {
  1689. run->exit_reason = KVM_EXIT_MMIO;
  1690. run->mmio.phys_addr = vcpu->mmio_phys_addr;
  1691. memcpy(run->mmio.data, vcpu->mmio_data, 8);
  1692. run->mmio.len = vcpu->mmio_size;
  1693. run->mmio.is_write = vcpu->mmio_is_write;
  1694. }
  1695. if (r) {
  1696. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1697. return EMULATE_DONE;
  1698. if (!vcpu->mmio_needed) {
  1699. kvm_report_emulation_failure(vcpu, "mmio");
  1700. return EMULATE_FAIL;
  1701. }
  1702. return EMULATE_DO_MMIO;
  1703. }
  1704. kvm_x86_ops->decache_regs(vcpu);
  1705. kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
  1706. if (vcpu->mmio_is_write) {
  1707. vcpu->mmio_needed = 0;
  1708. return EMULATE_DO_MMIO;
  1709. }
  1710. return EMULATE_DONE;
  1711. }
  1712. EXPORT_SYMBOL_GPL(emulate_instruction);
  1713. static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
  1714. {
  1715. int i;
  1716. for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
  1717. if (vcpu->arch.pio.guest_pages[i]) {
  1718. kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
  1719. vcpu->arch.pio.guest_pages[i] = NULL;
  1720. }
  1721. }
  1722. static int pio_copy_data(struct kvm_vcpu *vcpu)
  1723. {
  1724. void *p = vcpu->arch.pio_data;
  1725. void *q;
  1726. unsigned bytes;
  1727. int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
  1728. q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
  1729. PAGE_KERNEL);
  1730. if (!q) {
  1731. free_pio_guest_pages(vcpu);
  1732. return -ENOMEM;
  1733. }
  1734. q += vcpu->arch.pio.guest_page_offset;
  1735. bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
  1736. if (vcpu->arch.pio.in)
  1737. memcpy(q, p, bytes);
  1738. else
  1739. memcpy(p, q, bytes);
  1740. q -= vcpu->arch.pio.guest_page_offset;
  1741. vunmap(q);
  1742. free_pio_guest_pages(vcpu);
  1743. return 0;
  1744. }
  1745. int complete_pio(struct kvm_vcpu *vcpu)
  1746. {
  1747. struct kvm_pio_request *io = &vcpu->arch.pio;
  1748. long delta;
  1749. int r;
  1750. kvm_x86_ops->cache_regs(vcpu);
  1751. if (!io->string) {
  1752. if (io->in)
  1753. memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data,
  1754. io->size);
  1755. } else {
  1756. if (io->in) {
  1757. r = pio_copy_data(vcpu);
  1758. if (r) {
  1759. kvm_x86_ops->cache_regs(vcpu);
  1760. return r;
  1761. }
  1762. }
  1763. delta = 1;
  1764. if (io->rep) {
  1765. delta *= io->cur_count;
  1766. /*
  1767. * The size of the register should really depend on
  1768. * current address size.
  1769. */
  1770. vcpu->arch.regs[VCPU_REGS_RCX] -= delta;
  1771. }
  1772. if (io->down)
  1773. delta = -delta;
  1774. delta *= io->size;
  1775. if (io->in)
  1776. vcpu->arch.regs[VCPU_REGS_RDI] += delta;
  1777. else
  1778. vcpu->arch.regs[VCPU_REGS_RSI] += delta;
  1779. }
  1780. kvm_x86_ops->decache_regs(vcpu);
  1781. io->count -= io->cur_count;
  1782. io->cur_count = 0;
  1783. return 0;
  1784. }
  1785. static void kernel_pio(struct kvm_io_device *pio_dev,
  1786. struct kvm_vcpu *vcpu,
  1787. void *pd)
  1788. {
  1789. /* TODO: String I/O for in kernel device */
  1790. mutex_lock(&vcpu->kvm->lock);
  1791. if (vcpu->arch.pio.in)
  1792. kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
  1793. vcpu->arch.pio.size,
  1794. pd);
  1795. else
  1796. kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
  1797. vcpu->arch.pio.size,
  1798. pd);
  1799. mutex_unlock(&vcpu->kvm->lock);
  1800. }
  1801. static void pio_string_write(struct kvm_io_device *pio_dev,
  1802. struct kvm_vcpu *vcpu)
  1803. {
  1804. struct kvm_pio_request *io = &vcpu->arch.pio;
  1805. void *pd = vcpu->arch.pio_data;
  1806. int i;
  1807. mutex_lock(&vcpu->kvm->lock);
  1808. for (i = 0; i < io->cur_count; i++) {
  1809. kvm_iodevice_write(pio_dev, io->port,
  1810. io->size,
  1811. pd);
  1812. pd += io->size;
  1813. }
  1814. mutex_unlock(&vcpu->kvm->lock);
  1815. }
  1816. static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
  1817. gpa_t addr)
  1818. {
  1819. return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
  1820. }
  1821. int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1822. int size, unsigned port)
  1823. {
  1824. struct kvm_io_device *pio_dev;
  1825. vcpu->run->exit_reason = KVM_EXIT_IO;
  1826. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1827. vcpu->run->io.size = vcpu->arch.pio.size = size;
  1828. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1829. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
  1830. vcpu->run->io.port = vcpu->arch.pio.port = port;
  1831. vcpu->arch.pio.in = in;
  1832. vcpu->arch.pio.string = 0;
  1833. vcpu->arch.pio.down = 0;
  1834. vcpu->arch.pio.guest_page_offset = 0;
  1835. vcpu->arch.pio.rep = 0;
  1836. kvm_x86_ops->cache_regs(vcpu);
  1837. memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4);
  1838. kvm_x86_ops->decache_regs(vcpu);
  1839. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1840. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1841. if (pio_dev) {
  1842. kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
  1843. complete_pio(vcpu);
  1844. return 1;
  1845. }
  1846. return 0;
  1847. }
  1848. EXPORT_SYMBOL_GPL(kvm_emulate_pio);
  1849. int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1850. int size, unsigned long count, int down,
  1851. gva_t address, int rep, unsigned port)
  1852. {
  1853. unsigned now, in_page;
  1854. int i, ret = 0;
  1855. int nr_pages = 1;
  1856. struct page *page;
  1857. struct kvm_io_device *pio_dev;
  1858. vcpu->run->exit_reason = KVM_EXIT_IO;
  1859. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1860. vcpu->run->io.size = vcpu->arch.pio.size = size;
  1861. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1862. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
  1863. vcpu->run->io.port = vcpu->arch.pio.port = port;
  1864. vcpu->arch.pio.in = in;
  1865. vcpu->arch.pio.string = 1;
  1866. vcpu->arch.pio.down = down;
  1867. vcpu->arch.pio.guest_page_offset = offset_in_page(address);
  1868. vcpu->arch.pio.rep = rep;
  1869. if (!count) {
  1870. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1871. return 1;
  1872. }
  1873. if (!down)
  1874. in_page = PAGE_SIZE - offset_in_page(address);
  1875. else
  1876. in_page = offset_in_page(address) + size;
  1877. now = min(count, (unsigned long)in_page / size);
  1878. if (!now) {
  1879. /*
  1880. * String I/O straddles page boundary. Pin two guest pages
  1881. * so that we satisfy atomicity constraints. Do just one
  1882. * transaction to avoid complexity.
  1883. */
  1884. nr_pages = 2;
  1885. now = 1;
  1886. }
  1887. if (down) {
  1888. /*
  1889. * String I/O in reverse. Yuck. Kill the guest, fix later.
  1890. */
  1891. pr_unimpl(vcpu, "guest string pio down\n");
  1892. kvm_inject_gp(vcpu, 0);
  1893. return 1;
  1894. }
  1895. vcpu->run->io.count = now;
  1896. vcpu->arch.pio.cur_count = now;
  1897. if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
  1898. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1899. for (i = 0; i < nr_pages; ++i) {
  1900. down_read(&vcpu->kvm->slots_lock);
  1901. page = gva_to_page(vcpu, address + i * PAGE_SIZE);
  1902. vcpu->arch.pio.guest_pages[i] = page;
  1903. up_read(&vcpu->kvm->slots_lock);
  1904. if (!page) {
  1905. kvm_inject_gp(vcpu, 0);
  1906. free_pio_guest_pages(vcpu);
  1907. return 1;
  1908. }
  1909. }
  1910. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1911. if (!vcpu->arch.pio.in) {
  1912. /* string PIO write */
  1913. ret = pio_copy_data(vcpu);
  1914. if (ret >= 0 && pio_dev) {
  1915. pio_string_write(pio_dev, vcpu);
  1916. complete_pio(vcpu);
  1917. if (vcpu->arch.pio.count == 0)
  1918. ret = 1;
  1919. }
  1920. } else if (pio_dev)
  1921. pr_unimpl(vcpu, "no string pio read support yet, "
  1922. "port %x size %d count %ld\n",
  1923. port, size, count);
  1924. return ret;
  1925. }
  1926. EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
  1927. int kvm_arch_init(void *opaque)
  1928. {
  1929. int r;
  1930. struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
  1931. if (kvm_x86_ops) {
  1932. printk(KERN_ERR "kvm: already loaded the other module\n");
  1933. r = -EEXIST;
  1934. goto out;
  1935. }
  1936. if (!ops->cpu_has_kvm_support()) {
  1937. printk(KERN_ERR "kvm: no hardware support\n");
  1938. r = -EOPNOTSUPP;
  1939. goto out;
  1940. }
  1941. if (ops->disabled_by_bios()) {
  1942. printk(KERN_ERR "kvm: disabled by bios\n");
  1943. r = -EOPNOTSUPP;
  1944. goto out;
  1945. }
  1946. r = kvm_mmu_module_init();
  1947. if (r)
  1948. goto out;
  1949. kvm_init_msr_list();
  1950. kvm_x86_ops = ops;
  1951. kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
  1952. return 0;
  1953. out:
  1954. return r;
  1955. }
  1956. void kvm_arch_exit(void)
  1957. {
  1958. kvm_x86_ops = NULL;
  1959. kvm_mmu_module_exit();
  1960. }
  1961. int kvm_emulate_halt(struct kvm_vcpu *vcpu)
  1962. {
  1963. ++vcpu->stat.halt_exits;
  1964. if (irqchip_in_kernel(vcpu->kvm)) {
  1965. vcpu->arch.mp_state = VCPU_MP_STATE_HALTED;
  1966. kvm_vcpu_block(vcpu);
  1967. if (vcpu->arch.mp_state != VCPU_MP_STATE_RUNNABLE)
  1968. return -EINTR;
  1969. return 1;
  1970. } else {
  1971. vcpu->run->exit_reason = KVM_EXIT_HLT;
  1972. return 0;
  1973. }
  1974. }
  1975. EXPORT_SYMBOL_GPL(kvm_emulate_halt);
  1976. int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
  1977. {
  1978. unsigned long nr, a0, a1, a2, a3, ret;
  1979. kvm_x86_ops->cache_regs(vcpu);
  1980. nr = vcpu->arch.regs[VCPU_REGS_RAX];
  1981. a0 = vcpu->arch.regs[VCPU_REGS_RBX];
  1982. a1 = vcpu->arch.regs[VCPU_REGS_RCX];
  1983. a2 = vcpu->arch.regs[VCPU_REGS_RDX];
  1984. a3 = vcpu->arch.regs[VCPU_REGS_RSI];
  1985. if (!is_long_mode(vcpu)) {
  1986. nr &= 0xFFFFFFFF;
  1987. a0 &= 0xFFFFFFFF;
  1988. a1 &= 0xFFFFFFFF;
  1989. a2 &= 0xFFFFFFFF;
  1990. a3 &= 0xFFFFFFFF;
  1991. }
  1992. switch (nr) {
  1993. case KVM_HC_VAPIC_POLL_IRQ:
  1994. ret = 0;
  1995. break;
  1996. default:
  1997. ret = -KVM_ENOSYS;
  1998. break;
  1999. }
  2000. vcpu->arch.regs[VCPU_REGS_RAX] = ret;
  2001. kvm_x86_ops->decache_regs(vcpu);
  2002. return 0;
  2003. }
  2004. EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
  2005. int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
  2006. {
  2007. char instruction[3];
  2008. int ret = 0;
  2009. /*
  2010. * Blow out the MMU to ensure that no other VCPU has an active mapping
  2011. * to ensure that the updated hypercall appears atomically across all
  2012. * VCPUs.
  2013. */
  2014. kvm_mmu_zap_all(vcpu->kvm);
  2015. kvm_x86_ops->cache_regs(vcpu);
  2016. kvm_x86_ops->patch_hypercall(vcpu, instruction);
  2017. if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu)
  2018. != X86EMUL_CONTINUE)
  2019. ret = -EFAULT;
  2020. return ret;
  2021. }
  2022. static u64 mk_cr_64(u64 curr_cr, u32 new_val)
  2023. {
  2024. return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
  2025. }
  2026. void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  2027. {
  2028. struct descriptor_table dt = { limit, base };
  2029. kvm_x86_ops->set_gdt(vcpu, &dt);
  2030. }
  2031. void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  2032. {
  2033. struct descriptor_table dt = { limit, base };
  2034. kvm_x86_ops->set_idt(vcpu, &dt);
  2035. }
  2036. void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
  2037. unsigned long *rflags)
  2038. {
  2039. lmsw(vcpu, msw);
  2040. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2041. }
  2042. unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
  2043. {
  2044. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2045. switch (cr) {
  2046. case 0:
  2047. return vcpu->arch.cr0;
  2048. case 2:
  2049. return vcpu->arch.cr2;
  2050. case 3:
  2051. return vcpu->arch.cr3;
  2052. case 4:
  2053. return vcpu->arch.cr4;
  2054. case 8:
  2055. return get_cr8(vcpu);
  2056. default:
  2057. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  2058. return 0;
  2059. }
  2060. }
  2061. void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
  2062. unsigned long *rflags)
  2063. {
  2064. switch (cr) {
  2065. case 0:
  2066. set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
  2067. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2068. break;
  2069. case 2:
  2070. vcpu->arch.cr2 = val;
  2071. break;
  2072. case 3:
  2073. set_cr3(vcpu, val);
  2074. break;
  2075. case 4:
  2076. set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
  2077. break;
  2078. case 8:
  2079. set_cr8(vcpu, val & 0xfUL);
  2080. break;
  2081. default:
  2082. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  2083. }
  2084. }
  2085. static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
  2086. {
  2087. struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
  2088. int j, nent = vcpu->arch.cpuid_nent;
  2089. e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
  2090. /* when no next entry is found, the current entry[i] is reselected */
  2091. for (j = i + 1; j == i; j = (j + 1) % nent) {
  2092. struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
  2093. if (ej->function == e->function) {
  2094. ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
  2095. return j;
  2096. }
  2097. }
  2098. return 0; /* silence gcc, even though control never reaches here */
  2099. }
  2100. /* find an entry with matching function, matching index (if needed), and that
  2101. * should be read next (if it's stateful) */
  2102. static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
  2103. u32 function, u32 index)
  2104. {
  2105. if (e->function != function)
  2106. return 0;
  2107. if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
  2108. return 0;
  2109. if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
  2110. !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
  2111. return 0;
  2112. return 1;
  2113. }
  2114. void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
  2115. {
  2116. int i;
  2117. u32 function, index;
  2118. struct kvm_cpuid_entry2 *e, *best;
  2119. kvm_x86_ops->cache_regs(vcpu);
  2120. function = vcpu->arch.regs[VCPU_REGS_RAX];
  2121. index = vcpu->arch.regs[VCPU_REGS_RCX];
  2122. vcpu->arch.regs[VCPU_REGS_RAX] = 0;
  2123. vcpu->arch.regs[VCPU_REGS_RBX] = 0;
  2124. vcpu->arch.regs[VCPU_REGS_RCX] = 0;
  2125. vcpu->arch.regs[VCPU_REGS_RDX] = 0;
  2126. best = NULL;
  2127. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  2128. e = &vcpu->arch.cpuid_entries[i];
  2129. if (is_matching_cpuid_entry(e, function, index)) {
  2130. if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
  2131. move_to_next_stateful_cpuid_entry(vcpu, i);
  2132. best = e;
  2133. break;
  2134. }
  2135. /*
  2136. * Both basic or both extended?
  2137. */
  2138. if (((e->function ^ function) & 0x80000000) == 0)
  2139. if (!best || e->function > best->function)
  2140. best = e;
  2141. }
  2142. if (best) {
  2143. vcpu->arch.regs[VCPU_REGS_RAX] = best->eax;
  2144. vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx;
  2145. vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx;
  2146. vcpu->arch.regs[VCPU_REGS_RDX] = best->edx;
  2147. }
  2148. kvm_x86_ops->decache_regs(vcpu);
  2149. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2150. }
  2151. EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
  2152. /*
  2153. * Check if userspace requested an interrupt window, and that the
  2154. * interrupt window is open.
  2155. *
  2156. * No need to exit to userspace if we already have an interrupt queued.
  2157. */
  2158. static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
  2159. struct kvm_run *kvm_run)
  2160. {
  2161. return (!vcpu->arch.irq_summary &&
  2162. kvm_run->request_interrupt_window &&
  2163. vcpu->arch.interrupt_window_open &&
  2164. (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
  2165. }
  2166. static void post_kvm_run_save(struct kvm_vcpu *vcpu,
  2167. struct kvm_run *kvm_run)
  2168. {
  2169. kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
  2170. kvm_run->cr8 = get_cr8(vcpu);
  2171. kvm_run->apic_base = kvm_get_apic_base(vcpu);
  2172. if (irqchip_in_kernel(vcpu->kvm))
  2173. kvm_run->ready_for_interrupt_injection = 1;
  2174. else
  2175. kvm_run->ready_for_interrupt_injection =
  2176. (vcpu->arch.interrupt_window_open &&
  2177. vcpu->arch.irq_summary == 0);
  2178. }
  2179. static void vapic_enter(struct kvm_vcpu *vcpu)
  2180. {
  2181. struct kvm_lapic *apic = vcpu->arch.apic;
  2182. struct page *page;
  2183. if (!apic || !apic->vapic_addr)
  2184. return;
  2185. down_read(&current->mm->mmap_sem);
  2186. page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
  2187. up_read(&current->mm->mmap_sem);
  2188. vcpu->arch.apic->vapic_page = page;
  2189. }
  2190. static void vapic_exit(struct kvm_vcpu *vcpu)
  2191. {
  2192. struct kvm_lapic *apic = vcpu->arch.apic;
  2193. if (!apic || !apic->vapic_addr)
  2194. return;
  2195. kvm_release_page_dirty(apic->vapic_page);
  2196. mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
  2197. }
  2198. static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2199. {
  2200. int r;
  2201. if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
  2202. pr_debug("vcpu %d received sipi with vector # %x\n",
  2203. vcpu->vcpu_id, vcpu->arch.sipi_vector);
  2204. kvm_lapic_reset(vcpu);
  2205. r = kvm_x86_ops->vcpu_reset(vcpu);
  2206. if (r)
  2207. return r;
  2208. vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
  2209. }
  2210. vapic_enter(vcpu);
  2211. preempted:
  2212. if (vcpu->guest_debug.enabled)
  2213. kvm_x86_ops->guest_debug_pre(vcpu);
  2214. again:
  2215. r = kvm_mmu_reload(vcpu);
  2216. if (unlikely(r))
  2217. goto out;
  2218. if (vcpu->requests) {
  2219. if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
  2220. __kvm_migrate_apic_timer(vcpu);
  2221. if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
  2222. &vcpu->requests)) {
  2223. kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
  2224. r = 0;
  2225. goto out;
  2226. }
  2227. }
  2228. kvm_inject_pending_timer_irqs(vcpu);
  2229. preempt_disable();
  2230. kvm_x86_ops->prepare_guest_switch(vcpu);
  2231. kvm_load_guest_fpu(vcpu);
  2232. local_irq_disable();
  2233. if (need_resched()) {
  2234. local_irq_enable();
  2235. preempt_enable();
  2236. r = 1;
  2237. goto out;
  2238. }
  2239. if (signal_pending(current)) {
  2240. local_irq_enable();
  2241. preempt_enable();
  2242. r = -EINTR;
  2243. kvm_run->exit_reason = KVM_EXIT_INTR;
  2244. ++vcpu->stat.signal_exits;
  2245. goto out;
  2246. }
  2247. if (vcpu->arch.exception.pending)
  2248. __queue_exception(vcpu);
  2249. else if (irqchip_in_kernel(vcpu->kvm))
  2250. kvm_x86_ops->inject_pending_irq(vcpu);
  2251. else
  2252. kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
  2253. kvm_lapic_sync_to_vapic(vcpu);
  2254. vcpu->guest_mode = 1;
  2255. kvm_guest_enter();
  2256. if (vcpu->requests)
  2257. if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
  2258. kvm_x86_ops->tlb_flush(vcpu);
  2259. kvm_x86_ops->run(vcpu, kvm_run);
  2260. vcpu->guest_mode = 0;
  2261. local_irq_enable();
  2262. ++vcpu->stat.exits;
  2263. /*
  2264. * We must have an instruction between local_irq_enable() and
  2265. * kvm_guest_exit(), so the timer interrupt isn't delayed by
  2266. * the interrupt shadow. The stat.exits increment will do nicely.
  2267. * But we need to prevent reordering, hence this barrier():
  2268. */
  2269. barrier();
  2270. kvm_guest_exit();
  2271. preempt_enable();
  2272. /*
  2273. * Profile KVM exit RIPs:
  2274. */
  2275. if (unlikely(prof_on == KVM_PROFILING)) {
  2276. kvm_x86_ops->cache_regs(vcpu);
  2277. profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip);
  2278. }
  2279. if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
  2280. vcpu->arch.exception.pending = false;
  2281. kvm_lapic_sync_from_vapic(vcpu);
  2282. r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
  2283. if (r > 0) {
  2284. if (dm_request_for_irq_injection(vcpu, kvm_run)) {
  2285. r = -EINTR;
  2286. kvm_run->exit_reason = KVM_EXIT_INTR;
  2287. ++vcpu->stat.request_irq_exits;
  2288. goto out;
  2289. }
  2290. if (!need_resched())
  2291. goto again;
  2292. }
  2293. out:
  2294. if (r > 0) {
  2295. kvm_resched(vcpu);
  2296. goto preempted;
  2297. }
  2298. post_kvm_run_save(vcpu, kvm_run);
  2299. vapic_exit(vcpu);
  2300. return r;
  2301. }
  2302. int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2303. {
  2304. int r;
  2305. sigset_t sigsaved;
  2306. vcpu_load(vcpu);
  2307. if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
  2308. kvm_vcpu_block(vcpu);
  2309. vcpu_put(vcpu);
  2310. return -EAGAIN;
  2311. }
  2312. if (vcpu->sigset_active)
  2313. sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
  2314. /* re-sync apic's tpr */
  2315. if (!irqchip_in_kernel(vcpu->kvm))
  2316. set_cr8(vcpu, kvm_run->cr8);
  2317. if (vcpu->arch.pio.cur_count) {
  2318. r = complete_pio(vcpu);
  2319. if (r)
  2320. goto out;
  2321. }
  2322. #if CONFIG_HAS_IOMEM
  2323. if (vcpu->mmio_needed) {
  2324. memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
  2325. vcpu->mmio_read_completed = 1;
  2326. vcpu->mmio_needed = 0;
  2327. r = emulate_instruction(vcpu, kvm_run,
  2328. vcpu->arch.mmio_fault_cr2, 0,
  2329. EMULTYPE_NO_DECODE);
  2330. if (r == EMULATE_DO_MMIO) {
  2331. /*
  2332. * Read-modify-write. Back to userspace.
  2333. */
  2334. r = 0;
  2335. goto out;
  2336. }
  2337. }
  2338. #endif
  2339. if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
  2340. kvm_x86_ops->cache_regs(vcpu);
  2341. vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
  2342. kvm_x86_ops->decache_regs(vcpu);
  2343. }
  2344. r = __vcpu_run(vcpu, kvm_run);
  2345. out:
  2346. if (vcpu->sigset_active)
  2347. sigprocmask(SIG_SETMASK, &sigsaved, NULL);
  2348. vcpu_put(vcpu);
  2349. return r;
  2350. }
  2351. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2352. {
  2353. vcpu_load(vcpu);
  2354. kvm_x86_ops->cache_regs(vcpu);
  2355. regs->rax = vcpu->arch.regs[VCPU_REGS_RAX];
  2356. regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX];
  2357. regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX];
  2358. regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX];
  2359. regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI];
  2360. regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI];
  2361. regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP];
  2362. regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP];
  2363. #ifdef CONFIG_X86_64
  2364. regs->r8 = vcpu->arch.regs[VCPU_REGS_R8];
  2365. regs->r9 = vcpu->arch.regs[VCPU_REGS_R9];
  2366. regs->r10 = vcpu->arch.regs[VCPU_REGS_R10];
  2367. regs->r11 = vcpu->arch.regs[VCPU_REGS_R11];
  2368. regs->r12 = vcpu->arch.regs[VCPU_REGS_R12];
  2369. regs->r13 = vcpu->arch.regs[VCPU_REGS_R13];
  2370. regs->r14 = vcpu->arch.regs[VCPU_REGS_R14];
  2371. regs->r15 = vcpu->arch.regs[VCPU_REGS_R15];
  2372. #endif
  2373. regs->rip = vcpu->arch.rip;
  2374. regs->rflags = kvm_x86_ops->get_rflags(vcpu);
  2375. /*
  2376. * Don't leak debug flags in case they were set for guest debugging
  2377. */
  2378. if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
  2379. regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
  2380. vcpu_put(vcpu);
  2381. return 0;
  2382. }
  2383. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2384. {
  2385. vcpu_load(vcpu);
  2386. vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax;
  2387. vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx;
  2388. vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx;
  2389. vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx;
  2390. vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi;
  2391. vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi;
  2392. vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp;
  2393. vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp;
  2394. #ifdef CONFIG_X86_64
  2395. vcpu->arch.regs[VCPU_REGS_R8] = regs->r8;
  2396. vcpu->arch.regs[VCPU_REGS_R9] = regs->r9;
  2397. vcpu->arch.regs[VCPU_REGS_R10] = regs->r10;
  2398. vcpu->arch.regs[VCPU_REGS_R11] = regs->r11;
  2399. vcpu->arch.regs[VCPU_REGS_R12] = regs->r12;
  2400. vcpu->arch.regs[VCPU_REGS_R13] = regs->r13;
  2401. vcpu->arch.regs[VCPU_REGS_R14] = regs->r14;
  2402. vcpu->arch.regs[VCPU_REGS_R15] = regs->r15;
  2403. #endif
  2404. vcpu->arch.rip = regs->rip;
  2405. kvm_x86_ops->set_rflags(vcpu, regs->rflags);
  2406. kvm_x86_ops->decache_regs(vcpu);
  2407. vcpu_put(vcpu);
  2408. return 0;
  2409. }
  2410. static void get_segment(struct kvm_vcpu *vcpu,
  2411. struct kvm_segment *var, int seg)
  2412. {
  2413. return kvm_x86_ops->get_segment(vcpu, var, seg);
  2414. }
  2415. void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
  2416. {
  2417. struct kvm_segment cs;
  2418. get_segment(vcpu, &cs, VCPU_SREG_CS);
  2419. *db = cs.db;
  2420. *l = cs.l;
  2421. }
  2422. EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
  2423. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  2424. struct kvm_sregs *sregs)
  2425. {
  2426. struct descriptor_table dt;
  2427. int pending_vec;
  2428. vcpu_load(vcpu);
  2429. get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  2430. get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  2431. get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  2432. get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  2433. get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  2434. get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  2435. get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  2436. get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  2437. kvm_x86_ops->get_idt(vcpu, &dt);
  2438. sregs->idt.limit = dt.limit;
  2439. sregs->idt.base = dt.base;
  2440. kvm_x86_ops->get_gdt(vcpu, &dt);
  2441. sregs->gdt.limit = dt.limit;
  2442. sregs->gdt.base = dt.base;
  2443. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2444. sregs->cr0 = vcpu->arch.cr0;
  2445. sregs->cr2 = vcpu->arch.cr2;
  2446. sregs->cr3 = vcpu->arch.cr3;
  2447. sregs->cr4 = vcpu->arch.cr4;
  2448. sregs->cr8 = get_cr8(vcpu);
  2449. sregs->efer = vcpu->arch.shadow_efer;
  2450. sregs->apic_base = kvm_get_apic_base(vcpu);
  2451. if (irqchip_in_kernel(vcpu->kvm)) {
  2452. memset(sregs->interrupt_bitmap, 0,
  2453. sizeof sregs->interrupt_bitmap);
  2454. pending_vec = kvm_x86_ops->get_irq(vcpu);
  2455. if (pending_vec >= 0)
  2456. set_bit(pending_vec,
  2457. (unsigned long *)sregs->interrupt_bitmap);
  2458. } else
  2459. memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
  2460. sizeof sregs->interrupt_bitmap);
  2461. vcpu_put(vcpu);
  2462. return 0;
  2463. }
  2464. static void set_segment(struct kvm_vcpu *vcpu,
  2465. struct kvm_segment *var, int seg)
  2466. {
  2467. return kvm_x86_ops->set_segment(vcpu, var, seg);
  2468. }
  2469. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  2470. struct kvm_sregs *sregs)
  2471. {
  2472. int mmu_reset_needed = 0;
  2473. int i, pending_vec, max_bits;
  2474. struct descriptor_table dt;
  2475. vcpu_load(vcpu);
  2476. dt.limit = sregs->idt.limit;
  2477. dt.base = sregs->idt.base;
  2478. kvm_x86_ops->set_idt(vcpu, &dt);
  2479. dt.limit = sregs->gdt.limit;
  2480. dt.base = sregs->gdt.base;
  2481. kvm_x86_ops->set_gdt(vcpu, &dt);
  2482. vcpu->arch.cr2 = sregs->cr2;
  2483. mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
  2484. vcpu->arch.cr3 = sregs->cr3;
  2485. set_cr8(vcpu, sregs->cr8);
  2486. mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
  2487. #ifdef CONFIG_X86_64
  2488. kvm_x86_ops->set_efer(vcpu, sregs->efer);
  2489. #endif
  2490. kvm_set_apic_base(vcpu, sregs->apic_base);
  2491. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2492. mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
  2493. kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
  2494. vcpu->arch.cr0 = sregs->cr0;
  2495. mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
  2496. kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
  2497. if (!is_long_mode(vcpu) && is_pae(vcpu))
  2498. load_pdptrs(vcpu, vcpu->arch.cr3);
  2499. if (mmu_reset_needed)
  2500. kvm_mmu_reset_context(vcpu);
  2501. if (!irqchip_in_kernel(vcpu->kvm)) {
  2502. memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
  2503. sizeof vcpu->arch.irq_pending);
  2504. vcpu->arch.irq_summary = 0;
  2505. for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
  2506. if (vcpu->arch.irq_pending[i])
  2507. __set_bit(i, &vcpu->arch.irq_summary);
  2508. } else {
  2509. max_bits = (sizeof sregs->interrupt_bitmap) << 3;
  2510. pending_vec = find_first_bit(
  2511. (const unsigned long *)sregs->interrupt_bitmap,
  2512. max_bits);
  2513. /* Only pending external irq is handled here */
  2514. if (pending_vec < max_bits) {
  2515. kvm_x86_ops->set_irq(vcpu, pending_vec);
  2516. pr_debug("Set back pending irq %d\n",
  2517. pending_vec);
  2518. }
  2519. }
  2520. set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  2521. set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  2522. set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  2523. set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  2524. set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  2525. set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  2526. set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  2527. set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  2528. vcpu_put(vcpu);
  2529. return 0;
  2530. }
  2531. int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
  2532. struct kvm_debug_guest *dbg)
  2533. {
  2534. int r;
  2535. vcpu_load(vcpu);
  2536. r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
  2537. vcpu_put(vcpu);
  2538. return r;
  2539. }
  2540. /*
  2541. * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
  2542. * we have asm/x86/processor.h
  2543. */
  2544. struct fxsave {
  2545. u16 cwd;
  2546. u16 swd;
  2547. u16 twd;
  2548. u16 fop;
  2549. u64 rip;
  2550. u64 rdp;
  2551. u32 mxcsr;
  2552. u32 mxcsr_mask;
  2553. u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
  2554. #ifdef CONFIG_X86_64
  2555. u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
  2556. #else
  2557. u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
  2558. #endif
  2559. };
  2560. /*
  2561. * Translate a guest virtual address to a guest physical address.
  2562. */
  2563. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  2564. struct kvm_translation *tr)
  2565. {
  2566. unsigned long vaddr = tr->linear_address;
  2567. gpa_t gpa;
  2568. vcpu_load(vcpu);
  2569. down_read(&vcpu->kvm->slots_lock);
  2570. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
  2571. up_read(&vcpu->kvm->slots_lock);
  2572. tr->physical_address = gpa;
  2573. tr->valid = gpa != UNMAPPED_GVA;
  2574. tr->writeable = 1;
  2575. tr->usermode = 0;
  2576. vcpu_put(vcpu);
  2577. return 0;
  2578. }
  2579. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2580. {
  2581. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  2582. vcpu_load(vcpu);
  2583. memcpy(fpu->fpr, fxsave->st_space, 128);
  2584. fpu->fcw = fxsave->cwd;
  2585. fpu->fsw = fxsave->swd;
  2586. fpu->ftwx = fxsave->twd;
  2587. fpu->last_opcode = fxsave->fop;
  2588. fpu->last_ip = fxsave->rip;
  2589. fpu->last_dp = fxsave->rdp;
  2590. memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
  2591. vcpu_put(vcpu);
  2592. return 0;
  2593. }
  2594. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2595. {
  2596. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  2597. vcpu_load(vcpu);
  2598. memcpy(fxsave->st_space, fpu->fpr, 128);
  2599. fxsave->cwd = fpu->fcw;
  2600. fxsave->swd = fpu->fsw;
  2601. fxsave->twd = fpu->ftwx;
  2602. fxsave->fop = fpu->last_opcode;
  2603. fxsave->rip = fpu->last_ip;
  2604. fxsave->rdp = fpu->last_dp;
  2605. memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
  2606. vcpu_put(vcpu);
  2607. return 0;
  2608. }
  2609. void fx_init(struct kvm_vcpu *vcpu)
  2610. {
  2611. unsigned after_mxcsr_mask;
  2612. /* Initialize guest FPU by resetting ours and saving into guest's */
  2613. preempt_disable();
  2614. fx_save(&vcpu->arch.host_fx_image);
  2615. fpu_init();
  2616. fx_save(&vcpu->arch.guest_fx_image);
  2617. fx_restore(&vcpu->arch.host_fx_image);
  2618. preempt_enable();
  2619. vcpu->arch.cr0 |= X86_CR0_ET;
  2620. after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
  2621. vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
  2622. memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
  2623. 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
  2624. }
  2625. EXPORT_SYMBOL_GPL(fx_init);
  2626. void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
  2627. {
  2628. if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
  2629. return;
  2630. vcpu->guest_fpu_loaded = 1;
  2631. fx_save(&vcpu->arch.host_fx_image);
  2632. fx_restore(&vcpu->arch.guest_fx_image);
  2633. }
  2634. EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
  2635. void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
  2636. {
  2637. if (!vcpu->guest_fpu_loaded)
  2638. return;
  2639. vcpu->guest_fpu_loaded = 0;
  2640. fx_save(&vcpu->arch.guest_fx_image);
  2641. fx_restore(&vcpu->arch.host_fx_image);
  2642. ++vcpu->stat.fpu_reload;
  2643. }
  2644. EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
  2645. void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
  2646. {
  2647. kvm_x86_ops->vcpu_free(vcpu);
  2648. }
  2649. struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
  2650. unsigned int id)
  2651. {
  2652. return kvm_x86_ops->vcpu_create(kvm, id);
  2653. }
  2654. int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
  2655. {
  2656. int r;
  2657. /* We do fxsave: this must be aligned. */
  2658. BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
  2659. vcpu_load(vcpu);
  2660. r = kvm_arch_vcpu_reset(vcpu);
  2661. if (r == 0)
  2662. r = kvm_mmu_setup(vcpu);
  2663. vcpu_put(vcpu);
  2664. if (r < 0)
  2665. goto free_vcpu;
  2666. return 0;
  2667. free_vcpu:
  2668. kvm_x86_ops->vcpu_free(vcpu);
  2669. return r;
  2670. }
  2671. void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
  2672. {
  2673. vcpu_load(vcpu);
  2674. kvm_mmu_unload(vcpu);
  2675. vcpu_put(vcpu);
  2676. kvm_x86_ops->vcpu_free(vcpu);
  2677. }
  2678. int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
  2679. {
  2680. return kvm_x86_ops->vcpu_reset(vcpu);
  2681. }
  2682. void kvm_arch_hardware_enable(void *garbage)
  2683. {
  2684. kvm_x86_ops->hardware_enable(garbage);
  2685. }
  2686. void kvm_arch_hardware_disable(void *garbage)
  2687. {
  2688. kvm_x86_ops->hardware_disable(garbage);
  2689. }
  2690. int kvm_arch_hardware_setup(void)
  2691. {
  2692. return kvm_x86_ops->hardware_setup();
  2693. }
  2694. void kvm_arch_hardware_unsetup(void)
  2695. {
  2696. kvm_x86_ops->hardware_unsetup();
  2697. }
  2698. void kvm_arch_check_processor_compat(void *rtn)
  2699. {
  2700. kvm_x86_ops->check_processor_compatibility(rtn);
  2701. }
  2702. int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
  2703. {
  2704. struct page *page;
  2705. struct kvm *kvm;
  2706. int r;
  2707. BUG_ON(vcpu->kvm == NULL);
  2708. kvm = vcpu->kvm;
  2709. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  2710. if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
  2711. vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
  2712. else
  2713. vcpu->arch.mp_state = VCPU_MP_STATE_UNINITIALIZED;
  2714. page = alloc_page(GFP_KERNEL | __GFP_ZERO);
  2715. if (!page) {
  2716. r = -ENOMEM;
  2717. goto fail;
  2718. }
  2719. vcpu->arch.pio_data = page_address(page);
  2720. r = kvm_mmu_create(vcpu);
  2721. if (r < 0)
  2722. goto fail_free_pio_data;
  2723. if (irqchip_in_kernel(kvm)) {
  2724. r = kvm_create_lapic(vcpu);
  2725. if (r < 0)
  2726. goto fail_mmu_destroy;
  2727. }
  2728. return 0;
  2729. fail_mmu_destroy:
  2730. kvm_mmu_destroy(vcpu);
  2731. fail_free_pio_data:
  2732. free_page((unsigned long)vcpu->arch.pio_data);
  2733. fail:
  2734. return r;
  2735. }
  2736. void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
  2737. {
  2738. kvm_free_lapic(vcpu);
  2739. kvm_mmu_destroy(vcpu);
  2740. free_page((unsigned long)vcpu->arch.pio_data);
  2741. }
  2742. struct kvm *kvm_arch_create_vm(void)
  2743. {
  2744. struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
  2745. if (!kvm)
  2746. return ERR_PTR(-ENOMEM);
  2747. INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
  2748. return kvm;
  2749. }
  2750. static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
  2751. {
  2752. vcpu_load(vcpu);
  2753. kvm_mmu_unload(vcpu);
  2754. vcpu_put(vcpu);
  2755. }
  2756. static void kvm_free_vcpus(struct kvm *kvm)
  2757. {
  2758. unsigned int i;
  2759. /*
  2760. * Unpin any mmu pages first.
  2761. */
  2762. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  2763. if (kvm->vcpus[i])
  2764. kvm_unload_vcpu_mmu(kvm->vcpus[i]);
  2765. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  2766. if (kvm->vcpus[i]) {
  2767. kvm_arch_vcpu_free(kvm->vcpus[i]);
  2768. kvm->vcpus[i] = NULL;
  2769. }
  2770. }
  2771. }
  2772. void kvm_arch_destroy_vm(struct kvm *kvm)
  2773. {
  2774. kfree(kvm->arch.vpic);
  2775. kfree(kvm->arch.vioapic);
  2776. kvm_free_vcpus(kvm);
  2777. kvm_free_physmem(kvm);
  2778. kfree(kvm);
  2779. }
  2780. int kvm_arch_set_memory_region(struct kvm *kvm,
  2781. struct kvm_userspace_memory_region *mem,
  2782. struct kvm_memory_slot old,
  2783. int user_alloc)
  2784. {
  2785. int npages = mem->memory_size >> PAGE_SHIFT;
  2786. struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
  2787. /*To keep backward compatibility with older userspace,
  2788. *x86 needs to hanlde !user_alloc case.
  2789. */
  2790. if (!user_alloc) {
  2791. if (npages && !old.rmap) {
  2792. down_write(&current->mm->mmap_sem);
  2793. memslot->userspace_addr = do_mmap(NULL, 0,
  2794. npages * PAGE_SIZE,
  2795. PROT_READ | PROT_WRITE,
  2796. MAP_SHARED | MAP_ANONYMOUS,
  2797. 0);
  2798. up_write(&current->mm->mmap_sem);
  2799. if (IS_ERR((void *)memslot->userspace_addr))
  2800. return PTR_ERR((void *)memslot->userspace_addr);
  2801. } else {
  2802. if (!old.user_alloc && old.rmap) {
  2803. int ret;
  2804. down_write(&current->mm->mmap_sem);
  2805. ret = do_munmap(current->mm, old.userspace_addr,
  2806. old.npages * PAGE_SIZE);
  2807. up_write(&current->mm->mmap_sem);
  2808. if (ret < 0)
  2809. printk(KERN_WARNING
  2810. "kvm_vm_ioctl_set_memory_region: "
  2811. "failed to munmap memory\n");
  2812. }
  2813. }
  2814. }
  2815. if (!kvm->arch.n_requested_mmu_pages) {
  2816. unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
  2817. kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
  2818. }
  2819. kvm_mmu_slot_remove_write_access(kvm, mem->slot);
  2820. kvm_flush_remote_tlbs(kvm);
  2821. return 0;
  2822. }
  2823. int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
  2824. {
  2825. return vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE
  2826. || vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED;
  2827. }
  2828. static void vcpu_kick_intr(void *info)
  2829. {
  2830. #ifdef DEBUG
  2831. struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
  2832. printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
  2833. #endif
  2834. }
  2835. void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
  2836. {
  2837. int ipi_pcpu = vcpu->cpu;
  2838. if (waitqueue_active(&vcpu->wq)) {
  2839. wake_up_interruptible(&vcpu->wq);
  2840. ++vcpu->stat.halt_wakeup;
  2841. }
  2842. if (vcpu->guest_mode)
  2843. smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0);
  2844. }