i387.c 12 KB

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  1. /*
  2. * Copyright (C) 1994 Linus Torvalds
  3. *
  4. * Pentium III FXSR, SSE support
  5. * General FPU state handling cleanups
  6. * Gareth Hughes <gareth@valinux.com>, May 2000
  7. */
  8. #include <linux/module.h>
  9. #include <linux/regset.h>
  10. #include <linux/sched.h>
  11. #include <asm/sigcontext.h>
  12. #include <asm/processor.h>
  13. #include <asm/math_emu.h>
  14. #include <asm/uaccess.h>
  15. #include <asm/ptrace.h>
  16. #include <asm/i387.h>
  17. #include <asm/user.h>
  18. #ifdef CONFIG_X86_64
  19. # include <asm/sigcontext32.h>
  20. # include <asm/user32.h>
  21. #else
  22. # define save_i387_ia32 save_i387
  23. # define restore_i387_ia32 restore_i387
  24. # define _fpstate_ia32 _fpstate
  25. # define user_i387_ia32_struct user_i387_struct
  26. # define user32_fxsr_struct user_fxsr_struct
  27. #endif
  28. #ifdef CONFIG_MATH_EMULATION
  29. # define HAVE_HWFP (boot_cpu_data.hard_math)
  30. #else
  31. # define HAVE_HWFP 1
  32. #endif
  33. static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
  34. unsigned int xstate_size;
  35. static struct i387_fxsave_struct fx_scratch __cpuinitdata;
  36. void __cpuinit mxcsr_feature_mask_init(void)
  37. {
  38. unsigned long mask = 0;
  39. clts();
  40. if (cpu_has_fxsr) {
  41. memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
  42. asm volatile("fxsave %0" : : "m" (fx_scratch));
  43. mask = fx_scratch.mxcsr_mask;
  44. if (mask == 0)
  45. mask = 0x0000ffbf;
  46. }
  47. mxcsr_feature_mask &= mask;
  48. stts();
  49. }
  50. void __init init_thread_xstate(void)
  51. {
  52. if (cpu_has_fxsr)
  53. xstate_size = sizeof(struct i387_fxsave_struct);
  54. #ifdef CONFIG_X86_32
  55. else
  56. xstate_size = sizeof(struct i387_fsave_struct);
  57. #endif
  58. }
  59. #ifdef CONFIG_X86_64
  60. /*
  61. * Called at bootup to set up the initial FPU state that is later cloned
  62. * into all processes.
  63. */
  64. void __cpuinit fpu_init(void)
  65. {
  66. unsigned long oldcr0 = read_cr0();
  67. set_in_cr4(X86_CR4_OSFXSR);
  68. set_in_cr4(X86_CR4_OSXMMEXCPT);
  69. write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
  70. mxcsr_feature_mask_init();
  71. /* clean state in init */
  72. current_thread_info()->status = 0;
  73. clear_used_math();
  74. }
  75. #endif /* CONFIG_X86_64 */
  76. /*
  77. * The _current_ task is using the FPU for the first time
  78. * so initialize it and set the mxcsr to its default
  79. * value at reset if we support XMM instructions and then
  80. * remeber the current task has used the FPU.
  81. */
  82. int init_fpu(struct task_struct *tsk)
  83. {
  84. if (tsk_used_math(tsk)) {
  85. if (tsk == current)
  86. unlazy_fpu(tsk);
  87. return 0;
  88. }
  89. /*
  90. * Memory allocation at the first usage of the FPU and other state.
  91. */
  92. if (!tsk->thread.xstate) {
  93. tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
  94. GFP_KERNEL);
  95. if (!tsk->thread.xstate)
  96. return -ENOMEM;
  97. }
  98. if (cpu_has_fxsr) {
  99. struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
  100. memset(fx, 0, xstate_size);
  101. fx->cwd = 0x37f;
  102. if (cpu_has_xmm)
  103. fx->mxcsr = MXCSR_DEFAULT;
  104. } else {
  105. struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
  106. memset(fp, 0, xstate_size);
  107. fp->cwd = 0xffff037fu;
  108. fp->swd = 0xffff0000u;
  109. fp->twd = 0xffffffffu;
  110. fp->fos = 0xffff0000u;
  111. }
  112. /*
  113. * Only the device not available exception or ptrace can call init_fpu.
  114. */
  115. set_stopped_child_used_math(tsk);
  116. return 0;
  117. }
  118. int fpregs_active(struct task_struct *target, const struct user_regset *regset)
  119. {
  120. return tsk_used_math(target) ? regset->n : 0;
  121. }
  122. int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
  123. {
  124. return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
  125. }
  126. int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
  127. unsigned int pos, unsigned int count,
  128. void *kbuf, void __user *ubuf)
  129. {
  130. int ret;
  131. if (!cpu_has_fxsr)
  132. return -ENODEV;
  133. ret = init_fpu(target);
  134. if (ret)
  135. return ret;
  136. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  137. &target->thread.xstate->fxsave, 0, -1);
  138. }
  139. int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
  140. unsigned int pos, unsigned int count,
  141. const void *kbuf, const void __user *ubuf)
  142. {
  143. int ret;
  144. if (!cpu_has_fxsr)
  145. return -ENODEV;
  146. ret = init_fpu(target);
  147. if (ret)
  148. return ret;
  149. set_stopped_child_used_math(target);
  150. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  151. &target->thread.xstate->fxsave, 0, -1);
  152. /*
  153. * mxcsr reserved bits must be masked to zero for security reasons.
  154. */
  155. target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
  156. return ret;
  157. }
  158. #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
  159. /*
  160. * FPU tag word conversions.
  161. */
  162. static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
  163. {
  164. unsigned int tmp; /* to avoid 16 bit prefixes in the code */
  165. /* Transform each pair of bits into 01 (valid) or 00 (empty) */
  166. tmp = ~twd;
  167. tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
  168. /* and move the valid bits to the lower byte. */
  169. tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
  170. tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
  171. tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
  172. return tmp;
  173. }
  174. #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
  175. #define FP_EXP_TAG_VALID 0
  176. #define FP_EXP_TAG_ZERO 1
  177. #define FP_EXP_TAG_SPECIAL 2
  178. #define FP_EXP_TAG_EMPTY 3
  179. static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
  180. {
  181. struct _fpxreg *st;
  182. u32 tos = (fxsave->swd >> 11) & 7;
  183. u32 twd = (unsigned long) fxsave->twd;
  184. u32 tag;
  185. u32 ret = 0xffff0000u;
  186. int i;
  187. for (i = 0; i < 8; i++, twd >>= 1) {
  188. if (twd & 0x1) {
  189. st = FPREG_ADDR(fxsave, (i - tos) & 7);
  190. switch (st->exponent & 0x7fff) {
  191. case 0x7fff:
  192. tag = FP_EXP_TAG_SPECIAL;
  193. break;
  194. case 0x0000:
  195. if (!st->significand[0] &&
  196. !st->significand[1] &&
  197. !st->significand[2] &&
  198. !st->significand[3])
  199. tag = FP_EXP_TAG_ZERO;
  200. else
  201. tag = FP_EXP_TAG_SPECIAL;
  202. break;
  203. default:
  204. if (st->significand[3] & 0x8000)
  205. tag = FP_EXP_TAG_VALID;
  206. else
  207. tag = FP_EXP_TAG_SPECIAL;
  208. break;
  209. }
  210. } else {
  211. tag = FP_EXP_TAG_EMPTY;
  212. }
  213. ret |= tag << (2 * i);
  214. }
  215. return ret;
  216. }
  217. /*
  218. * FXSR floating point environment conversions.
  219. */
  220. static void
  221. convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
  222. {
  223. struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
  224. struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
  225. struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
  226. int i;
  227. env->cwd = fxsave->cwd | 0xffff0000u;
  228. env->swd = fxsave->swd | 0xffff0000u;
  229. env->twd = twd_fxsr_to_i387(fxsave);
  230. #ifdef CONFIG_X86_64
  231. env->fip = fxsave->rip;
  232. env->foo = fxsave->rdp;
  233. if (tsk == current) {
  234. /*
  235. * should be actually ds/cs at fpu exception time, but
  236. * that information is not available in 64bit mode.
  237. */
  238. asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
  239. asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
  240. } else {
  241. struct pt_regs *regs = task_pt_regs(tsk);
  242. env->fos = 0xffff0000 | tsk->thread.ds;
  243. env->fcs = regs->cs;
  244. }
  245. #else
  246. env->fip = fxsave->fip;
  247. env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
  248. env->foo = fxsave->foo;
  249. env->fos = fxsave->fos;
  250. #endif
  251. for (i = 0; i < 8; ++i)
  252. memcpy(&to[i], &from[i], sizeof(to[0]));
  253. }
  254. static void convert_to_fxsr(struct task_struct *tsk,
  255. const struct user_i387_ia32_struct *env)
  256. {
  257. struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
  258. struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
  259. struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
  260. int i;
  261. fxsave->cwd = env->cwd;
  262. fxsave->swd = env->swd;
  263. fxsave->twd = twd_i387_to_fxsr(env->twd);
  264. fxsave->fop = (u16) ((u32) env->fcs >> 16);
  265. #ifdef CONFIG_X86_64
  266. fxsave->rip = env->fip;
  267. fxsave->rdp = env->foo;
  268. /* cs and ds ignored */
  269. #else
  270. fxsave->fip = env->fip;
  271. fxsave->fcs = (env->fcs & 0xffff);
  272. fxsave->foo = env->foo;
  273. fxsave->fos = env->fos;
  274. #endif
  275. for (i = 0; i < 8; ++i)
  276. memcpy(&to[i], &from[i], sizeof(from[0]));
  277. }
  278. int fpregs_get(struct task_struct *target, const struct user_regset *regset,
  279. unsigned int pos, unsigned int count,
  280. void *kbuf, void __user *ubuf)
  281. {
  282. struct user_i387_ia32_struct env;
  283. int ret;
  284. if (!HAVE_HWFP)
  285. return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
  286. ret = init_fpu(target);
  287. if (ret)
  288. return ret;
  289. if (!cpu_has_fxsr) {
  290. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  291. &target->thread.xstate->fsave, 0,
  292. -1);
  293. }
  294. if (kbuf && pos == 0 && count == sizeof(env)) {
  295. convert_from_fxsr(kbuf, target);
  296. return 0;
  297. }
  298. convert_from_fxsr(&env, target);
  299. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
  300. }
  301. int fpregs_set(struct task_struct *target, const struct user_regset *regset,
  302. unsigned int pos, unsigned int count,
  303. const void *kbuf, const void __user *ubuf)
  304. {
  305. struct user_i387_ia32_struct env;
  306. int ret;
  307. if (!HAVE_HWFP)
  308. return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
  309. ret = init_fpu(target);
  310. if (ret)
  311. return ret;
  312. set_stopped_child_used_math(target);
  313. if (!cpu_has_fxsr) {
  314. return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  315. &target->thread.xstate->fsave, 0, -1);
  316. }
  317. if (pos > 0 || count < sizeof(env))
  318. convert_from_fxsr(&env, target);
  319. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
  320. if (!ret)
  321. convert_to_fxsr(target, &env);
  322. return ret;
  323. }
  324. /*
  325. * Signal frame handlers.
  326. */
  327. static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
  328. {
  329. struct task_struct *tsk = current;
  330. struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
  331. unlazy_fpu(tsk);
  332. fp->status = fp->swd;
  333. if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
  334. return -1;
  335. return 1;
  336. }
  337. static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
  338. {
  339. struct task_struct *tsk = current;
  340. struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
  341. struct user_i387_ia32_struct env;
  342. int err = 0;
  343. unlazy_fpu(tsk);
  344. convert_from_fxsr(&env, tsk);
  345. if (__copy_to_user(buf, &env, sizeof(env)))
  346. return -1;
  347. err |= __put_user(fx->swd, &buf->status);
  348. err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
  349. if (err)
  350. return -1;
  351. if (__copy_to_user(&buf->_fxsr_env[0], fx,
  352. sizeof(struct i387_fxsave_struct)))
  353. return -1;
  354. return 1;
  355. }
  356. int save_i387_ia32(struct _fpstate_ia32 __user *buf)
  357. {
  358. if (!used_math())
  359. return 0;
  360. /*
  361. * This will cause a "finit" to be triggered by the next
  362. * attempted FPU operation by the 'current' process.
  363. */
  364. clear_used_math();
  365. if (!HAVE_HWFP) {
  366. return fpregs_soft_get(current, NULL,
  367. 0, sizeof(struct user_i387_ia32_struct),
  368. NULL, buf) ? -1 : 1;
  369. }
  370. if (cpu_has_fxsr)
  371. return save_i387_fxsave(buf);
  372. else
  373. return save_i387_fsave(buf);
  374. }
  375. static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
  376. {
  377. struct task_struct *tsk = current;
  378. clear_fpu(tsk);
  379. return __copy_from_user(&tsk->thread.xstate->fsave, buf,
  380. sizeof(struct i387_fsave_struct));
  381. }
  382. static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf)
  383. {
  384. struct task_struct *tsk = current;
  385. struct user_i387_ia32_struct env;
  386. int err;
  387. clear_fpu(tsk);
  388. err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
  389. sizeof(struct i387_fxsave_struct));
  390. /* mxcsr reserved bits must be masked to zero for security reasons */
  391. tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
  392. if (err || __copy_from_user(&env, buf, sizeof(env)))
  393. return 1;
  394. convert_to_fxsr(tsk, &env);
  395. return 0;
  396. }
  397. int restore_i387_ia32(struct _fpstate_ia32 __user *buf)
  398. {
  399. int err;
  400. if (HAVE_HWFP) {
  401. if (cpu_has_fxsr)
  402. err = restore_i387_fxsave(buf);
  403. else
  404. err = restore_i387_fsave(buf);
  405. } else {
  406. err = fpregs_soft_set(current, NULL,
  407. 0, sizeof(struct user_i387_ia32_struct),
  408. NULL, buf) != 0;
  409. }
  410. set_used_math();
  411. return err;
  412. }
  413. /*
  414. * FPU state for core dumps.
  415. * This is only used for a.out dumps now.
  416. * It is declared generically using elf_fpregset_t (which is
  417. * struct user_i387_struct) but is in fact only used for 32-bit
  418. * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
  419. */
  420. int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
  421. {
  422. struct task_struct *tsk = current;
  423. int fpvalid;
  424. fpvalid = !!used_math();
  425. if (fpvalid)
  426. fpvalid = !fpregs_get(tsk, NULL,
  427. 0, sizeof(struct user_i387_ia32_struct),
  428. fpu, NULL);
  429. return fpvalid;
  430. }
  431. EXPORT_SYMBOL(dump_fpu);
  432. #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */