fsl_soc.c 20 KB

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  1. /*
  2. * FSL SoC setup code
  3. *
  4. * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  5. *
  6. * 2006 (c) MontaVista Software, Inc.
  7. * Vitaly Bordug <vbordug@ru.mvista.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/stddef.h>
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/errno.h>
  18. #include <linux/major.h>
  19. #include <linux/delay.h>
  20. #include <linux/irq.h>
  21. #include <linux/module.h>
  22. #include <linux/device.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/phy.h>
  26. #include <linux/phy_fixed.h>
  27. #include <linux/spi/spi.h>
  28. #include <linux/fsl_devices.h>
  29. #include <linux/fs_enet_pd.h>
  30. #include <linux/fs_uart_pd.h>
  31. #include <asm/system.h>
  32. #include <asm/atomic.h>
  33. #include <asm/io.h>
  34. #include <asm/irq.h>
  35. #include <asm/time.h>
  36. #include <asm/prom.h>
  37. #include <sysdev/fsl_soc.h>
  38. #include <mm/mmu_decl.h>
  39. #include <asm/cpm2.h>
  40. extern void init_fcc_ioports(struct fs_platform_info*);
  41. extern void init_fec_ioports(struct fs_platform_info*);
  42. extern void init_smc_ioports(struct fs_uart_platform_info*);
  43. static phys_addr_t immrbase = -1;
  44. phys_addr_t get_immrbase(void)
  45. {
  46. struct device_node *soc;
  47. if (immrbase != -1)
  48. return immrbase;
  49. soc = of_find_node_by_type(NULL, "soc");
  50. if (soc) {
  51. int size;
  52. u32 naddr;
  53. const u32 *prop = of_get_property(soc, "#address-cells", &size);
  54. if (prop && size == 4)
  55. naddr = *prop;
  56. else
  57. naddr = 2;
  58. prop = of_get_property(soc, "ranges", &size);
  59. if (prop)
  60. immrbase = of_translate_address(soc, prop + naddr);
  61. of_node_put(soc);
  62. }
  63. return immrbase;
  64. }
  65. EXPORT_SYMBOL(get_immrbase);
  66. static u32 sysfreq = -1;
  67. u32 fsl_get_sys_freq(void)
  68. {
  69. struct device_node *soc;
  70. const u32 *prop;
  71. int size;
  72. if (sysfreq != -1)
  73. return sysfreq;
  74. soc = of_find_node_by_type(NULL, "soc");
  75. if (!soc)
  76. return -1;
  77. prop = of_get_property(soc, "clock-frequency", &size);
  78. if (!prop || size != sizeof(*prop) || *prop == 0)
  79. prop = of_get_property(soc, "bus-frequency", &size);
  80. if (prop && size == sizeof(*prop))
  81. sysfreq = *prop;
  82. of_node_put(soc);
  83. return sysfreq;
  84. }
  85. EXPORT_SYMBOL(fsl_get_sys_freq);
  86. #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
  87. static u32 brgfreq = -1;
  88. u32 get_brgfreq(void)
  89. {
  90. struct device_node *node;
  91. const unsigned int *prop;
  92. int size;
  93. if (brgfreq != -1)
  94. return brgfreq;
  95. node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
  96. if (node) {
  97. prop = of_get_property(node, "clock-frequency", &size);
  98. if (prop && size == 4)
  99. brgfreq = *prop;
  100. of_node_put(node);
  101. return brgfreq;
  102. }
  103. /* Legacy device binding -- will go away when no users are left. */
  104. node = of_find_node_by_type(NULL, "cpm");
  105. if (!node)
  106. node = of_find_compatible_node(NULL, NULL, "fsl,qe");
  107. if (!node)
  108. node = of_find_node_by_type(NULL, "qe");
  109. if (node) {
  110. prop = of_get_property(node, "brg-frequency", &size);
  111. if (prop && size == 4)
  112. brgfreq = *prop;
  113. if (brgfreq == -1 || brgfreq == 0) {
  114. prop = of_get_property(node, "bus-frequency", &size);
  115. if (prop && size == 4)
  116. brgfreq = *prop / 2;
  117. }
  118. of_node_put(node);
  119. }
  120. return brgfreq;
  121. }
  122. EXPORT_SYMBOL(get_brgfreq);
  123. static u32 fs_baudrate = -1;
  124. u32 get_baudrate(void)
  125. {
  126. struct device_node *node;
  127. if (fs_baudrate != -1)
  128. return fs_baudrate;
  129. node = of_find_node_by_type(NULL, "serial");
  130. if (node) {
  131. int size;
  132. const unsigned int *prop = of_get_property(node,
  133. "current-speed", &size);
  134. if (prop)
  135. fs_baudrate = *prop;
  136. of_node_put(node);
  137. }
  138. return fs_baudrate;
  139. }
  140. EXPORT_SYMBOL(get_baudrate);
  141. #endif /* CONFIG_CPM2 */
  142. #ifdef CONFIG_FIXED_PHY
  143. static int __init of_add_fixed_phys(void)
  144. {
  145. int ret;
  146. struct device_node *np;
  147. u32 *fixed_link;
  148. struct fixed_phy_status status = {};
  149. for_each_node_by_name(np, "ethernet") {
  150. fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
  151. if (!fixed_link)
  152. continue;
  153. status.link = 1;
  154. status.duplex = fixed_link[1];
  155. status.speed = fixed_link[2];
  156. status.pause = fixed_link[3];
  157. status.asym_pause = fixed_link[4];
  158. ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status);
  159. if (ret) {
  160. of_node_put(np);
  161. return ret;
  162. }
  163. }
  164. return 0;
  165. }
  166. arch_initcall(of_add_fixed_phys);
  167. #endif /* CONFIG_FIXED_PHY */
  168. static int __init gfar_mdio_of_init(void)
  169. {
  170. struct device_node *np = NULL;
  171. struct platform_device *mdio_dev;
  172. struct resource res;
  173. int ret;
  174. np = of_find_compatible_node(np, NULL, "fsl,gianfar-mdio");
  175. /* try the deprecated version */
  176. if (!np)
  177. np = of_find_compatible_node(np, "mdio", "gianfar");
  178. if (np) {
  179. int k;
  180. struct device_node *child = NULL;
  181. struct gianfar_mdio_data mdio_data;
  182. memset(&res, 0, sizeof(res));
  183. memset(&mdio_data, 0, sizeof(mdio_data));
  184. ret = of_address_to_resource(np, 0, &res);
  185. if (ret)
  186. goto err;
  187. mdio_dev =
  188. platform_device_register_simple("fsl-gianfar_mdio",
  189. res.start, &res, 1);
  190. if (IS_ERR(mdio_dev)) {
  191. ret = PTR_ERR(mdio_dev);
  192. goto err;
  193. }
  194. for (k = 0; k < 32; k++)
  195. mdio_data.irq[k] = PHY_POLL;
  196. while ((child = of_get_next_child(np, child)) != NULL) {
  197. int irq = irq_of_parse_and_map(child, 0);
  198. if (irq != NO_IRQ) {
  199. const u32 *id = of_get_property(child,
  200. "reg", NULL);
  201. mdio_data.irq[*id] = irq;
  202. }
  203. }
  204. ret =
  205. platform_device_add_data(mdio_dev, &mdio_data,
  206. sizeof(struct gianfar_mdio_data));
  207. if (ret)
  208. goto unreg;
  209. }
  210. of_node_put(np);
  211. return 0;
  212. unreg:
  213. platform_device_unregister(mdio_dev);
  214. err:
  215. of_node_put(np);
  216. return ret;
  217. }
  218. arch_initcall(gfar_mdio_of_init);
  219. static const char *gfar_tx_intr = "tx";
  220. static const char *gfar_rx_intr = "rx";
  221. static const char *gfar_err_intr = "error";
  222. static int __init gfar_of_init(void)
  223. {
  224. struct device_node *np;
  225. unsigned int i;
  226. struct platform_device *gfar_dev;
  227. struct resource res;
  228. int ret;
  229. for (np = NULL, i = 0;
  230. (np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
  231. i++) {
  232. struct resource r[4];
  233. struct device_node *phy, *mdio;
  234. struct gianfar_platform_data gfar_data;
  235. const unsigned int *id;
  236. const char *model;
  237. const char *ctype;
  238. const void *mac_addr;
  239. const phandle *ph;
  240. int n_res = 2;
  241. memset(r, 0, sizeof(r));
  242. memset(&gfar_data, 0, sizeof(gfar_data));
  243. ret = of_address_to_resource(np, 0, &r[0]);
  244. if (ret)
  245. goto err;
  246. of_irq_to_resource(np, 0, &r[1]);
  247. model = of_get_property(np, "model", NULL);
  248. /* If we aren't the FEC we have multiple interrupts */
  249. if (model && strcasecmp(model, "FEC")) {
  250. r[1].name = gfar_tx_intr;
  251. r[2].name = gfar_rx_intr;
  252. of_irq_to_resource(np, 1, &r[2]);
  253. r[3].name = gfar_err_intr;
  254. of_irq_to_resource(np, 2, &r[3]);
  255. n_res += 2;
  256. }
  257. gfar_dev =
  258. platform_device_register_simple("fsl-gianfar", i, &r[0],
  259. n_res);
  260. if (IS_ERR(gfar_dev)) {
  261. ret = PTR_ERR(gfar_dev);
  262. goto err;
  263. }
  264. mac_addr = of_get_mac_address(np);
  265. if (mac_addr)
  266. memcpy(gfar_data.mac_addr, mac_addr, 6);
  267. if (model && !strcasecmp(model, "TSEC"))
  268. gfar_data.device_flags =
  269. FSL_GIANFAR_DEV_HAS_GIGABIT |
  270. FSL_GIANFAR_DEV_HAS_COALESCE |
  271. FSL_GIANFAR_DEV_HAS_RMON |
  272. FSL_GIANFAR_DEV_HAS_MULTI_INTR;
  273. if (model && !strcasecmp(model, "eTSEC"))
  274. gfar_data.device_flags =
  275. FSL_GIANFAR_DEV_HAS_GIGABIT |
  276. FSL_GIANFAR_DEV_HAS_COALESCE |
  277. FSL_GIANFAR_DEV_HAS_RMON |
  278. FSL_GIANFAR_DEV_HAS_MULTI_INTR |
  279. FSL_GIANFAR_DEV_HAS_CSUM |
  280. FSL_GIANFAR_DEV_HAS_VLAN |
  281. FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
  282. ctype = of_get_property(np, "phy-connection-type", NULL);
  283. /* We only care about rgmii-id. The rest are autodetected */
  284. if (ctype && !strcmp(ctype, "rgmii-id"))
  285. gfar_data.interface = PHY_INTERFACE_MODE_RGMII_ID;
  286. else
  287. gfar_data.interface = PHY_INTERFACE_MODE_MII;
  288. ph = of_get_property(np, "phy-handle", NULL);
  289. if (ph == NULL) {
  290. u32 *fixed_link;
  291. fixed_link = (u32 *)of_get_property(np, "fixed-link",
  292. NULL);
  293. if (!fixed_link) {
  294. ret = -ENODEV;
  295. goto unreg;
  296. }
  297. snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "0");
  298. gfar_data.phy_id = fixed_link[0];
  299. } else {
  300. phy = of_find_node_by_phandle(*ph);
  301. if (phy == NULL) {
  302. ret = -ENODEV;
  303. goto unreg;
  304. }
  305. mdio = of_get_parent(phy);
  306. id = of_get_property(phy, "reg", NULL);
  307. ret = of_address_to_resource(mdio, 0, &res);
  308. if (ret) {
  309. of_node_put(phy);
  310. of_node_put(mdio);
  311. goto unreg;
  312. }
  313. gfar_data.phy_id = *id;
  314. snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%x",
  315. res.start);
  316. of_node_put(phy);
  317. of_node_put(mdio);
  318. }
  319. ret =
  320. platform_device_add_data(gfar_dev, &gfar_data,
  321. sizeof(struct
  322. gianfar_platform_data));
  323. if (ret)
  324. goto unreg;
  325. }
  326. return 0;
  327. unreg:
  328. platform_device_unregister(gfar_dev);
  329. err:
  330. return ret;
  331. }
  332. arch_initcall(gfar_of_init);
  333. #ifdef CONFIG_I2C_BOARDINFO
  334. #include <linux/i2c.h>
  335. struct i2c_driver_device {
  336. char *of_device;
  337. char *i2c_driver;
  338. char *i2c_type;
  339. };
  340. static struct i2c_driver_device i2c_devices[] __initdata = {
  341. {"ricoh,rs5c372a", "rtc-rs5c372", "rs5c372a",},
  342. {"ricoh,rs5c372b", "rtc-rs5c372", "rs5c372b",},
  343. {"ricoh,rv5c386", "rtc-rs5c372", "rv5c386",},
  344. {"ricoh,rv5c387a", "rtc-rs5c372", "rv5c387a",},
  345. {"dallas,ds1307", "rtc-ds1307", "ds1307",},
  346. {"dallas,ds1337", "rtc-ds1307", "ds1337",},
  347. {"dallas,ds1338", "rtc-ds1307", "ds1338",},
  348. {"dallas,ds1339", "rtc-ds1307", "ds1339",},
  349. {"dallas,ds1340", "rtc-ds1307", "ds1340",},
  350. {"stm,m41t00", "rtc-ds1307", "m41t00"},
  351. {"dallas,ds1374", "rtc-ds1374", "rtc-ds1374",},
  352. };
  353. static int __init of_find_i2c_driver(struct device_node *node,
  354. struct i2c_board_info *info)
  355. {
  356. int i;
  357. for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) {
  358. if (!of_device_is_compatible(node, i2c_devices[i].of_device))
  359. continue;
  360. if (strlcpy(info->driver_name, i2c_devices[i].i2c_driver,
  361. KOBJ_NAME_LEN) >= KOBJ_NAME_LEN ||
  362. strlcpy(info->type, i2c_devices[i].i2c_type,
  363. I2C_NAME_SIZE) >= I2C_NAME_SIZE)
  364. return -ENOMEM;
  365. return 0;
  366. }
  367. return -ENODEV;
  368. }
  369. static void __init of_register_i2c_devices(struct device_node *adap_node,
  370. int bus_num)
  371. {
  372. struct device_node *node = NULL;
  373. while ((node = of_get_next_child(adap_node, node))) {
  374. struct i2c_board_info info = {};
  375. const u32 *addr;
  376. int len;
  377. addr = of_get_property(node, "reg", &len);
  378. if (!addr || len < sizeof(int) || *addr > (1 << 10) - 1) {
  379. printk(KERN_WARNING "fsl_soc.c: invalid i2c device entry\n");
  380. continue;
  381. }
  382. info.irq = irq_of_parse_and_map(node, 0);
  383. if (info.irq == NO_IRQ)
  384. info.irq = -1;
  385. if (of_find_i2c_driver(node, &info) < 0)
  386. continue;
  387. info.addr = *addr;
  388. i2c_register_board_info(bus_num, &info, 1);
  389. }
  390. }
  391. static int __init fsl_i2c_of_init(void)
  392. {
  393. struct device_node *np;
  394. unsigned int i = 0;
  395. struct platform_device *i2c_dev;
  396. int ret;
  397. for_each_compatible_node(np, NULL, "fsl-i2c") {
  398. struct resource r[2];
  399. struct fsl_i2c_platform_data i2c_data;
  400. const unsigned char *flags = NULL;
  401. memset(&r, 0, sizeof(r));
  402. memset(&i2c_data, 0, sizeof(i2c_data));
  403. ret = of_address_to_resource(np, 0, &r[0]);
  404. if (ret)
  405. goto err;
  406. of_irq_to_resource(np, 0, &r[1]);
  407. i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
  408. if (IS_ERR(i2c_dev)) {
  409. ret = PTR_ERR(i2c_dev);
  410. goto err;
  411. }
  412. i2c_data.device_flags = 0;
  413. flags = of_get_property(np, "dfsrr", NULL);
  414. if (flags)
  415. i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
  416. flags = of_get_property(np, "fsl5200-clocking", NULL);
  417. if (flags)
  418. i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200;
  419. ret =
  420. platform_device_add_data(i2c_dev, &i2c_data,
  421. sizeof(struct
  422. fsl_i2c_platform_data));
  423. if (ret)
  424. goto unreg;
  425. of_register_i2c_devices(np, i++);
  426. }
  427. return 0;
  428. unreg:
  429. platform_device_unregister(i2c_dev);
  430. err:
  431. return ret;
  432. }
  433. arch_initcall(fsl_i2c_of_init);
  434. #endif
  435. #ifdef CONFIG_PPC_83xx
  436. static int __init mpc83xx_wdt_init(void)
  437. {
  438. struct resource r;
  439. struct device_node *np;
  440. struct platform_device *dev;
  441. u32 freq = fsl_get_sys_freq();
  442. int ret;
  443. np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
  444. if (!np) {
  445. ret = -ENODEV;
  446. goto nodev;
  447. }
  448. memset(&r, 0, sizeof(r));
  449. ret = of_address_to_resource(np, 0, &r);
  450. if (ret)
  451. goto err;
  452. dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
  453. if (IS_ERR(dev)) {
  454. ret = PTR_ERR(dev);
  455. goto err;
  456. }
  457. ret = platform_device_add_data(dev, &freq, sizeof(freq));
  458. if (ret)
  459. goto unreg;
  460. of_node_put(np);
  461. return 0;
  462. unreg:
  463. platform_device_unregister(dev);
  464. err:
  465. of_node_put(np);
  466. nodev:
  467. return ret;
  468. }
  469. arch_initcall(mpc83xx_wdt_init);
  470. #endif
  471. static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
  472. {
  473. if (!phy_type)
  474. return FSL_USB2_PHY_NONE;
  475. if (!strcasecmp(phy_type, "ulpi"))
  476. return FSL_USB2_PHY_ULPI;
  477. if (!strcasecmp(phy_type, "utmi"))
  478. return FSL_USB2_PHY_UTMI;
  479. if (!strcasecmp(phy_type, "utmi_wide"))
  480. return FSL_USB2_PHY_UTMI_WIDE;
  481. if (!strcasecmp(phy_type, "serial"))
  482. return FSL_USB2_PHY_SERIAL;
  483. return FSL_USB2_PHY_NONE;
  484. }
  485. static int __init fsl_usb_of_init(void)
  486. {
  487. struct device_node *np;
  488. unsigned int i = 0;
  489. struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
  490. *usb_dev_dr_client = NULL;
  491. int ret;
  492. for_each_compatible_node(np, NULL, "fsl-usb2-mph") {
  493. struct resource r[2];
  494. struct fsl_usb2_platform_data usb_data;
  495. const unsigned char *prop = NULL;
  496. memset(&r, 0, sizeof(r));
  497. memset(&usb_data, 0, sizeof(usb_data));
  498. ret = of_address_to_resource(np, 0, &r[0]);
  499. if (ret)
  500. goto err;
  501. of_irq_to_resource(np, 0, &r[1]);
  502. usb_dev_mph =
  503. platform_device_register_simple("fsl-ehci", i, r, 2);
  504. if (IS_ERR(usb_dev_mph)) {
  505. ret = PTR_ERR(usb_dev_mph);
  506. goto err;
  507. }
  508. usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
  509. usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
  510. usb_data.operating_mode = FSL_USB2_MPH_HOST;
  511. prop = of_get_property(np, "port0", NULL);
  512. if (prop)
  513. usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
  514. prop = of_get_property(np, "port1", NULL);
  515. if (prop)
  516. usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
  517. prop = of_get_property(np, "phy_type", NULL);
  518. usb_data.phy_mode = determine_usb_phy(prop);
  519. ret =
  520. platform_device_add_data(usb_dev_mph, &usb_data,
  521. sizeof(struct
  522. fsl_usb2_platform_data));
  523. if (ret)
  524. goto unreg_mph;
  525. i++;
  526. }
  527. for_each_compatible_node(np, NULL, "fsl-usb2-dr") {
  528. struct resource r[2];
  529. struct fsl_usb2_platform_data usb_data;
  530. const unsigned char *prop = NULL;
  531. memset(&r, 0, sizeof(r));
  532. memset(&usb_data, 0, sizeof(usb_data));
  533. ret = of_address_to_resource(np, 0, &r[0]);
  534. if (ret)
  535. goto unreg_mph;
  536. of_irq_to_resource(np, 0, &r[1]);
  537. prop = of_get_property(np, "dr_mode", NULL);
  538. if (!prop || !strcmp(prop, "host")) {
  539. usb_data.operating_mode = FSL_USB2_DR_HOST;
  540. usb_dev_dr_host = platform_device_register_simple(
  541. "fsl-ehci", i, r, 2);
  542. if (IS_ERR(usb_dev_dr_host)) {
  543. ret = PTR_ERR(usb_dev_dr_host);
  544. goto err;
  545. }
  546. } else if (prop && !strcmp(prop, "peripheral")) {
  547. usb_data.operating_mode = FSL_USB2_DR_DEVICE;
  548. usb_dev_dr_client = platform_device_register_simple(
  549. "fsl-usb2-udc", i, r, 2);
  550. if (IS_ERR(usb_dev_dr_client)) {
  551. ret = PTR_ERR(usb_dev_dr_client);
  552. goto err;
  553. }
  554. } else if (prop && !strcmp(prop, "otg")) {
  555. usb_data.operating_mode = FSL_USB2_DR_OTG;
  556. usb_dev_dr_host = platform_device_register_simple(
  557. "fsl-ehci", i, r, 2);
  558. if (IS_ERR(usb_dev_dr_host)) {
  559. ret = PTR_ERR(usb_dev_dr_host);
  560. goto err;
  561. }
  562. usb_dev_dr_client = platform_device_register_simple(
  563. "fsl-usb2-udc", i, r, 2);
  564. if (IS_ERR(usb_dev_dr_client)) {
  565. ret = PTR_ERR(usb_dev_dr_client);
  566. goto err;
  567. }
  568. } else {
  569. ret = -EINVAL;
  570. goto err;
  571. }
  572. prop = of_get_property(np, "phy_type", NULL);
  573. usb_data.phy_mode = determine_usb_phy(prop);
  574. if (usb_dev_dr_host) {
  575. usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
  576. usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
  577. dev.coherent_dma_mask;
  578. if ((ret = platform_device_add_data(usb_dev_dr_host,
  579. &usb_data, sizeof(struct
  580. fsl_usb2_platform_data))))
  581. goto unreg_dr;
  582. }
  583. if (usb_dev_dr_client) {
  584. usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
  585. usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
  586. dev.coherent_dma_mask;
  587. if ((ret = platform_device_add_data(usb_dev_dr_client,
  588. &usb_data, sizeof(struct
  589. fsl_usb2_platform_data))))
  590. goto unreg_dr;
  591. }
  592. i++;
  593. }
  594. return 0;
  595. unreg_dr:
  596. if (usb_dev_dr_host)
  597. platform_device_unregister(usb_dev_dr_host);
  598. if (usb_dev_dr_client)
  599. platform_device_unregister(usb_dev_dr_client);
  600. unreg_mph:
  601. if (usb_dev_mph)
  602. platform_device_unregister(usb_dev_mph);
  603. err:
  604. return ret;
  605. }
  606. arch_initcall(fsl_usb_of_init);
  607. static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
  608. struct spi_board_info *board_infos,
  609. unsigned int num_board_infos,
  610. void (*activate_cs)(u8 cs, u8 polarity),
  611. void (*deactivate_cs)(u8 cs, u8 polarity))
  612. {
  613. struct device_node *np;
  614. unsigned int i = 0;
  615. for_each_compatible_node(np, type, compatible) {
  616. int ret;
  617. unsigned int j;
  618. const void *prop;
  619. struct resource res[2];
  620. struct platform_device *pdev;
  621. struct fsl_spi_platform_data pdata = {
  622. .activate_cs = activate_cs,
  623. .deactivate_cs = deactivate_cs,
  624. };
  625. memset(res, 0, sizeof(res));
  626. pdata.sysclk = sysclk;
  627. prop = of_get_property(np, "reg", NULL);
  628. if (!prop)
  629. goto err;
  630. pdata.bus_num = *(u32 *)prop;
  631. prop = of_get_property(np, "cell-index", NULL);
  632. if (prop)
  633. i = *(u32 *)prop;
  634. prop = of_get_property(np, "mode", NULL);
  635. if (prop && !strcmp(prop, "cpu-qe"))
  636. pdata.qe_mode = 1;
  637. for (j = 0; j < num_board_infos; j++) {
  638. if (board_infos[j].bus_num == pdata.bus_num)
  639. pdata.max_chipselect++;
  640. }
  641. if (!pdata.max_chipselect)
  642. continue;
  643. ret = of_address_to_resource(np, 0, &res[0]);
  644. if (ret)
  645. goto err;
  646. ret = of_irq_to_resource(np, 0, &res[1]);
  647. if (ret == NO_IRQ)
  648. goto err;
  649. pdev = platform_device_alloc("mpc83xx_spi", i);
  650. if (!pdev)
  651. goto err;
  652. ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
  653. if (ret)
  654. goto unreg;
  655. ret = platform_device_add_resources(pdev, res,
  656. ARRAY_SIZE(res));
  657. if (ret)
  658. goto unreg;
  659. ret = platform_device_add(pdev);
  660. if (ret)
  661. goto unreg;
  662. goto next;
  663. unreg:
  664. platform_device_del(pdev);
  665. err:
  666. pr_err("%s: registration failed\n", np->full_name);
  667. next:
  668. i++;
  669. }
  670. return i;
  671. }
  672. int __init fsl_spi_init(struct spi_board_info *board_infos,
  673. unsigned int num_board_infos,
  674. void (*activate_cs)(u8 cs, u8 polarity),
  675. void (*deactivate_cs)(u8 cs, u8 polarity))
  676. {
  677. u32 sysclk = -1;
  678. int ret;
  679. #ifdef CONFIG_QUICC_ENGINE
  680. /* SPI controller is either clocked from QE or SoC clock */
  681. sysclk = get_brgfreq();
  682. #endif
  683. if (sysclk == -1) {
  684. sysclk = fsl_get_sys_freq();
  685. if (sysclk == -1)
  686. return -ENODEV;
  687. }
  688. ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
  689. num_board_infos, activate_cs, deactivate_cs);
  690. if (!ret)
  691. of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos,
  692. num_board_infos, activate_cs, deactivate_cs);
  693. return spi_register_board_info(board_infos, num_board_infos);
  694. }
  695. #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
  696. static __be32 __iomem *rstcr;
  697. static int __init setup_rstcr(void)
  698. {
  699. struct device_node *np;
  700. np = of_find_node_by_name(NULL, "global-utilities");
  701. if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
  702. const u32 *prop = of_get_property(np, "reg", NULL);
  703. if (prop) {
  704. /* map reset control register
  705. * 0xE00B0 is offset of reset control register
  706. */
  707. rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
  708. if (!rstcr)
  709. printk (KERN_EMERG "Error: reset control "
  710. "register not mapped!\n");
  711. }
  712. } else
  713. printk (KERN_INFO "rstcr compatible register does not exist!\n");
  714. if (np)
  715. of_node_put(np);
  716. return 0;
  717. }
  718. arch_initcall(setup_rstcr);
  719. void fsl_rstcr_restart(char *cmd)
  720. {
  721. local_irq_disable();
  722. if (rstcr)
  723. /* set reset control register */
  724. out_be32(rstcr, 0x2); /* HRESET_REQ */
  725. while (1) ;
  726. }
  727. #endif