tqm8540.dts 4.5 KB

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  1. /*
  2. * TQM 8540 Device Tree Source
  3. *
  4. * Copyright 2008 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /dts-v1/;
  12. / {
  13. model = "tqm,8540";
  14. compatible = "tqm,8540", "tqm,85xx";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. aliases {
  18. ethernet0 = &enet0;
  19. ethernet1 = &enet1;
  20. ethernet2 = &enet2;
  21. serial0 = &serial0;
  22. serial1 = &serial1;
  23. pci0 = &pci0;
  24. };
  25. cpus {
  26. #address-cells = <1>;
  27. #size-cells = <0>;
  28. PowerPC,8540@0 {
  29. device_type = "cpu";
  30. reg = <0>;
  31. d-cache-line-size = <32>;
  32. i-cache-line-size = <32>;
  33. d-cache-size = <32768>;
  34. i-cache-size = <32768>;
  35. timebase-frequency = <0>;
  36. bus-frequency = <0>;
  37. clock-frequency = <0>;
  38. };
  39. };
  40. memory {
  41. device_type = "memory";
  42. reg = <0x00000000 0x10000000>;
  43. };
  44. soc@e0000000 {
  45. #address-cells = <1>;
  46. #size-cells = <1>;
  47. device_type = "soc";
  48. ranges = <0x0 0xe0000000 0x100000>;
  49. reg = <0xe0000000 0x200>;
  50. bus-frequency = <0>;
  51. compatible = "fsl,mpc8540-immr", "simple-bus";
  52. memory-controller@2000 {
  53. compatible = "fsl,8540-memory-controller";
  54. reg = <0x2000 0x1000>;
  55. interrupt-parent = <&mpic>;
  56. interrupts = <18 2>;
  57. };
  58. l2-cache-controller@20000 {
  59. compatible = "fsl,8540-l2-cache-controller";
  60. reg = <0x20000 0x1000>;
  61. cache-line-size = <32>;
  62. cache-size = <0x40000>; // L2, 256K
  63. interrupt-parent = <&mpic>;
  64. interrupts = <16 2>;
  65. };
  66. i2c@3000 {
  67. #address-cells = <1>;
  68. #size-cells = <0>;
  69. cell-index = <0>;
  70. compatible = "fsl-i2c";
  71. reg = <0x3000 0x100>;
  72. interrupts = <43 2>;
  73. interrupt-parent = <&mpic>;
  74. dfsrr;
  75. rtc@68 {
  76. compatible = "dallas,ds1337";
  77. reg = <0x68>;
  78. };
  79. };
  80. mdio@24520 {
  81. #address-cells = <1>;
  82. #size-cells = <0>;
  83. compatible = "fsl,gianfar-mdio";
  84. reg = <0x24520 0x20>;
  85. phy1: ethernet-phy@1 {
  86. interrupt-parent = <&mpic>;
  87. interrupts = <8 1>;
  88. reg = <1>;
  89. device_type = "ethernet-phy";
  90. };
  91. phy2: ethernet-phy@2 {
  92. interrupt-parent = <&mpic>;
  93. interrupts = <8 1>;
  94. reg = <2>;
  95. device_type = "ethernet-phy";
  96. };
  97. phy3: ethernet-phy@3 {
  98. interrupt-parent = <&mpic>;
  99. interrupts = <8 1>;
  100. reg = <3>;
  101. device_type = "ethernet-phy";
  102. };
  103. };
  104. enet0: ethernet@24000 {
  105. cell-index = <0>;
  106. device_type = "network";
  107. model = "TSEC";
  108. compatible = "gianfar";
  109. reg = <0x24000 0x1000>;
  110. local-mac-address = [ 00 00 00 00 00 00 ];
  111. interrupts = <29 2 30 2 34 2>;
  112. interrupt-parent = <&mpic>;
  113. phy-handle = <&phy2>;
  114. };
  115. enet1: ethernet@25000 {
  116. cell-index = <1>;
  117. device_type = "network";
  118. model = "TSEC";
  119. compatible = "gianfar";
  120. reg = <0x25000 0x1000>;
  121. local-mac-address = [ 00 00 00 00 00 00 ];
  122. interrupts = <35 2 36 2 40 2>;
  123. interrupt-parent = <&mpic>;
  124. phy-handle = <&phy1>;
  125. };
  126. enet2: ethernet@26000 {
  127. cell-index = <2>;
  128. device_type = "network";
  129. model = "FEC";
  130. compatible = "gianfar";
  131. reg = <0x26000 0x1000>;
  132. local-mac-address = [ 00 00 00 00 00 00 ];
  133. interrupts = <41 2>;
  134. interrupt-parent = <&mpic>;
  135. phy-handle = <&phy3>;
  136. };
  137. serial0: serial@4500 {
  138. cell-index = <0>;
  139. device_type = "serial";
  140. compatible = "ns16550";
  141. reg = <0x4500 0x100>; // reg base, size
  142. clock-frequency = <0>; // should we fill in in uboot?
  143. interrupts = <42 2>;
  144. interrupt-parent = <&mpic>;
  145. };
  146. serial1: serial@4600 {
  147. cell-index = <1>;
  148. device_type = "serial";
  149. compatible = "ns16550";
  150. reg = <0x4600 0x100>; // reg base, size
  151. clock-frequency = <0>; // should we fill in in uboot?
  152. interrupts = <42 2>;
  153. interrupt-parent = <&mpic>;
  154. };
  155. mpic: pic@40000 {
  156. interrupt-controller;
  157. #address-cells = <0>;
  158. #interrupt-cells = <2>;
  159. reg = <0x40000 0x40000>;
  160. device_type = "open-pic";
  161. };
  162. };
  163. pci0: pci@e0008000 {
  164. cell-index = <0>;
  165. #interrupt-cells = <1>;
  166. #size-cells = <2>;
  167. #address-cells = <3>;
  168. compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
  169. device_type = "pci";
  170. reg = <0xe0008000 0x1000>;
  171. clock-frequency = <66666666>;
  172. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  173. interrupt-map = <
  174. /* IDSEL 28 */
  175. 0xe000 0 0 1 &mpic 2 1
  176. 0xe000 0 0 2 &mpic 3 1>;
  177. interrupt-parent = <&mpic>;
  178. interrupts = <24 2>;
  179. bus-range = <0 0>;
  180. ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
  181. 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
  182. };
  183. };