mpc5121ads.dts 2.9 KB

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  1. /*
  2. * MPC5121E MDS Device Tree Source
  3. *
  4. * Copyright 2007 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /dts-v1/;
  12. / {
  13. model = "mpc5121ads";
  14. compatible = "fsl,mpc5121ads";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. cpus {
  18. #address-cells = <1>;
  19. #size-cells = <0>;
  20. PowerPC,5121@0 {
  21. device_type = "cpu";
  22. reg = <0>;
  23. d-cache-line-size = <0x20>; // 32 bytes
  24. i-cache-line-size = <0x20>; // 32 bytes
  25. d-cache-size = <0x8000>; // L1, 32K
  26. i-cache-size = <0x8000>; // L1, 32K
  27. timebase-frequency = <49500000>;// 49.5 MHz (csb/4)
  28. bus-frequency = <198000000>; // 198 MHz csb bus
  29. clock-frequency = <396000000>; // 396 MHz ppc core
  30. };
  31. };
  32. memory {
  33. device_type = "memory";
  34. reg = <0x00000000 0x10000000>; // 256MB at 0
  35. };
  36. localbus@80000020 {
  37. compatible = "fsl,mpc5121ads-localbus";
  38. #address-cells = <2>;
  39. #size-cells = <1>;
  40. reg = <0x80000020 0x40>;
  41. ranges = <0x0 0x0 0xfc000000 0x04000000
  42. 0x2 0x0 0x82000000 0x00008000>;
  43. flash@0,0 {
  44. compatible = "cfi-flash";
  45. reg = <0 0x0 0x4000000>;
  46. bank-width = <4>;
  47. device-width = <1>;
  48. };
  49. board-control@2,0 {
  50. compatible = "fsl,mpc5121ads-cpld";
  51. reg = <0x2 0x0 0x8000>;
  52. };
  53. };
  54. soc@80000000 {
  55. compatible = "fsl,mpc5121-immr";
  56. #address-cells = <1>;
  57. #size-cells = <1>;
  58. #interrupt-cells = <2>;
  59. ranges = <0x0 0x80000000 0x400000>;
  60. reg = <0x80000000 0x400000>;
  61. bus-frequency = <66000000>; // 66 MHz ips bus
  62. // IPIC
  63. // interrupts cell = <intr #, sense>
  64. // sense values match linux IORESOURCE_IRQ_* defines:
  65. // sense == 8: Level, low assertion
  66. // sense == 2: Edge, high-to-low change
  67. //
  68. ipic: interrupt-controller@c00 {
  69. compatible = "fsl,mpc5121-ipic", "fsl,ipic";
  70. interrupt-controller;
  71. #address-cells = <0>;
  72. #interrupt-cells = <2>;
  73. reg = <0xc00 0x100>;
  74. };
  75. // 512x PSCs are not 52xx PSCs compatible
  76. // PSC3 serial port A aka ttyPSC0
  77. serial@11300 {
  78. device_type = "serial";
  79. compatible = "fsl,mpc5121-psc-uart";
  80. // Logical port assignment needed until driver
  81. // learns to use aliases
  82. port-number = <0>;
  83. cell-index = <3>;
  84. reg = <0x11300 0x100>;
  85. interrupts = <0x28 0x8>; // actually the fifo irq
  86. interrupt-parent = < &ipic >;
  87. };
  88. // PSC4 serial port B aka ttyPSC1
  89. serial@11400 {
  90. device_type = "serial";
  91. compatible = "fsl,mpc5121-psc-uart";
  92. // Logical port assignment needed until driver
  93. // learns to use aliases
  94. port-number = <1>;
  95. cell-index = <4>;
  96. reg = <0x11400 0x100>;
  97. interrupts = <0x28 0x8>; // actually the fifo irq
  98. interrupt-parent = < &ipic >;
  99. };
  100. pscsfifo@11f00 {
  101. compatible = "fsl,mpc5121-psc-fifo";
  102. reg = <0x11f00 0x100>;
  103. interrupts = <0x28 0x8>;
  104. interrupt-parent = < &ipic >;
  105. };
  106. };
  107. };