usb.c 19 KB

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  1. /*
  2. * arch/arm/plat-omap/usb.c -- platform level USB initialization
  3. *
  4. * Copyright (C) 2004 Texas Instruments, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #undef DEBUG
  21. #include <linux/module.h>
  22. #include <linux/kernel.h>
  23. #include <linux/types.h>
  24. #include <linux/errno.h>
  25. #include <linux/init.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/usb/otg.h>
  28. #include <asm/io.h>
  29. #include <asm/irq.h>
  30. #include <asm/system.h>
  31. #include <asm/hardware.h>
  32. #include <asm/arch/control.h>
  33. #include <asm/arch/mux.h>
  34. #include <asm/arch/usb.h>
  35. #include <asm/arch/board.h>
  36. #ifdef CONFIG_ARCH_OMAP1
  37. #define INT_USB_IRQ_GEN IH2_BASE + 20
  38. #define INT_USB_IRQ_NISO IH2_BASE + 30
  39. #define INT_USB_IRQ_ISO IH2_BASE + 29
  40. #define INT_USB_IRQ_HGEN INT_USB_HHC_1
  41. #define INT_USB_IRQ_OTG IH2_BASE + 8
  42. #else
  43. #define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN
  44. #define INT_USB_IRQ_NISO INT_24XX_USB_IRQ_NISO
  45. #define INT_USB_IRQ_ISO INT_24XX_USB_IRQ_ISO
  46. #define INT_USB_IRQ_HGEN INT_24XX_USB_IRQ_HGEN
  47. #define INT_USB_IRQ_OTG INT_24XX_USB_IRQ_OTG
  48. #endif
  49. /* These routines should handle the standard chip-specific modes
  50. * for usb0/1/2 ports, covering basic mux and transceiver setup.
  51. *
  52. * Some board-*.c files will need to set up additional mux options,
  53. * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
  54. */
  55. /* TESTED ON:
  56. * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
  57. * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
  58. * - 5912 OSK UDC, with *nonstandard* A-to-A cable
  59. * - 1510 Innovator UDC with bundled usb0 cable
  60. * - 1510 Innovator OHCI with bundled usb1/usb2 cable
  61. * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
  62. * - 1710 custom development board using alternate pin group
  63. * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
  64. */
  65. /*-------------------------------------------------------------------------*/
  66. #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_USB_MUSB_OTG)
  67. static struct otg_transceiver *xceiv;
  68. /**
  69. * otg_get_transceiver - find the (single) OTG transceiver driver
  70. *
  71. * Returns the transceiver driver, after getting a refcount to it; or
  72. * null if there is no such transceiver. The caller is responsible for
  73. * releasing that count.
  74. */
  75. struct otg_transceiver *otg_get_transceiver(void)
  76. {
  77. if (xceiv)
  78. get_device(xceiv->dev);
  79. return xceiv;
  80. }
  81. EXPORT_SYMBOL(otg_get_transceiver);
  82. int otg_set_transceiver(struct otg_transceiver *x)
  83. {
  84. if (xceiv && x)
  85. return -EBUSY;
  86. xceiv = x;
  87. return 0;
  88. }
  89. EXPORT_SYMBOL(otg_set_transceiver);
  90. #endif
  91. /*-------------------------------------------------------------------------*/
  92. #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)
  93. static void omap2_usb_devconf_clear(u8 port, u32 mask)
  94. {
  95. u32 r;
  96. r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  97. r &= ~USBTXWRMODEI(port, mask);
  98. omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
  99. }
  100. static void omap2_usb_devconf_set(u8 port, u32 mask)
  101. {
  102. u32 r;
  103. r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  104. r |= USBTXWRMODEI(port, mask);
  105. omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
  106. }
  107. static void omap2_usb2_disable_5pinbitll(void)
  108. {
  109. u32 r;
  110. r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  111. r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI);
  112. omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
  113. }
  114. static void omap2_usb2_enable_5pinunitll(void)
  115. {
  116. u32 r;
  117. r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  118. r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI;
  119. omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
  120. }
  121. static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
  122. {
  123. u32 syscon1 = 0;
  124. if (cpu_is_omap24xx())
  125. omap2_usb_devconf_clear(0, USB_BIDIR_TLL);
  126. if (nwires == 0) {
  127. if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
  128. /* pulldown D+/D- */
  129. USB_TRANSCEIVER_CTRL_REG &= ~(3 << 1);
  130. }
  131. return 0;
  132. }
  133. if (is_device) {
  134. if (cpu_is_omap24xx())
  135. omap_cfg_reg(J20_24XX_USB0_PUEN);
  136. else
  137. omap_cfg_reg(W4_USB_PUEN);
  138. }
  139. /* internal transceiver (unavailable on 17xx, 24xx) */
  140. if (!cpu_class_is_omap2() && nwires == 2) {
  141. // omap_cfg_reg(P9_USB_DP);
  142. // omap_cfg_reg(R8_USB_DM);
  143. if (cpu_is_omap15xx()) {
  144. /* This works on 1510-Innovator */
  145. return 0;
  146. }
  147. /* NOTES:
  148. * - peripheral should configure VBUS detection!
  149. * - only peripherals may use the internal D+/D- pulldowns
  150. * - OTG support on this port not yet written
  151. */
  152. USB_TRANSCEIVER_CTRL_REG &= ~(7 << 4);
  153. if (!is_device)
  154. USB_TRANSCEIVER_CTRL_REG |= (3 << 1);
  155. return 3 << 16;
  156. }
  157. /* alternate pin config, external transceiver */
  158. if (cpu_is_omap15xx()) {
  159. printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
  160. return 0;
  161. }
  162. if (cpu_is_omap24xx()) {
  163. omap_cfg_reg(K18_24XX_USB0_DAT);
  164. omap_cfg_reg(K19_24XX_USB0_TXEN);
  165. omap_cfg_reg(J14_24XX_USB0_SE0);
  166. if (nwires != 3)
  167. omap_cfg_reg(J18_24XX_USB0_RCV);
  168. } else {
  169. omap_cfg_reg(V6_USB0_TXD);
  170. omap_cfg_reg(W9_USB0_TXEN);
  171. omap_cfg_reg(W5_USB0_SE0);
  172. if (nwires != 3)
  173. omap_cfg_reg(Y5_USB0_RCV);
  174. }
  175. /* NOTE: SPEED and SUSP aren't configured here. OTG hosts
  176. * may be able to use I2C requests to set those bits along
  177. * with VBUS switching and overcurrent detection.
  178. */
  179. if (cpu_class_is_omap1() && nwires != 6)
  180. USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB2_UNI_R;
  181. switch (nwires) {
  182. case 3:
  183. syscon1 = 2;
  184. if (cpu_is_omap24xx())
  185. omap2_usb_devconf_set(0, USB_BIDIR);
  186. break;
  187. case 4:
  188. syscon1 = 1;
  189. if (cpu_is_omap24xx())
  190. omap2_usb_devconf_set(0, USB_BIDIR);
  191. break;
  192. case 6:
  193. syscon1 = 3;
  194. if (cpu_is_omap24xx()) {
  195. omap_cfg_reg(J19_24XX_USB0_VP);
  196. omap_cfg_reg(K20_24XX_USB0_VM);
  197. omap2_usb_devconf_set(0, USB_UNIDIR);
  198. } else {
  199. omap_cfg_reg(AA9_USB0_VP);
  200. omap_cfg_reg(R9_USB0_VM);
  201. USB_TRANSCEIVER_CTRL_REG |= CONF_USB2_UNI_R;
  202. }
  203. break;
  204. default:
  205. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  206. 0, nwires);
  207. }
  208. return syscon1 << 16;
  209. }
  210. static u32 __init omap_usb1_init(unsigned nwires)
  211. {
  212. u32 syscon1 = 0;
  213. if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6)
  214. USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB1_UNI_R;
  215. if (cpu_is_omap24xx())
  216. omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
  217. if (nwires == 0)
  218. return 0;
  219. /* external transceiver */
  220. if (cpu_class_is_omap1()) {
  221. omap_cfg_reg(USB1_TXD);
  222. omap_cfg_reg(USB1_TXEN);
  223. if (nwires != 3)
  224. omap_cfg_reg(USB1_RCV);
  225. }
  226. if (cpu_is_omap15xx()) {
  227. omap_cfg_reg(USB1_SEO);
  228. omap_cfg_reg(USB1_SPEED);
  229. // SUSP
  230. } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
  231. omap_cfg_reg(W13_1610_USB1_SE0);
  232. omap_cfg_reg(R13_1610_USB1_SPEED);
  233. // SUSP
  234. } else if (cpu_is_omap1710()) {
  235. omap_cfg_reg(R13_1710_USB1_SE0);
  236. // SUSP
  237. } else if (cpu_is_omap24xx()) {
  238. /* NOTE: board-specific code must set up pin muxing for usb1,
  239. * since each signal could come out on either of two balls.
  240. */
  241. } else {
  242. pr_debug("usb%d cpu unrecognized\n", 1);
  243. return 0;
  244. }
  245. switch (nwires) {
  246. case 2:
  247. if (!cpu_is_omap24xx())
  248. goto bad;
  249. /* NOTE: board-specific code must override this setting if
  250. * this TLL link is not using DP/DM
  251. */
  252. syscon1 = 1;
  253. omap2_usb_devconf_set(1, USB_BIDIR_TLL);
  254. break;
  255. case 3:
  256. syscon1 = 2;
  257. if (cpu_is_omap24xx())
  258. omap2_usb_devconf_set(1, USB_BIDIR);
  259. break;
  260. case 4:
  261. syscon1 = 1;
  262. if (cpu_is_omap24xx())
  263. omap2_usb_devconf_set(1, USB_BIDIR);
  264. break;
  265. case 6:
  266. if (cpu_is_omap24xx())
  267. goto bad;
  268. syscon1 = 3;
  269. omap_cfg_reg(USB1_VP);
  270. omap_cfg_reg(USB1_VM);
  271. if (!cpu_is_omap15xx())
  272. USB_TRANSCEIVER_CTRL_REG |= CONF_USB1_UNI_R;
  273. break;
  274. default:
  275. bad:
  276. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  277. 1, nwires);
  278. }
  279. return syscon1 << 20;
  280. }
  281. static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
  282. {
  283. u32 syscon1 = 0;
  284. if (cpu_is_omap24xx()) {
  285. omap2_usb2_disable_5pinbitll();
  286. alt_pingroup = 0;
  287. }
  288. /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
  289. if (alt_pingroup || nwires == 0)
  290. return 0;
  291. if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6)
  292. USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB2_UNI_R;
  293. /* external transceiver */
  294. if (cpu_is_omap15xx()) {
  295. omap_cfg_reg(USB2_TXD);
  296. omap_cfg_reg(USB2_TXEN);
  297. omap_cfg_reg(USB2_SEO);
  298. if (nwires != 3)
  299. omap_cfg_reg(USB2_RCV);
  300. /* there is no USB2_SPEED */
  301. } else if (cpu_is_omap16xx()) {
  302. omap_cfg_reg(V6_USB2_TXD);
  303. omap_cfg_reg(W9_USB2_TXEN);
  304. omap_cfg_reg(W5_USB2_SE0);
  305. if (nwires != 3)
  306. omap_cfg_reg(Y5_USB2_RCV);
  307. // FIXME omap_cfg_reg(USB2_SPEED);
  308. } else if (cpu_is_omap24xx()) {
  309. omap_cfg_reg(Y11_24XX_USB2_DAT);
  310. omap_cfg_reg(AA10_24XX_USB2_SE0);
  311. if (nwires > 2)
  312. omap_cfg_reg(AA12_24XX_USB2_TXEN);
  313. if (nwires > 3)
  314. omap_cfg_reg(AA6_24XX_USB2_RCV);
  315. } else {
  316. pr_debug("usb%d cpu unrecognized\n", 1);
  317. return 0;
  318. }
  319. // if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP);
  320. switch (nwires) {
  321. case 2:
  322. if (!cpu_is_omap24xx())
  323. goto bad;
  324. /* NOTE: board-specific code must override this setting if
  325. * this TLL link is not using DP/DM
  326. */
  327. syscon1 = 1;
  328. omap2_usb_devconf_set(2, USB_BIDIR_TLL);
  329. break;
  330. case 3:
  331. syscon1 = 2;
  332. if (cpu_is_omap24xx())
  333. omap2_usb_devconf_set(2, USB_BIDIR);
  334. break;
  335. case 4:
  336. syscon1 = 1;
  337. if (cpu_is_omap24xx())
  338. omap2_usb_devconf_set(2, USB_BIDIR);
  339. break;
  340. case 5:
  341. if (!cpu_is_omap24xx())
  342. goto bad;
  343. omap_cfg_reg(AA4_24XX_USB2_TLLSE0);
  344. /* NOTE: board-specific code must override this setting if
  345. * this TLL link is not using DP/DM. Something must also
  346. * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
  347. */
  348. syscon1 = 3;
  349. omap2_usb2_enable_5pinunitll();
  350. break;
  351. case 6:
  352. if (cpu_is_omap24xx())
  353. goto bad;
  354. syscon1 = 3;
  355. if (cpu_is_omap15xx()) {
  356. omap_cfg_reg(USB2_VP);
  357. omap_cfg_reg(USB2_VM);
  358. } else {
  359. omap_cfg_reg(AA9_USB2_VP);
  360. omap_cfg_reg(R9_USB2_VM);
  361. USB_TRANSCEIVER_CTRL_REG |= CONF_USB2_UNI_R;
  362. }
  363. break;
  364. default:
  365. bad:
  366. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  367. 2, nwires);
  368. }
  369. return syscon1 << 24;
  370. }
  371. #endif
  372. /*-------------------------------------------------------------------------*/
  373. #if defined(CONFIG_USB_GADGET_OMAP) || \
  374. defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) || \
  375. (defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG))
  376. static void usb_release(struct device *dev)
  377. {
  378. /* normally not freed */
  379. }
  380. #endif
  381. #ifdef CONFIG_USB_GADGET_OMAP
  382. static struct resource udc_resources[] = {
  383. /* order is significant! */
  384. { /* registers */
  385. .start = UDC_BASE,
  386. .end = UDC_BASE + 0xff,
  387. .flags = IORESOURCE_MEM,
  388. }, { /* general IRQ */
  389. .start = INT_USB_IRQ_GEN,
  390. .flags = IORESOURCE_IRQ,
  391. }, { /* PIO IRQ */
  392. .start = INT_USB_IRQ_NISO,
  393. .flags = IORESOURCE_IRQ,
  394. }, { /* SOF IRQ */
  395. .start = INT_USB_IRQ_ISO,
  396. .flags = IORESOURCE_IRQ,
  397. },
  398. };
  399. static u64 udc_dmamask = ~(u32)0;
  400. static struct platform_device udc_device = {
  401. .name = "omap_udc",
  402. .id = -1,
  403. .dev = {
  404. .release = usb_release,
  405. .dma_mask = &udc_dmamask,
  406. .coherent_dma_mask = 0xffffffff,
  407. },
  408. .num_resources = ARRAY_SIZE(udc_resources),
  409. .resource = udc_resources,
  410. };
  411. #endif
  412. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  413. /* The dmamask must be set for OHCI to work */
  414. static u64 ohci_dmamask = ~(u32)0;
  415. static struct resource ohci_resources[] = {
  416. {
  417. .start = OMAP_OHCI_BASE,
  418. .end = OMAP_OHCI_BASE + 0xff,
  419. .flags = IORESOURCE_MEM,
  420. },
  421. {
  422. .start = INT_USB_IRQ_HGEN,
  423. .flags = IORESOURCE_IRQ,
  424. },
  425. };
  426. static struct platform_device ohci_device = {
  427. .name = "ohci",
  428. .id = -1,
  429. .dev = {
  430. .release = usb_release,
  431. .dma_mask = &ohci_dmamask,
  432. .coherent_dma_mask = 0xffffffff,
  433. },
  434. .num_resources = ARRAY_SIZE(ohci_resources),
  435. .resource = ohci_resources,
  436. };
  437. #endif
  438. #if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
  439. static struct resource otg_resources[] = {
  440. /* order is significant! */
  441. {
  442. .start = OTG_BASE,
  443. .end = OTG_BASE + 0xff,
  444. .flags = IORESOURCE_MEM,
  445. }, {
  446. .start = INT_USB_IRQ_OTG,
  447. .flags = IORESOURCE_IRQ,
  448. },
  449. };
  450. static struct platform_device otg_device = {
  451. .name = "omap_otg",
  452. .id = -1,
  453. .dev = {
  454. .release = usb_release,
  455. },
  456. .num_resources = ARRAY_SIZE(otg_resources),
  457. .resource = otg_resources,
  458. };
  459. #endif
  460. /*-------------------------------------------------------------------------*/
  461. #define ULPD_CLOCK_CTRL_REG __REG16(ULPD_CLOCK_CTRL)
  462. #define ULPD_SOFT_REQ_REG __REG16(ULPD_SOFT_REQ)
  463. // FIXME correct answer depends on hmc_mode,
  464. // as does (on omap1) any nonzero value for config->otg port number
  465. #ifdef CONFIG_USB_GADGET_OMAP
  466. #define is_usb0_device(config) 1
  467. #else
  468. #define is_usb0_device(config) 0
  469. #endif
  470. /*-------------------------------------------------------------------------*/
  471. #ifdef CONFIG_ARCH_OMAP_OTG
  472. void __init
  473. omap_otg_init(struct omap_usb_config *config)
  474. {
  475. u32 syscon = OTG_SYSCON_1_REG & 0xffff;
  476. int status;
  477. int alt_pingroup = 0;
  478. /* NOTE: no bus or clock setup (yet?) */
  479. syscon = OTG_SYSCON_1_REG & 0xffff;
  480. if (!(syscon & OTG_RESET_DONE))
  481. pr_debug("USB resets not complete?\n");
  482. // OTG_IRQ_EN_REG = 0;
  483. /* pin muxing and transceiver pinouts */
  484. if (config->pins[0] > 2) /* alt pingroup 2 */
  485. alt_pingroup = 1;
  486. syscon |= omap_usb0_init(config->pins[0], is_usb0_device(config));
  487. syscon |= omap_usb1_init(config->pins[1]);
  488. syscon |= omap_usb2_init(config->pins[2], alt_pingroup);
  489. pr_debug("OTG_SYSCON_1_REG = %08x\n", syscon);
  490. OTG_SYSCON_1_REG = syscon;
  491. syscon = config->hmc_mode;
  492. syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
  493. #ifdef CONFIG_USB_OTG
  494. if (config->otg)
  495. syscon |= OTG_EN;
  496. #endif
  497. if (cpu_class_is_omap1())
  498. pr_debug("USB_TRANSCEIVER_CTRL_REG = %03x\n", USB_TRANSCEIVER_CTRL_REG);
  499. pr_debug("OTG_SYSCON_2_REG = %08x\n", syscon);
  500. OTG_SYSCON_2_REG = syscon;
  501. printk("USB: hmc %d", config->hmc_mode);
  502. if (!alt_pingroup)
  503. printk(", usb2 alt %d wires", config->pins[2]);
  504. else if (config->pins[0])
  505. printk(", usb0 %d wires%s", config->pins[0],
  506. is_usb0_device(config) ? " (dev)" : "");
  507. if (config->pins[1])
  508. printk(", usb1 %d wires", config->pins[1]);
  509. if (!alt_pingroup && config->pins[2])
  510. printk(", usb2 %d wires", config->pins[2]);
  511. if (config->otg)
  512. printk(", Mini-AB on usb%d", config->otg - 1);
  513. printk("\n");
  514. if (cpu_class_is_omap1()) {
  515. /* leave USB clocks/controllers off until needed */
  516. ULPD_SOFT_REQ_REG &= ~SOFT_USB_CLK_REQ;
  517. ULPD_CLOCK_CTRL_REG &= ~USB_MCLK_EN;
  518. ULPD_CLOCK_CTRL_REG |= DIS_USB_PVCI_CLK;
  519. }
  520. syscon = OTG_SYSCON_1_REG;
  521. syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
  522. #ifdef CONFIG_USB_GADGET_OMAP
  523. if (config->otg || config->register_dev) {
  524. syscon &= ~DEV_IDLE_EN;
  525. udc_device.dev.platform_data = config;
  526. /* FIXME patch IRQ numbers for omap730 */
  527. status = platform_device_register(&udc_device);
  528. if (status)
  529. pr_debug("can't register UDC device, %d\n", status);
  530. }
  531. #endif
  532. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  533. if (config->otg || config->register_host) {
  534. syscon &= ~HST_IDLE_EN;
  535. ohci_device.dev.platform_data = config;
  536. if (cpu_is_omap730())
  537. ohci_resources[1].start = INT_730_USB_HHC_1;
  538. status = platform_device_register(&ohci_device);
  539. if (status)
  540. pr_debug("can't register OHCI device, %d\n", status);
  541. }
  542. #endif
  543. #ifdef CONFIG_USB_OTG
  544. if (config->otg) {
  545. syscon &= ~OTG_IDLE_EN;
  546. otg_device.dev.platform_data = config;
  547. if (cpu_is_omap730())
  548. otg_resources[1].start = INT_730_USB_OTG;
  549. status = platform_device_register(&otg_device);
  550. if (status)
  551. pr_debug("can't register OTG device, %d\n", status);
  552. }
  553. #endif
  554. pr_debug("OTG_SYSCON_1_REG = %08x\n", syscon);
  555. OTG_SYSCON_1_REG = syscon;
  556. status = 0;
  557. }
  558. #else
  559. static inline void omap_otg_init(struct omap_usb_config *config) {}
  560. #endif
  561. /*-------------------------------------------------------------------------*/
  562. #ifdef CONFIG_ARCH_OMAP15XX
  563. #define ULPD_DPLL_CTRL_REG __REG16(ULPD_DPLL_CTRL)
  564. #define DPLL_IOB (1 << 13)
  565. #define DPLL_PLL_ENABLE (1 << 4)
  566. #define DPLL_LOCK (1 << 0)
  567. #define ULPD_APLL_CTRL_REG __REG16(ULPD_APLL_CTRL)
  568. #define APLL_NDPLL_SWITCH (1 << 0)
  569. static void __init omap_1510_usb_init(struct omap_usb_config *config)
  570. {
  571. unsigned int val;
  572. omap_usb0_init(config->pins[0], is_usb0_device(config));
  573. omap_usb1_init(config->pins[1]);
  574. omap_usb2_init(config->pins[2], 0);
  575. val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
  576. val |= (config->hmc_mode << 1);
  577. omap_writel(val, MOD_CONF_CTRL_0);
  578. printk("USB: hmc %d", config->hmc_mode);
  579. if (config->pins[0])
  580. printk(", usb0 %d wires%s", config->pins[0],
  581. is_usb0_device(config) ? " (dev)" : "");
  582. if (config->pins[1])
  583. printk(", usb1 %d wires", config->pins[1]);
  584. if (config->pins[2])
  585. printk(", usb2 %d wires", config->pins[2]);
  586. printk("\n");
  587. /* use DPLL for 48 MHz function clock */
  588. pr_debug("APLL %04x DPLL %04x REQ %04x\n", ULPD_APLL_CTRL_REG,
  589. ULPD_DPLL_CTRL_REG, ULPD_SOFT_REQ_REG);
  590. ULPD_APLL_CTRL_REG &= ~APLL_NDPLL_SWITCH;
  591. ULPD_DPLL_CTRL_REG |= DPLL_IOB | DPLL_PLL_ENABLE;
  592. ULPD_SOFT_REQ_REG |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
  593. while (!(ULPD_DPLL_CTRL_REG & DPLL_LOCK))
  594. cpu_relax();
  595. #ifdef CONFIG_USB_GADGET_OMAP
  596. if (config->register_dev) {
  597. int status;
  598. udc_device.dev.platform_data = config;
  599. status = platform_device_register(&udc_device);
  600. if (status)
  601. pr_debug("can't register UDC device, %d\n", status);
  602. /* udc driver gates 48MHz by D+ pullup */
  603. }
  604. #endif
  605. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  606. if (config->register_host) {
  607. int status;
  608. ohci_device.dev.platform_data = config;
  609. status = platform_device_register(&ohci_device);
  610. if (status)
  611. pr_debug("can't register OHCI device, %d\n", status);
  612. /* hcd explicitly gates 48MHz */
  613. }
  614. #endif
  615. }
  616. #else
  617. static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
  618. #endif
  619. /*-------------------------------------------------------------------------*/
  620. static struct omap_usb_config platform_data;
  621. static int __init
  622. omap_usb_init(void)
  623. {
  624. const struct omap_usb_config *config;
  625. config = omap_get_config(OMAP_TAG_USB, struct omap_usb_config);
  626. if (config == NULL) {
  627. printk(KERN_ERR "USB: No board-specific "
  628. "platform config found\n");
  629. return -ENODEV;
  630. }
  631. platform_data = *config;
  632. if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx())
  633. omap_otg_init(&platform_data);
  634. else if (cpu_is_omap15xx())
  635. omap_1510_usb_init(&platform_data);
  636. else {
  637. printk(KERN_ERR "USB: No init for your chip yet\n");
  638. return -ENODEV;
  639. }
  640. return 0;
  641. }
  642. subsys_initcall(omap_usb_init);